/* Allocate registers within a basic block, for GNU compiler.
Copyright (C) 1987, 1988, 1991, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001 Free Software Foundation, Inc.
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 2, or (at your option) any later
+version.
-GNU CC is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+along with GCC; see the file COPYING. If not, write to the Free
+Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
+02110-1301, USA. */
/* Allocation of hard register numbers to pseudo registers is done in
two passes. In this pass we consider only regs that are born and
#include "config.h"
#include "system.h"
+#include "coretypes.h"
+#include "tm.h"
+#include "hard-reg-set.h"
#include "rtl.h"
#include "tm_p.h"
#include "flags.h"
-#include "hard-reg-set.h"
-#include "basic-block.h"
#include "regs.h"
#include "function.h"
#include "insn-config.h"
#include "output.h"
#include "toplev.h"
#include "except.h"
+#include "integrate.h"
+#include "reload.h"
+#include "ggc.h"
+#include "timevar.h"
+#include "tree-pass.h"
\f
/* Next quantity number available for allocation. */
static int next_qty;
-/* Information we maitain about each quantity. */
+/* Information we maintain about each quantity. */
struct qty
{
/* The number of refs to quantity Q. */
/* Number of words needed to hold the data in given quantity.
This depends on its machine mode. It is used for these purposes:
- 1. It is used in computing the relative importances of qtys,
+ 1. It is used in computing the relative importance of qtys,
which determines the order in which we look for regs for them.
2. It is used in rules that prevent tying several registers of
different sizes in a way that is geometrically impossible
int n_calls_crossed;
+ /* Number of times a reg tied to given qty lives across a CALL_INSN
+ that might throw. */
+
+ int n_throwing_calls_crossed;
+
/* The register number of one pseudo register whose reg_qty value is Q.
This register should be the head of the chain
maintained in reg_next_in_qty. */
or -1 if none was found. */
short phys_reg;
-
- /* Nonzero if this quantity has been used in a SUBREG in some
- way that is illegal. */
-
- char changes_mode;
-
};
static struct qty *qty;
struct equivalence
{
/* Set when an attempt should be made to replace a register
- with the associated src entry. */
+ with the associated src_p entry. */
char replace;
rtx replacement;
- rtx src;
+ rtx *src_p;
/* Loop depth is used to recognize equivalences which appear
to be present within the same loop (or in an inner loop). */
/* The list of each instruction which initializes this register. */
rtx init_insns;
+
+ /* Nonzero if this had a preexisting REG_EQUIV note. */
+
+ int is_arg_equivalence;
};
/* reg_equiv[N] (where N is a pseudo reg number) is the equivalence
/* Nonzero if we recorded an equivalence for a LABEL_REF. */
static int recorded_label_ref;
-static void alloc_qty PARAMS ((int, enum machine_mode, int, int));
-static void validate_equiv_mem_from_store PARAMS ((rtx, rtx, void *));
-static int validate_equiv_mem PARAMS ((rtx, rtx, rtx));
-static int equiv_init_varies_p PARAMS ((rtx));
-static int equiv_init_movable_p PARAMS ((rtx, int));
-static int contains_replace_regs PARAMS ((rtx));
-static int memref_referenced_p PARAMS ((rtx, rtx));
-static int memref_used_between_p PARAMS ((rtx, rtx, rtx));
-static void update_equiv_regs PARAMS ((void));
-static void no_equiv PARAMS ((rtx, rtx, void *));
-static void block_alloc PARAMS ((int));
-static int qty_sugg_compare PARAMS ((int, int));
-static int qty_sugg_compare_1 PARAMS ((const PTR, const PTR));
-static int qty_compare PARAMS ((int, int));
-static int qty_compare_1 PARAMS ((const PTR, const PTR));
-static int combine_regs PARAMS ((rtx, rtx, int, int, rtx, int));
-static int reg_meets_class_p PARAMS ((int, enum reg_class));
-static void update_qty_class PARAMS ((int, int));
-static void reg_is_set PARAMS ((rtx, rtx, void *));
-static void reg_is_born PARAMS ((rtx, int));
-static void wipe_dead_reg PARAMS ((rtx, int));
-static int find_free_reg PARAMS ((enum reg_class, enum machine_mode,
- int, int, int, int, int));
-static void mark_life PARAMS ((int, enum machine_mode, int));
-static void post_mark_life PARAMS ((int, enum machine_mode, int, int, int));
-static int no_conflict_p PARAMS ((rtx, rtx, rtx));
-static int requires_inout PARAMS ((const char *));
+static void alloc_qty (int, enum machine_mode, int, int);
+static void validate_equiv_mem_from_store (rtx, rtx, void *);
+static int validate_equiv_mem (rtx, rtx, rtx);
+static int equiv_init_varies_p (rtx);
+static int equiv_init_movable_p (rtx, int);
+static int contains_replace_regs (rtx);
+static int memref_referenced_p (rtx, rtx);
+static int memref_used_between_p (rtx, rtx, rtx);
+static void update_equiv_regs (void);
+static void no_equiv (rtx, rtx, void *);
+static void block_alloc (int);
+static int qty_sugg_compare (int, int);
+static int qty_sugg_compare_1 (const void *, const void *);
+static int qty_compare (int, int);
+static int qty_compare_1 (const void *, const void *);
+static int combine_regs (rtx, rtx, int, int, rtx, int);
+static int reg_meets_class_p (int, enum reg_class);
+static void update_qty_class (int, int);
+static void reg_is_set (rtx, rtx, void *);
+static void reg_is_born (rtx, int);
+static void wipe_dead_reg (rtx, int);
+static int find_free_reg (enum reg_class, enum machine_mode, int, int, int,
+ int, int);
+static void mark_life (int, enum machine_mode, int);
+static void post_mark_life (int, enum machine_mode, int, int, int);
+static int no_conflict_p (rtx, rtx, rtx);
+static int requires_inout (const char *);
\f
/* Allocate a new quantity (new within current basic block)
for register number REGNO which is born at index BIRTH
within the block. MODE and SIZE are info on reg REGNO. */
static void
-alloc_qty (regno, mode, size, birth)
- int regno;
- enum machine_mode mode;
- int size, birth;
+alloc_qty (int regno, enum machine_mode mode, int size, int birth)
{
- register int qtyno = next_qty++;
+ int qtyno = next_qty++;
reg_qty[regno] = qtyno;
reg_offset[regno] = 0;
qty[qtyno].mode = mode;
qty[qtyno].birth = birth;
qty[qtyno].n_calls_crossed = REG_N_CALLS_CROSSED (regno);
+ qty[qtyno].n_throwing_calls_crossed = REG_N_THROWING_CALLS_CROSSED (regno);
qty[qtyno].min_class = reg_preferred_class (regno);
qty[qtyno].alternate_class = reg_alternate_class (regno);
qty[qtyno].n_refs = REG_N_REFS (regno);
qty[qtyno].freq = REG_FREQ (regno);
- qty[qtyno].changes_mode = REG_CHANGES_MODE (regno);
}
\f
/* Main entry point of this file. */
-int
-local_alloc ()
+static int
+local_alloc (void)
{
- register int b, i;
+ int i;
int max_qty;
+ basic_block b;
/* We need to keep track of whether or not we recorded a LABEL_REF so
that we know if the jump optimizer needs to be rerun. */
See the declarations of these variables, above,
for what they mean. */
- qty = (struct qty *) xmalloc (max_qty * sizeof (struct qty));
- qty_phys_copy_sugg
- = (HARD_REG_SET *) xmalloc (max_qty * sizeof (HARD_REG_SET));
- qty_phys_num_copy_sugg = (short *) xmalloc (max_qty * sizeof (short));
- qty_phys_sugg = (HARD_REG_SET *) xmalloc (max_qty * sizeof (HARD_REG_SET));
- qty_phys_num_sugg = (short *) xmalloc (max_qty * sizeof (short));
+ qty = XNEWVEC (struct qty, max_qty);
+ qty_phys_copy_sugg = XNEWVEC (HARD_REG_SET, max_qty);
+ qty_phys_num_copy_sugg = XNEWVEC (short, max_qty);
+ qty_phys_sugg = XNEWVEC (HARD_REG_SET, max_qty);
+ qty_phys_num_sugg = XNEWVEC (short, max_qty);
- reg_qty = (int *) xmalloc (max_regno * sizeof (int));
- reg_offset = (char *) xmalloc (max_regno * sizeof (char));
- reg_next_in_qty = (int *) xmalloc (max_regno * sizeof (int));
-
- /* Allocate the reg_renumber array. */
- allocate_reg_info (max_regno, FALSE, TRUE);
+ reg_qty = XNEWVEC (int, max_regno);
+ reg_offset = XNEWVEC (char, max_regno);
+ reg_next_in_qty = XNEWVEC (int, max_regno);
/* Determine which pseudo-registers can be allocated by local-alloc.
In general, these are the registers used only in a single block and
/* Allocate each block's local registers, block by block. */
- for (b = 0; b < n_basic_blocks; b++)
+ FOR_EACH_BB (b)
{
/* NEXT_QTY indicates which elements of the `qty_...'
vectors might need to be initialized because they were used
else
{
#define CLEAR(vector) \
- memset ((char *) (vector), 0, (sizeof (*(vector))) * next_qty);
+ memset ((vector), 0, (sizeof (*(vector))) * next_qty);
CLEAR (qty_phys_copy_sugg);
CLEAR (qty_phys_num_copy_sugg);
next_qty = 0;
- block_alloc (b);
+ block_alloc (b->index);
}
free (qty);
Called via note_stores. */
static void
-validate_equiv_mem_from_store (dest, set, data)
- rtx dest;
- rtx set ATTRIBUTE_UNUSED;
- void *data ATTRIBUTE_UNUSED;
+validate_equiv_mem_from_store (rtx dest, rtx set ATTRIBUTE_UNUSED,
+ void *data ATTRIBUTE_UNUSED)
{
- if ((GET_CODE (dest) == REG
+ if ((REG_P (dest)
&& reg_overlap_mentioned_p (dest, equiv_mem))
- || (GET_CODE (dest) == MEM
+ || (MEM_P (dest)
&& true_dependence (dest, VOIDmode, equiv_mem, rtx_varies_p)))
equiv_mem_modified = 1;
}
Return 1 if MEMREF remains valid. */
static int
-validate_equiv_mem (start, reg, memref)
- rtx start;
- rtx reg;
- rtx memref;
+validate_equiv_mem (rtx start, rtx reg, rtx memref)
{
rtx insn;
rtx note;
if (find_reg_note (insn, REG_DEAD, reg))
return 1;
- if (GET_CODE (insn) == CALL_INSN && ! RTX_UNCHANGING_P (memref)
+ if (CALL_P (insn) && ! MEM_READONLY_P (memref)
&& ! CONST_OR_PURE_CALL_P (insn))
return 0;
for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
if ((REG_NOTE_KIND (note) == REG_INC
|| REG_NOTE_KIND (note) == REG_DEAD)
- && GET_CODE (XEXP (note, 0)) == REG
+ && REG_P (XEXP (note, 0))
&& reg_overlap_mentioned_p (XEXP (note, 0), memref))
return 0;
}
/* Returns zero if X is known to be invariant. */
static int
-equiv_init_varies_p (x)
- rtx x;
+equiv_init_varies_p (rtx x)
{
- register RTX_CODE code = GET_CODE (x);
- register int i;
- register const char *fmt;
+ RTX_CODE code = GET_CODE (x);
+ int i;
+ const char *fmt;
switch (code)
{
case MEM:
- return ! RTX_UNCHANGING_P (x) || equiv_init_varies_p (XEXP (x, 0));
-
- case QUEUED:
- return 1;
+ return !MEM_READONLY_P (x) || equiv_init_varies_p (XEXP (x, 0));
case CONST:
case CONST_INT:
case CONST_DOUBLE:
+ case CONST_VECTOR:
case SYMBOL_REF:
case LABEL_REF:
return 0;
if (MEM_VOLATILE_P (x))
return 1;
- /* FALLTHROUGH */
+ /* Fall through. */
default:
break;
return 0;
}
-/* Returns non-zero if X (used to initialize register REGNO) is movable.
+/* Returns nonzero if X (used to initialize register REGNO) is movable.
X is only movable if the registers it uses have equivalent initializations
which appear to be within the same loop (or in an inner loop) and movable
or if they are not candidates for local_alloc and don't vary. */
static int
-equiv_init_movable_p (x, regno)
- rtx x;
- int regno;
+equiv_init_movable_p (rtx x, int regno)
{
int i, j;
const char *fmt;
if (MEM_VOLATILE_P (x))
return 0;
- /* FALLTHROUGH */
+ /* Fall through. */
default:
break;
/* TRUE if X uses any registers for which reg_equiv[REGNO].replace is true. */
static int
-contains_replace_regs (x)
- rtx x;
+contains_replace_regs (rtx x)
{
int i, j;
const char *fmt;
case LABEL_REF:
case SYMBOL_REF:
case CONST_DOUBLE:
+ case CONST_VECTOR:
case PC:
case CC0:
case HIGH:
- case LO_SUM:
return 0;
case REG:
to MEMREF. */
static int
-memref_referenced_p (memref, x)
- rtx x;
- rtx memref;
+memref_referenced_p (rtx memref, rtx x)
{
int i, j;
const char *fmt;
case LABEL_REF:
case SYMBOL_REF:
case CONST_DOUBLE:
+ case CONST_VECTOR:
case PC:
case CC0:
case HIGH:
case SET:
/* If we are setting a MEM, it doesn't count (its address does), but any
other SET_DEST that has a MEM in it is referencing the MEM. */
- if (GET_CODE (SET_DEST (x)) == MEM)
+ if (MEM_P (SET_DEST (x)))
{
if (memref_referenced_p (memref, XEXP (SET_DEST (x), 0)))
return 1;
that would be affected by a store to MEMREF. */
static int
-memref_used_between_p (memref, start, end)
- rtx memref;
- rtx start;
- rtx end;
+memref_used_between_p (rtx memref, rtx start, rtx end)
{
rtx insn;
for (insn = NEXT_INSN (start); insn != NEXT_INSN (end);
insn = NEXT_INSN (insn))
- if (INSN_P (insn) && memref_referenced_p (memref, PATTERN (insn)))
- return 1;
+ {
+ if (!INSN_P (insn))
+ continue;
+
+ if (memref_referenced_p (memref, PATTERN (insn)))
+ return 1;
+
+ /* Nonconst functions may access memory. */
+ if (CALL_P (insn)
+ && (! CONST_OR_PURE_CALL_P (insn)
+ || pure_call_p (insn)))
+ return 1;
+ }
return 0;
}
\f
-/* Return nonzero if the rtx X is invariant over the current function. */
-int
-function_invariant_p (x)
- rtx x;
-{
- if (CONSTANT_P (x))
- return 1;
- if (x == frame_pointer_rtx || x == arg_pointer_rtx)
- return 1;
- if (GET_CODE (x) == PLUS
- && (XEXP (x, 0) == frame_pointer_rtx || XEXP (x, 0) == arg_pointer_rtx)
- && CONSTANT_P (XEXP (x, 1)))
- return 1;
- return 0;
-}
-
/* Find registers that are equivalent to a single value throughout the
compilation (either because they can be referenced in memory or are set once
from a single constant). Lower their priority for a register.
If such a register is only referenced once, try substituting its value
into the using insn. If it succeeds, we can eliminate the register
- completely. */
+ completely.
+
+ Initialize the REG_EQUIV_INIT array of initializing insns. */
static void
-update_equiv_regs ()
+update_equiv_regs (void)
{
rtx insn;
- int block;
+ basic_block bb;
int loop_depth;
regset_head cleared_regs;
int clear_regnos = 0;
- reg_equiv = (struct equivalence *) xcalloc (max_regno, sizeof *reg_equiv);
+ reg_equiv = XCNEWVEC (struct equivalence, max_regno);
INIT_REG_SET (&cleared_regs);
+ reg_equiv_init = ggc_alloc_cleared (max_regno * sizeof (rtx));
+ reg_equiv_init_size = max_regno;
init_alias_analysis ();
/* Scan the insns and find which registers have equivalences. Do this
in a separate scan of the insns because (due to -fcse-follow-jumps)
a register can be set below its use. */
- loop_depth = 0;
- for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
+ FOR_EACH_BB (bb)
{
- rtx note;
- rtx set;
- rtx dest, src;
- int regno;
+ loop_depth = bb->loop_depth;
- if (GET_CODE (insn) == NOTE)
+ for (insn = BB_HEAD (bb);
+ insn != NEXT_INSN (BB_END (bb));
+ insn = NEXT_INSN (insn))
{
- if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
- ++loop_depth;
- else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
+ rtx note;
+ rtx set;
+ rtx dest, src;
+ int regno;
+
+ if (! INSN_P (insn))
+ continue;
+
+ for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
+ if (REG_NOTE_KIND (note) == REG_INC)
+ no_equiv (XEXP (note, 0), note, NULL);
+
+ set = single_set (insn);
+
+ /* If this insn contains more (or less) than a single SET,
+ only mark all destinations as having no known equivalence. */
+ if (set == 0)
{
- if (! loop_depth)
- abort ();
- --loop_depth;
+ note_stores (PATTERN (insn), no_equiv, NULL);
+ continue;
}
- }
+ else if (GET_CODE (PATTERN (insn)) == PARALLEL)
+ {
+ int i;
- if (! INSN_P (insn))
- continue;
+ for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
+ {
+ rtx part = XVECEXP (PATTERN (insn), 0, i);
+ if (part != set)
+ note_stores (part, no_equiv, NULL);
+ }
+ }
- for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
- if (REG_NOTE_KIND (note) == REG_INC)
- no_equiv (XEXP (note, 0), note, NULL);
+ dest = SET_DEST (set);
+ src = SET_SRC (set);
- set = single_set (insn);
+ /* See if this is setting up the equivalence between an argument
+ register and its stack slot. */
+ note = find_reg_note (insn, REG_EQUIV, NULL_RTX);
+ if (note)
+ {
+ gcc_assert (REG_P (dest));
+ regno = REGNO (dest);
- /* If this insn contains more (or less) than a single SET,
- only mark all destinations as having no known equivalence. */
- if (set == 0)
- {
- note_stores (PATTERN (insn), no_equiv, NULL);
- continue;
- }
- else if (GET_CODE (PATTERN (insn)) == PARALLEL)
- {
- int i;
+ /* Note that we don't want to clear reg_equiv_init even if there
+ are multiple sets of this register. */
+ reg_equiv[regno].is_arg_equivalence = 1;
+
+ /* Record for reload that this is an equivalencing insn. */
+ if (rtx_equal_p (src, XEXP (note, 0)))
+ reg_equiv_init[regno]
+ = gen_rtx_INSN_LIST (VOIDmode, insn, reg_equiv_init[regno]);
+
+ /* Continue normally in case this is a candidate for
+ replacements. */
+ }
- for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
+ if (!optimize)
+ continue;
+
+ /* We only handle the case of a pseudo register being set
+ once, or always to the same value. */
+ /* ??? The mn10200 port breaks if we add equivalences for
+ values that need an ADDRESS_REGS register and set them equivalent
+ to a MEM of a pseudo. The actual problem is in the over-conservative
+ handling of INPADDR_ADDRESS / INPUT_ADDRESS / INPUT triples in
+ calculate_needs, but we traditionally work around this problem
+ here by rejecting equivalences when the destination is in a register
+ that's likely spilled. This is fragile, of course, since the
+ preferred class of a pseudo depends on all instructions that set
+ or use it. */
+
+ if (!REG_P (dest)
+ || (regno = REGNO (dest)) < FIRST_PSEUDO_REGISTER
+ || reg_equiv[regno].init_insns == const0_rtx
+ || (CLASS_LIKELY_SPILLED_P (reg_preferred_class (regno))
+ && MEM_P (src) && ! reg_equiv[regno].is_arg_equivalence))
{
- rtx part = XVECEXP (PATTERN (insn), 0, i);
- if (part != set)
- note_stores (part, no_equiv, NULL);
+ /* This might be setting a SUBREG of a pseudo, a pseudo that is
+ also set somewhere else to a constant. */
+ note_stores (set, no_equiv, NULL);
+ continue;
+ }
+
+ note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
+
+ /* cse sometimes generates function invariants, but doesn't put a
+ REG_EQUAL note on the insn. Since this note would be redundant,
+ there's no point creating it earlier than here. */
+ if (! note && ! rtx_varies_p (src, 0))
+ note = set_unique_reg_note (insn, REG_EQUAL, src);
+
+ /* Don't bother considering a REG_EQUAL note containing an EXPR_LIST
+ since it represents a function call */
+ if (note && GET_CODE (XEXP (note, 0)) == EXPR_LIST)
+ note = NULL_RTX;
+
+ if (REG_N_SETS (regno) != 1
+ && (! note
+ || rtx_varies_p (XEXP (note, 0), 0)
+ || (reg_equiv[regno].replacement
+ && ! rtx_equal_p (XEXP (note, 0),
+ reg_equiv[regno].replacement))))
+ {
+ no_equiv (dest, set, NULL);
+ continue;
+ }
+ /* Record this insn as initializing this register. */
+ reg_equiv[regno].init_insns
+ = gen_rtx_INSN_LIST (VOIDmode, insn, reg_equiv[regno].init_insns);
+
+ /* If this register is known to be equal to a constant, record that
+ it is always equivalent to the constant. */
+ if (note && ! rtx_varies_p (XEXP (note, 0), 0))
+ PUT_MODE (note, (enum machine_mode) REG_EQUIV);
+
+ /* If this insn introduces a "constant" register, decrease the priority
+ of that register. Record this insn if the register is only used once
+ more and the equivalence value is the same as our source.
+
+ The latter condition is checked for two reasons: First, it is an
+ indication that it may be more efficient to actually emit the insn
+ as written (if no registers are available, reload will substitute
+ the equivalence). Secondly, it avoids problems with any registers
+ dying in this insn whose death notes would be missed.
+
+ If we don't have a REG_EQUIV note, see if this insn is loading
+ a register used only in one basic block from a MEM. If so, and the
+ MEM remains unchanged for the life of the register, add a REG_EQUIV
+ note. */
+
+ note = find_reg_note (insn, REG_EQUIV, NULL_RTX);
+
+ if (note == 0 && REG_BASIC_BLOCK (regno) >= 0
+ && MEM_P (SET_SRC (set))
+ && validate_equiv_mem (insn, dest, SET_SRC (set)))
+ REG_NOTES (insn) = note = gen_rtx_EXPR_LIST (REG_EQUIV, SET_SRC (set),
+ REG_NOTES (insn));
+
+ if (note)
+ {
+ int regno = REGNO (dest);
+ rtx x = XEXP (note, 0);
+
+ /* If we haven't done so, record for reload that this is an
+ equivalencing insn. */
+ if (!reg_equiv[regno].is_arg_equivalence
+ && (!MEM_P (x) || rtx_equal_p (src, x)))
+ reg_equiv_init[regno]
+ = gen_rtx_INSN_LIST (VOIDmode, insn, reg_equiv_init[regno]);
+
+ /* Record whether or not we created a REG_EQUIV note for a LABEL_REF.
+ We might end up substituting the LABEL_REF for uses of the
+ pseudo here or later. That kind of transformation may turn an
+ indirect jump into a direct jump, in which case we must rerun the
+ jump optimizer to ensure that the JUMP_LABEL fields are valid. */
+ if (GET_CODE (x) == LABEL_REF
+ || (GET_CODE (x) == CONST
+ && GET_CODE (XEXP (x, 0)) == PLUS
+ && (GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF)))
+ recorded_label_ref = 1;
+
+ reg_equiv[regno].replacement = x;
+ reg_equiv[regno].src_p = &SET_SRC (set);
+ reg_equiv[regno].loop_depth = loop_depth;
+
+ /* Don't mess with things live during setjmp. */
+ if (REG_LIVE_LENGTH (regno) >= 0 && optimize)
+ {
+ /* Note that the statement below does not affect the priority
+ in local-alloc! */
+ REG_LIVE_LENGTH (regno) *= 2;
+
+ /* If the register is referenced exactly twice, meaning it is
+ set once and used once, indicate that the reference may be
+ replaced by the equivalence we computed above. Do this
+ even if the register is only used in one block so that
+ dependencies can be handled where the last register is
+ used in a different block (i.e. HIGH / LO_SUM sequences)
+ and to reduce the number of registers alive across
+ calls. */
+
+ if (REG_N_REFS (regno) == 2
+ && (rtx_equal_p (x, src)
+ || ! equiv_init_varies_p (src))
+ && NONJUMP_INSN_P (insn)
+ && equiv_init_movable_p (PATTERN (insn), regno))
+ reg_equiv[regno].replace = 1;
+ }
}
}
+ }
+
+ if (!optimize)
+ goto out;
+
+ /* A second pass, to gather additional equivalences with memory. This needs
+ to be done after we know which registers we are going to replace. */
+
+ for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
+ {
+ rtx set, src, dest;
+ unsigned regno;
+
+ if (! INSN_P (insn))
+ continue;
+
+ set = single_set (insn);
+ if (! set)
+ continue;
dest = SET_DEST (set);
src = SET_SRC (set);
insn, which puts it after reg_equiv[REGNO].init_insns, and hence
the mention in the REG_EQUIV note would be to an uninitialized
pseudo. */
- /* ????? This test isn't good enough; we might see a MEM with a use of
- a pseudo register before we see its setting insn that will cause
- reg_equiv[].replace for that pseudo to be set.
- Equivalences to MEMs should be made in another pass, after the
- reg_equiv[].replace information has been gathered. */
- if (GET_CODE (dest) == MEM && GET_CODE (src) == REG
+ if (MEM_P (dest) && REG_P (src)
&& (regno = REGNO (src)) >= FIRST_PSEUDO_REGISTER
&& REG_BASIC_BLOCK (regno) >= 0
&& REG_N_SETS (regno) == 1
rtx init_insn = XEXP (reg_equiv[regno].init_insns, 0);
if (validate_equiv_mem (init_insn, src, dest)
&& ! memref_used_between_p (dest, init_insn, insn))
- REG_NOTES (init_insn)
- = gen_rtx_EXPR_LIST (REG_EQUIV, dest, REG_NOTES (init_insn));
- }
-
- /* We only handle the case of a pseudo register being set
- once, or always to the same value. */
- /* ??? The mn10200 port breaks if we add equivalences for
- values that need an ADDRESS_REGS register and set them equivalent
- to a MEM of a pseudo. The actual problem is in the over-conservative
- handling of INPADDR_ADDRESS / INPUT_ADDRESS / INPUT triples in
- calculate_needs, but we traditionally work around this problem
- here by rejecting equivalences when the destination is in a register
- that's likely spilled. This is fragile, of course, since the
- preferred class of a pseudo depends on all instructions that set
- or use it. */
-
- if (GET_CODE (dest) != REG
- || (regno = REGNO (dest)) < FIRST_PSEUDO_REGISTER
- || reg_equiv[regno].init_insns == const0_rtx
- || (CLASS_LIKELY_SPILLED_P (reg_preferred_class (regno))
- && GET_CODE (src) == MEM))
- {
- /* This might be seting a SUBREG of a pseudo, a pseudo that is
- also set somewhere else to a constant. */
- note_stores (set, no_equiv, NULL);
- continue;
- }
-
- note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
-
- /* cse sometimes generates function invariants, but doesn't put a
- REG_EQUAL note on the insn. Since this note would be redundant,
- there's no point creating it earlier than here. */
- if (! note && ! rtx_varies_p (src, 0))
- REG_NOTES (insn)
- = note = gen_rtx_EXPR_LIST (REG_EQUAL, src, REG_NOTES (insn));
-
- /* Don't bother considering a REG_EQUAL note containing an EXPR_LIST
- since it represents a function call */
- if (note && GET_CODE (XEXP (note, 0)) == EXPR_LIST)
- note = NULL_RTX;
-
- if (REG_N_SETS (regno) != 1
- && (! note
- || rtx_varies_p (XEXP (note, 0), 0)
- || (reg_equiv[regno].replacement
- && ! rtx_equal_p (XEXP (note, 0),
- reg_equiv[regno].replacement))))
- {
- no_equiv (dest, set, NULL);
- continue;
- }
- /* Record this insn as initializing this register. */
- reg_equiv[regno].init_insns
- = gen_rtx_INSN_LIST (VOIDmode, insn, reg_equiv[regno].init_insns);
-
- /* If this register is known to be equal to a constant, record that
- it is always equivalent to the constant. */
- if (note && ! rtx_varies_p (XEXP (note, 0), 0))
- PUT_MODE (note, (enum machine_mode) REG_EQUIV);
-
- /* If this insn introduces a "constant" register, decrease the priority
- of that register. Record this insn if the register is only used once
- more and the equivalence value is the same as our source.
-
- The latter condition is checked for two reasons: First, it is an
- indication that it may be more efficient to actually emit the insn
- as written (if no registers are available, reload will substitute
- the equivalence). Secondly, it avoids problems with any registers
- dying in this insn whose death notes would be missed.
-
- If we don't have a REG_EQUIV note, see if this insn is loading
- a register used only in one basic block from a MEM. If so, and the
- MEM remains unchanged for the life of the register, add a REG_EQUIV
- note. */
-
- note = find_reg_note (insn, REG_EQUIV, NULL_RTX);
-
- if (note == 0 && REG_BASIC_BLOCK (regno) >= 0
- && GET_CODE (SET_SRC (set)) == MEM
- && validate_equiv_mem (insn, dest, SET_SRC (set)))
- REG_NOTES (insn) = note = gen_rtx_EXPR_LIST (REG_EQUIV, SET_SRC (set),
- REG_NOTES (insn));
-
- if (note)
- {
- int regno = REGNO (dest);
-
- /* Record whether or not we created a REG_EQUIV note for a LABEL_REF.
- We might end up substituting the LABEL_REF for uses of the
- pseudo here or later. That kind of transformation may turn an
- indirect jump into a direct jump, in which case we must rerun the
- jump optimizer to ensure that the JUMP_LABEL fields are valid. */
- if (GET_CODE (XEXP (note, 0)) == LABEL_REF
- || (GET_CODE (XEXP (note, 0)) == CONST
- && GET_CODE (XEXP (XEXP (note, 0), 0)) == PLUS
- && (GET_CODE (XEXP (XEXP (XEXP (note, 0), 0), 0))
- == LABEL_REF)))
- recorded_label_ref = 1;
-
- reg_equiv[regno].replacement = XEXP (note, 0);
- reg_equiv[regno].src = src;
- reg_equiv[regno].loop_depth = loop_depth;
-
- /* Don't mess with things live during setjmp. */
- if (REG_LIVE_LENGTH (regno) >= 0 && optimize)
{
- /* Note that the statement below does not affect the priority
- in local-alloc! */
- REG_LIVE_LENGTH (regno) *= 2;
-
-
- /* If the register is referenced exactly twice, meaning it is
- set once and used once, indicate that the reference may be
- replaced by the equivalence we computed above. Do this
- even if the register is only used in one block so that
- dependencies can be handled where the last register is
- used in a different block (i.e. HIGH / LO_SUM sequences)
- and to reduce the number of registers alive across calls.
-
- It would be nice to use "loop_depth * 2" in the compare
- below. Unfortunately, LOOP_DEPTH need not be constant within
- a basic block so this would be too complicated.
-
- This case normally occurs when a parameter is read from
- memory and then used exactly once, not in a loop. */
-
- if (REG_N_REFS (regno) == 2
- && (rtx_equal_p (XEXP (note, 0), src)
- || ! equiv_init_varies_p (src))
- && GET_CODE (insn) == INSN
- && equiv_init_movable_p (PATTERN (insn), regno))
- reg_equiv[regno].replace = 1;
+ REG_NOTES (init_insn)
+ = gen_rtx_EXPR_LIST (REG_EQUIV, dest,
+ REG_NOTES (init_insn));
+ /* This insn makes the equivalence, not the one initializing
+ the register. */
+ reg_equiv_init[regno]
+ = gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
}
}
}
/* Now scan all regs killed in an insn to see if any of them are
registers only used that once. If so, see if we can replace the
- reference with the equivalent from. If we can, delete the
+ reference with the equivalent form. If we can, delete the
initializing reference and this register will go away. If we
- can't replace the reference, and the initialzing reference is
+ can't replace the reference, and the initializing reference is
within the same loop (or in an inner loop), then move the register
initialization just before the use, so that they are in the same
- basic block.
-
- Skip this optimization if loop_depth isn't initially zero since
- that indicates a mismatch between loop begin and loop end notes
- (i.e. gcc.dg/noncompile/920721-2.c). */
- block = n_basic_blocks - 1;
- for (insn = (loop_depth == 0) ? get_last_insn () : NULL_RTX;
- insn; insn = PREV_INSN (insn))
+ basic block. */
+ FOR_EACH_BB_REVERSE (bb)
{
- rtx link;
-
- if (! INSN_P (insn))
+ loop_depth = bb->loop_depth;
+ for (insn = BB_END (bb);
+ insn != PREV_INSN (BB_HEAD (bb));
+ insn = PREV_INSN (insn))
{
- if (GET_CODE (insn) == NOTE)
- {
- if (NOTE_INSN_BASIC_BLOCK_P (insn))
- block = NOTE_BASIC_BLOCK (insn)->index - 1;
- else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
- {
- if (! loop_depth)
- abort ();
- --loop_depth;
- }
- else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
- ++loop_depth;
- }
+ rtx link;
- continue;
- }
+ if (! INSN_P (insn))
+ continue;
- for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
- {
- if (REG_NOTE_KIND (link) == REG_DEAD
- /* Make sure this insn still refers to the register. */
- && reg_mentioned_p (XEXP (link, 0), PATTERN (insn)))
+ /* Don't substitute into a non-local goto, this confuses CFG. */
+ if (JUMP_P (insn)
+ && find_reg_note (insn, REG_NON_LOCAL_GOTO, NULL_RTX))
+ continue;
+
+ for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
{
- int regno = REGNO (XEXP (link, 0));
- rtx equiv_insn;
+ if (REG_NOTE_KIND (link) == REG_DEAD
+ /* Make sure this insn still refers to the register. */
+ && reg_mentioned_p (XEXP (link, 0), PATTERN (insn)))
+ {
+ int regno = REGNO (XEXP (link, 0));
+ rtx equiv_insn;
- if (! reg_equiv[regno].replace
- || reg_equiv[regno].loop_depth < loop_depth)
- continue;
+ if (! reg_equiv[regno].replace
+ || reg_equiv[regno].loop_depth < loop_depth)
+ continue;
- /* reg_equiv[REGNO].replace gets set only when
- REG_N_REFS[REGNO] is 2, i.e. the register is set
- once and used once. (If it were only set, but not used,
- flow would have deleted the setting insns.) Hence
- there can only be one insn in reg_equiv[REGNO].init_insns. */
- if (reg_equiv[regno].init_insns == NULL_RTX
- || XEXP (reg_equiv[regno].init_insns, 1) != NULL_RTX)
- abort ();
- equiv_insn = XEXP (reg_equiv[regno].init_insns, 0);
-
- /* We may not move instructions that can throw, since
- that changes basic block boundaries and we are not
- prepared to adjust the CFG to match. */
- if (can_throw_internal (equiv_insn))
- continue;
+ /* reg_equiv[REGNO].replace gets set only when
+ REG_N_REFS[REGNO] is 2, i.e. the register is set
+ once and used once. (If it were only set, but not used,
+ flow would have deleted the setting insns.) Hence
+ there can only be one insn in reg_equiv[REGNO].init_insns. */
+ gcc_assert (reg_equiv[regno].init_insns
+ && !XEXP (reg_equiv[regno].init_insns, 1));
+ equiv_insn = XEXP (reg_equiv[regno].init_insns, 0);
+
+ /* We may not move instructions that can throw, since
+ that changes basic block boundaries and we are not
+ prepared to adjust the CFG to match. */
+ if (can_throw_internal (equiv_insn))
+ continue;
- if (asm_noperands (PATTERN (equiv_insn)) < 0
- && validate_replace_rtx (regno_reg_rtx[regno],
- reg_equiv[regno].src, insn))
- {
- rtx equiv_link;
- rtx last_link;
- rtx note;
-
- /* Find the last note. */
- for (last_link = link; XEXP (last_link, 1);
- last_link = XEXP (last_link, 1))
- ;
-
- /* Append the REG_DEAD notes from equiv_insn. */
- equiv_link = REG_NOTES (equiv_insn);
- while (equiv_link)
+ if (asm_noperands (PATTERN (equiv_insn)) < 0
+ && validate_replace_rtx (regno_reg_rtx[regno],
+ *(reg_equiv[regno].src_p), insn))
{
- note = equiv_link;
- equiv_link = XEXP (equiv_link, 1);
- if (REG_NOTE_KIND (note) == REG_DEAD)
+ rtx equiv_link;
+ rtx last_link;
+ rtx note;
+
+ /* Find the last note. */
+ for (last_link = link; XEXP (last_link, 1);
+ last_link = XEXP (last_link, 1))
+ ;
+
+ /* Append the REG_DEAD notes from equiv_insn. */
+ equiv_link = REG_NOTES (equiv_insn);
+ while (equiv_link)
{
- remove_note (equiv_insn, note);
- XEXP (last_link, 1) = note;
- XEXP (note, 1) = NULL_RTX;
- last_link = note;
+ note = equiv_link;
+ equiv_link = XEXP (equiv_link, 1);
+ if (REG_NOTE_KIND (note) == REG_DEAD)
+ {
+ remove_note (equiv_insn, note);
+ XEXP (last_link, 1) = note;
+ XEXP (note, 1) = NULL_RTX;
+ last_link = note;
+ }
}
- }
- remove_death (regno, insn);
- REG_N_REFS (regno) = 0;
- REG_FREQ (regno) = 0;
- PUT_CODE (equiv_insn, NOTE);
- NOTE_LINE_NUMBER (equiv_insn) = NOTE_INSN_DELETED;
- NOTE_SOURCE_FILE (equiv_insn) = 0;
-
- reg_equiv[regno].init_insns
- = XEXP (reg_equiv[regno].init_insns, 1);
- }
- /* Move the initialization of the register to just before
- INSN. Update the flow information. */
- else if (PREV_INSN (insn) != equiv_insn)
- {
- rtx new_insn;
+ remove_death (regno, insn);
+ REG_N_REFS (regno) = 0;
+ REG_FREQ (regno) = 0;
+ delete_insn (equiv_insn);
- new_insn = emit_insn_before (PATTERN (equiv_insn), insn);
- REG_NOTES (new_insn) = REG_NOTES (equiv_insn);
- REG_NOTES (equiv_insn) = 0;
+ reg_equiv[regno].init_insns
+ = XEXP (reg_equiv[regno].init_insns, 1);
- /* Make sure this insn is recognized before reload begins,
- otherwise eliminate_regs_in_insn will abort. */
- INSN_CODE (new_insn) = INSN_CODE (equiv_insn);
+ /* Remember to clear REGNO from all basic block's live
+ info. */
+ SET_REGNO_REG_SET (&cleared_regs, regno);
+ clear_regnos++;
+ reg_equiv_init[regno] = NULL_RTX;
+ }
+ /* Move the initialization of the register to just before
+ INSN. Update the flow information. */
+ else if (PREV_INSN (insn) != equiv_insn)
+ {
+ rtx new_insn;
+
+ new_insn = emit_insn_before (PATTERN (equiv_insn), insn);
+ REG_NOTES (new_insn) = REG_NOTES (equiv_insn);
+ REG_NOTES (equiv_insn) = 0;
- PUT_CODE (equiv_insn, NOTE);
- NOTE_LINE_NUMBER (equiv_insn) = NOTE_INSN_DELETED;
- NOTE_SOURCE_FILE (equiv_insn) = 0;
+ /* Make sure this insn is recognized before
+ reload begins, otherwise
+ eliminate_regs_in_insn will die. */
+ INSN_CODE (new_insn) = INSN_CODE (equiv_insn);
- XEXP (reg_equiv[regno].init_insns, 0) = new_insn;
+ delete_insn (equiv_insn);
- REG_BASIC_BLOCK (regno) = block >= 0 ? block : 0;
- REG_N_CALLS_CROSSED (regno) = 0;
- REG_LIVE_LENGTH (regno) = 2;
+ XEXP (reg_equiv[regno].init_insns, 0) = new_insn;
- if (block >= 0 && insn == BLOCK_HEAD (block))
- BLOCK_HEAD (block) = PREV_INSN (insn);
+ REG_BASIC_BLOCK (regno) = bb->index;
+ REG_N_CALLS_CROSSED (regno) = 0;
+ REG_N_THROWING_CALLS_CROSSED (regno) = 0;
+ REG_LIVE_LENGTH (regno) = 2;
- /* Remember to clear REGNO from all basic block's live
- info. */
- SET_REGNO_REG_SET (&cleared_regs, regno);
- clear_regnos++;
+ if (insn == BB_HEAD (bb))
+ BB_HEAD (bb) = PREV_INSN (insn);
+
+ /* Remember to clear REGNO from all basic block's live
+ info. */
+ SET_REGNO_REG_SET (&cleared_regs, regno);
+ clear_regnos++;
+ reg_equiv_init[regno]
+ = gen_rtx_INSN_LIST (VOIDmode, new_insn, NULL_RTX);
+ }
}
}
}
/* Clear all dead REGNOs from all basic block's live info. */
if (clear_regnos)
{
- int j, l;
+ unsigned j;
+
if (clear_regnos > 8)
- {
- for (l = 0; l < n_basic_blocks; l++)
+ {
+ FOR_EACH_BB (bb)
{
- AND_COMPL_REG_SET (BASIC_BLOCK (l)->global_live_at_start,
- &cleared_regs);
- AND_COMPL_REG_SET (BASIC_BLOCK (l)->global_live_at_end,
- &cleared_regs);
+ AND_COMPL_REG_SET (bb->il.rtl->global_live_at_start,
+ &cleared_regs);
+ AND_COMPL_REG_SET (bb->il.rtl->global_live_at_end,
+ &cleared_regs);
}
}
else
- EXECUTE_IF_SET_IN_REG_SET (&cleared_regs, 0, j,
- {
- for (l = 0; l < n_basic_blocks; l++)
- {
- CLEAR_REGNO_REG_SET (BASIC_BLOCK (l)->global_live_at_start, j);
- CLEAR_REGNO_REG_SET (BASIC_BLOCK (l)->global_live_at_end, j);
- }
- });
+ {
+ reg_set_iterator rsi;
+ EXECUTE_IF_SET_IN_REG_SET (&cleared_regs, 0, j, rsi)
+ {
+ FOR_EACH_BB (bb)
+ {
+ CLEAR_REGNO_REG_SET (bb->il.rtl->global_live_at_start, j);
+ CLEAR_REGNO_REG_SET (bb->il.rtl->global_live_at_end, j);
+ }
+ }
+ }
}
+ out:
/* Clean up. */
end_alias_analysis ();
CLEAR_REG_SET (&cleared_regs);
}
/* Mark REG as having no known equivalence.
- Some instructions might have been proceessed before and furnished
+ Some instructions might have been processed before and furnished
with REG_EQUIV notes for this register; these notes will have to be
removed.
STORE is the piece of RTL that does the non-constant / conflicting
assignment - a SET, CLOBBER or REG_INC note. It is currently not used,
but needs to be there because this function is called from note_stores. */
static void
-no_equiv (reg, store, data)
- rtx reg, store ATTRIBUTE_UNUSED;
- void *data ATTRIBUTE_UNUSED;
+no_equiv (rtx reg, rtx store ATTRIBUTE_UNUSED, void *data ATTRIBUTE_UNUSED)
{
int regno;
rtx list;
- if (GET_CODE (reg) != REG)
+ if (!REG_P (reg))
return;
regno = REGNO (reg);
list = reg_equiv[regno].init_insns;
if (list == const0_rtx)
return;
+ reg_equiv[regno].init_insns = const0_rtx;
+ reg_equiv[regno].replacement = NULL_RTX;
+ /* This doesn't matter for equivalences made for argument registers, we
+ should keep their initialization insns. */
+ if (reg_equiv[regno].is_arg_equivalence)
+ return;
+ reg_equiv_init[regno] = NULL_RTX;
for (; list; list = XEXP (list, 1))
{
rtx insn = XEXP (list, 0);
remove_note (insn, find_reg_note (insn, REG_EQUIV, NULL_RTX));
}
- reg_equiv[regno].init_insns = const0_rtx;
- reg_equiv[regno].replacement = NULL_RTX;
}
\f
/* Allocate hard regs to the pseudo regs used only within block number B.
Only the pseudos that die but once can be handled. */
static void
-block_alloc (b)
- int b;
+block_alloc (int b)
{
- register int i, q;
- register rtx insn;
- rtx note;
+ int i, q;
+ rtx insn;
+ rtx note, hard_reg;
int insn_number = 0;
int insn_count = 0;
int max_uid = get_max_uid ();
/* Count the instructions in the basic block. */
- insn = BLOCK_END (b);
+ insn = BB_END (BASIC_BLOCK (b));
while (1)
{
- if (GET_CODE (insn) != NOTE)
- if (++insn_count > max_uid)
- abort ();
- if (insn == BLOCK_HEAD (b))
+ if (!NOTE_P (insn))
+ {
+ ++insn_count;
+ gcc_assert (insn_count <= max_uid);
+ }
+ if (insn == BB_HEAD (BASIC_BLOCK (b)))
break;
insn = PREV_INSN (insn);
}
/* +2 to leave room for a post_mark_life at the last insn and for
the birth of a CLOBBER in the first insn. */
- regs_live_at = (HARD_REG_SET *) xcalloc ((2 * insn_count + 2),
- sizeof (HARD_REG_SET));
+ regs_live_at = XCNEWVEC (HARD_REG_SET, 2 * insn_count + 2);
/* Initialize table of hardware registers currently live. */
- REG_SET_TO_HARD_REG_SET (regs_live, BASIC_BLOCK (b)->global_live_at_start);
+ REG_SET_TO_HARD_REG_SET (regs_live,
+ BASIC_BLOCK (b)->il.rtl->global_live_at_start);
/* This loop scans the instructions of the basic block
and assigns quantities to registers.
It computes which registers to tie. */
- insn = BLOCK_HEAD (b);
+ insn = BB_HEAD (BASIC_BLOCK (b));
while (1)
{
- if (GET_CODE (insn) != NOTE)
+ if (!NOTE_P (insn))
insn_number++;
if (INSN_P (insn))
{
- register rtx link, set;
- register int win = 0;
- register rtx r0, r1 = NULL_RTX;
+ rtx link, set;
+ int win = 0;
+ rtx r0, r1 = NULL_RTX;
int combined_regno = -1;
int i;
for (i = 1; i < recog_data.n_operands; i++)
{
const char *p = recog_data.constraints[i];
- int this_match = (requires_inout (p));
+ int this_match = requires_inout (p);
n_matching_alts += this_match;
if (this_match == recog_data.n_alternatives)
must match operand zero. In that case, skip any
operand that doesn't list operand 0 since we know that
the operand always conflicts with operand 0. We
- ignore commutatity in this case to keep things simple. */
+ ignore commutativity in this case to keep things simple. */
if (n_matching_alts == recog_data.n_alternatives
&& 0 == requires_inout (recog_data.constraints[i]))
continue;
/* If the operand is an address, find a register in it.
There may be more than one register, but we only try one
of them. */
- if (recog_data.constraints[i][0] == 'p')
+ if (recog_data.constraints[i][0] == 'p'
+ || EXTRA_ADDRESS_CONSTRAINT (recog_data.constraints[i][0],
+ recog_data.constraints[i]))
while (GET_CODE (r1) == PLUS || GET_CODE (r1) == MULT)
r1 = XEXP (r1, 0);
- if (GET_CODE (r0) == REG || GET_CODE (r0) == SUBREG)
+ /* Avoid making a call-saved register unnecessarily
+ clobbered. */
+ hard_reg = get_hard_reg_initial_reg (cfun, r1);
+ if (hard_reg != NULL_RTX)
+ {
+ if (REG_P (hard_reg)
+ && REGNO (hard_reg) < FIRST_PSEUDO_REGISTER
+ && !call_used_regs[REGNO (hard_reg)])
+ continue;
+ }
+
+ if (REG_P (r0) || GET_CODE (r0) == SUBREG)
{
/* We have two priorities for hard register preferences.
If we have a move insn or an insn whose first input
int may_save_copy
= (r1 == recog_data.operand[i] && must_match_0 >= 0);
- if (GET_CODE (r1) == REG || GET_CODE (r1) == SUBREG)
+ if (REG_P (r1) || GET_CODE (r1) == SUBREG)
win = combine_regs (r1, r0, may_save_copy,
insn_number, insn, 0);
}
if (optimize
&& GET_CODE (PATTERN (insn)) == CLOBBER
&& (r0 = XEXP (PATTERN (insn), 0),
- GET_CODE (r0) == REG)
+ REG_P (r0))
&& (link = find_reg_note (insn, REG_LIBCALL, NULL_RTX)) != 0
&& XEXP (link, 0) != 0
- && GET_CODE (XEXP (link, 0)) == INSN
+ && NONJUMP_INSN_P (XEXP (link, 0))
&& (set = single_set (XEXP (link, 0))) != 0
&& SET_DEST (set) == r0 && SET_SRC (set) == r0
&& (note = find_reg_note (XEXP (link, 0), REG_EQUAL,
NULL_RTX)) != 0)
{
- if (r1 = XEXP (note, 0), GET_CODE (r1) == REG
+ if (r1 = XEXP (note, 0), REG_P (r1)
/* Check that we have such a sequence. */
&& no_conflict_p (insn, r0, r1))
win = combine_regs (r1, r0, 1, insn_number, insn, 1);
else if (GET_RTX_FORMAT (GET_CODE (XEXP (note, 0)))[0] == 'e'
&& (r1 = XEXP (XEXP (note, 0), 0),
- GET_CODE (r1) == REG || GET_CODE (r1) == SUBREG)
+ REG_P (r1) || GET_CODE (r1) == SUBREG)
&& no_conflict_p (insn, r0, r1))
win = combine_regs (r1, r0, 0, insn_number, insn, 1);
/* Here we care if the operation to be computed is
commutative. */
- else if ((GET_CODE (XEXP (note, 0)) == EQ
- || GET_CODE (XEXP (note, 0)) == NE
- || GET_RTX_CLASS (GET_CODE (XEXP (note, 0))) == 'c')
+ else if (COMMUTATIVE_P (XEXP (note, 0))
&& (r1 = XEXP (XEXP (note, 0), 1),
- (GET_CODE (r1) == REG || GET_CODE (r1) == SUBREG))
+ (REG_P (r1) || GET_CODE (r1) == SUBREG))
&& no_conflict_p (insn, r0, r1))
win = combine_regs (r1, r0, 0, insn_number, insn, 1);
for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
if (REG_NOTE_KIND (link) == REG_DEAD
- && GET_CODE (XEXP (link, 0)) == REG
+ && REG_P (XEXP (link, 0))
&& combined_regno != (int) REGNO (XEXP (link, 0))
&& (no_conflict_combined_regno != (int) REGNO (XEXP (link, 0))
|| ! find_reg_note (insn, REG_NO_CONFLICT,
for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
if (REG_NOTE_KIND (link) == REG_UNUSED
- && GET_CODE (XEXP (link, 0)) == REG)
+ && REG_P (XEXP (link, 0)))
wipe_dead_reg (XEXP (link, 0), 1);
/* If this is an insn that has a REG_RETVAL note pointing at a
CLOBBER insn, we have reached the end of a REG_NO_CONFLICT
block, so clear any register number that combined within it. */
if ((note = find_reg_note (insn, REG_RETVAL, NULL_RTX)) != 0
- && GET_CODE (XEXP (note, 0)) == INSN
+ && NONJUMP_INSN_P (XEXP (note, 0))
&& GET_CODE (PATTERN (XEXP (note, 0))) == CLOBBER)
no_conflict_combined_regno = -1;
}
IOR_HARD_REG_SET (regs_live_at[2 * insn_number], regs_live);
IOR_HARD_REG_SET (regs_live_at[2 * insn_number + 1], regs_live);
- if (insn == BLOCK_END (b))
+ if (insn == BB_END (BASIC_BLOCK (b)))
break;
insn = NEXT_INSN (insn);
number of suggested registers they need so we allocate those with
the most restrictive needs first. */
- qty_order = (int *) xmalloc (next_qty * sizeof (int));
+ qty_order = XNEWVEC (int, next_qty);
for (i = 0; i < next_qty; i++)
qty_order[i] = i;
discourage the register allocator from creating false
dependencies.
- The adjustment value is choosen to indicate that this qty
+ The adjustment value is chosen to indicate that this qty
conflicts with all the qtys in the instructions immediately
before and after the lifetime of this qty.
/ (qty[q].death - qty[q].birth)) * (10000 / REG_FREQ_MAX)))
static int
-qty_compare (q1, q2)
- int q1, q2;
+qty_compare (int q1, int q2)
{
return QTY_CMP_PRI (q2) - QTY_CMP_PRI (q1);
}
static int
-qty_compare_1 (q1p, q2p)
- const PTR q1p;
- const PTR q2p;
+qty_compare_1 (const void *q1p, const void *q2p)
{
- register int q1 = *(const int *) q1p, q2 = *(const int *) q2p;
- register int tem = QTY_CMP_PRI (q2) - QTY_CMP_PRI (q1);
+ int q1 = *(const int *) q1p, q2 = *(const int *) q2p;
+ int tem = QTY_CMP_PRI (q2) - QTY_CMP_PRI (q1);
if (tem != 0)
return tem;
: qty_phys_num_sugg[q] * FIRST_PSEUDO_REGISTER)
static int
-qty_sugg_compare (q1, q2)
- int q1, q2;
+qty_sugg_compare (int q1, int q2)
{
- register int tem = QTY_CMP_SUGG (q1) - QTY_CMP_SUGG (q2);
+ int tem = QTY_CMP_SUGG (q1) - QTY_CMP_SUGG (q2);
if (tem != 0)
return tem;
}
static int
-qty_sugg_compare_1 (q1p, q2p)
- const PTR q1p;
- const PTR q2p;
+qty_sugg_compare_1 (const void *q1p, const void *q2p)
{
- register int q1 = *(const int *) q1p, q2 = *(const int *) q2p;
- register int tem = QTY_CMP_SUGG (q1) - QTY_CMP_SUGG (q2);
+ int q1 = *(const int *) q1p, q2 = *(const int *) q2p;
+ int tem = QTY_CMP_SUGG (q1) - QTY_CMP_SUGG (q2);
if (tem != 0)
return tem;
Combining registers means marking them as having the same quantity
and adjusting the offsets within the quantity if either of
- them is a SUBREG).
+ them is a SUBREG.
We don't actually combine a hard reg with a pseudo; instead
we just record the hard reg as the suggestion for the pseudo's quantity.
If we really combined them, we could lose if the pseudo lives
- across an insn that clobbers the hard reg (eg, movstr).
+ across an insn that clobbers the hard reg (eg, movmem).
- ALREADY_DEAD is non-zero if USEDREG is known to be dead even though
+ ALREADY_DEAD is nonzero if USEDREG is known to be dead even though
there is no REG_DEAD note on INSN. This occurs during the processing
of REG_NO_CONFLICT blocks.
- MAY_SAVE_COPYCOPY is non-zero if this insn is simply copying USEDREG to
+ MAY_SAVE_COPY is nonzero if this insn is simply copying USEDREG to
SETREG or if the input and output must share a register.
In that case, we record a hard reg suggestion in QTY_PHYS_COPY_SUGG.
There are elaborate checks for the validity of combining. */
static int
-combine_regs (usedreg, setreg, may_save_copy, insn_number, insn, already_dead)
- rtx usedreg, setreg;
- int may_save_copy;
- int insn_number;
- rtx insn;
- int already_dead;
+combine_regs (rtx usedreg, rtx setreg, int may_save_copy, int insn_number,
+ rtx insn, int already_dead)
{
- register int ureg, sreg;
- register int offset = 0;
+ int ureg, sreg;
+ int offset = 0;
int usize, ssize;
- register int sqty;
+ int sqty;
/* Determine the numbers and sizes of registers being used. If a subreg
is present that does not change the entire register, don't consider
while (GET_CODE (usedreg) == SUBREG)
{
- if (GET_MODE_SIZE (GET_MODE (SUBREG_REG (usedreg))) > UNITS_PER_WORD)
- may_save_copy = 0;
- if (REGNO (SUBREG_REG (usedreg)) < FIRST_PSEUDO_REGISTER)
- offset += subreg_regno_offset (REGNO (SUBREG_REG (usedreg)),
- GET_MODE (SUBREG_REG (usedreg)),
- SUBREG_BYTE (usedreg),
- GET_MODE (usedreg));
- else
- offset += (SUBREG_BYTE (usedreg)
- / REGMODE_NATURAL_SIZE (GET_MODE (usedreg)));
- usedreg = SUBREG_REG (usedreg);
+ rtx subreg = SUBREG_REG (usedreg);
+
+ if (REG_P (subreg))
+ {
+ if (GET_MODE_SIZE (GET_MODE (subreg)) > UNITS_PER_WORD)
+ may_save_copy = 0;
+
+ if (REGNO (subreg) < FIRST_PSEUDO_REGISTER)
+ offset += subreg_regno_offset (REGNO (subreg),
+ GET_MODE (subreg),
+ SUBREG_BYTE (usedreg),
+ GET_MODE (usedreg));
+ else
+ offset += (SUBREG_BYTE (usedreg)
+ / REGMODE_NATURAL_SIZE (GET_MODE (usedreg)));
+ }
+
+ usedreg = subreg;
}
- if (GET_CODE (usedreg) != REG)
+
+ if (!REG_P (usedreg))
return 0;
+
ureg = REGNO (usedreg);
if (ureg < FIRST_PSEUDO_REGISTER)
- usize = HARD_REGNO_NREGS (ureg, GET_MODE (usedreg));
+ usize = hard_regno_nregs[ureg][GET_MODE (usedreg)];
else
usize = ((GET_MODE_SIZE (GET_MODE (usedreg))
+ (REGMODE_NATURAL_SIZE (GET_MODE (usedreg)) - 1))
while (GET_CODE (setreg) == SUBREG)
{
- if (GET_MODE_SIZE (GET_MODE (SUBREG_REG (setreg))) > UNITS_PER_WORD)
- may_save_copy = 0;
- if (REGNO (SUBREG_REG (setreg)) < FIRST_PSEUDO_REGISTER)
- offset -= subreg_regno_offset (REGNO (SUBREG_REG (setreg)),
- GET_MODE (SUBREG_REG (setreg)),
- SUBREG_BYTE (setreg),
- GET_MODE (setreg));
- else
- offset -= (SUBREG_BYTE (setreg)
- / REGMODE_NATURAL_SIZE (GET_MODE (setreg)));
- setreg = SUBREG_REG (setreg);
+ rtx subreg = SUBREG_REG (setreg);
+
+ if (REG_P (subreg))
+ {
+ if (GET_MODE_SIZE (GET_MODE (subreg)) > UNITS_PER_WORD)
+ may_save_copy = 0;
+
+ if (REGNO (subreg) < FIRST_PSEUDO_REGISTER)
+ offset -= subreg_regno_offset (REGNO (subreg),
+ GET_MODE (subreg),
+ SUBREG_BYTE (setreg),
+ GET_MODE (setreg));
+ else
+ offset -= (SUBREG_BYTE (setreg)
+ / REGMODE_NATURAL_SIZE (GET_MODE (setreg)));
+ }
+
+ setreg = subreg;
}
- if (GET_CODE (setreg) != REG)
+
+ if (!REG_P (setreg))
return 0;
+
sreg = REGNO (setreg);
if (sreg < FIRST_PSEUDO_REGISTER)
- ssize = HARD_REGNO_NREGS (sreg, GET_MODE (setreg));
+ ssize = hard_regno_nregs[sreg][GET_MODE (setreg)];
else
ssize = ((GET_MODE_SIZE (GET_MODE (setreg))
+ (REGMODE_NATURAL_SIZE (GET_MODE (setreg)) - 1))
/* Update info about quantity SQTY. */
qty[sqty].n_calls_crossed += REG_N_CALLS_CROSSED (sreg);
+ qty[sqty].n_throwing_calls_crossed
+ += REG_N_THROWING_CALLS_CROSSED (sreg);
qty[sqty].n_refs += REG_N_REFS (sreg);
qty[sqty].freq += REG_FREQ (sreg);
if (usize < ssize)
{
- register int i;
+ int i;
for (i = qty[sqty].first_reg; i >= 0; i = reg_next_in_qty[i])
reg_offset[i] -= offset;
True if REG's reg class either contains or is contained in CLASS. */
static int
-reg_meets_class_p (reg, class)
- int reg;
- enum reg_class class;
+reg_meets_class_p (int reg, enum reg_class class)
{
- register enum reg_class rclass = reg_preferred_class (reg);
+ enum reg_class rclass = reg_preferred_class (reg);
return (reg_class_subset_p (rclass, class)
|| reg_class_subset_p (class, rclass));
}
/* Update the class of QTYNO assuming that REG is being tied to it. */
static void
-update_qty_class (qtyno, reg)
- int qtyno;
- int reg;
+update_qty_class (int qtyno, int reg)
{
enum reg_class rclass = reg_preferred_class (reg);
if (reg_class_subset_p (rclass, qty[qtyno].min_class))
rclass = reg_alternate_class (reg);
if (reg_class_subset_p (rclass, qty[qtyno].alternate_class))
qty[qtyno].alternate_class = rclass;
-
- if (REG_CHANGES_MODE (reg))
- qty[qtyno].changes_mode = 1;
}
\f
/* Handle something which alters the value of an rtx REG.
carry info from `block_alloc'. */
static void
-reg_is_set (reg, setter, data)
- rtx reg;
- rtx setter;
- void *data ATTRIBUTE_UNUSED;
+reg_is_set (rtx reg, rtx setter, void *data ATTRIBUTE_UNUSED)
{
/* Note that note_stores will only pass us a SUBREG if it is a SUBREG of
a hard register. These may actually not exist any more. */
if (GET_CODE (reg) != SUBREG
- && GET_CODE (reg) != REG)
+ && !REG_P (reg))
return;
/* Mark this register as being born. If it is used in a CLOBBER, mark
BIRTH is the index at which this is happening. */
static void
-reg_is_born (reg, birth)
- rtx reg;
- int birth;
+reg_is_born (rtx reg, int birth)
{
- register int regno;
+ int regno;
if (GET_CODE (reg) == SUBREG)
{
regno = REGNO (SUBREG_REG (reg));
if (regno < FIRST_PSEUDO_REGISTER)
- regno = subreg_hard_regno (reg, 1);
+ regno = subreg_regno (reg);
}
else
regno = REGNO (reg);
}
}
-/* Record the death of REG in the current insn. If OUTPUT_P is non-zero,
+/* Record the death of REG in the current insn. If OUTPUT_P is nonzero,
REG is an output that is dying (i.e., it is never used), otherwise it
is an input (the normal case).
If OUTPUT_P is 1, then we extend the life past the end of this insn. */
static void
-wipe_dead_reg (reg, output_p)
- register rtx reg;
- int output_p;
+wipe_dead_reg (rtx reg, int output_p)
{
- register int regno = REGNO (reg);
+ int regno = REGNO (reg);
/* If this insn has multiple results,
and the dead reg is used in one of the results,
{
rtx set = XVECEXP (PATTERN (this_insn), 0, i);
if (GET_CODE (set) == SET
- && GET_CODE (SET_DEST (set)) != REG
+ && !REG_P (SET_DEST (set))
&& !rtx_equal_p (reg, SET_DEST (set))
&& reg_overlap_mentioned_p (reg, SET_DEST (set)))
output_p = 1;
If QTYNO crosses calls, insist on a register preserved by calls,
unless ACCEPT_CALL_CLOBBERED is nonzero.
- If JUST_TRY_SUGGESTED is non-zero, only try to see if the suggested
+ If JUST_TRY_SUGGESTED is nonzero, only try to see if the suggested
register is available. If not, return -1. */
static int
-find_free_reg (class, mode, qtyno, accept_call_clobbered, just_try_suggested,
- born_index, dead_index)
- enum reg_class class;
- enum machine_mode mode;
- int qtyno;
- int accept_call_clobbered;
- int just_try_suggested;
- int born_index, dead_index;
+find_free_reg (enum reg_class class, enum machine_mode mode, int qtyno,
+ int accept_call_clobbered, int just_try_suggested,
+ int born_index, int dead_index)
{
- register int i, ins;
-#ifdef HARD_REG_SET
- /* Declare it register if it's a scalar. */
- register
-#endif
- HARD_REG_SET used, first_used;
+ int i, ins;
+ HARD_REG_SET first_used, used;
#ifdef ELIMINABLE_REGS
- static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
+ static const struct {const int from, to; } eliminables[] = ELIMINABLE_REGS;
#endif
/* Validate our parameters. */
- if (born_index < 0 || born_index > dead_index)
- abort ();
+ gcc_assert (born_index >= 0 && born_index <= dead_index);
/* Don't let a pseudo live in a reg across a function call
if we might get a nonlocal goto. */
SET_HARD_REG_BIT (used, FRAME_POINTER_REGNUM);
#endif
-#ifdef CLASS_CANNOT_CHANGE_MODE
- if (qty[qtyno].changes_mode)
- IOR_HARD_REG_SET (used,
- reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE]);
+#ifdef CANNOT_CHANGE_MODE_CLASS
+ cannot_change_mode_set_regs (&used, mode, qty[qtyno].first_reg);
#endif
/* Normally, the registers that can be used for the first register in
|| accept_call_clobbered
|| ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
{
- register int j;
- register int size1 = HARD_REGNO_NREGS (regno, mode);
+ int j;
+ int size1 = hard_regno_nregs[regno][mode];
for (j = 1; j < size1 && ! TEST_HARD_REG_BIT (used, regno + j); j++);
if (j == size1)
{
/* We need not check to see if the current function has nonlocal
labels because we don't put any pseudos that are live over calls in
- registers in that case. */
+ registers in that case. Avoid putting pseudos crossing calls that
+ might throw into call used registers. */
if (! accept_call_clobbered
&& flag_caller_saves
&& ! just_try_suggested
&& qty[qtyno].n_calls_crossed != 0
+ && qty[qtyno].n_throwing_calls_crossed == 0
&& CALLER_SAVE_PROFITABLE (qty[qtyno].n_refs,
qty[qtyno].n_calls_crossed))
{
}
\f
/* Mark that REGNO with machine-mode MODE is live starting from the current
- insn (if LIFE is non-zero) or dead starting at the current insn (if LIFE
+ insn (if LIFE is nonzero) or dead starting at the current insn (if LIFE
is zero). */
static void
-mark_life (regno, mode, life)
- register int regno;
- enum machine_mode mode;
- int life;
+mark_life (int regno, enum machine_mode mode, int life)
{
- register int j = HARD_REGNO_NREGS (regno, mode);
+ int j = hard_regno_nregs[regno][mode];
if (life)
while (--j >= 0)
SET_HARD_REG_BIT (regs_live, regno + j);
}
/* Mark register number REGNO (with machine-mode MODE) as live (if LIFE
- is non-zero) or dead (if LIFE is zero) from insn number BIRTH (inclusive)
+ is nonzero) or dead (if LIFE is zero) from insn number BIRTH (inclusive)
to insn number DEATH (exclusive). */
static void
-post_mark_life (regno, mode, life, birth, death)
- int regno;
- enum machine_mode mode;
- int life, birth, death;
+post_mark_life (int regno, enum machine_mode mode, int life, int birth,
+ int death)
{
- register int j = HARD_REGNO_NREGS (regno, mode);
-#ifdef HARD_REG_SET
- /* Declare it register if it's a scalar. */
- register
-#endif
- HARD_REG_SET this_reg;
+ int j = hard_regno_nregs[regno][mode];
+ HARD_REG_SET this_reg;
CLEAR_HARD_REG_SET (this_reg);
while (--j >= 0)
Otherwise, return 0. */
static int
-no_conflict_p (insn, r0, r1)
- rtx insn, r0 ATTRIBUTE_UNUSED, r1;
+no_conflict_p (rtx insn, rtx r0 ATTRIBUTE_UNUSED, rtx r1)
{
int ok = 0;
rtx note = find_reg_note (insn, REG_LIBCALL, NULL_RTX);
when we scan the insns that actually use it. */
if (note == 0
- || (GET_CODE (r1) == REG && REGNO (r1) < FIRST_PSEUDO_REGISTER)
- || (GET_CODE (r1) == SUBREG && GET_CODE (SUBREG_REG (r1)) == REG
+ || (REG_P (r1) && REGNO (r1) < FIRST_PSEUDO_REGISTER)
+ || (GET_CODE (r1) == SUBREG && REG_P (SUBREG_REG (r1))
&& REGNO (SUBREG_REG (r1)) < FIRST_PSEUDO_REGISTER))
return 0;
is acceptable. */
static int
-requires_inout (p)
- const char *p;
+requires_inout (const char *p)
{
char c;
int found_zero = 0;
int reg_allowed = 0;
int num_matching_alts = 0;
+ int len;
- while ((c = *p++))
- switch (c)
- {
- case '=': case '+': case '?':
- case '#': case '&': case '!':
- case '*': case '%':
- case '1': case '2': case '3': case '4': case '5':
- case '6': case '7': case '8': case '9':
- case 'm': case '<': case '>': case 'V': case 'o':
- case 'E': case 'F': case 'G': case 'H':
- case 's': case 'i': case 'n':
- case 'I': case 'J': case 'K': case 'L':
- case 'M': case 'N': case 'O': case 'P':
- case 'X':
- /* These don't say anything we care about. */
- break;
+ for ( ; (c = *p); p += len)
+ {
+ len = CONSTRAINT_LEN (c, p);
+ switch (c)
+ {
+ case '=': case '+': case '?':
+ case '#': case '&': case '!':
+ case '*': case '%':
+ case 'm': case '<': case '>': case 'V': case 'o':
+ case 'E': case 'F': case 'G': case 'H':
+ case 's': case 'i': case 'n':
+ case 'I': case 'J': case 'K': case 'L':
+ case 'M': case 'N': case 'O': case 'P':
+ case 'X':
+ /* These don't say anything we care about. */
+ break;
- case ',':
- if (found_zero && ! reg_allowed)
- num_matching_alts++;
+ case ',':
+ if (found_zero && ! reg_allowed)
+ num_matching_alts++;
- found_zero = reg_allowed = 0;
- break;
+ found_zero = reg_allowed = 0;
+ break;
- case '0':
- found_zero = 1;
- break;
+ case '0':
+ found_zero = 1;
+ break;
- default:
- if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
+ case '1': case '2': case '3': case '4': case '5':
+ case '6': case '7': case '8': case '9':
+ /* Skip the balance of the matching constraint. */
+ do
+ p++;
+ while (ISDIGIT (*p));
+ len = 0;
break;
- /* FALLTHRU */
- case 'p':
- case 'g': case 'r':
- reg_allowed = 1;
- break;
- }
+
+ default:
+ if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS
+ && !EXTRA_ADDRESS_CONSTRAINT (c, p))
+ break;
+ /* Fall through. */
+ case 'p':
+ case 'g': case 'r':
+ reg_allowed = 1;
+ break;
+ }
+ }
if (found_zero && ! reg_allowed)
num_matching_alts++;
}
\f
void
-dump_local_alloc (file)
- FILE *file;
+dump_local_alloc (FILE *file)
{
- register int i;
+ int i;
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
if (reg_renumber[i] != -1)
fprintf (file, ";; Register %d in %d.\n", i, reg_renumber[i]);
}
+
+/* Run old register allocator. Return TRUE if we must exit
+ rest_of_compilation upon return. */
+static void
+rest_of_handle_local_alloc (void)
+{
+ int rebuild_notes;
+
+ /* Determine if the current function is a leaf before running reload
+ since this can impact optimizations done by the prologue and
+ epilogue thus changing register elimination offsets. */
+ current_function_is_leaf = leaf_function_p ();
+
+ /* Allocate the reg_renumber array. */
+ allocate_reg_info (max_regno, FALSE, TRUE);
+
+ /* And the reg_equiv_memory_loc array. */
+ VARRAY_GROW (reg_equiv_memory_loc_varray, max_regno);
+ reg_equiv_memory_loc = &VARRAY_RTX (reg_equiv_memory_loc_varray, 0);
+
+ allocate_initial_values (reg_equiv_memory_loc);
+
+ regclass (get_insns (), max_reg_num ());
+ rebuild_notes = local_alloc ();
+
+ /* Local allocation may have turned an indirect jump into a direct
+ jump. If so, we must rebuild the JUMP_LABEL fields of jumping
+ instructions. */
+ if (rebuild_notes)
+ {
+ timevar_push (TV_JUMP);
+
+ rebuild_jump_labels (get_insns ());
+ purge_all_dead_edges ();
+ delete_unreachable_blocks ();
+
+ timevar_pop (TV_JUMP);
+ }
+
+ if (dump_file && (dump_flags & TDF_DETAILS))
+ {
+ timevar_push (TV_DUMP);
+ dump_flow_info (dump_file, dump_flags);
+ dump_local_alloc (dump_file);
+ timevar_pop (TV_DUMP);
+ }
+}
+
+struct tree_opt_pass pass_local_alloc =
+{
+ "lreg", /* name */
+ NULL, /* gate */
+ rest_of_handle_local_alloc, /* execute */
+ NULL, /* sub */
+ NULL, /* next */
+ 0, /* static_pass_number */
+ TV_LOCAL_ALLOC, /* tv_id */
+ 0, /* properties_required */
+ 0, /* properties_provided */
+ 0, /* properties_destroyed */
+ 0, /* todo_flags_start */
+ TODO_dump_func |
+ TODO_ggc_collect, /* todo_flags_finish */
+ 'l' /* letter */
+};
+
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