@item -Wenum-compare
@opindex Wenum-compare
@opindex Wno-enum-compare
-Warn about a comparison between values of different enumerated types. In C++
-this warning is enabled by default. In C this warning is enabled by
-@option{-Wall}.
+Warn about a comparison between values of different enumerated types.
+In C++ enumeral mismatches in conditional expressions are also
+diagnosed and the warning is enabled by default. In C this warning is
+enabled by @option{-Wall}.
@item -Wjump-misses-init @r{(C, Objective-C only)}
@opindex Wjump-misses-init
@subsection AVR Options
@cindex AVR Options
-These options are defined for AVR implementations:
-
@table @gcctabopt
@item -mmcu=@var{mcu}
@opindex mmcu
Specify Atmel AVR instruction set architectures (ISA) or MCU type.
-For a complete list of @var{mcu} values that are supported by avr-gcc,
-see the compiler output when called with the @code{--help=target}
+For a complete list of @var{mcu} values that are supported by @command{avr-gcc},
+see the compiler output when called with the @option{--help=target}
command line option.
The default for this option is@tie{}@code{avr2}.
-avr-gcc supports the following AVR devices and ISAs:
+GCC supports the following AVR devices and ISAs:
@table @code
-@item avr1
-This ISA is implemented by the minimal AVR core and supported
-for assembler only.
-@*@var{mcu}@tie{}= @code{at90s1200},
-@code{attiny10}, @code{attiny11}, @code{attiny12}, @code{attiny15},
-@code{attiny28}.
-
@item avr2
``Classic'' devices with up to 8@tie{}KiB of program memory.
-@*@var{mcu}@tie{}= @code{at90s2313}, @code{attiny26}, @code{at90c8534},
-@dots{}
+@*@var{mcu}@tie{}= @code{at90c8534}, @code{at90s2313},
+@code{at90s2323}, @code{at90s2333}, @code{at90s2343},
+@code{at90s4414}, @code{at90s4433}, @code{at90s4434},
+@code{at90s8515}, @code{at90s8535}, @code{attiny22}, @code{attiny26}.
@item avr25
``Classic'' devices with up to 8@tie{}KiB of program memory and with
the @code{MOVW} instruction.
-@*@var{mcu}@tie{}= @code{attiny2313}, @code{attiny261}, @code{attiny24},
-@dots{}
+@*@var{mcu}@tie{}= @code{at86rf401}, @code{ata6289}, @code{attiny13},
+@code{attiny13a}, @code{attiny2313}, @code{attiny2313a},
+@code{attiny24}, @code{attiny24a}, @code{attiny25}, @code{attiny261},
+@code{attiny261a}, @code{attiny4313}, @code{attiny43u},
+@code{attiny44}, @code{attiny44a}, @code{attiny45}, @code{attiny461},
+@code{attiny461a}, @code{attiny48}, @code{attiny84}, @code{attiny84a},
+@code{attiny85}, @code{attiny861}, @code{attiny861a}, @code{attiny87},
+@code{attiny88}.
@item avr3
-``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
+``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
@*@var{mcu}@tie{}= @code{at43usb355}, @code{at76c711}.
@item avr31
``Classic'' devices with 128@tie{}KiB of program memory.
-@*@var{mcu}@tie{}= @code{atmega103}, @code{at43usb320}.
+@*@var{mcu}@tie{}= @code{at43usb320}, @code{atmega103}.
@item avr35
``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of program
memory and with the @code{MOVW} instruction.
-@*@var{mcu}@tie{}= @code{at90usb162}, @code{atmega8u2},
-@code{attiny167}, @dots{}
+@*@var{mcu}@tie{}= @code{at90usb162}, @code{at90usb82},
+@code{atmega16u2}, @code{atmega32u2}, @code{atmega8u2},
+@code{attiny167}.
@item avr4
``Enhanced'' devices with up to 8@tie{}KiB of program memory.
-@*@var{mcu}@tie{}= @code{atmega8}, @code{atmega88}, @code{at90pwm81},
-@dots{}
+@*@var{mcu}@tie{}= @code{at90pwm1}, @code{at90pwm2}, @code{at90pwm2b},
+@code{at90pwm3}, @code{at90pwm3b}, @code{at90pwm81}, @code{atmega48},
+@code{atmega48a}, @code{atmega48p}, @code{atmega8}, @code{atmega8515},
+@code{atmega8535}, @code{atmega88}, @code{atmega88a},
+@code{atmega88p}, @code{atmega88pa}, @code{atmega8hva}.
@item avr5
``Enhanced'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
-@*@var{mcu}@tie{}= @code{atmega16}, @code{atmega6490}, @code{at90can64},
-@dots{}
+@*@var{mcu}@tie{}= @code{at90can32}, @code{at90can64},
+@code{at90pwm216}, @code{at90pwm316}, @code{at90scr100},
+@code{at90usb646}, @code{at90usb647}, @code{at94k}, @code{atmega16},
+@code{atmega161}, @code{atmega162}, @code{atmega163},
+@code{atmega164a}, @code{atmega164p}, @code{atmega165},
+@code{atmega165a}, @code{atmega165p}, @code{atmega168},
+@code{atmega168a}, @code{atmega168p}, @code{atmega169},
+@code{atmega169a}, @code{atmega169p}, @code{atmega169pa},
+@code{atmega16a}, @code{atmega16hva}, @code{atmega16hva2},
+@code{atmega16hvb}, @code{atmega16m1}, @code{atmega16u4},
+@code{atmega32}, @code{atmega323}, @code{atmega324a},
+@code{atmega324p}, @code{atmega324pa}, @code{atmega325},
+@code{atmega3250}, @code{atmega3250a}, @code{atmega3250p},
+@code{atmega325a}, @code{atmega325p}, @code{atmega328},
+@code{atmega328p}, @code{atmega329}, @code{atmega3290},
+@code{atmega3290a}, @code{atmega3290p}, @code{atmega329a},
+@code{atmega329p}, @code{atmega329pa}, @code{atmega32c1},
+@code{atmega32hvb}, @code{atmega32m1}, @code{atmega32u4},
+@code{atmega32u6}, @code{atmega406}, @code{atmega64},
+@code{atmega640}, @code{atmega644}, @code{atmega644a},
+@code{atmega644p}, @code{atmega644pa}, @code{atmega645},
+@code{atmega6450}, @code{atmega6450a}, @code{atmega6450p},
+@code{atmega645a}, @code{atmega645p}, @code{atmega649},
+@code{atmega6490}, @code{atmega649a}, @code{atmega649p},
+@code{atmega64c1}, @code{atmega64hve}, @code{atmega64m1},
+@code{m3000}.
@item avr51
``Enhanced'' devices with 128@tie{}KiB of program memory.
-@*@var{mcu}@tie{}= @code{atmega128}, @code{at90can128}, @code{at90usb1287},
-@dots{}
+@*@var{mcu}@tie{}= @code{at90can128}, @code{at90usb1286},
+@code{at90usb1287}, @code{atmega128}, @code{atmega1280},
+@code{atmega1281}, @code{atmega1284p}, @code{atmega128rfa1}.
@item avr6
-``Enhanced'' devices with 3-byte PC, i.e.@: with at least 256@tie{}KiB
-of program memory.
+``Enhanced'' devices with 3-byte PC, i.e.@: with more than
+128@tie{}KiB of program memory.
@*@var{mcu}@tie{}= @code{atmega2560}, @code{atmega2561}.
-@end table
+@item avrxmega2
+``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB of
+program memory.
+@*@var{mcu}@tie{}= @code{atxmega16a4}, @code{atxmega16d4},
+@code{atxmega16x1}, @code{atxmega32a4}, @code{atxmega32d4},
+@code{atxmega32x1}.
+
+@item avrxmega4
+``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of
+program memory.
+@*@var{mcu}@tie{}= @code{atxmega64a3}, @code{atxmega64d3}.
+
+@item avrxmega5
+``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of
+program memory and more than 64@tie{}KiB of RAM.
+@*@var{mcu}@tie{}= @code{atxmega64a1}, @code{atxmega64a1u}.
+
+@item avrxmega6
+``XMEGA'' devices with more than 128@tie{}KiB of program memory.
+@*@var{mcu}@tie{}= @code{atxmega128a3}, @code{atxmega128d3},
+@code{atxmega192a3}, @code{atxmega192d3}, @code{atxmega256a3},
+@code{atxmega256a3b}, @code{atxmega256a3bu}, @code{atxmega256d3}.
+
+@item avrxmega7
+``XMEGA'' devices with more than 128@tie{}KiB of program memory and
+more than 64@tie{}KiB of RAM.
+@*@var{mcu}@tie{}= @code{atxmega128a1}, @code{atxmega128a1u}.
+
+@item avr1
+This ISA is implemented by the minimal AVR core and supported for
+assembler only.
+@*@var{mcu}@tie{}= @code{at90s1200}, @code{attiny11}, @code{attiny12},
+@code{attiny15}, @code{attiny28}.
+@end table
@item -maccumulate-args
@opindex maccumulate-args
@item -mcall-prologues
@opindex mcall-prologues
-Functions prologues/epilogues expanded as call to appropriate
-subroutines. Code size will be smaller.
+Functions prologues/epilogues are expanded as calls to appropriate
+subroutines. Code size is smaller.
@item -mint8
@opindex mint8
-Assume int to be 8-bit integer. This affects the sizes of all types: a
-char will be 1 byte, an int will be 1 byte, a long will be 2 bytes
-and long long will be 4 bytes. Please note that this option does not
-comply to the C standards, but it will provide you with smaller code
+Assume @code{int} to be 8-bit integer. This affects the sizes of all types: a
+@code{char} is 1 byte, an @code{int} is 1 byte, a @code{long} is 2 bytes,
+and @code{long long} is 4 bytes. Please note that this option does not
+conform to the C standards, but it results in smaller code
size.
@item -mno-interrupts
@opindex mno-interrupts
Generated code is not compatible with hardware interrupts.
-Code size will be smaller.
+Code size is smaller.
@item -mrelax
@opindex mrelax
Jump relaxing is performed by the linker because jump offsets are not
known before code is located. Therefore, the assembler code generated by the
-compiler will be the same, but the instructions in the executable may
+compiler is the same, but the instructions in the executable may
differ from instructions in the assembler code.
+Relaxing must be turned on if linker stubs are needed, see the
+section on @code{EIND} and linker stubs below.
+
@item -mshort-calls
@opindex mshort-calls
Use @code{RCALL}/@code{RJMP} instructions even on devices with
have the @code{CALL} and @code{JMP} instructions.
See also the @code{-mrelax} command line option.
+@item -msp8
+@opindex msp8
+Treat the stack pointer register as an 8-bit register,
+i.e.@: assume the high byte of the stack pointer is zero.
+In general, you don't need to set this option by hand.
+
+This option is used internally by the compiler to select and
+build multilibs for architectures @code{avr2} and @code{avr25}.
+These architectures mix devices with and without @code{SPH}.
+For any setting other than @code{-mmcu=avr2} or @code{-mmcu=avr25}
+the compiler driver will add or remove this option from the compiler
+proper's command line, because the compiler then knows if the device
+or architecture has an 8-bit stack pointer and thus no @code{SPH}
+register or not.
+
@item -mstrict-X
@opindex mstrict-X
Use address register @code{X} in a way proposed by the hardware. This means
-that @code{X} will only be used in indirect, post-increment or
+that @code{X} is only used in indirect, post-increment or
pre-decrement addressing.
Without this option, the @code{X} register may be used in the same way
as @code{Y} or @code{Z} which then is emulated by additional
instructions.
For example, loading a value with @code{X+const} addressing with a
-small non-negative @code{const < 64} to a register @var{Rn} will be
+small non-negative @code{const < 64} to a register @var{Rn} is
performed as
@example
@item -mtiny-stack
@opindex mtiny-stack
-Only use the lower 8@tie{}bits of the stack pointer and assume that the high
-byte of SP is always zero.
+Only change the lower 8@tie{}bits of the stack pointer.
@end table
@subsubsection @code{EIND} and Devices with more than 128 Ki Bytes of Flash
-
+@cindex @code{EIND}
Pointers in the implementation are 16@tie{}bits wide.
The address of a function or label is represented as word address so
that indirect jumps and calls can target any code address in the
The compiler never sets @code{EIND}.
@item
-The startup code from libgcc never sets @code{EIND}.
-Notice that startup code is a blend of code from libgcc and avr-libc.
-For the impact of avr-libc on @code{EIND}, see the
-@w{@uref{http://nongnu.org/avr-libc/user-manual,avr-libc user manual}}.
-
-@item
The compiler uses @code{EIND} implicitely in @code{EICALL}/@code{EIJMP}
instructions or might read @code{EIND} directly in order to emulate an
indirect call/jump by means of a @code{RET} instruction.
prologue/epilogue.
@item
+For indirect calls to functions and computed goto, the linker
+generates @emph{stubs}. Stubs are jump pads sometimes also called
+@emph{trampolines}. Thus, the indirect call/jump jumps to such a stub.
+The stub contains a direct jump to the desired address.
+
+@item
+Linker relaxation must be turned on so that the linker will generate
+the stubs correctly an all situaltion. See the compiler option
+@code{-mrelax} and the linler option @code{--relax}.
+There are corner cases where the linker is supposed to generate stubs
+but aborts without relaxation and without a helpful error message.
+
+@item
+The default linker script is arranged for code with @code{EIND = 0}.
+If code is supposed to work for a setup with @code{EIND != 0}, a custom
+linker script has to be used in order to place the sections whose
+name start with @code{.trampolines} into the segment where @code{EIND}
+points to.
+
+@item
+The startup code from libgcc never sets @code{EIND}.
+Notice that startup code is a blend of code from libgcc and AVR-LibC.
+For the impact of AVR-LibC on @code{EIND}, see the
+@w{@uref{http://nongnu.org/avr-libc/user-manual,AVR-LibC user manual}}.
+
+@item
It is legitimate for user-specific startup code to set up @code{EIND}
early, for example by means of initialization code located in
section @code{.init3}. Such code runs prior to general startup code
-that initializes RAM and calls constructors.
+that initializes RAM and calls constructors, but after the bit
+of startup code from AVR-LibC that sets @code{EIND} to the segment
+where the vector table is located.
+@example
+#include <avr/io.h>
-@item
-For indirect calls to functions and computed goto, the linker will
-generate @emph{stubs}. Stubs are jump pads sometimes also called
-@emph{trampolines}. Thus, the indirect call/jump will jump to such a stub.
-The stub contains a direct jump to the desired address.
+static void
+__attribute__((section(".init3"),naked,used,no_instrument_function))
+init3_set_eind (void)
+@{
+ __asm volatile ("ldi r24,pm_hh8(__trampolines_start)\n\t"
+ "out %i0,r24" :: "n" (&EIND) : "r24","memory");
+@}
+@end example
+
+@noindent
+The @code{__trampolines_start} symbol is defined in the linker script.
@item
-Stubs will be generated automatically by the linker if
+Stubs are generated automatically by the linker if
the following two conditions are met:
@itemize @minus
@end itemize
@item
-The compiler will emit such @code{gs} modifiers for code labels in the
+The compiler emits such @code{gs} modifiers for code labels in the
following situations:
@itemize @minus
@item Taking address of a function or code label.
@end itemize
@item
-The default linker script is arranged for code with @code{EIND = 0}.
-If code is supposed to work for a setup with @code{EIND != 0}, a custom
-linker script has to be used in order to place the sections whose
-name start with @code{.trampolines} into the segment where @code{EIND}
-points to.
-
-@item
Jumping to non-symbolic addresses like so is @emph{not} supported:
@example
Alternatively, @code{func_4} can be defined in the linker script.
@end itemize
+@subsubsection Handling of the @code{RAMPD}, @code{RAMPX}, @code{RAMPY} and @code{RAMPZ} Special Function Registers
+@cindex @code{RAMPD}
+@cindex @code{RAMPX}
+@cindex @code{RAMPY}
+@cindex @code{RAMPZ}
+Some AVR devices support memories larger than the 64@tie{}KiB range
+that can be accessed with 16-bit pointers. To access memory locations
+outside this 64@tie{}KiB range, the contentent of a @code{RAMP}
+register is used as high part of the address:
+The @code{X}, @code{Y}, @code{Z} address register is concatenated
+with the @code{RAMPX}, @code{RAMPY}, @code{RAMPZ} special function
+register, respectively, to get a wide address. Similarly,
+@code{RAMPD} is used together with direct addressing.
+
+@itemize
+@item
+The startup code initializes the @code{RAMP} special function
+registers with zero.
+
+@item
+If a @ref{AVR Named Address Spaces,named address space} other than
+generic or @code{__flash} is used, then @code{RAMPZ} is set
+as needed before the operation.
+
+@item
+If the device supports RAM larger than 64@tie{KiB} and the compiler
+needs to change @code{RAMPZ} to accomplish an operation, @code{RAMPZ}
+is reset to zero after the operation.
+
+@item
+If the device comes with a specific @code{RAMP} register, the ISR
+prologue/epilogue saves/restores that SFR and initializes it with
+zero in case the ISR code might (implicitly) use it.
+
+@item
+RAM larger than 64@tie{KiB} is not supported by GCC for AVR targets.
+If you use inline assembler to read from locations outside the
+16-bit address range and change one of the @code{RAMP} registers,
+you must reset it to zero after the access.
+
+@end itemize
+
@subsubsection AVR Built-in Macros
-avr-gcc defines several built-in macros so that the user code can test
-for presence of absence of features. Almost any of the following
+GCC defines several built-in macros so that the user code can test
+for the presence or absence of features. Almost any of the following
built-in macros are deduced from device capabilities and thus
triggered by the @code{-mmcu=} command-line option.
@item __AVR_@var{Device}__
Setting @code{-mmcu=@var{device}} defines this built-in macro which reflects
-the device's name. For example, @code{-mmcu=atmega8} will define the
+the device's name. For example, @code{-mmcu=atmega8} defines the
built-in macro @code{__AVR_ATmega8__}, @code{-mmcu=attiny261a} defines
@code{__AVR_ATtiny261A__}, etc.
@var{Device} in the built-in macro and @var{device} in
@code{-mmcu=@var{device}} is that the latter is always lowercase.
-@item __AVR_HAVE_RAMPZ__
@item __AVR_HAVE_ELPM__
-The device has the @code{RAMPZ} special function register and thus the
-@code{ELPM} instruction.
+The device has the the @code{ELPM} instruction.
@item __AVR_HAVE_ELPMX__
The device has the @code{ELPM R@var{n},Z} and @code{ELPM
register-register moves.
@item __AVR_HAVE_LPMX__
-The device has the @code{LPM R@var{n},Z} and @code{LPM
-R@var{n},Z+} instructions.
+The device has the @code{LPM R@var{n},Z} and
+@code{LPM R@var{n},Z+} instructions.
@item __AVR_HAVE_MUL__
The device has a hardware multiplier.
@item __AVR_HAVE_EIJMP_EICALL__
@item __AVR_3_BYTE_PC__
The device has the @code{EIJMP} and @code{EICALL} instructions.
-This is the case for devices with at least 256@tie{}KiB of program memory.
+This is the case for devices with more than 128@tie{}KiB of program memory.
This also means that the program counter
(PC) is 3@tie{}bytes wide.
@item __AVR_HAVE_8BIT_SP__
@item __AVR_HAVE_16BIT_SP__
-The stack pointer (SP) is respectively 8 or 16 bits wide.
+The stack pointer (SP) register is treated as 8-bit respectively
+16-bit register by the compiler.
The definition of these macros is affected by @code{-mtiny-stack}.
+@item __AVR_HAVE_SPH__
+@item __AVR_SP8__
+The device has the SPH (high part of stack pointer) special function
+register or has an 8-bit stack pointer, respectively.
+The definition of these macros is affected by @code{-mmcu=} and
+in the cases of @code{-mmcu=avr2} and @code{-mmcu=avr25} also
+by @code{-msp8}.
+
+@item __AVR_HAVE_RAMPD__
+@item __AVR_HAVE_RAMPX__
+@item __AVR_HAVE_RAMPY__
+@item __AVR_HAVE_RAMPZ__
+The device has the @code{RAMPD}, @code{RAMPX}, @code{RAMPY},
+@code{RAMPZ} special function register, respectively.
+
@item __NO_INTERRUPTS__
This macro reflects the @code{-mno-interrupts} command line option.
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