@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-@c 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
+@c 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
@c Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
@c man begin COPYRIGHT
Copyright @copyright{} 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
-1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011,
+2012
Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
documented here, since you rarely need to use any of them.
@cindex C compilation options
-Most of the command line options that you can use with GCC are useful
+Most of the command-line options that you can use with GCC are useful
for C programs; when an option is only useful with another language
(usually C++), the explanation says so explicitly. If the description
for a particular option does not mention a source language, you can use
@item C Language Options
@xref{C Dialect Options,,Options Controlling C Dialect}.
@gccoptlist{-ansi -std=@var{standard} -fgnu89-inline @gol
--aux-info @var{filename} @gol
+-aux-info @var{filename} -fallow-parameterless-variadic-functions @gol
-fno-asm -fno-builtin -fno-builtin-@var{function} @gol
-fhosted -ffreestanding -fopenmp -fms-extensions -fplan9-extensions @gol
-trigraphs -no-integrated-cpp -traditional -traditional-cpp @gol
-fno-default-inline -fvisibility-inlines-hidden @gol
-fvisibility-ms-compat @gol
-Wabi -Wconversion-null -Wctor-dtor-privacy @gol
--Wnoexcept -Wnon-virtual-dtor -Wreorder @gol
+-Wdelete-non-virtual-dtor -Wnarrowing -Wnoexcept @gol
+-Wnon-virtual-dtor -Wreorder @gol
-Weffc++ -Wstrict-null-sentinel @gol
-Wno-non-template-friend -Wold-style-cast @gol
-Woverloaded-virtual -Wno-pmf-conversions @gol
-pedantic-errors @gol
-w -Wextra -Wall -Waddress -Waggregate-return -Warray-bounds @gol
-Wno-attributes -Wno-builtin-macro-redefined @gol
--Wc++-compat -Wc++0x-compat -Wcast-align -Wcast-qual @gol
+-Wc++-compat -Wc++11-compat -Wcast-align -Wcast-qual @gol
-Wchar-subscripts -Wclobbered -Wcomment @gol
-Wconversion -Wcoverage-mismatch -Wno-cpp -Wno-deprecated @gol
-Wno-deprecated-declarations -Wdisabled-optimization @gol
-Wfatal-errors -Wfloat-equal -Wformat -Wformat=2 @gol
-Wno-format-contains-nul -Wno-format-extra-args -Wformat-nonliteral @gol
-Wformat-security -Wformat-y2k @gol
--Wframe-larger-than=@var{len} -Wjump-misses-init -Wignored-qualifiers @gol
+-Wframe-larger-than=@var{len} -Wno-free-nonheap-object -Wjump-misses-init @gol
+-Wignored-qualifiers @gol
-Wimplicit -Wimplicit-function-declaration -Wimplicit-int @gol
-Winit-self -Winline -Wmaybe-uninitialized @gol
-Wno-int-to-pointer-cast -Wno-invalid-offsetof @gol
-Wsystem-headers -Wtrampolines -Wtrigraphs -Wtype-limits -Wundef @gol
-Wuninitialized -Wunknown-pragmas -Wno-pragmas @gol
-Wunsuffixed-float-constants -Wunused -Wunused-function @gol
--Wunused-label -Wunused-parameter -Wno-unused-result -Wunused-value @gol
--Wunused-variable -Wunused-but-set-parameter -Wunused-but-set-variable @gol
--Wvariadic-macros -Wvla -Wvolatile-register-var -Wwrite-strings}
+-Wunused-label -Wunused-local-typedefs -Wunused-parameter @gol
+-Wno-unused-result -Wunused-value @gol -Wunused-variable @gol
+-Wunused-but-set-parameter -Wunused-but-set-variable @gol
+-Wvariadic-macros -Wvector-operation-performance -Wvla
+-Wvolatile-register-var -Wwrite-strings -Wzero-as-null-pointer-constant}
@item C and Objective-C-only Warning Options
@gccoptlist{-Wbad-function-cast -Wmissing-declarations @gol
-fstack-usage -ftest-coverage -ftime-report -fvar-tracking @gol
-fvar-tracking-assignments -fvar-tracking-assignments-toggle @gol
-g -g@var{level} -gtoggle -gcoff -gdwarf-@var{version} @gol
--ggdb -gstabs -gstabs+ -gstrict-dwarf -gno-strict-dwarf @gol
+-ggdb -grecord-gcc-switches -gno-record-gcc-switches @gol
+-gstabs -gstabs+ -gstrict-dwarf -gno-strict-dwarf @gol
-gvms -gxcoff -gxcoff+ @gol
-fno-merge-debug-strings -fno-dwarf2-cfi-asm @gol
-fdebug-prefix-map=@var{old}=@var{new} @gol
-fcompare-elim -fcprop-registers -fcrossjumping @gol
-fcse-follow-jumps -fcse-skip-blocks -fcx-fortran-rules @gol
-fcx-limited-range @gol
--fdata-sections -fdce -fdce -fdelayed-branch @gol
--fdelete-null-pointer-checks -fdse -fdevirtualize -fdse @gol
--fearly-inlining -fipa-sra -fexpensive-optimizations -ffast-math @gol
--ffinite-math-only -ffloat-store -fexcess-precision=@var{style} @gol
+-fdata-sections -fdce -fdelayed-branch @gol
+-fdelete-null-pointer-checks -fdevirtualize -fdse @gol
+-fearly-inlining -fipa-sra -fexpensive-optimizations -ffat-lto-objects @gol
+-ffast-math -ffinite-math-only -ffloat-store -fexcess-precision=@var{style} @gol
-fforward-propagate -ffp-contract=@var{style} -ffunction-sections @gol
-fgcse -fgcse-after-reload -fgcse-las -fgcse-lm -fgraphite-identity @gol
-fgcse-sm -fif-conversion -fif-conversion2 -findirect-inlining @gol
-fprofile-correction -fprofile-dir=@var{path} -fprofile-generate @gol
-fprofile-generate=@var{path} @gol
-fprofile-use -fprofile-use=@var{path} -fprofile-values @gol
--freciprocal-math -fregmove -frename-registers -freorder-blocks @gol
+-freciprocal-math -free -fregmove -frename-registers -freorder-blocks @gol
-freorder-blocks-and-partition -freorder-functions @gol
-frerun-cse-after-loop -freschedule-modulo-scheduled-loops @gol
-frounding-math -fsched2-use-superblocks -fsched-pressure @gol
-fschedule-insns -fschedule-insns2 -fsection-anchors @gol
-fselective-scheduling -fselective-scheduling2 @gol
-fsel-sched-pipelining -fsel-sched-pipelining-outer-loops @gol
--fsignaling-nans -fsingle-precision-constant -fsplit-ivs-in-unroller @gol
--fsplit-wide-types -fstack-protector -fstack-protector-all @gol
--fstrict-aliasing -fstrict-overflow -fthread-jumps -ftracer @gol
--ftree-bit-ccp @gol
+-fshrink-wrap -fsignaling-nans -fsingle-precision-constant @gol
+-fsplit-ivs-in-unroller -fsplit-wide-types -fstack-protector @gol
+-fstack-protector-all -fstrict-aliasing -fstrict-overflow @gol
+-fthread-jumps -ftracer -ftree-bit-ccp @gol
-ftree-builtin-call-dce -ftree-ccp -ftree-ch -ftree-copy-prop @gol
-ftree-copyrename -ftree-dce -ftree-dominator-opts -ftree-dse @gol
-ftree-forwprop -ftree-fre -ftree-loop-if-convert @gol
-ftree-phiprop -ftree-loop-distribution -ftree-loop-distribute-patterns @gol
-ftree-loop-ivcanon -ftree-loop-linear -ftree-loop-optimize @gol
-ftree-parallelize-loops=@var{n} -ftree-pre -ftree-pta -ftree-reassoc @gol
--ftree-sink -ftree-sra -ftree-switch-conversion @gol
+-ftree-sink -ftree-sra -ftree-switch-conversion -ftree-tail-merge @gol
-ftree-ter -ftree-vect-loop-version -ftree-vectorize -ftree-vrp @gol
-funit-at-a-time -funroll-all-loops -funroll-loops @gol
-funsafe-loop-optimizations -funsafe-math-optimizations -funswitch-loops @gol
-iwithprefixbefore @var{dir} -isystem @var{dir} @gol
-imultilib @var{dir} -isysroot @var{dir} @gol
-M -MM -MF -MG -MP -MQ -MT -nostdinc @gol
--P -fworking-directory -remap @gol
--trigraphs -undef -U@var{macro} -Wp,@var{option} @gol
--Xpreprocessor @var{option}}
+-P -fdebug-cpp -ftrack-macro-expansion -fworking-directory @gol
+-remap -trigraphs -undef -U@var{macro} @gol
+-Wp,@var{option} -Xpreprocessor @var{option}}
@item Assembler Option
@xref{Assembler Options,,Passing Options to the Assembler}.
@c Try and put the significant identifier (CPU or system) first,
@c so users have a clue at guessing where the ones they want will be.
+@emph{Adapteva Epiphany Options}
+@gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol
+-mbranch-cost=@var{num} -mcmove -mnops=@var{num} -msoft-cmpsf @gol
+-msplit-lohi -mpost-inc -mpost-modify -mstack-offset=@var{num} @gol
+-mround-nearest -mlong-calls -mshort-calls -msmall16 @gol
+-mfp-mode=@var{mode} -mvect-double -max-vect-align=@var{num} @gol
+-msplit-vecmove-early -m1reg-@var{reg}}
+
@emph{ARM Options}
@gccoptlist{-mapcs-frame -mno-apcs-frame @gol
-mabi=@var{name} @gol
-mfix-cortex-m3-ldrd}
@emph{AVR Options}
-@gccoptlist{-mmcu=@var{mcu} -mno-interrupts @gol
--mcall-prologues -mtiny-stack -mint8}
+@gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol
+-mcall-prologues -mint8 -mno-interrupts -mrelax -mshort-calls @gol
+-mstrict-X -mtiny-stack}
@emph{Blackfin Options}
@gccoptlist{-mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]} @gol
-melf -maout -melinux -mlinux -sim -sim2 @gol
-mmul-bug-workaround -mno-mul-bug-workaround}
+@emph{CR16 Options}
+@gccoptlist{-mmac @gol
+-mcr16cplus -mcr16c @gol
+-msim -mint32 -mbit-ops
+-mdata-model=@var{model}}
+
@emph{Darwin Options}
@gccoptlist{-all_load -allowable_client -arch -arch_errors_fatal @gol
-arch_only -bind_at_load -bundle -bundle_loader @gol
-mno-wide-multiply -mrtd -malign-double @gol
-mpreferred-stack-boundary=@var{num} @gol
-mincoming-stack-boundary=@var{num} @gol
--mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip -mvzeroupper @gol
+-mcld -mcx16 -msahf -mmovbe -mcrc32 @gol
+-mrecip -mrecip=@var{opt} @gol
+-mvzeroupper @gol
-mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol
--maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol
--msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlwp @gol
--mthreads -mno-align-stringops -minline-all-stringops @gol
+-mavx2 -maes -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol
+-msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlzcnt @gol
+-mbmi2 -mlwp -mthreads -mno-align-stringops -minline-all-stringops @gol
-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
-m96bit-long-double -mregparm=@var{num} -msseregparm @gol
@emph{PowerPC Options}
See RS/6000 and PowerPC Options.
+@emph{RL78 Options}
+@gccoptlist{-msim -mmul=none -mmul=g13 -mmul=rl78}
+
@emph{RS/6000 and PowerPC Options}
@gccoptlist{-mcpu=@var{cpu-type} @gol
-mtune=@var{cpu-type} @gol
-mrecip -mrecip=@var{opt} -mno-recip -mrecip-precision @gol
-mno-recip-precision @gol
-mveclibabi=@var{type} -mfriz -mno-friz @gol
--mpointers-to-nested-functions -mno-pointers-to-nested-functions}
+-mpointers-to-nested-functions -mno-pointers-to-nested-functions @gol
+-msave-toc-indirect -mno-save-toc-indirect}
@emph{RX Options}
@gccoptlist{-m64bit-doubles -m32bit-doubles -fpu -nofpu@gol
-mrelax@gol
-mmax-constant-size=@gol
-mint-register=@gol
+-mpid@gol
-msave-acc-in-interrupts}
@emph{S/390 and zSeries Options}
-mprefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol
-mdivsi3_libfunc=@var{name} -mfixed-range=@var{register-range} @gol
-madjust-unroll -mindexed-addressing -mgettrcost=@var{number} -mpt-fixed @gol
--maccumulate-outgoing-args -minvalid-symbols}
+-maccumulate-outgoing-args -minvalid-symbols -msoft-atomic @gol
+-mbranch-cost=@var{num} -mcbranchdi -mcmpeqdi -mfused-madd -mpretend-cmove}
@emph{Solaris 2 Options}
@gccoptlist{-mimpure-text -mno-impure-text @gol
@gccoptlist{-mcpu=@var{cpu-type} @gol
-mtune=@var{cpu-type} @gol
-mcmodel=@var{code-model} @gol
+-mmemory-model=@var{mem-model} @gol
-m32 -m64 -mapp-regs -mno-app-regs @gol
-mfaster-structs -mno-faster-structs -mflat -mno-flat @gol
-mfpu -mno-fpu -mhard-float -msoft-float @gol
-mlittle-endian @gol
-mstack-bias -mno-stack-bias @gol
-munaligned-doubles -mno-unaligned-doubles @gol
--mv8plus -mno-v8plus -mvis -mno-vis}
+-mv8plus -mno-v8plus -mvis -mno-vis @gol
+-mvis2 -mno-vis2 -mvis3 -mno-vis3 @gol
+-mfmaf -mno-fmaf -mpopc -mno-popc @gol
+-mfix-at697f}
@emph{SPU Options}
@gccoptlist{-mwarn-reloc -merror-reloc @gol
@emph{System V Options}
@gccoptlist{-Qy -Qn -YP,@var{paths} -Ym,@var{dir}}
+@emph{TILE-Gx Options}
+@gccoptlist{-mcpu=CPU -m32 -m64}
+
+@emph{TILEPro Options}
+@gccoptlist{-mcpu=CPU -m32}
+
@emph{V850 Options}
@gccoptlist{-mlong-calls -mno-long-calls -mep -mno-ep @gol
-mprolog-function -mno-prolog-function -mspace @gol
@table @gcctabopt
@item @var{file}.c
-C source code which must be preprocessed.
+C source code that must be preprocessed.
@item @var{file}.i
-C source code which should not be preprocessed.
+C source code that should not be preprocessed.
@item @var{file}.ii
-C++ source code which should not be preprocessed.
+C++ source code that should not be preprocessed.
@item @var{file}.m
Objective-C source code. Note that you must link with the @file{libobjc}
library to make an Objective-C program work.
@item @var{file}.mi
-Objective-C source code which should not be preprocessed.
+Objective-C source code that should not be preprocessed.
@item @var{file}.mm
@itemx @var{file}.M
to a literal capital M@.
@item @var{file}.mii
-Objective-C++ source code which should not be preprocessed.
+Objective-C++ source code that should not be preprocessed.
@item @var{file}.h
C, C++, Objective-C or Objective-C++ header file to be turned into a
@itemx @var{file}.CPP
@itemx @var{file}.c++
@itemx @var{file}.C
-C++ source code which must be preprocessed. Note that in @samp{.cxx},
+C++ source code that must be preprocessed. Note that in @samp{.cxx},
the last two letters must both be literally @samp{x}. Likewise,
@samp{.C} refers to a literal capital C@.
@item @var{file}.mm
@itemx @var{file}.M
-Objective-C++ source code which must be preprocessed.
+Objective-C++ source code that must be preprocessed.
@item @var{file}.mii
-Objective-C++ source code which should not be preprocessed.
+Objective-C++ source code that should not be preprocessed.
@item @var{file}.hh
@itemx @var{file}.H
@item @var{file}.f
@itemx @var{file}.for
@itemx @var{file}.ftn
-Fixed form Fortran source code which should not be preprocessed.
+Fixed form Fortran source code that should not be preprocessed.
@item @var{file}.F
@itemx @var{file}.FOR
@itemx @var{file}.fpp
@itemx @var{file}.FPP
@itemx @var{file}.FTN
-Fixed form Fortran source code which must be preprocessed (with the traditional
+Fixed form Fortran source code that must be preprocessed (with the traditional
preprocessor).
@item @var{file}.f90
@itemx @var{file}.f95
@itemx @var{file}.f03
@itemx @var{file}.f08
-Free form Fortran source code which should not be preprocessed.
+Free form Fortran source code that should not be preprocessed.
@item @var{file}.F90
@itemx @var{file}.F95
@itemx @var{file}.F03
@itemx @var{file}.F08
-Free form Fortran source code which must be preprocessed (with the
+Free form Fortran source code that must be preprocessed (with the
traditional preprocessor).
@item @var{file}.go
@c @var{file}.jar
@item @var{file}.ads
-Ada source code file which contains a library unit declaration (a
+Ada source code file that contains a library unit declaration (a
declaration of a package, subprogram, or generic, or a generic
instantiation), or a library unit renaming declaration (a package,
generic, or subprogram renaming declaration). Such files are also
@item @var{file}.S
@itemx @var{file}.sx
-Assembler code which must be preprocessed.
+Assembler code that must be preprocessed.
@item @var{other}
An object file to be fed straight into linking.
output is in the form of preprocessed source code, which is sent to the
standard output.
-Input files which don't require preprocessing are ignored.
+Input files that don't require preprocessing are ignored.
@cindex output file option
@item -o @var{file}
@item --help
@opindex help
-Print (on the standard output) a description of the command line options
+Print (on the standard output) a description of the command-line options
understood by @command{gcc}. If the @option{-v} option is also specified
then @option{--help} will also be passed on to the various processes
-invoked by @command{gcc}, so that they can display the command line options
+invoked by @command{gcc}, so that they can display the command-line options
they accept. If the @option{-Wextra} option has also been specified
-(prior to the @option{--help} option), then command line options which
+(prior to the @option{--help} option), then command-line options that
have no documentation associated with them will also be displayed.
@item --target-help
@opindex target-help
-Print (on the standard output) a description of target-specific command
-line options for each tool. For some targets extra target-specific
+Print (on the standard output) a description of target-specific command-line
+options for each tool. For some targets extra target-specific
information may also be printed.
@item --help=@{@var{class}@r{|[}^@r{]}@var{qualifier}@}@r{[},@dots{}@r{]}
-Print (on the standard output) a description of the command line
+Print (on the standard output) a description of the command-line
options understood by the compiler that fit into all specified classes
and qualifiers. These are the supported classes:
@table @asis
@item @samp{undocumented}
-Display only those options which are undocumented.
+Display only those options that are undocumented.
@item @samp{joined}
-Display options which take an argument that appears after an equal
+Display options taking an argument that appears after an equal
sign in the same continuous piece of text, such as:
@samp{--help=target}.
@item @samp{separate}
-Display options which take an argument that appears as a separate word
+Display options taking an argument that appears as a separate word
following the original option, such as: @samp{-o output-file}.
@end table
The sense of a qualifier can be inverted by prefixing it with the
@samp{^} character, so for example to display all binary warning
options (i.e., ones that are either on or off and that do not take an
-argument), which have a description the following can be used:
+argument) that have a description, use:
@smallexample
--help=warnings,^joined,^undocumented
-mapcs [disabled]
@end smallexample
-The output is sensitive to the effects of previous command line
+The output is sensitive to the effects of previous command-line
options, so for example it is possible to find out which optimizations
are enabled at @option{-O2} by using:
@itemx iso9899:1999
@itemx iso9899:199x
ISO C99. Note that this standard is not yet fully supported; see
-@w{@uref{http://gcc.gnu.org/c99status.html}} for more information. The
+@w{@uref{http://gcc.gnu.org/gcc-4.7/c99status.html}} for more information. The
names @samp{c9x} and @samp{iso9899:199x} are deprecated.
-@item c1x
-ISO C1X, the draft of the next revision of the ISO C standard.
-Support is limited and experimental and features enabled by this
-option may be changed or removed if changed in or removed from the
-standard draft.
+@item c11
+@itemx c1x
+@itemx iso9899:2011
+ISO C11, the 2011 revision of the ISO C standard.
+Support is incomplete and experimental. The name @samp{c1x} is
+deprecated.
@item gnu90
@itemx gnu89
GNU dialect of ISO C99. When ISO C99 is fully implemented in GCC,
this will become the default. The name @samp{gnu9x} is deprecated.
+@item gnu11
@item gnu1x
-GNU dialect of ISO C1X. Support is limited and experimental and
-features enabled by this option may be changed or removed if changed
-in or removed from the standard draft.
+GNU dialect of ISO C11. Support is incomplete and experimental. The
+name @samp{gnu1x} is deprecated.
@item c++98
The 1998 ISO C++ standard plus amendments. Same as @option{-ansi} for
GNU dialect of @option{-std=c++98}. This is the default for
C++ code.
-@item c++0x
-The working draft of the upcoming ISO C++0x standard. This option
-enables experimental features that are likely to be included in
-C++0x. The working draft is constantly changing, and any feature that is
-enabled by this flag may be removed from future versions of GCC if it is
-not part of the C++0x standard.
+@item c++11
+The 2011 ISO C++ standard plus amendments. Support for C++11 is still
+experimental, and may change in incompatible ways in future releases.
-@item gnu++0x
-GNU dialect of @option{-std=c++0x}. This option enables
-experimental features that may be removed in future versions of GCC.
+@item gnu++11
+GNU dialect of @option{-std=c++11}. Support for C++11 is still
+experimental, and may change in incompatible ways in future releases.
@end table
@item -fgnu89-inline
arguments followed by their declarations is also provided, inside
comments, after the declaration.
+@item -fallow-parameterless-variadic-functions
+Accept variadic functions without named parameters.
+
+Although it is possible to define such a function, this is not very
+useful as it is not possible to read the arguments. This is only
+supported for C as this construct is allowed by C++.
+
@item -fno-asm
@opindex fno-asm
Do not recognize @code{asm}, @code{inline} or @code{typeof} as a
GCC normally generates special code to handle certain built-in functions
more efficiently; for instance, calls to @code{alloca} may become single
-instructions that adjust the stack directly, and calls to @code{memcpy}
+instructions which adjust the stack directly, and calls to @code{memcpy}
may become inline copy loops. The resulting code is often both smaller
and faster, but since the function calls no longer appear as such, you
cannot set a breakpoint on those calls, nor can you change the behavior
implies @option{-pthread}, and thus is only supported on targets that
have support for @option{-pthread}.
+@item -fgnu-tm
+@opindex fgnu-tm
+When the option @option{-fgnu-tm} is specified, the compiler will
+generate code for the Linux variant of Intel's current Transactional
+Memory ABI specification document (Revision 1.1, May 6 2009). This is
+an experimental feature whose interface may change in future versions
+of GCC, as the official specification changes. Please note that not
+all architectures are supported for this feature.
+
+For more information on GCC's support for transactional memory,
+@xref{Enabling libitm,,The GNU Transactional Memory Library,libitm,GNU
+Transactional Memory Library}.
+
+Note that the transactional memory feature is not supported with
+non-call exceptions (@option{-fnon-call-exceptions}).
+
@item -fms-extensions
@opindex fms-extensions
Accept some non-standard constructs used in Microsoft header files.
Accept some non-standard constructs used in Plan 9 code.
This enables @option{-fms-extensions}, permits passing pointers to
-structures with anonymous fields to functions which expect pointers to
+structures with anonymous fields to functions that expect pointers to
elements of the type of the field, and permits referring to anonymous
fields declared using a typedef. @xref{Unnamed Fields,,Unnamed
struct/union fields within structs/unions}, for details. This is only
@section Options Controlling C++ Dialect
@cindex compiler options, C++
-@cindex C++ options, command line
+@cindex C++ options, command-line
@cindex options, C++
This section describes the command-line options that are only meaningful
for C++ programs; but you can also use most of the GNU compiler options
Version 3 corrects an error in mangling a constant address as a
template argument.
-Version 4 implements a standard mangling for vector types.
+Version 4, which first appeared in G++ 4.5, implements a standard
+mangling for vector types.
-Version 5 corrects the mangling of attribute const/volatile on
-function pointer types, decltype of a plain decl, and use of a
-function parameter in the declaration of another parameter.
+Version 5, which first appeared in G++ 4.6, corrects the mangling of
+attribute const/volatile on function pointer types, decltype of a
+plain decl, and use of a function parameter in the declaration of
+another parameter.
-Version 6 corrects the promotion behavior of C++0x scoped enums.
+Version 6, which first appeared in G++ 4.7, corrects the promotion
+behavior of C++11 scoped enums and the mangling of template argument
+packs, const/static_cast, prefix ++ and --, and a class scope function
+used as a template argument.
See also @option{-Wabi}.
@item -fconserve-space
@opindex fconserve-space
-Put uninitialized or runtime-initialized global variables into the
+Put uninitialized or run-time-initialized global variables into the
common segment, as C does. This saves space in the executable at the
cost of not diagnosing duplicate definitions. If you compile with this
flag and your program mysteriously crashes after @code{main()} has
@item -fconstexpr-depth=@var{n}
@opindex fconstexpr-depth
-Set the maximum nested evaluation depth for C++0x constexpr functions
+Set the maximum nested evaluation depth for C++11 constexpr functions
to @var{n}. A limit is needed to detect endless recursion during
constant expression evaluation. The minimum specified by the standard
is 512.
-@item -fno-deduce-init-list
-@opindex fno-deduce-init-list
-Disable deduction of a template type parameter as
+@item -fdeduce-init-list
+@opindex fdeduce-init-list
+Enable deduction of a template type parameter as
std::initializer_list from a brace-enclosed initializer list, i.e.
@smallexample
@}
@end smallexample
-This option is present because this deduction is an extension to the
-current specification in the C++0x working draft, and there was
-some concern about potential overload resolution problems.
+This deduction was implemented as a possible extension to the
+originally proposed semantics for the C++11 standard, but was not part
+of the final standard, so it is disabled by default. This option is
+deprecated, and may be removed in a future version of G++.
@item -ffriend-injection
@opindex ffriend-injection
visible outside the scope of the class in which they are declared.
Friend functions were documented to work this way in the old Annotated
C++ Reference Manual, and versions of G++ before 4.1 always worked
-that way. However, in ISO C++ a friend function which is not declared
+that way. However, in ISO C++ a friend function that is not declared
in an enclosing scope can only be found using argument dependent
lookup. This option causes friends to be injected as they were in
earlier releases.
@item -fno-elide-constructors
@opindex fno-elide-constructors
The C++ standard allows an implementation to omit creating a temporary
-which is only used to initialize another object of the same type.
+that is only used to initialize another object of the same type.
Specifying this option disables that optimization, and forces G++ to
call the copy constructor in all cases.
@item -fno-enforce-eh-specs
@opindex fno-enforce-eh-specs
Don't generate code to check for violation of exception specifications
-at runtime. This option violates the C++ standard, but may be useful
+at run time. This option violates the C++ standard, but may be useful
for reducing code size in production builds, much like defining
@samp{NDEBUG}. This does not give user code permission to throw
exceptions in violation of the exception specifications; the compiler
@item -fno-implicit-templates
@opindex fno-implicit-templates
-Never emit code for non-inline templates which are instantiated
+Never emit code for non-inline templates that are instantiated
implicitly (i.e.@: by use); only emit code for explicit instantiations.
@xref{Template Instantiation}, for more information.
typenames in the signature (e.g. @code{void f(T) [with T = int]}
rather than @code{void f(int)}) so that it's clear which template is
involved. When an error message refers to a specialization of a class
-template, the compiler will omit any template arguments which match
+template, the compiler will omit any template arguments that match
the default template arguments for that template. If either of these
behaviors make it harder to understand the error message rather than
easier, using @option{-fno-pretty-templates} will disable them.
@item -fno-rtti
@opindex fno-rtti
Disable generation of information about every class with virtual
-functions for use by the C++ runtime type identification features
+functions for use by the C++ run-time type identification features
(@samp{dynamic_cast} and @samp{typeid}). If you don't use those parts
of the language, you can save some space by using this flag. Note that
exception handling uses the same information, but it will generate it as
needed. The @samp{dynamic_cast} operator can still be used for casts that
-do not require runtime type information, i.e.@: casts to @code{void *} or to
+do not require run-time type information, i.e.@: casts to @code{void *} or to
unambiguous base classes.
@item -fstats
@item -fstrict-enums
@opindex fstrict-enums
Allow the compiler to optimize using the assumption that a value of
-enumeration type can only be one of the values of the enumeration (as
-defined in the C++ standard; basically, a value which can be
+enumerated type can only be one of the values of the enumeration (as
+defined in the C++ standard; basically, a value that can be
represented in the minimum number of bits needed to represent all the
enumerators). This assumption may not be valid if the program uses a
-cast to convert an arbitrary integer value to the enumeration type.
+cast to convert an arbitrary integer value to the enumerated type.
@item -ftemplate-depth=@var{n}
@opindex ftemplate-depth
A limit on the template instantiation depth is needed to detect
endless recursions during template class instantiation. ANSI/ISO C++
conforming programs must not rely on a maximum depth greater than 17
-(changed to 1024 in C++0x). The default value is 900, as the compiler
+(changed to 1024 in C++11). The default value is 900, as the compiler
can run out of stack space before hitting 1024 in some situations.
@item -fno-threadsafe-statics
@item -fvisibility-inlines-hidden
@opindex fvisibility-inlines-hidden
This switch declares that the user does not attempt to compare
-pointers to inline methods where the addresses of the two functions
+pointers to inline functions or methods where the addresses of the two functions
were taken in different shared objects.
The effect of this is that GCC may, effectively, mark inline methods with
@item
The One Definition Rule is relaxed for types without explicit
-visibility specifications which are defined in more than one different
+visibility specifications that are defined in more than one different
shared object: those declarations are permitted if they would have
been permitted when this option was not used.
@end enumerate
In new code it is better to use @option{-fvisibility=hidden} and
-export those classes which are intended to be externally visible.
+export those classes that are intended to be externally visible.
Unfortunately it is possible for code to rely, perhaps accidentally,
on the Visual Studio behavior.
@item -Wdelete-non-virtual-dtor @r{(C++ and Objective-C++ only)}
@opindex Wdelete-non-virtual-dtor
@opindex Wno-delete-non-virtual-dtor
-Warn when @samp{delete} is used to destroy an instance of a class which
+Warn when @samp{delete} is used to destroy an instance of a class that
has virtual functions and non-virtual destructor. It is unsafe to delete
an instance of a derived class through a pointer to a base class if the
base class does not have a virtual destructor. This warning is enabled
by @option{-Wall}.
+@item -Wnarrowing @r{(C++ and Objective-C++ only)}
+@opindex Wnarrowing
+@opindex Wno-narrowing
+Warn when a narrowing conversion prohibited by C++11 occurs within
+@samp{@{ @}}, e.g.
+
+@smallexample
+int i = @{ 2.2 @}; // error: narrowing from double to int
+@end smallexample
+
+This flag is included in @option{-Wall} and @option{-Wc++11-compat}.
+
+With -std=c++11, @option{-Wno-narrowing} suppresses the diagnostic
+required by the standard. Note that this does not affect the meaning
+of well-formed code; narrowing conversions are still considered
+ill-formed in SFINAE context.
+
@item -Wnoexcept @r{(C++ and Objective-C++ only)}
@opindex Wnoexcept
@opindex Wno-noexcept
Warn when a class has virtual functions and accessible non-virtual
destructor, in which case it would be possible but unsafe to delete
an instance of a derived class through a pointer to the base class.
-This warning is also enabled if -Weffc++ is specified.
+This warning is also enabled if @option{-Weffc++} is specified.
@item -Wreorder @r{(C++ and Objective-C++ only)}
@opindex Wreorder
@opindex Weffc++
@opindex Wno-effc++
Warn about violations of the following style guidelines from Scott Meyers'
-@cite{Effective C++} book:
+@cite{Effective C++, Second Edition} book:
@itemize @bullet
@item
behavior for G++, @option{-Wnon-template-friend} allows the compiler to
check existing code for potential trouble spots and is on by default.
This new compiler behavior can be turned off with
-@option{-Wno-non-template-friend} which keeps the conformant compiler code
+@option{-Wno-non-template-friend}, which keeps the conformant compiler code
but disables the helpful warning.
@item -Wold-style-cast @r{(C++ and Objective-C++ only)}
@section Options Controlling Objective-C and Objective-C++ Dialects
@cindex compiler options, Objective-C and Objective-C++
-@cindex Objective-C and Objective-C++ options, command line
+@cindex Objective-C and Objective-C++ options, command-line
@cindex options, Objective-C and Objective-C++
(NOTE: This manual does not describe the Objective-C and Objective-C++
languages themselves. @xref{Standards,,Language Standards
@opindex fobjc-call-cxx-cdtors
For each Objective-C class, check if any of its instance variables is a
C++ object with a non-trivial default constructor. If so, synthesize a
-special @code{- (id) .cxx_construct} instance method that will run
+special @code{- (id) .cxx_construct} instance method which will run
non-trivial default constructors on any such instance variables, in order,
and then return @code{self}. Similarly, check if any instance variable
is a C++ object with a non-trivial destructor, and if so, synthesize a
-special @code{- (void) .cxx_destruct} method that will run
+special @code{- (void) .cxx_destruct} method which will run
all such default destructors, in reverse order.
The @code{- (id) .cxx_construct} and @code{- (void) .cxx_destruct}
to be retained. This is useful in Zero-Link debugging mode, since it allows
for individual class implementations to be modified during program execution.
The GNU runtime currently always retains calls to @code{objc_get_class("@dots{}")}
-regardless of command line options.
+regardless of command-line options.
@item -gen-decls
@opindex gen-decls
found for a given selector when attempting to send a message using this
selector to a receiver of type @code{id} or @code{Class}. When this flag
is off (which is the default behavior), the compiler will omit such warnings
-if any differences found are confined to types which share the same size
+if any differences found are confined to types that share the same size
and alignment.
@item -Wundeclared-selector @r{(Objective-C and Objective-C++ only)}
@item -fno-diagnostics-show-option
@opindex fno-diagnostics-show-option
@opindex fdiagnostics-show-option
-By default, each diagnostic emitted includes text which indicates the
-command line option that directly controls the diagnostic (if such an
+By default, each diagnostic emitted includes text indicating the
+command-line option that directly controls the diagnostic (if such an
option is known to the diagnostic machinery). Specifying the
@option{-fno-diagnostics-show-option} flag suppresses that behavior.
-@item -Wcoverage-mismatch
-@opindex Wcoverage-mismatch
-Warn if feedback profiles do not match when using the
-@option{-fprofile-use} option.
-If a source file was changed between @option{-fprofile-gen} and
-@option{-fprofile-use}, the files with the profile feedback can fail
-to match the source file and GCC can not use the profile feedback
-information. By default, this warning is enabled and is treated as an
-error. @option{-Wno-coverage-mismatch} can be used to disable the
-warning or @option{-Wno-error=coverage-mismatch} can be used to
-disable the error. Disable the error for this warning can result in
-poorly optimized code, so disabling the error is useful only in the
-case of very minor changes such as bug fixes to an existing code-base.
-Completely disabling the warning is not recommended.
-
@end table
@node Warning Options
@cindex messages, warning
@cindex suppressing warnings
-Warnings are diagnostic messages that report constructions which
-are not inherently erroneous but which are risky or suggest there
+Warnings are diagnostic messages that report constructions that
+are not inherently erroneous but that are risky or suggest there
may have been an error.
The following language-independent options do not enable specific
is in effect.
The warning message for each controllable warning includes the
-option which controls the warning. That option can then be used with
+option that controls the warning. That option can then be used with
@option{-Werror=} and @option{-Wno-error=} as described above.
(Printing of the option in the warning message can be disabled using the
@option{-fno-diagnostics-show-option} flag.)
@gccoptlist{-Waddress @gol
-Warray-bounds @r{(only with} @option{-O2}@r{)} @gol
--Wc++0x-compat @gol
+-Wc++11-compat @gol
-Wchar-subscripts @gol
-Wenum-compare @r{(in C/Objc; this is on by default in C++)} @gol
-Wimplicit-int @r{(C and Objective-C only)} @gol
(C++ only) Ambiguous virtual bases.
@item
-(C++ only) Subscripting an array which has been declared @samp{register}.
+(C++ only) Subscripting an array that has been declared @samp{register}.
@item
-(C++ only) Taking the address of a variable which has been declared
+(C++ only) Taking the address of a variable that has been declared
@samp{register}.
@item
comment, or whenever a Backslash-Newline appears in a @samp{//} comment.
This warning is enabled by @option{-Wall}.
+@item -Wno-coverage-mismatch
+@opindex Wno-coverage-mismatch
+Warn if feedback profiles do not match when using the
+@option{-fprofile-use} option.
+If a source file was changed between @option{-fprofile-gen} and
+@option{-fprofile-use}, the files with the profile feedback can fail
+to match the source file and GCC cannot use the profile feedback
+information. By default, this warning is enabled and is treated as an
+error. @option{-Wno-coverage-mismatch} can be used to disable the
+warning or @option{-Wno-error=coverage-mismatch} can be used to
+disable the error. Disabling the error for this warning can result in
+poorly optimized code and is useful only in the
+case of very minor changes such as bug fixes to an existing code-base.
+Completely disabling the warning is not recommended.
+
@item -Wno-cpp
@r{(C, Objective-C, C++, Objective-C++ and Fortran only)}
@opindex Wformat-y2k
@opindex Wno-format-y2k
If @option{-Wformat} is specified, also warn about @code{strftime}
-formats which may yield only a two-digit year.
+formats that may yield only a two-digit year.
@item -Wno-format-contains-nul
@opindex Wno-format-contains-nul
warning if the unused arguments are all pointers, since the Single
Unix Specification says that such unused arguments are allowed.
-@item -Wno-format-zero-length @r{(C and Objective-C only)}
+@item -Wno-format-zero-length
@opindex Wno-format-zero-length
@opindex Wformat-zero-length
If @option{-Wformat} is specified, do not warn about zero-length formats.
@option{-Wformat}. Currently equivalent to @samp{-Wformat
-Wformat-nonliteral -Wformat-security -Wformat-y2k}.
-@item -Wnonnull @r{(C and Objective-C only)}
+@item -Wnonnull
@opindex Wnonnull
@opindex Wno-nonnull
Warn about passing a null pointer for arguments marked as
@item -Winit-self @r{(C, C++, Objective-C and Objective-C++ only)}
@opindex Winit-self
@opindex Wno-init-self
-Warn about uninitialized variables which are initialized with themselves.
+Warn about uninitialized variables that are initialized with themselves.
Note this option can only be used with the @option{-Wuninitialized} option.
For example, GCC will warn about @code{i} being uninitialized in the
To suppress this warning use the @samp{unused} attribute
(@pxref{Variable Attributes}).
+@item -Wunused-local-typedefs @r{(C, Objective-C, C++ and Objective-C++ only)}
+@opindex Wunused-local-typedefs
+Warn when a typedef locally defined in a function is not used.
+
@item -Wunused-parameter
@opindex Wunused-parameter
@opindex Wno-unused-parameter
@opindex Wunused-result
@opindex Wno-unused-result
Do not warn if a caller of a function marked with attribute
-@code{warn_unused_result} (@pxref{Variable Attributes}) does not use
+@code{warn_unused_result} (@pxref{Function Attributes}) does not use
its return value. The default is @option{-Wunused-result}.
@item -Wunused-variable
warn if a non-static reference or non-static @samp{const} member
appears in a class without constructors.
-If you want to warn about code which uses the uninitialized value of the
+If you want to warn about code that uses the uninitialized value of the
variable in its own initializer, use the @option{-Winit-self} option.
These warnings occur for individual uninitialized or clobbered
elements of structure, union or array variables as well as for
-variables which are uninitialized or clobbered as a whole. They do
+variables that are uninitialized or clobbered as a whole. They do
not occur for variables or elements declared @code{volatile}. Because
these warnings depend on optimization, the exact variables or elements
for which there are warnings will depend on the precise optimization
entry to a use of the variable that is initialized, but there exist
some other paths the variable is not initialized, the compiler will
emit a warning if it can not prove the uninitialized paths do not
-happen at runtime. These warnings are made optional because GCC is
+happen at run time. These warnings are made optional because GCC is
not smart enough to see all the reasons why the code might be correct
despite appearing to have an error. Here is one example of how
this can happen:
where @code{longjmp} will be called; in fact, a signal handler could
call it at any point in the code. As a result, you may get a warning
even when there is in fact no problem because @code{longjmp} cannot
-in fact be called at the place which would cause a problem.
+in fact be called at the place that would cause a problem.
Some spurious warnings can be avoided if you declare all the functions
you use that never return as @code{noreturn}. @xref{Function
@cindex warning for unknown pragmas
@cindex unknown pragmas, warning
@cindex pragmas, warning of unknown
-Warn when a #pragma directive is encountered which is not understood by
-GCC@. If this command line option is used, warnings will even be issued
+Warn when a @code{#pragma} directive is encountered that is not understood by
+GCC@. If this command-line option is used, warnings will even be issued
for unknown pragmas in system header files. This is not the case if
-the warnings were only enabled by the @option{-Wall} command line option.
+the warnings were only enabled by the @option{-Wall} command-line option.
@item -Wno-pragmas
@opindex Wno-pragmas
@opindex Wstrict-aliasing
@opindex Wno-strict-aliasing
This option is only active when @option{-fstrict-aliasing} is active.
-It warns about code which might break the strict aliasing rules that the
+It warns about code that might break the strict aliasing rules that the
compiler is using for optimization. The warning does not catch all
cases, but does attempt to catch the more common pitfalls. It is
included in @option{-Wall}.
@opindex Wstrict-aliasing=n
@opindex Wno-strict-aliasing=n
This option is only active when @option{-fstrict-aliasing} is active.
-It warns about code which might break the strict aliasing rules that the
+It warns about code that might break the strict aliasing rules that the
compiler is using for optimization.
Higher levels correspond to higher accuracy (fewer false positives).
Higher levels also correspond to more effort, similar to the way -O works.
do not warn but -fstrict-aliasing still breaks the code, as it has very few
false negatives. However, it has many false positives.
Warns for all pointer conversions between possibly incompatible types,
-even if never dereferenced. Runs in the frontend only.
+even if never dereferenced. Runs in the front end only.
Level 2: Aggressive, quick, not too precise.
May still have many false positives (not as many as level 1 though),
and few false negatives (but possibly more than level 1).
Unlike level 1, it only warns when an address is taken. Warns about
-incomplete types. Runs in the frontend only.
+incomplete types. Runs in the front end only.
Level 3 (default for @option{-Wstrict-aliasing}):
Should have very few false positives and few false
negatives. Slightly slower than levels 1 or 2 when optimization is enabled.
-Takes care of the common pun+dereference pattern in the frontend:
+Takes care of the common pun+dereference pattern in the front end:
@code{*(int*)&some_float}.
-If optimization is enabled, it also runs in the backend, where it deals
+If optimization is enabled, it also runs in the back end, where it deals
with multiple statement cases using flow-sensitive points-to information.
Only warns when the converted pointer is dereferenced.
Does not warn about incomplete types.
about cases where the compiler implements some optimization. Thus
this warning depends on the optimization level.
-An optimization which assumes that signed overflow does not occur is
+An optimization that assumes that signed overflow does not occur is
perfectly safe if the values of the variables involved are such that
overflow never does, in fact, occur. Therefore this warning can
-easily give a false positive: a warning about code which is not
+easily give a false positive: a warning about code that is not
actually a problem. To help focus on important issues, several
warning levels are defined. No warnings are issued for the use of
undefined signed overflow when estimating how many iterations a loop
@table @gcctabopt
@item -Wstrict-overflow=1
-Warn about cases which are both questionable and easy to avoid. For
+Warn about cases that are both questionable and easy to avoid. For
example: @code{x + 1 > x}; with @option{-fstrict-overflow}, the
compiler will simplify this to @code{1}. This level of
@option{-Wstrict-overflow} is enabled by @option{-Wall}; higher levels
@opindex Wsuggest-attribute=noreturn
@opindex Wno-suggest-attribute=noreturn
-Warn about functions which might be candidates for attributes
+Warn about functions that might be candidates for attributes
@code{pure}, @code{const} or @code{noreturn}. The compiler only warns for
functions visible in other compilation units or (in the case of @code{pure} and
@code{const}) if it cannot prove that the function returns normally. A function
@item -Wno-div-by-zero
@opindex Wno-div-by-zero
@opindex Wdiv-by-zero
-Do not warn about compile-time integer division by zero. Floating point
+Do not warn about compile-time integer division by zero. Floating-point
division by zero is not warned about, as it can be a legitimate way of
obtaining infinities and NaNs.
Print warning messages for constructs found in system header files.
Warnings from system headers are normally suppressed, on the assumption
that they usually do not indicate real problems and would only make the
-compiler output harder to read. Using this command line option tells
+compiler output harder to read. Using this command-line option tells
GCC to emit warnings from system headers as if they occurred in user
code. However, note that using @option{-Wall} in conjunction with this
option will @emph{not} warn about unknown pragmas in system
@item -Wfloat-equal
@opindex Wfloat-equal
@opindex Wno-float-equal
-Warn if floating point values are used in equality comparisons.
+Warn if floating-point values are used in equality comparisons.
The idea behind this is that sometimes it is convenient (for the
programmer) to consider floating-point values as approximations to
@opindex Wno-traditional
Warn about certain constructs that behave differently in traditional and
ISO C@. Also warn about ISO C constructs that have no traditional C
-equivalent, and/or problematic constructs which should be avoided.
+equivalent, and/or problematic constructs that should be avoided.
@itemize @bullet
@item
The unary plus operator.
@item
-The @samp{U} integer constant suffix, or the @samp{F} or @samp{L} floating point
+The @samp{U} integer constant suffix, or the @samp{F} or @samp{L} floating-point
constant suffixes. (Traditional C does support the @samp{L} suffix on integer
constants.) Note, these suffixes appear in macros defined in the system
headers of most modern systems, e.g.@: the @samp{_MIN}/@samp{_MAX} macros in @code{<limits.h>}.
traditional C case.
@item
-Conversions by prototypes between fixed/floating point values and vice
+Conversions by prototypes between fixed/floating-point values and vice
versa. The absence of these prototypes when compiling with traditional
C would cause serious problems. This is a subset of the possible
conversion warnings, for the full set use @option{-Wtraditional-conversion}.
Warn if a prototype causes a type conversion that is different from what
would happen to the same argument in the absence of a prototype. This
includes conversions of fixed point to floating and vice versa, and
-conversions changing the width or signedness of a fixed point argument
+conversions changing the width or signedness of a fixed-point argument
except when the same as the default promotion.
@item -Wdeclaration-after-statement @r{(C and Objective-C only)}
is not included by the compiler when determining
whether or not to issue a warning.
+@item -Wno-free-nonheap-object
+@opindex Wno-free-nonheap-object
+@opindex Wfree-nonheap-object
+Do not warn when attempting to free an object that was not allocated
+on the heap.
+
@item -Wstack-usage=@var{len}
@opindex Wstack-usage
Warn if the stack usage of a function might be larger than @var{len} bytes.
If the stack usage is fully static but exceeds the specified amount, it's:
@smallexample
-Â warning: stack usage is 1120 bytes
+ warning: stack usage is 1120 bytes
@end smallexample
@item
If the stack usage is (partly) dynamic but bounded, it's:
@smallexample
-Â warning: stack usage might be 1648 bytes
+ warning: stack usage might be 1648 bytes
@end smallexample
@item
If the stack usage is (partly) dynamic and not bounded, it's:
@smallexample
-Â warning: stack usage might be unbounded
+ warning: stack usage might be unbounded
@end smallexample
@end itemize
ISO C and ISO C++, e.g.@: request for implicit conversion from
@code{void *} to a pointer to non-@code{void} type.
-@item -Wc++0x-compat @r{(C++ and Objective-C++ only)}
-Warn about C++ constructs whose meaning differs between ISO C++ 1998 and
-ISO C++ 200x, e.g., identifiers in ISO C++ 1998 that will become keywords
-in ISO C++ 200x. This warning is enabled by @option{-Wall}.
+@item -Wc++11-compat @r{(C++ and Objective-C++ only)}
+Warn about C++ constructs whose meaning differs between ISO C++ 1998
+and ISO C++ 2011, e.g., identifiers in ISO C++ 1998 that are keywords
+in ISO C++ 2011. This warning turns on @option{-Wnarrowing} and is
+enabled by @option{-Wall}.
@item -Wcast-qual
@opindex Wcast-qual
the target type. For example, warn if a @code{const char *} is cast
to an ordinary @code{char *}.
-Also warn when making a cast which introduces a type qualifier in an
+Also warn when making a cast that introduces a type qualifier in an
unsafe way. For example, casting @code{char **} to @code{const char **}
is unsafe, as in this example:
Do not warn for conversions between @code{NULL} and non-pointer
types. @option{-Wconversion-null} is enabled by default.
+@item -Wzero-as-null-pointer-constant @r{(C++ and Objective-C++ only)}
+@opindex Wzero-as-null-pointer-constant
+@opindex Wno-zero-as-null-pointer-constant
+Warn when a literal '0' is used as null pointer constant. This can
+be useful to facilitate the conversion to @code{nullptr} in C++11.
+
@item -Wempty-body
@opindex Wempty-body
@opindex Wno-empty-body
@item -Wenum-compare
@opindex Wenum-compare
@opindex Wno-enum-compare
-Warn about a comparison between values of different enum types. In C++
-this warning is enabled by default. In C this warning is enabled by
-@option{-Wall}.
+Warn about a comparison between values of different enumerated types.
+In C++ enumeral mismatches in conditional expressions are also
+diagnosed and the warning is enabled by default. In C this warning is
+enabled by @option{-Wall}.
@item -Wjump-misses-init @r{(C, Objective-C only)}
@opindex Wjump-misses-init
Warn if a @code{goto} statement or a @code{switch} statement jumps
forward across the initialization of a variable, or jumps backward to a
label after the variable has been initialized. This only warns about
-variables which are initialized when they are declared. This warning is
-only supported for C and Objective C; in C++ this sort of branch is an
+variables that are initialized when they are declared. This warning is
+only supported for C and Objective-C; in C++ this sort of branch is an
error in any case.
@option{-Wjump-misses-init} is included in @option{-Wc++-compat}. It
@opindex Wno-strict-prototypes
Warn if a function is declared or defined without specifying the
argument types. (An old-style function definition is permitted without
-a warning if preceded by a declaration which specifies the argument
+a warning if preceded by a declaration that specifies the argument
types.)
@item -Wold-style-declaration @r{(C and Objective-C only)}
@opindex Wno-missing-prototypes
Warn if a global function is defined without a previous prototype
declaration. This warning is issued even if the definition itself
-provides a prototype. The aim is to detect global functions that fail
-to be declared in header files.
+provides a prototype. The aim is to detect global functions that
+are not declared in header files.
@item -Wmissing-declarations
@opindex Wmissing-declarations
@opindex Wno-missing-format-attribute
@opindex Wformat
@opindex Wno-format
-Warn about function pointers which might be candidates for @code{format}
+Warn about function pointers that might be candidates for @code{format}
attributes. Note these are only possible candidates, not absolute ones.
GCC will guess that function pointers with @code{format} attributes that
are used in assignment, initialization, parameter passing or return
of the containing function respectively should also have a @code{format}
attribute to avoid the warning.
-GCC will also warn about function definitions which might be
+GCC will also warn about function definitions that might be
candidates for @code{format} attributes. Again, these are only
possible candidates. GCC will guess that @code{format} attributes
might be appropriate for any function that calls a function like
different character sequences that look the same. To avoid confusion,
the ISO 10646 standard sets out some @dfn{normalization rules} which
when applied ensure that two sequences that look the same are turned into
-the same sequence. GCC can warn you if you are using identifiers which
+the same sequence. GCC can warn you if you are using identifiers that
have not been normalized; this option controls that warning.
-There are four levels of warning that GCC supports. The default is
-@option{-Wnormalized=nfc}, which warns about any identifier which is
+There are four levels of warning supported by GCC. The default is
+@option{-Wnormalized=nfc}, which warns about any identifier that is
not in the ISO 10646 ``C'' normalized form, @dfn{NFC}. NFC is the
recommended form for most uses.
-Unfortunately, there are some characters which ISO C and ISO C++ allow
-in identifiers that when turned into NFC aren't allowable as
+Unfortunately, there are some characters allowed in identifiers by
+ISO C and ISO C++ that, when turned into NFC, are not allowed in
identifiers. That is, there's no way to use these symbols in portable
ISO C or C++ and have all your identifiers in NFC@.
@option{-Wnormalized=id} suppresses the warning for these characters.
Some characters in ISO 10646 have distinct meanings but look identical
in some fonts or display methodologies, especially once formatting has
been applied. For instance @code{\u207F}, ``SUPERSCRIPT LATIN SMALL
-LETTER N'', will display just like a regular @code{n} which has been
+LETTER N'', will display just like a regular @code{n} that has been
placed in a superscript. ISO 10646 defines the @dfn{NFKC}
normalization scheme to convert all these into a standard form as
well, and GCC will warn if your code is not in NFKC if you use
alternate syntax when in pedantic ISO C99 mode. This is default.
To inhibit the warning messages, use @option{-Wno-variadic-macros}.
+@item -Wvector-operation-performance
+@opindex Wvector-operation-performance
+@opindex Wno-vector-operation-performance
+Warn if vector operation is not implemented via SIMD capabilities of the
+architecture. Mainly useful for the performance tuning.
+Vector operation can be implemented @code{piecewise}, which means that the
+scalar operation is performed on every vector element;
+@code{in parallel}, which means that the vector operation is implemented
+using scalars of wider type, which normally is more performance efficient;
+and @code{as a single scalar}, which means that vector fits into a
+scalar type.
+
@item -Wvla
@opindex Wvla
@opindex Wno-vla
@item -Woverlength-strings
@opindex Woverlength-strings
@opindex Wno-overlength-strings
-Warn about string constants which are longer than the ``minimum
+Warn about string constants that are longer than the ``minimum
maximum'' length specified in the C standard. Modern compilers
-generally allow string constants which are much longer than the
+generally allow string constants that are much longer than the
standard's minimum limit, but very portable programs should avoid
using longer strings.
Produce debugging information in stabs format (if that is supported),
without GDB extensions. This is the format used by DBX on most BSD
systems. On MIPS, Alpha and System V Release 4 systems this option
-produces stabs debugging output which is not understood by DBX or SDB@.
+produces stabs debugging output that is not understood by DBX or SDB@.
On System V Release 4 systems this option requires the GNU assembler.
@item -feliminate-unused-debug-symbols
Version 4 may require GDB 7.0 and @option{-fvar-tracking-assignments}
for maximum benefit.
+@item -grecord-gcc-switches
+@opindex grecord-gcc-switches
+This switch causes the command-line options used to invoke the
+compiler that may affect code generation to be appended to the
+DW_AT_producer attribute in DWARF debugging information. The options
+are concatenated with spaces separating them from each other and from
+the compiler version. See also @option{-frecord-gcc-switches} for another
+way of storing compiler options into the object file.
+
+@item -gno-record-gcc-switches
+@opindex gno-record-gcc-switches
+Disallow appending command-line options to the DW_AT_producer attribute
+in DWARF debugging information. This is the default.
+
@item -gstrict-dwarf
@opindex gstrict-dwarf
Disallow using extensions of later DWARF standard version than selected
@opindex fmerge-debug-strings
@opindex fno-merge-debug-strings
Direct the linker to not merge together strings in the debugging
-information which are identical in different object files. Merging is
+information that are identical in different object files. Merging is
not supported by all assemblers or linkers. Merging decreases the size
of the debug information in the output file at the cost of increasing
link processing time. Merging is enabled by default.
dynamically: in addition to the static allocation described above, stack
adjustments are made in the body of the function, for example to push/pop
arguments around function calls. If the qualifier @code{bounded} is also
-present, the amount of these adjustments is bounded at compile-time and
+present, the amount of these adjustments is bounded at compile time and
the second field is an upper bound of the total amount of stack used by
the function. If it is not present, the amount of these adjustments is
-not bounded at compile-time and the second field only represents the
+not bounded at compile time and the second field only represents the
bounded part.
@item -fprofile-arcs
@itemx -fdump-rtl-pro_and_epilogue
@opindex fdump-rtl-pro_and_epilogue
-Dump after generating the function pro and epilogues.
+Dump after generating the function prologues and epilogues.
@item -fdump-rtl-regmove
@opindex fdump-rtl-regmove
@item -fdump-passes
@opindex fdump-passes
Dump the list of optimization passes that are turned on and off by
-the current command line options.
+the current command-line options.
@item -fdump-statistics-@var{option}
@opindex fdump-statistics
switch specific suffix to the source file name, and the file is
created in the same directory as the output file. If the
@samp{-@var{options}} form is used, @var{options} is a list of
-@samp{-} separated options that control the details of the dump. Not
-all options are applicable to all dumps, those which are not
+@samp{-} separated options which control the details of the dump. Not
+all options are applicable to all dumps; those that are not
meaningful will be ignored. The following options are available
@table @samp
preprocessed @file{foo.i} output file even though the compiler now
normally uses an integrated preprocessor.
-When used in combination with the @option{-x} command line option,
+When used in combination with the @option{-x} command-line option,
@option{-save-temps} is sensible enough to avoid over writing an
input source file with the same extension as an intermediate file.
The corresponding intermediate file may be obtained by renaming the
-fsched-interblock -fsched-spec @gol
-fschedule-insns -fschedule-insns2 @gol
-fstrict-aliasing -fstrict-overflow @gol
--ftree-switch-conversion @gol
+-ftree-switch-conversion -ftree-tail-merge @gol
-ftree-pre @gol
-ftree-vrp}
@item -fno-defer-pop
@opindex fno-defer-pop
Always pop the arguments to each function call as soon as that function
-returns. For machines which must pop arguments after a function call,
+returns. For machines that must pop arguments after a function call,
the compiler normally lets arguments accumulate on the stack for several
function calls and pops them all at once.
@item -fno-inline
@opindex fno-inline
-Don't pay attention to the @code{inline} keyword. Normally this option
-is used to keep the compiler from expanding any functions inline.
-Note that if you are not optimizing, no functions can be expanded inline.
+Do not expand any functions inline apart from those marked with
+the @code{always_inline} attribute. This is the default when not
+optimizing.
+
+Single functions can be exempted from inlining by marking them
+with the @code{noinline} attribute.
@item -finline-small-functions
@opindex finline-small-functions
Integrate functions into their callers when their body is smaller than expected
function call code (so overall size of program gets smaller). The compiler
heuristically decides which functions are simple enough to be worth integrating
-in this way.
+in this way. This inlining applies to all functions, even those not declared
+inline.
Enabled at level @option{-O2}.
@item -finline-functions
@opindex finline-functions
-Integrate all simple functions into their callers. The compiler
-heuristically decides which functions are simple enough to be worth
-integrating in this way.
+Consider all functions for inlining, even if they are not declared inline.
+The compiler heuristically decides which functions are worth integrating
+in this way.
If all calls to a given function are integrated, and the function is
declared @code{static}, then the function is normally not output as
@item -fmerge-constants
@opindex fmerge-constants
-Attempt to merge identical constants (string constants and floating point
+Attempt to merge identical constants (string constants and floating-point
constants) across compilation units.
This option is the default for optimized compilation if the assembler and
This option implies @option{-fmerge-constants}. In addition to
@option{-fmerge-constants} this considers e.g.@: even constant initialized
-arrays or initialized constant variables with integral or floating point
+arrays or initialized constant variables with integral or floating-point
types. Languages like C or C++ require each variable, including multiple
instances of the same variable in recursive calls, to have distinct locations,
so using this option will result in non-conforming
@item -fcse-skip-blocks
@opindex fcse-skip-blocks
This is similar to @option{-fcse-follow-jumps}, but causes CSE to
-follow jumps which conditionally skip over blocks. When CSE
+follow jumps that conditionally skip over blocks. When CSE
encounters a simple @code{if} statement with no else clause,
@option{-fcse-skip-blocks} causes CSE to follow the jump around the
body of the @code{if}.
This pass also performs global constant and copy propagation.
@emph{Note:} When compiling a program using computed gotos, a GCC
-extension, you may get better runtime performance if you disable
+extension, you may get better run-time performance if you disable
the global common subexpression elimination pass by adding
@option{-fno-gcse} to the command line.
@item -fgcse-lm
@opindex fgcse-lm
When @option{-fgcse-lm} is enabled, global common subexpression elimination will
-attempt to move loads which are only killed by stores into themselves. This
+attempt to move loads that are only killed by stores into themselves. This
allows a loop containing a load/store sequence to be changed to a load outside
the loop, and a copy/store within the loop.
Note however that in some environments this assumption is not true.
Use @option{-fno-delete-null-pointer-checks} to disable this optimization
-for programs which depend on that behavior.
+for programs that depend on that behavior.
Some targets, especially embedded ones, disable this option at all levels.
Otherwise it is enabled at all levels: @option{-O0}, @option{-O1},
Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
+@item -free
+@opindex free
+Attempt to remove redundant extension instructions. This is especially
+helpful for the x86-64 architecture which implicitly zero-extends in 64-bit
+registers after writing to their lower 32-bit half.
+
+Enabled for x86 at levels @option{-O2}, @option{-O3}.
+
@item -foptimize-register-move
@itemx -fregmove
@opindex foptimize-register-move
Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
@item -fira-algorithm=@var{algorithm}
-Use specified coloring algorithm for the integrated register
-allocator. The @var{algorithm} argument should be @code{priority} or
-@code{CB}. The first algorithm specifies Chow's priority coloring,
-the second one specifies Chaitin-Briggs coloring. The second
-algorithm can be unimplemented for some architectures. If it is
-implemented, it is the default because Chaitin-Briggs coloring as a
-rule generates a better code.
+Use the specified coloring algorithm for the integrated register
+allocator. The @var{algorithm} argument can be @samp{priority}, which
+specifies Chow's priority coloring, or @samp{CB}, which specifies
+Chaitin-Briggs coloring. Chaitin-Briggs coloring is not implemented
+for all architectures, but for those targets that do support it, it is
+the default because it generates better code.
@item -fira-region=@var{region}
Use specified regions for the integrated register allocator. The
-@var{region} argument should be one of @code{all}, @code{mixed}, or
-@code{one}. The first value means using all loops as register
-allocation regions, the second value which is the default means using
-all loops except for loops with small register pressure as the
-regions, and third one means using all function as a single region.
-The first value can give best result for machines with small size and
-irregular register set, the third one results in faster and generates
-decent code and the smallest size code, and the default value usually
-give the best results in most cases and for most architectures.
+@var{region} argument should be one of the following:
+
+@table @samp
+
+@item all
+Use all loops as register allocation regions.
+This can give the best results for machines with a small and/or
+irregular register set.
+
+@item mixed
+Use all loops except for loops with small register pressure
+as the regions. This value usually gives
+the best results in most cases and for most architectures,
+and is enabled by default when compiling with optimization for speed
+(@option{-O}, @option{-O2}, @dots{}).
+
+@item one
+Use all functions as a single region.
+This typically results in the smallest code size, and is enabled by default for
+@option{-Os} or @option{-O0}.
+
+@end table
@item -fira-loop-pressure
@opindex fira-loop-pressure
-Use IRA to evaluate register pressure in loops for decision to move
-loop invariants. Usage of this option usually results in generation
-of faster and smaller code on machines with big register files (>= 32
-registers) but it can slow compiler down.
+Use IRA to evaluate register pressure in loops for decisions to move
+loop invariants. This option usually results in generation
+of faster and smaller code on machines with large register files (>= 32
+registers), but it can slow the compiler down.
This option is enabled at level @option{-O3} for some targets.
@item -fno-ira-share-save-slots
@opindex fno-ira-share-save-slots
-Switch off sharing stack slots used for saving call used hard
-registers living through a call. Each hard register will get a
-separate stack slot and as a result function stack frame will be
-bigger.
+Disable sharing of stack slots used for saving call-used hard
+registers living through a call. Each hard register gets a
+separate stack slot, and as a result function stack frames are
+larger.
@item -fno-ira-share-spill-slots
@opindex fno-ira-share-spill-slots
-Switch off sharing stack slots allocated for pseudo-registers. Each
-pseudo-register which did not get a hard register will get a separate
-stack slot and as a result function stack frame will be bigger.
+Disable sharing of stack slots allocated for pseudo-registers. Each
+pseudo-register that does not get a hard register gets a separate
+stack slot, and as a result function stack frames are larger.
@item -fira-verbose=@var{n}
@opindex fira-verbose
-Set up how verbose dump file for the integrated register allocator
-will be. Default value is 5. If the value is greater or equal to 10,
-the dump file will be stderr as if the value were @var{n} minus 10.
+Control the verbosity of the dump file for the integrated register allocator.
+The default value is 5. If the value @var{n} is greater or equal to 10,
+the dump output is sent to stderr using the same format as @var{n} minus 10.
@item -fdelayed-branch
@opindex fdelayed-branch
eliminate execution stalls due to required data being unavailable. This
helps machines that have slow floating point or memory load instructions
by allowing other instructions to be issued until the result of the load
-or floating point instruction is required.
+or floating-point instruction is required.
Enabled at levels @option{-O2}, @option{-O3}.
When pipelining loops during selective scheduling, also pipeline outer loops.
This option has no effect until @option{-fsel-sched-pipelining} is turned on.
+@item -fshrink-wrap
+@opindex fshrink-wrap
+Emit function prologues only before parts of the function that need it,
+rather than at the top of the function. This flag is enabled by default at
+@option{-O} and higher.
+
@item -fcaller-saves
@opindex fcaller-saves
Enable values to be allocated in registers that will be clobbered by
Matrix flattening tries to replace an @math{m}-dimensional matrix
with its equivalent @math{n}-dimensional matrix, where @math{n < m}.
This reduces the level of indirection needed for accessing the elements
-of the matrix. The second optimization is matrix transposing that
+of the matrix. The second optimization is matrix transposing, which
attempts to change the order of the matrix's dimensions in order to
improve cache locality.
Both optimizations need the @option{-fwhole-program} flag.
initializations from a scalar array. This flag is enabled by default
at @option{-O2} and higher.
+@item -ftree-tail-merge
+Look for identical code sequences. When found, replace one with a jump to the
+other. This optimization is known as tail merging or cross jumping. This flag
+is enabled by default at @option{-O2} and higher. The compilation time
+in this pass can
+be limited using @option{max-tail-merge-comparisons} parameter and
+@option{max-tail-merge-iterations} parameter.
+
@item -ftree-dce
@opindex ftree-dce
Perform dead code elimination (DCE) on trees. This flag is enabled by
@item -ftree-dse
@opindex ftree-dse
Perform dead store elimination (DSE) on trees. A dead store is a store into
-a memory location which will later be overwritten by another store without
+a memory location that is later overwritten by another store without
any intervening loads. In this case the earlier store can be deleted. This
flag is enabled by default at @option{-O} and higher.
@end smallexample
which can be beneficial when @code{M} is larger than the caches,
because the innermost loop will iterate over a smaller amount of data
-that can be kept in the caches. This optimization applies to all the
+which can be kept in the caches. This optimization applies to all the
languages supported by GCC and is not limited to Fortran. To use this
code transformation, GCC has to be configured with @option{--with-ppl}
and @option{--with-cloog} to enable the Graphite loop transformation
@item -floop-flatten
@opindex floop-flatten
Removes the loop nesting structure: transforms the loop nest into a
-single loop. This transformation can be useful to vectorize all the
-levels of the loop nest.
+single loop. This transformation can be useful as an enablement
+transform for vectorization and parallelization. This feature
+is experimental.
+To use this code transformation, GCC has to be configured
+with @option{--with-ppl} and @option{--with-cloog} to enable the
+Graphite loop transformation infrastructure.
@item -floop-parallelize-all
@opindex floop-parallelize-all
@item -ftree-loop-ivcanon
@opindex ftree-loop-ivcanon
-Create a canonical counter for number of iterations in the loop for that
+Create a canonical counter for number of iterations in loops for which
determining number of iterations requires complicated analysis. Later
optimizations then may determine the number easily. Useful especially
in connection with unrolling.
@opindex ftree-vect-loop-version
Perform loop versioning when doing loop vectorization on trees. When a loop
appears to be vectorizable except that data alignment or data dependence cannot
-be determined at compile time then vectorized and non-vectorized versions of
-the loop are generated along with runtime checks for alignment or dependence
+be determined at compile time, then vectorized and non-vectorized versions of
+the loop are generated along with run-time checks for alignment or dependence
to control which version is executed. This option is enabled by default
except at level @option{-Os} where it is disabled.
statements. Output them in the same order that they appear in the
input file. When this option is used, unreferenced static variables
will not be removed. This option is intended to support existing code
-which relies on a particular ordering. For new code, it is better to
+that relies on a particular ordering. For new code, it is better to
use attributes.
-Enabled at level @option{-O0}. When disabled explicitly, it also imply
-@option{-fno-section-anchors} that is otherwise enabled at @option{-O0} on some
+Enabled at level @option{-O0}. When disabled explicitly, it also implies
+@option{-fno-section-anchors}, which is otherwise enabled at @option{-O0} on some
targets.
@item -fweb
bodies are read from these ELF sections and instantiated as if they
had been part of the same translation unit.
-To use the link-timer optimizer, @option{-flto} needs to be specified at
-compile time and during the final link. For example,
+To use the link-time optimizer, @option{-flto} needs to be specified at
+compile time and during the final link. For example:
@smallexample
gcc -c -O2 -flto foo.c
gcc -o myprog -flto -O2 foo.o bar.o
@end smallexample
-The first two invocations to GCC will save a bytecode representation
+The first two invocations to GCC save a bytecode representation
of GIMPLE into special ELF sections inside @file{foo.o} and
-@file{bar.o}. The final invocation will read the GIMPLE bytecode from
-@file{foo.o} and @file{bar.o}, merge the two files into a single
-internal image, and compile the result as usual. Since both
+@file{bar.o}. The final invocation reads the GIMPLE bytecode from
+@file{foo.o} and @file{bar.o}, merges the two files into a single
+internal image, and compiles the result as usual. Since both
@file{foo.o} and @file{bar.o} are merged into a single image, this
-causes all the inter-procedural analyses and optimizations in GCC to
+causes all the interprocedural analyses and optimizations in GCC to
work across the two files as if they were a single one. This means,
-for example, that the inliner will be able to inline functions in
+for example, that the inliner is able to inline functions in
@file{bar.o} into functions in @file{foo.o} and vice-versa.
-Another (simpler) way to enable link-time optimization is,
+Another (simpler) way to enable link-time optimization is:
@smallexample
gcc -o myprog -flto -O2 foo.c bar.c
@end smallexample
-The above will generate bytecode for @file{foo.c} and @file{bar.c},
-merge them together into a single GIMPLE representation and optimize
+The above generates bytecode for @file{foo.c} and @file{bar.c},
+merges them together into a single GIMPLE representation and optimizes
them as usual to produce @file{myprog}.
The only important thing to keep in mind is that to enable link-time
To make whole program optimization effective, it is necessary to make
certain whole program assumptions. The compiler needs to know
what functions and variables can be accessed by libraries and runtime
-outside of the link time optimized unit. When supported by the linker,
-the linker plugin (see @option{-fuse-linker-plugin}) passes to the
-compiler information about used and externally visible symbols. When
+outside of the link-time optimized unit. When supported by the linker,
+the linker plugin (see @option{-fuse-linker-plugin}) passes information
+to the compiler about used and externally visible symbols. When
the linker plugin is not available, @option{-fwhole-program} should be
-used to allow the compiler to make these assumptions, which will lead
+used to allow the compiler to make these assumptions, which leads
to more aggressive optimization decisions.
Note that when a file is compiled with @option{-flto}, the generated
-object file will be larger than a regular object file because it will
-contain GIMPLE bytecodes and the usual final code. This means that
-object files with LTO information can be linked as a normal object
-file. So, in the previous example, if the final link is done with
-
-@smallexample
-gcc -o myprog foo.o bar.o
-@end smallexample
-
-The only difference will be that no inter-procedural optimizations
-will be applied to produce @file{myprog}. The two object files
-@file{foo.o} and @file{bar.o} will be simply sent to the regular
-linker.
+object file is larger than a regular object file because it
+contains GIMPLE bytecodes and the usual final code. This means that
+object files with LTO information can be linked as normal object
+files; if @option{-flto} is not passed to the linker, no
+interprocedural optimizations are applied.
Additionally, the optimization flags used to compile individual files
-are not necessarily related to those used at link-time. For instance,
+are not necessarily related to those used at link time. For instance,
@smallexample
gcc -c -O0 -flto foo.c
gcc -o myprog -flto -O3 foo.o bar.o
@end smallexample
-This will produce individual object files with unoptimized assembler
-code, but the resulting binary @file{myprog} will be optimized at
-@option{-O3}. Now, if the final binary is generated without
-@option{-flto}, then @file{myprog} will not be optimized.
+This produces individual object files with unoptimized assembler
+code, but the resulting binary @file{myprog} is optimized at
+@option{-O3}. If, instead, the final binary is generated without
+@option{-flto}, then @file{myprog} is not optimized.
-When producing the final binary with @option{-flto}, GCC will only
-apply link-time optimizations to those files that contain bytecode.
+When producing the final binary with @option{-flto}, GCC only
+applies link-time optimizations to those files that contain bytecode.
Therefore, you can mix and match object files and libraries with
-GIMPLE bytecodes and final object code. GCC will automatically select
+GIMPLE bytecodes and final object code. GCC automatically selects
which files to optimize in LTO mode and which files to link without
further processing.
-There are some code generation flags that GCC will preserve when
+There are some code generation flags preserved by GCC when
generating bytecodes, as they need to be used during the final link
stage. Currently, the following options are saved into the GIMPLE
bytecode files: @option{-fPIC}, @option{-fcommon} and all the
@option{-m} target flags.
-At link time, these options are read-in and reapplied. Note that the
-current implementation makes no attempt at recognizing conflicting
-values for these options. If two or more files have a conflicting
-value (e.g., one file is compiled with @option{-fPIC} and another
-isn't), the compiler will simply use the last value read from the
-bytecode files. It is recommended, then, that all the files
-participating in the same link be compiled with the same options.
+At link time, these options are read in and reapplied. Note that the
+current implementation makes no attempt to recognize conflicting
+values for these options. If different files have conflicting option
+values (e.g., one file is compiled with @option{-fPIC} and another
+isn't), the compiler simply uses the last value read from the
+bytecode files. It is recommended, then, that you compile all the files
+participating in the same link with the same options.
+
+If LTO encounters objects with C linkage declared with incompatible
+types in separate translation units to be linked together (undefined
+behavior according to ISO C99 6.2.7), a non-fatal diagnostic may be
+issued. The behavior is still undefined at run time.
Another feature of LTO is that it is possible to apply interprocedural
optimizations on files written in different languages. This requires
-some support in the language front end. Currently, the C, C++ and
+support in the language front end. Currently, the C, C++ and
Fortran front ends are capable of emitting GIMPLE bytecodes, so
-something like this should work
+something like this should work:
@smallexample
gcc -c -flto foo.c
Notice that the final link is done with @command{g++} to get the C++
runtime libraries and @option{-lgfortran} is added to get the Fortran
runtime libraries. In general, when mixing languages in LTO mode, you
-should use the same link command used when mixing languages in a
-regular (non-LTO) compilation. This means that if your build process
-was mixing languages before, all you need to add is @option{-flto} to
+should use the same link command options as when mixing languages in a
+regular (non-LTO) compilation; all you need to add is @option{-flto} to
all the compile and link commands.
-If LTO encounters objects with C linkage declared with incompatible
-types in separate translation units to be linked together (undefined
-behavior according to ISO C99 6.2.7), a non-fatal diagnostic may be
-issued. The behavior is still undefined at runtime.
-
If object files containing GIMPLE bytecode are stored in a library archive, say
@file{libfoo.a}, it is possible to extract and use them in an LTO link if you
-are using a linker with linker plugin support. To enable this feature, use
-the flag @option{-fuse-linker-plugin} at link-time:
+are using a linker with plugin support. To enable this feature, use
+the flag @option{-fuse-linker-plugin} at link time:
@smallexample
gcc -o myprog -O2 -flto -fuse-linker-plugin a.o b.o -lfoo
@end smallexample
-With the linker plugin enabled, the linker will extract the needed
-GIMPLE files from @file{libfoo.a} and pass them on to the running GCC
+With the linker plugin enabled, the linker extracts the needed
+GIMPLE files from @file{libfoo.a} and passes them on to the running GCC
to make them part of the aggregated GIMPLE image to be optimized.
-If you are not using a linker with linker plugin support and/or do not
-enable linker plugin then the objects inside @file{libfoo.a}
-will be extracted and linked as usual, but they will not participate
+If you are not using a linker with plugin support and/or do not
+enable the linker plugin, then the objects inside @file{libfoo.a}
+are extracted and linked as usual, but they do not participate
in the LTO optimization process.
-Link time optimizations do not require the presence of the whole program to
+Link-time optimizations do not require the presence of the whole program to
operate. If the program does not require any symbols to be exported, it is
-possible to combine @option{-flto} and with @option{-fwhole-program} to allow
+possible to combine @option{-flto} and @option{-fwhole-program} to allow
the interprocedural optimizers to use more aggressive assumptions which may
lead to improved optimization opportunities.
Use of @option{-fwhole-program} is not needed when linker plugin is
active (see @option{-fuse-linker-plugin}).
-Regarding portability: the current implementation of LTO makes no
-attempt at generating bytecode that can be ported between different
+The current implementation of LTO makes no
+attempt to generate bytecode that is portable between different
types of hosts. The bytecode files are versioned and there is a
strict version check, so bytecode files generated in one version of
GCC will not work with an older/newer version of GCC.
-Link time optimization does not play well with generating debugging
+Link-time optimization does not work well with generation of debugging
information. Combining @option{-flto} with
@option{-g} is currently experimental and expected to produce wrong
results.
You can also specify @option{-flto=jobserver} to use GNU make's
job server mode to determine the number of parallel jobs. This
is useful when the Makefile calling GCC is already executing in parallel.
-The parent Makefile will need a @samp{+} prepended to the command recipe
-for this to work. This will likely only work if @env{MAKE} is
+You must prepend a @samp{+} to the command recipe in the parent Makefile
+for this to work. This option likely only works if @env{MAKE} is
GNU make.
-This option is disabled by default.
+This option is disabled by default
@item -flto-partition=@var{alg}
@opindex flto-partition
-Specify the partitioning algorithm used by the link time optimizer.
+Specify the partitioning algorithm used by the link-time optimizer.
The value is either @code{1to1} to specify a partitioning mirroring
the original source files or @code{balanced} to specify partitioning
into equally sized chunks (whenever possible). Specifying @code{none}
@item -flto-report
Prints a report with internal details on the workings of the link-time
-optimizer. The contents of this report vary from version to version,
-it is meant to be useful to GCC developers when processing object
+optimizer. The contents of this report vary from version to version.
+It is meant to be useful to GCC developers when processing object
files in LTO mode (via @option{-flto}).
Disabled by default.
@item -fuse-linker-plugin
-Enables the use of a linker plugin during link time optimization. This
+Enables the use of a linker plugin during link-time optimization. This
option relies on plugin support in the linker, which is available in gold
or in GNU ld 2.21 or newer.
This option enables the extraction of object files with GIMPLE bytecode out
of library archives. This improves the quality of optimization by exposing
-more code to the link time optimizer. This information specifies what
+more code to the link-time optimizer. This information specifies what
symbols can be accessed externally (by non-LTO object or during dynamic
linking). Resulting code quality improvements on binaries (and shared
libraries that use hidden visibility) are similar to @code{-fwhole-program}.
See @option{-flto} for a description of the effect of this flag and how to
use it.
-Enabled by default when LTO support in GCC is enabled and GCC was compiled
-with a linker supporting plugins (GNU ld 2.21 or newer or gold).
+This option is enabled by default when LTO support in GCC is enabled
+and GCC was configured for use with
+a linker supporting plugins (GNU ld 2.21 or newer or gold).
+
+@item -ffat-lto-objects
+@opindex ffat-lto-objects
+Fat LTO objects are object files that contain both the intermediate language
+and the object code. This makes them usable for both LTO linking and normal
+linking. This option is effective only when compiling with @option{-flto}
+and is ignored at link time.
+
+@option{-fno-fat-lto-objects} improves compilation time over plain LTO, but
+requires the complete toolchain to be aware of LTO. It requires a linker with
+linker plugin support for basic functionality. Additionally, nm, ar and ranlib
+need to support linker plugins to allow a full-featured build environment
+(capable of building static libraries etc).
+
+The default is @option{-ffat-lto-objects} but this default is intended to
+change in future releases when linker plugin enabled environments become more
+common.
@item -fcompare-elim
@opindex fcompare-elim
the profile feedback data files. See @option{-fprofile-dir}.
@end table
-The following options control compiler behavior regarding floating
-point arithmetic. These options trade off between speed and
+The following options control compiler behavior regarding floating-point
+arithmetic. These options trade off between speed and
correctness. All must be specifically enabled.
@table @gcctabopt
@item -ffloat-store
@opindex ffloat-store
-Do not store floating point variables in registers, and inhibit other
-options that might change whether a floating point value is taken from a
+Do not store floating-point variables in registers, and inhibit other
+options that might change whether a floating-point value is taken from a
register or memory.
-@cindex floating point precision
+@cindex floating-point precision
This option prevents undesirable excess precision on machines such as
the 68000 where the floating registers (of the 68881) keep more
precision than a @code{double} is supposed to have. Similarly for the
This option is not turned on by any @option{-O} option besides
@option{-Ofast} since it can result in incorrect output for programs
-which depend on an exact implementation of IEEE or ISO rules/specifications
+that depend on an exact implementation of IEEE or ISO rules/specifications
for math functions. It may, however, yield faster code for programs
that do not require the guarantees of these specifications.
for speed while maintaining IEEE arithmetic compatibility.
This option is not turned on by any @option{-O} option since
-it can result in incorrect output for programs which depend on
+it can result in incorrect output for programs that depend on
an exact implementation of IEEE or ISO rules/specifications for
math functions. It may, however, yield faster code for programs
that do not require the guarantees of these specifications.
similar optimizations.
This option is not turned on by any @option{-O} option since
-it can result in incorrect output for programs which depend on
+it can result in incorrect output for programs that depend on
an exact implementation of IEEE or ISO rules/specifications for
math functions. It may, however, yield faster code for programs
that do not require the guarantees of these specifications.
This violates the ISO C and C++ language standard by possibly changing
computation result. NOTE: re-ordering may change the sign of zero as
well as ignore NaNs and inhibit or create underflow or overflow (and
-thus cannot be used on a code which relies on rounding behavior like
-@code{(x + 2**52) - 2**52)}. May also reorder floating-point comparisons
+thus cannot be used on code that relies on rounding behavior like
+@code{(x + 2**52) - 2**52}. May also reorder floating-point comparisons
and thus may not be used when ordered comparisons are required.
This option requires that both @option{-fno-signed-zeros} and
@option{-fno-trapping-math} be in effect. Moreover, it doesn't make
Allow the reciprocal of a value to be used instead of dividing by
the value if this enables optimizations. For example @code{x / y}
-can be replaced with @code{x * (1/y)} which is useful if @code{(1/y)}
+can be replaced with @code{x * (1/y)}, which is useful if @code{(1/y)}
is subject to common subexpression elimination. Note that this loses
precision and increases the number of flops operating on the value.
that arguments and results are not NaNs or +-Infs.
This option is not turned on by any @option{-O} option since
-it can result in incorrect output for programs which depend on
+it can result in incorrect output for programs that depend on
an exact implementation of IEEE or ISO rules/specifications for
math functions. It may, however, yield faster code for programs
that do not require the guarantees of these specifications.
@item -fno-signed-zeros
@opindex fno-signed-zeros
-Allow optimizations for floating point arithmetic that ignore the
+Allow optimizations for floating-point arithmetic that ignore the
signedness of zero. IEEE arithmetic specifies the behavior of
distinct +0.0 and @minus{}0.0 values, which then prohibits simplification
of expressions such as x+0.0 or 0.0*x (even with @option{-ffinite-math-only}).
allow faster code if one relies on ``non-stop'' IEEE arithmetic, for example.
This option should never be turned on by any @option{-O} option since
-it can result in incorrect output for programs which depend on
+it can result in incorrect output for programs that depend on
an exact implementation of IEEE or ISO rules/specifications for
math functions.
@item -frounding-math
@opindex frounding-math
-Disable transformations and optimizations that assume default floating
-point rounding behavior. This is round-to-zero for all floating point
+Disable transformations and optimizations that assume default floating-point
+rounding behavior. This is round-to-zero for all floating point
to integer conversions, and round-to-nearest for all other arithmetic
truncations. This option should be specified for programs that change
the FP rounding mode dynamically, or that may be executed with a
non-default rounding mode. This option disables constant folding of
-floating point expressions at compile-time (which may be affected by
+floating-point expressions at compile time (which may be affected by
rounding mode) and arithmetic transformations that are unsafe in the
presence of sign-dependent rounding modes.
This option is experimental and does not currently guarantee to
disable all GCC optimizations that are affected by rounding mode.
Future versions of GCC may provide finer control of this setting
-using C99's @code{FENV_ACCESS} pragma. This command line option
+using C99's @code{FENV_ACCESS} pragma. This command-line option
will be used to specify the default state for @code{FENV_ACCESS}.
@item -fsignaling-nans
@item -fsingle-precision-constant
@opindex fsingle-precision-constant
-Treat floating point constant as single precision constant instead of
-implicitly converting it to double precision constant.
+Treat floating-point constants as single precision instead of
+implicitly converting them to double-precision constants.
@item -fcx-limited-range
@opindex fcx-limited-range
@item -fpeel-loops
@opindex fpeel-loops
-Peels the loops for that there is enough information that they do not
+Peels loops for which there is enough information that they do not
roll much (from profile feedback). It also turns on complete loop peeling
(i.e.@: complete removal of loops with small constant number of iterations).
@opindex param
In some places, GCC uses various constants to control the amount of
optimization that is done. For example, GCC will not inline functions
-that contain more that a certain number of instructions. You can
-control some of these constants on the command-line using the
+that contain more than a certain number of instructions. You can
+control some of these constants on the command line using the
@option{--param} option.
The names of specific parameters, and the meaning of the values, are
The maximum number of incoming edges to consider for crossjumping.
The algorithm used by @option{-fcrossjumping} is @math{O(N^2)} in
the number of edges incoming to each block. Increasing values mean
-more aggressive optimization, making the compile time increase with
+more aggressive optimization, making the compilation time increase with
probably small improvement in executable size.
@item min-crossjump-insns
-The minimum number of instructions which must be matched at the end
+The minimum number of instructions that must be matched at the end
of two blocks before crossjumping will be performed on them. This
value is ignored in the case where all instructions in the block being
crossjumped from are matched. The default value is 5.
instruction to fill a delay slot. If more than this arbitrary number of
instructions is searched, the time savings from filling the delay slot
will be minimal so stop searching. Increasing values mean more
-aggressive optimization, making the compile time increase with probably
-small improvement in executable run time.
+aggressive optimization, making the compilation time increase with probably
+small improvement in execution time.
@item max-delay-slot-live-search
When trying to fill delay slots, the maximum number of instructions to
consider when searching for a block with valid live register
information. Increasing this arbitrarily chosen value means more
-aggressive optimization, increasing the compile time. This parameter
+aggressive optimization, increasing the compilation time. This parameter
should be removed when the delay slot code is rewritten to maintain the
control-flow graph.
with few branches or calls can create excessively large lists which
needlessly consume memory and resources.
+@item max-modulo-backtrack-attempts
+The maximum number of backtrack attempts the scheduler should make
+when modulo scheduling a loop. Larger values can exponentially increase
+compilation time.
+
@item max-inline-insns-single
Several parameters control the tree inliner used in gcc.
This number sets the maximum number of instructions (counted in GCC's
limit after inlining, inlining is constrained by
@option{--param large-function-growth}. This parameter is useful primarily
to avoid extreme compilation time caused by non-linear algorithms used by the
-backend.
+back end.
The default value is 2700.
@item large-function-growth
Scaling factor in calculation of maximum distance an expression
can be moved by GCSE optimizations. This is currently supported only in the
code hoisting pass. The bigger the ratio, the more aggressive code hoisting
-will be with simple expressions, i.e., the expressions which have cost
+will be with simple expressions, i.e., the expressions that have cost
less than @option{gcse-unrestricted-cost}. Specifying 0 will disable
hoisting of simple expressions. The default value is 10.
The value of 0 will avoid limiting the search, but may slow down compilation
of huge functions. The default value is 30.
+@item max-tail-merge-comparisons
+The maximum amount of similar bbs to compare a bb with. This is used to
+avoid quadratic behavior in tree tail merging. The default value is 10.
+
+@item max-tail-merge-iterations
+The maximum amount of iterations of the pass over the function. This is used to
+limit compilation time in tree tail merging. The default value is 2.
+
@item max-unrolled-insns
The maximum number of instructions that a loop should have if that loop
is unrolled, and if the loop is unrolled, it determines how many times
constraints. The default value is 0.
@item vect-max-version-for-alignment-checks
-The maximum number of runtime checks that can be performed when
+The maximum number of run-time checks that can be performed when
doing loop versioning for alignment in the vectorizer. See option
ftree-vect-loop-version for more information.
@item vect-max-version-for-alias-checks
-The maximum number of runtime checks that can be performed when
+The maximum number of run-time checks that can be performed when
doing loop versioning for alias in the vectorizer. See option
ftree-vect-loop-version for more information.
tuning this may improve compilation speed, and has no effect on code
generation.
-The default is the smaller of RAM/8, RLIMIT_RSS, or a limit which
+The default is the smaller of RAM/8, RLIMIT_RSS, or a limit that
tries to ensure that RLIMIT_DATA or RLIMIT_AS are not exceeded, but
with a lower bound of 4096 (four megabytes) and an upper bound of
131072 (128 megabytes). If GCC is not able to calculate RAM on a
@item max-reload-search-insns
The maximum number of instruction reload should look backward for equivalent
register. Increasing values mean more aggressive optimization, making the
-compile time increase with probably slightly better performance. The default
-value is 100.
+compilation time increase with probably slightly better performance.
+The default value is 100.
@item max-cselib-memory-locations
The maximum number of memory locations cselib should take into account.
-Increasing values mean more aggressive optimization, making the compile time
+Increasing values mean more aggressive optimization, making the compilation time
increase with probably slightly better performance. The default value is 500.
@item reorder-blocks-duplicate
be disabled. The default maximum SCC size is 10000.
@item ira-max-loops-num
-IRA uses a regional register allocation by default. If a function
-contains loops more than number given by the parameter, only at most
-given number of the most frequently executed loops will form regions
-for the regional register allocation. The default value of the
+IRA uses regional register allocation by default. If a function
+contains more loops than the number given by this parameter, only at most
+the given number of the most frequently-executed loops form regions
+for regional register allocation. The default value of the
parameter is 100.
-@item ira-max-conflict-table-size
-Although IRA uses a sophisticated algorithm of compression conflict
-table, the table can be still big for huge functions. If the conflict
-table for a function could be more than size in MB given by the
-parameter, the conflict table is not built and faster, simpler, and
-lower quality register allocation algorithm will be used. The
-algorithm do not use pseudo-register conflicts. The default value of
-the parameter is 2000.
+@item ira-max-conflict-table-size
+Although IRA uses a sophisticated algorithm to compress the conflict
+table, the table can still require excessive amounts of memory for
+huge functions. If the conflict table for a function could be more
+than the size in MB given by this parameter, the register allocator
+instead uses a faster, simpler, and lower-quality
+algorithm that does not require building a pseudo-register conflict table.
+The default value of the parameter is 2000.
@item ira-loop-reserved-regs
IRA can be used to evaluate more accurate register pressure in loops
-for decision to move loop invariants (see @option{-O3}). The number
-of available registers reserved for some other purposes is described
-by this parameter. The default value of the parameter is 2 which is
-minimal number of registers needed for execution of typical
-instruction. This value is the best found from numerous experiments.
+for decisions to move loop invariants (see @option{-O3}). The number
+of available registers reserved for some other purposes is given
+by this parameter. The default value of the parameter is 2, which is
+the minimal number of registers needed by typical instructions.
+This value is the best found from numerous experiments.
@item loop-invariant-max-bbs-in-loop
-Loop invariant motion can be very expensive, both in compile time and
-in amount of needed compile time memory, with very large loops. Loops
+Loop invariant motion can be very expensive, both in compilation time and
+in amount of needed compile-time memory, with very large loops. Loops
with more basic blocks than this parameter won't have loop invariant
motion optimization performed on them. The default value of the
parameter is 1000 for -O1 and 10000 for -O2 and above.
+@item loop-max-datarefs-for-datadeps
+Building data dapendencies is expensive for very large loops. This
+parameter limits the number of data references in loops that are
+considered for data dependence analysis. These large loops will not
+be handled then by the optimizations using loop data dependencies.
+The default value is 1000.
+
@item max-vartrack-size
Sets a maximum number of hash table slots to use during variable
tracking dataflow analysis of any function. If this limit is exceeded
@item max-vartrack-expr-depth
Sets a maximum number of recursion levels when attempting to map
variable names or debug temporaries to value expressions. This trades
-compile time for more complete debug information. If this is set too
+compilation time for more complete debug information. If this is set too
low, value expressions that are available and could be represented in
debug information may end up not being used; setting this higher may
enable the compiler to find more complex debug expressions, but compile
-time may grow exponentially, and even then, it may fail to find more
-usable expressions. The default is 10.
+time and memory use may grow. The default is 12.
@item min-nondebug-insn-uid
Use uids starting at this parameter for nondebug insns. The range below
@option{ipa-sra-ptr-growth-factor} times the size of the original
pointer parameter.
+@item tm-max-aggregate-size
+When making copies of thread-local variables in a transaction, this
+parameter specifies the size in bytes after which variables will be
+saved with the logging functions as opposed to save/restore code
+sequence pairs. This option only applies when using
+@option{-fgnu-tm}.
+
@item graphite-max-nb-scop-params
To avoid exponential effects in the Graphite loop transforms, the
number of parameters in a Static Control Part (SCoP) is bounded. The
default value is 10 parameters. A variable whose value is unknown at
-compile time and defined outside a SCoP is a parameter of the SCoP.
+compilation time and defined outside a SCoP is a parameter of the SCoP.
@item graphite-max-bbs-per-function
To avoid exponential effects in the detection of SCoPs, the size of
length can be changed using the @option{loop-block-tile-size}
parameter. The default value is 51 iterations.
-@item devirt-type-list-size
-IPA-CP attempts to track all possible types passed to a function's
-parameter in order to perform devirtualization.
-@option{devirt-type-list-size} is the maximum number of types it
-stores per a single formal parameter of a function.
+@item ipa-cp-value-list-size
+IPA-CP attempts to track all possible values and types passed to a function's
+parameter in order to propagate them and perform devirtualization.
+@option{ipa-cp-value-list-size} is the maximum number of values and types it
+stores per one formal parameter of a function.
@item lto-partitions
Specify desired number of partitions produced during WHOPR compilation.
The maximum number of namespaces to consult for suggestions when C++
name lookup fails for an identifier. The default is 1000.
+@item sink-frequency-threshold
+The maximum relative execution frequency (in percents) of the target block
+relative to a statement's original block to allow statement sinking of a
+statement. Larger numbers result in more aggressive statement sinking.
+The default value is 75. A small positive adjustment is applied for
+statements with memory operands as those are even more profitable so sink.
+
@item max-stores-to-sink
The maximum number of conditional stores paires that can be sunk. Set to 0
if either vectorization (@option{-ftree-vectorize}) or if-conversion
(@option{-ftree-loop-if-convert}) is disabled. The default is 2.
+@item allow-load-data-races
+Allow optimizers to introduce new data races on loads.
+Set to 1 to allow, otherwise to 0. This option is enabled by default
+unless implicitly set by the @option{-fmemory-model=} option.
+
+@item allow-store-data-races
+Allow optimizers to introduce new data races on stores.
+Set to 1 to allow, otherwise to 0. This option is enabled by default
+unless implicitly set by the @option{-fmemory-model=} option.
+
+@item allow-packed-load-data-races
+Allow optimizers to introduce new data races on packed data loads.
+Set to 1 to allow, otherwise to 0. This option is enabled by default
+unless implicitly set by the @option{-fmemory-model=} option.
+
+@item allow-packed-store-data-races
+Allow optimizers to introduce new data races on packed data stores.
+Set to 1 to allow, otherwise to 0. This option is enabled by default
+unless implicitly set by the @option{-fmemory-model=} option.
+
@item case-values-threshold
The smallest number of different values for which it is best to use a
jump-table instead of a tree of conditional branches. If the value is
0, use the default for the machine. The default is 0.
+@item tree-reassoc-width
+Set the maximum number of instructions executed in parallel in
+reassociated tree. This parameter overrides target dependent
+heuristics used by default if has non zero value.
+
@end table
@end table
@item -Xpreprocessor @var{option}
@opindex Xpreprocessor
Pass @var{option} as an option to the preprocessor. You can use this to
-supply system-specific preprocessor options which GCC does not know how to
+supply system-specific preprocessor options that GCC does not know how to
recognize.
If you want to pass an option that takes an argument, you must use
@item -Xassembler @var{option}
@opindex Xassembler
Pass @var{option} as an option to the assembler. You can use this to
-supply system-specific assembler options which GCC does not know how to
+supply system-specific assembler options that GCC does not know how to
recognize.
If you want to pass an option that takes an argument, you must use
@cindex unresolved references and @option{-nodefaultlibs}
One of the standard libraries bypassed by @option{-nostdlib} and
@option{-nodefaultlibs} is @file{libgcc.a}, a library of internal subroutines
-that GCC uses to overcome shortcomings of particular machines, or special
+which GCC uses to overcome shortcomings of particular machines, or special
needs for some languages.
(@xref{Interface,,Interfacing to GCC Output,gccint,GNU Compiler
Collection (GCC) Internals},
@item -pie
@opindex pie
-Produce a position independent executable on targets which support it.
+Produce a position independent executable on targets that support it.
For predictable results, you must also specify the same set of options
that were used to generate code (@option{-fpie}, @option{-fPIE},
or model suboptions) when you specify this option.
@item -Xlinker @var{option}
@opindex Xlinker
Pass @var{option} as an option to the linker. You can use this to
-supply system-specific linker options which GCC does not know how to
-recognize.
+supply system-specific linker options that GCC does not recognize.
If you want to pass an option that takes a separate argument, you must use
@option{-Xlinker} twice, once for the option and once for the argument.
use the @option{-nostdinc} and/or @option{-isystem} options.
@item -iplugindir=@var{dir}
-Set the directory to search for plugins which are passed
+Set the directory to search for plugins that are passed
by @option{-fplugin=@var{name}} instead of
@option{-fplugin=@var{path}/@var{name}.so}. This option is not meant
to be used by the user, but only passed by the driver.
For each subprogram to be run, the compiler driver first tries the
@option{-B} prefix, if any. If that name is not found, or if @option{-B}
-was not specified, the driver tries two standard prefixes, which are
+was not specified, the driver tries two standard prefixes,
@file{/usr/lib/gcc/} and @file{/usr/local/lib/gcc/}. If neither of
those results in a file name that is found, the unmodified program
name is searched for using the directories specified in your
options into @option{-isystem} options for the preprocessor. In this case,
the compiler appends @samp{include} to the prefix.
-The run-time support file @file{libgcc.a} can also be searched for using
+The runtime support file @file{libgcc.a} can also be searched for using
the @option{-B} prefix, if needed. If it is not found there, the two
standard prefixes above are tried, and that is all. The file is left
out of the link if it is not found by those means.
@item -specs=@var{file}
@opindex specs
Process @var{file} after the compiler reads in the standard @file{specs}
-file, in order to override the defaults that the @file{gcc} driver
+file, in order to override the defaults which the @file{gcc} driver
program uses when determining what switches to pass to @file{cc1},
@file{cc1plus}, @file{as}, @file{ld}, etc. More than one
@option{-specs=@var{file}} can be specified on the command line, and they
directory (where the current input file came from) as the first search
directory for @samp{#include "@var{file}"}. There is no way to
override this effect of @option{-I-}. With @option{-I.} you can specify
-searching the directory which was current when the compiler was
+searching the directory that was current when the compiler was
invoked. That is not exactly the same as what the preprocessor does
by default, but it is often satisfactory.
@dfn{Spec files} are plaintext files that are used to construct spec
strings. They consist of a sequence of directives separated by blank
lines. The type of directive is determined by the first non-whitespace
-character on the line and it can be one of the following:
+character on the line, which can be one of the following:
@table @code
@item %@var{command}
the leading dash is omitted when specifying this option, and it is
automatically inserted if the substitution is performed. Thus the spec
string @samp{%@{foo@}} would match the command-line option @option{-foo}
-and would output the command line option @option{-foo}.
+and would output the command-line option @option{-foo}.
@item %W@{@code{S}@}
Like %@{@code{S}@} but mark last argument supplied within as a file to be
@c in Machine Dependent Options
@menu
+* Adapteva Epiphany Options::
* ARM Options::
* AVR Options::
* Blackfin Options::
* C6X Options::
* CRIS Options::
+* CR16 Options::
* Darwin Options::
* DEC Alpha Options::
* DEC Alpha/VMS Options::
* PDP-11 Options::
* picoChip Options::
* PowerPC Options::
+* RL78 Options::
* RS/6000 and PowerPC Options::
* RX Options::
* S/390 and zSeries Options::
* SPARC Options::
* SPU Options::
* System V Options::
+* TILE-Gx Options::
+* TILEPro Options::
* V850 Options::
* VAX Options::
* VxWorks Options::
* zSeries Options::
@end menu
+@node Adapteva Epiphany Options
+@subsection Adapteva Epiphany Options
+
+These @samp{-m} options are defined for Adapteva Epiphany:
+
+@table @gcctabopt
+@item -mhalf-reg-file
+@opindex mhalf-reg-file
+Don't allocate any register in the range @code{r32}@dots{}@code{r63}.
+That allows code to run on hardware variants that lack these registers.
+
+@item -mprefer-short-insn-regs
+@opindex mprefer-short-insn-regs
+Preferrentially allocate registers that allow short instruction generation.
+This can result in increasesd instruction count, so if this reduces or
+increases code size might vary from case to case.
+
+@item -mbranch-cost=@var{num}
+@opindex mbranch-cost
+Set the cost of branches to roughly @var{num} ``simple'' instructions.
+This cost is only a heuristic and is not guaranteed to produce
+consistent results across releases.
+
+@item -mcmove
+@opindex mcmove
+Enable the generation of conditional moves.
+
+@item -mnops=@var{num}
+@opindex mnops
+Emit @var{num} nops before every other generated instruction.
+
+@item -mno-soft-cmpsf
+@opindex mno-soft-cmpsf
+For single-precision floating-point comparisons, emit an fsub instruction
+and test the flags. This is faster than a software comparison, but can
+get incorrect results in the presence of NaNs, or when two different small
+numbers are compared such that their difference is calculated as zero.
+The default is @option{-msoft-cmpsf}, which uses slower, but IEEE-compliant,
+software comparisons.
+
+@item -mstack-offset=@var{num}
+@opindex mstack-offset
+Set the offset between the top of the stack and the stack pointer.
+E.g., a value of 8 means that the eight bytes in the range sp+0@dots{}sp+7
+can be used by leaf functions without stack allocation.
+Values other than @samp{8} or @samp{16} are untested and unlikely to work.
+Note also that this option changes the ABI, compiling a program with a
+different stack offset than the libraries have been compiled with
+will generally not work.
+This option can be useful if you want to evaluate if a different stack
+offset would give you better code, but to actually use a different stack
+offset to build working programs, it is recommended to configure the
+toolchain with the appropriate @samp{--with-stack-offset=@var{num}} option.
+
+@item -mno-round-nearest
+@opindex mno-round-nearest
+Make the scheduler assume that the rounding mode has been set to
+truncating. The default is @option{-mround-nearest}.
+
+@item -mlong-calls
+@opindex mlong-calls
+If not otherwise specified by an attribute, assume all calls might be beyond
+the offset range of the b / bl instructions, and therefore load the
+function address into a register before performing a (otherwise direct) call.
+This is the default.
+
+@item -mshort-calls
+@opindex short-calls
+If not otherwise specified by an attribute, assume all direct calls are
+in the range of the b / bl instructions, so use these instructions
+for direct calls. The default is @option{-mlong-calls}.
+
+@item -msmall16
+@opindex msmall16
+Assume addresses can be loaded as 16-bit unsigned values. This does not
+apply to function addresses for which @option{-mlong-calls} semantics
+are in effect.
+
+@item -mfp-mode=@var{mode}
+@opindex mfp-mode
+Set the prevailing mode of the floating-point unit.
+This determines the floating-point mode that is provided and expected
+at function call and return time. Making this mode match the mode you
+predominantly need at function start can make your programs smaller and
+faster by avoiding unnecessary mode switches.
+
+@var{mode} can be set to one the following values:
+
+@table @samp
+@item caller
+Any mode at function entry is valid, and retained or restored when
+the function returns, and when it calls other functions.
+This mode is useful for compiling libraries or other compilation units
+you might want to incorporate into different programs with different
+prevailing FPU modes, and the convenience of being able to use a single
+object file outweighs the size and speed overhead for any extra
+mode switching that might be needed, compared with what would be needed
+with a more specific choice of prevailing FPU mode.
+
+@item truncate
+This is the mode used for floating-point calculations with
+truncating (i.e.@: round towards zero) rounding mode. That includes
+conversion from floating point to integer.
+
+@item round-nearest
+This is the mode used for floating-point calculations with
+round-to-nearest-or-even rounding mode.
+
+@item int
+This is the mode used to perform integer calculations in the FPU, e.g.@:
+integer multiply, or integer multiply-and-accumulate.
+@end table
+
+The default is @option{-mfp-mode=caller}
+
+@item -mnosplit-lohi
+@opindex mnosplit-lohi
+@item -mno-postinc
+@opindex mno-postinc
+@item -mno-postmodify
+@opindex mno-postmodify
+Code generation tweaks that disable, respectively, splitting of 32-bit
+loads, generation of post-increment addresses, and generation of
+post-modify addresses. The defaults are @option{msplit-lohi},
+@option{-mpost-inc}, and @option{-mpost-modify}.
+
+@item -mnovect-double
+@opindex mno-vect-double
+Change the preferred SIMD mode to SImode. The default is
+@option{-mvect-double}, which uses DImode as preferred SIMD mode.
+
+@item -max-vect-align=@var{num}
+@opindex max-vect-align
+The maximum alignment for SIMD vector mode types.
+@var{num} may be 4 or 8. The default is 8.
+Note that this is an ABI change, even though many library function
+interfaces will be unaffected, if they don't use SIMD vector modes
+in places where they affect size and/or alignment of relevant types.
+
+@item -msplit-vecmove-early
+@opindex msplit-vecmove-early
+Split vector moves into single word moves before reload. In theory this
+could give better register allocation, but so far the reverse seems to be
+generally the case.
+
+@item -m1reg-@var{reg}
+@opindex m1reg-
+Specify a register to hold the constant @minus{}1, which makes loading small negative
+constants and certain bitmasks faster.
+Allowable values for reg are r43 and r63, which specify to use that register
+as a fixed register, and none, which means that no register is used for this
+purpose. The default is @option{-m1reg-none}.
+
+@end table
+
@node ARM Options
@subsection ARM Options
@cindex ARM options
every function (that actually uses some stack space). If there is
insufficient space available then either the function
@samp{__rt_stkovf_split_small} or @samp{__rt_stkovf_split_big} will be
-called, depending upon the amount of stack space required. The run time
+called, depending upon the amount of stack space required. The runtime
system is required to provide these functions. The default is
@option{-mno-apcs-stack-check}, since this produces smaller code.
@c not currently implemented
@item -mapcs-float
@opindex mapcs-float
-Pass floating point arguments using the float point registers. This is
+Pass floating-point arguments using the floating-point registers. This is
one of the variants of the APCS@. This option is recommended if the
-target hardware has a floating point unit or if a lot of floating point
+target hardware has a floating-point unit or if a lot of floating-point
arithmetic is going to be performed by the code. The default is
@option{-mno-apcs-float}, since integer only code is slightly increased in
size if @option{-mapcs-float} is used.
@item -mthumb-interwork
@opindex mthumb-interwork
-Generate code which supports calling between the ARM and Thumb
+Generate code that supports calling between the ARM and Thumb
instruction sets. Without this option, on pre-v5 architectures, the
two instruction sets cannot be reliably used inside one program. The
default is @option{-mno-thumb-interwork}, since slightly larger code
@item -mno-sched-prolog
@opindex mno-sched-prolog
-Prevent the reordering of instructions in the function prolog, or the
+Prevent the reordering of instructions in the function prologue, or the
merging of those instruction with the instructions in the function's
body. This means that all functions will start with a recognizable set
of instructions (or in fact one of a choice from a small set of
@samp{arm10e}, @samp{arm1020e}, @samp{arm1022e},
@samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
@samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s},
-@samp{cortex-a5}, @samp{cortex-a8}, @samp{cortex-a9}, @samp{cortex-a15},
-@samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5},
+@samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9},
+@samp{cortex-a15}, @samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5},
@samp{cortex-m4}, @samp{cortex-m3},
@samp{cortex-m1},
@samp{cortex-m0},
@samp{fa526}, @samp{fa626},
@samp{fa606te}, @samp{fa626te}, @samp{fmp626}, @samp{fa726te}.
+
+@option{-mcpu=generic-@var{arch}} is also permissible, and is
+equivalent to @option{-march=@var{arch} -mtune=generic-@var{arch}}.
+See @option{-mtune} for more information.
+
+@option{-mcpu=native} causes the compiler to auto-detect the CPU
+of the build computer. At present, this feature is only supported on
+Linux, and not all architectures are recognized. If the auto-detect is
+unsuccessful the option has no effect.
+
@item -mtune=@var{name}
@opindex mtune
This option is very similar to the @option{-mcpu=} option, except that
For some ARM implementations better performance can be obtained by using
this option.
+@option{-mtune=generic-@var{arch}} specifies that GCC should tune the
+performance for a blend of processors within architecture @var{arch}.
+The aim is to generate code that run well on the current most popular
+processors, balancing between optimizations that benefit some CPUs in the
+range, and avoiding performance pitfalls of other CPUs. The effects of
+this option may change in future GCC versions as CPU models come and go.
+
+@option{-mtune=native} causes the compiler to auto-detect the CPU
+of the build computer. At present, this feature is only supported on
+Linux, and not all architectures are recognized. If the auto-detect is
+unsuccessful the option has no effect.
+
@item -march=@var{name}
@opindex march
This specifies the name of the target ARM architecture. GCC uses this
@samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m},
@samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
+@option{-march=native} causes the compiler to auto-detect the architecture
+of the build computer. At present, this feature is only supported on
+Linux, and not all architectures are recognized. If the auto-detect is
+unsuccessful the option has no effect.
+
@item -mfpu=@var{name}
@itemx -mfpe=@var{number}
@itemx -mfp=@var{number}
@opindex mfpu
@opindex mfpe
@opindex mfp
-This specifies what floating point hardware (or hardware emulation) is
+This specifies what floating-point hardware (or hardware emulation) is
available on the target. Permissible names are: @samp{fpa}, @samp{fpe2},
@samp{fpe3}, @samp{maverick}, @samp{vfp}, @samp{vfpv3}, @samp{vfpv3-fp16},
@samp{vfpv3-d16}, @samp{vfpv3-d16-fp16}, @samp{vfpv3xd}, @samp{vfpv3xd-fp16},
of GCC@.
If @option{-msoft-float} is specified this specifies the format of
-floating point values.
+floating-point values.
If the selected floating-point hardware includes the NEON extension
(e.g. @option{-mfpu}=@samp{neon}), note that floating-point
Even if this switch is enabled, not all function calls will be turned
into long calls. The heuristic is that static functions, functions
-which have the @samp{short-call} attribute, functions that are inside
+that have the @samp{short-call} attribute, functions that are inside
the scope of a @samp{#pragma no_long_calls} directive and functions whose
definitions have already been compiled within the current compilation
unit, will not be turned into long calls. The exception to this rule is
@item -msingle-pic-base
@opindex msingle-pic-base
Treat the register used for PIC addressing as read-only, rather than
-loading it in the prologue for each function. The run-time system is
+loading it in the prologue for each function. The runtime system is
responsible for initializing this register with an appropriate value
before execution begins.
Insert NOPs into the instruction stream to in order to work around
problems with invalid Maverick instruction combinations. This option
is only valid if the @option{-mcpu=ep9312} option has been used to
-enable generation of instructions for the Cirrus Maverick floating
-point co-processor. This option is not enabled by default, since the
+enable generation of instructions for the Cirrus Maverick floating-point
+co-processor. This option is not enabled by default, since the
problem is only present in older Maverick implementations. The default
can be re-enabled by use of the @option{-mno-cirrus-fix-invalid-insns}
switch.
@item -mword-relocations
@opindex mword-relocations
-Only generate absolute relocations on word sized values (i.e. R_ARM_ABS32).
+Only generate absolute relocations on word-sized values (i.e. R_ARM_ABS32).
This is enabled by default on targets (uClinux, SymbianOS) where the runtime
loader imposes this restriction, and when @option{-fpic} or @option{-fPIC}
is specified.
@subsection AVR Options
@cindex AVR Options
-These options are defined for AVR implementations:
-
@table @gcctabopt
@item -mmcu=@var{mcu}
@opindex mmcu
-Specify ATMEL AVR instruction set or MCU type.
+Specify Atmel AVR instruction set architectures (ISA) or MCU type.
+
+For a complete list of @var{mcu} values that are supported by @command{avr-gcc},
+see the compiler output when called with the @option{--help=target}
+command line option.
+The default for this option is@tie{}@code{avr2}.
+
+GCC supports the following AVR devices and ISAs:
-Instruction set avr1 is for the minimal AVR core, not supported by the C
-compiler, only for assembler programs (MCU types: at90s1200, attiny10,
-attiny11, attiny12, attiny15, attiny28).
+@table @code
+
+@item avr2
+``Classic'' devices with up to 8@tie{}KiB of program memory.
+@*@var{mcu}@tie{}= @code{at90c8534}, @code{at90s2313},
+@code{at90s2323}, @code{at90s2333}, @code{at90s2343},
+@code{at90s4414}, @code{at90s4433}, @code{at90s4434},
+@code{at90s8515}, @code{at90s8535}, @code{attiny22}, @code{attiny26}.
+
+@item avr25
+``Classic'' devices with up to 8@tie{}KiB of program memory and with
+the @code{MOVW} instruction.
+@*@var{mcu}@tie{}= @code{at86rf401}, @code{ata6289}, @code{attiny13},
+@code{attiny13a}, @code{attiny2313}, @code{attiny2313a},
+@code{attiny24}, @code{attiny24a}, @code{attiny25}, @code{attiny261},
+@code{attiny261a}, @code{attiny4313}, @code{attiny43u},
+@code{attiny44}, @code{attiny44a}, @code{attiny45}, @code{attiny461},
+@code{attiny461a}, @code{attiny48}, @code{attiny84}, @code{attiny84a},
+@code{attiny85}, @code{attiny861}, @code{attiny861a}, @code{attiny87},
+@code{attiny88}.
+
+@item avr3
+``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
+@*@var{mcu}@tie{}= @code{at43usb355}, @code{at76c711}.
+
+@item avr31
+``Classic'' devices with 128@tie{}KiB of program memory.
+@*@var{mcu}@tie{}= @code{at43usb320}, @code{atmega103}.
+
+@item avr35
+``Classic'' devices with 16@tie{}KiB up to 64@tie{}KiB of program
+memory and with the @code{MOVW} instruction.
+@*@var{mcu}@tie{}= @code{at90usb162}, @code{at90usb82},
+@code{atmega16u2}, @code{atmega32u2}, @code{atmega8u2},
+@code{attiny167}.
+
+@item avr4
+``Enhanced'' devices with up to 8@tie{}KiB of program memory.
+@*@var{mcu}@tie{}= @code{at90pwm1}, @code{at90pwm2}, @code{at90pwm2b},
+@code{at90pwm3}, @code{at90pwm3b}, @code{at90pwm81}, @code{atmega48},
+@code{atmega48a}, @code{atmega48p}, @code{atmega8}, @code{atmega8515},
+@code{atmega8535}, @code{atmega88}, @code{atmega88a},
+@code{atmega88p}, @code{atmega88pa}, @code{atmega8hva}.
+
+@item avr5
+``Enhanced'' devices with 16@tie{}KiB up to 64@tie{}KiB of program memory.
+@*@var{mcu}@tie{}= @code{at90can32}, @code{at90can64},
+@code{at90pwm216}, @code{at90pwm316}, @code{at90scr100},
+@code{at90usb646}, @code{at90usb647}, @code{at94k}, @code{atmega16},
+@code{atmega161}, @code{atmega162}, @code{atmega163},
+@code{atmega164a}, @code{atmega164p}, @code{atmega165},
+@code{atmega165a}, @code{atmega165p}, @code{atmega168},
+@code{atmega168a}, @code{atmega168p}, @code{atmega169},
+@code{atmega169a}, @code{atmega169p}, @code{atmega169pa},
+@code{atmega16a}, @code{atmega16hva}, @code{atmega16hva2},
+@code{atmega16hvb}, @code{atmega16m1}, @code{atmega16u4},
+@code{atmega32}, @code{atmega323}, @code{atmega324a},
+@code{atmega324p}, @code{atmega324pa}, @code{atmega325},
+@code{atmega3250}, @code{atmega3250a}, @code{atmega3250p},
+@code{atmega325a}, @code{atmega325p}, @code{atmega328},
+@code{atmega328p}, @code{atmega329}, @code{atmega3290},
+@code{atmega3290a}, @code{atmega3290p}, @code{atmega329a},
+@code{atmega329p}, @code{atmega329pa}, @code{atmega32c1},
+@code{atmega32hvb}, @code{atmega32m1}, @code{atmega32u4},
+@code{atmega32u6}, @code{atmega406}, @code{atmega64},
+@code{atmega640}, @code{atmega644}, @code{atmega644a},
+@code{atmega644p}, @code{atmega644pa}, @code{atmega645},
+@code{atmega6450}, @code{atmega6450a}, @code{atmega6450p},
+@code{atmega645a}, @code{atmega645p}, @code{atmega649},
+@code{atmega6490}, @code{atmega649a}, @code{atmega649p},
+@code{atmega64c1}, @code{atmega64hve}, @code{atmega64m1},
+@code{m3000}.
+
+@item avr51
+``Enhanced'' devices with 128@tie{}KiB of program memory.
+@*@var{mcu}@tie{}= @code{at90can128}, @code{at90usb1286},
+@code{at90usb1287}, @code{atmega128}, @code{atmega1280},
+@code{atmega1281}, @code{atmega1284p}, @code{atmega128rfa1}.
+
+@item avr6
+``Enhanced'' devices with 3-byte PC, i.e.@: with more than
+128@tie{}KiB of program memory.
+@*@var{mcu}@tie{}= @code{atmega2560}, @code{atmega2561}.
+
+@item avrxmega2
+``XMEGA'' devices with more than 8@tie{}KiB and up to 64@tie{}KiB of
+program memory.
+@*@var{mcu}@tie{}= @code{atxmega16a4}, @code{atxmega16d4},
+@code{atxmega16x1}, @code{atxmega32a4}, @code{atxmega32d4},
+@code{atxmega32x1}.
+
+@item avrxmega4
+``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of
+program memory.
+@*@var{mcu}@tie{}= @code{atxmega64a3}, @code{atxmega64d3}.
+
+@item avrxmega5
+``XMEGA'' devices with more than 64@tie{}KiB and up to 128@tie{}KiB of
+program memory and more than 64@tie{}KiB of RAM.
+@*@var{mcu}@tie{}= @code{atxmega64a1}, @code{atxmega64a1u}.
+
+@item avrxmega6
+``XMEGA'' devices with more than 128@tie{}KiB of program memory.
+@*@var{mcu}@tie{}= @code{atxmega128a3}, @code{atxmega128d3},
+@code{atxmega192a3}, @code{atxmega192d3}, @code{atxmega256a3},
+@code{atxmega256a3b}, @code{atxmega256a3bu}, @code{atxmega256d3}.
+
+@item avrxmega7
+``XMEGA'' devices with more than 128@tie{}KiB of program memory and
+more than 64@tie{}KiB of RAM.
+@*@var{mcu}@tie{}= @code{atxmega128a1}, @code{atxmega128a1u}.
+
+@item avr1
+This ISA is implemented by the minimal AVR core and supported for
+assembler only.
+@*@var{mcu}@tie{}= @code{at90s1200}, @code{attiny11}, @code{attiny12},
+@code{attiny15}, @code{attiny28}.
-Instruction set avr2 (default) is for the classic AVR core with up to
-8K program memory space (MCU types: at90s2313, at90s2323, attiny22,
-at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515,
-at90c8534, at90s8535).
+@end table
-Instruction set avr3 is for the classic AVR core with up to 128K program
-memory space (MCU types: atmega103, atmega603, at43usb320, at76c711).
+@item -maccumulate-args
+@opindex maccumulate-args
+Accumulate outgoing function arguments and acquire/release the needed
+stack space for outgoing function arguments once in function
+prologue/epilogue. Without this option, outgoing arguments are pushed
+before calling a function and popped afterwards.
-Instruction set avr4 is for the enhanced AVR core with up to 8K program
-memory space (MCU types: atmega8, atmega83, atmega85).
+Popping the arguments after the function call can be expensive on
+AVR so that accumulating the stack space might lead to smaller
+executables because arguments need not to be removed from the
+stack after such a function call.
-Instruction set avr5 is for the enhanced AVR core with up to 128K program
-memory space (MCU types: atmega16, atmega161, atmega163, atmega32, atmega323,
-atmega64, atmega128, at43usb355, at94k).
+This option can lead to reduced code size for functions that perform
+several calls to functions that get their arguments on the stack like
+calls to printf-like functions.
+
+@item -mbranch-cost=@var{cost}
+@opindex mbranch-cost
+Set the branch costs for conditional branch instructions to
+@var{cost}. Reasonable values for @var{cost} are small, non-negative
+integers. The default branch cost is 0.
+
+@item -mcall-prologues
+@opindex mcall-prologues
+Functions prologues/epilogues are expanded as calls to appropriate
+subroutines. Code size is smaller.
+
+@item -mint8
+@opindex mint8
+Assume @code{int} to be 8-bit integer. This affects the sizes of all types: a
+@code{char} is 1 byte, an @code{int} is 1 byte, a @code{long} is 2 bytes,
+and @code{long long} is 4 bytes. Please note that this option does not
+conform to the C standards, but it results in smaller code
+size.
@item -mno-interrupts
@opindex mno-interrupts
Generated code is not compatible with hardware interrupts.
-Code size will be smaller.
+Code size is smaller.
-@item -mcall-prologues
-@opindex mcall-prologues
-Functions prologues/epilogues expanded as call to appropriate
-subroutines. Code size will be smaller.
+@item -mrelax
+@opindex mrelax
+Try to replace @code{CALL} resp.@: @code{JMP} instruction by the shorter
+@code{RCALL} resp.@: @code{RJMP} instruction if applicable.
+Setting @code{-mrelax} just adds the @code{--relax} option to the
+linker command line when the linker is called.
+
+Jump relaxing is performed by the linker because jump offsets are not
+known before code is located. Therefore, the assembler code generated by the
+compiler is the same, but the instructions in the executable may
+differ from instructions in the assembler code.
+
+Relaxing must be turned on if linker stubs are needed, see the
+section on @code{EIND} and linker stubs below.
+
+@item -mshort-calls
+@opindex mshort-calls
+Use @code{RCALL}/@code{RJMP} instructions even on devices with
+16@tie{}KiB or more of program memory, i.e.@: on devices that
+have the @code{CALL} and @code{JMP} instructions.
+See also the @code{-mrelax} command line option.
+
+@item -msp8
+@opindex msp8
+Treat the stack pointer register as an 8-bit register,
+i.e.@: assume the high byte of the stack pointer is zero.
+In general, you don't need to set this option by hand.
+
+This option is used internally by the compiler to select and
+build multilibs for architectures @code{avr2} and @code{avr25}.
+These architectures mix devices with and without @code{SPH}.
+For any setting other than @code{-mmcu=avr2} or @code{-mmcu=avr25}
+the compiler driver will add or remove this option from the compiler
+proper's command line, because the compiler then knows if the device
+or architecture has an 8-bit stack pointer and thus no @code{SPH}
+register or not.
+
+@item -mstrict-X
+@opindex mstrict-X
+Use address register @code{X} in a way proposed by the hardware. This means
+that @code{X} is only used in indirect, post-increment or
+pre-decrement addressing.
+
+Without this option, the @code{X} register may be used in the same way
+as @code{Y} or @code{Z} which then is emulated by additional
+instructions.
+For example, loading a value with @code{X+const} addressing with a
+small non-negative @code{const < 64} to a register @var{Rn} is
+performed as
+
+@example
+adiw r26, const ; X += const
+ld @var{Rn}, X ; @var{Rn} = *X
+sbiw r26, const ; X -= const
+@end example
@item -mtiny-stack
@opindex mtiny-stack
-Change only the low 8 bits of the stack pointer.
+Only change the lower 8@tie{}bits of the stack pointer.
+@end table
+
+@subsubsection @code{EIND} and Devices with more than 128 Ki Bytes of Flash
+@cindex @code{EIND}
+Pointers in the implementation are 16@tie{}bits wide.
+The address of a function or label is represented as word address so
+that indirect jumps and calls can target any code address in the
+range of 64@tie{}Ki words.
+
+In order to facilitate indirect jump on devices with more than 128@tie{}Ki
+bytes of program memory space, there is a special function register called
+@code{EIND} that serves as most significant part of the target address
+when @code{EICALL} or @code{EIJMP} instructions are used.
+
+Indirect jumps and calls on these devices are handled as follows by
+the compiler and are subject to some limitations:
+
+@itemize @bullet
+
+@item
+The compiler never sets @code{EIND}.
+
+@item
+The compiler uses @code{EIND} implicitely in @code{EICALL}/@code{EIJMP}
+instructions or might read @code{EIND} directly in order to emulate an
+indirect call/jump by means of a @code{RET} instruction.
+
+@item
+The compiler assumes that @code{EIND} never changes during the startup
+code or during the application. In particular, @code{EIND} is not
+saved/restored in function or interrupt service routine
+prologue/epilogue.
+
+@item
+For indirect calls to functions and computed goto, the linker
+generates @emph{stubs}. Stubs are jump pads sometimes also called
+@emph{trampolines}. Thus, the indirect call/jump jumps to such a stub.
+The stub contains a direct jump to the desired address.
+
+@item
+Linker relaxation must be turned on so that the linker will generate
+the stubs correctly an all situaltion. See the compiler option
+@code{-mrelax} and the linler option @code{--relax}.
+There are corner cases where the linker is supposed to generate stubs
+but aborts without relaxation and without a helpful error message.
+
+@item
+The default linker script is arranged for code with @code{EIND = 0}.
+If code is supposed to work for a setup with @code{EIND != 0}, a custom
+linker script has to be used in order to place the sections whose
+name start with @code{.trampolines} into the segment where @code{EIND}
+points to.
+
+@item
+The startup code from libgcc never sets @code{EIND}.
+Notice that startup code is a blend of code from libgcc and AVR-LibC.
+For the impact of AVR-LibC on @code{EIND}, see the
+@w{@uref{http://nongnu.org/avr-libc/user-manual,AVR-LibC user manual}}.
+
+@item
+It is legitimate for user-specific startup code to set up @code{EIND}
+early, for example by means of initialization code located in
+section @code{.init3}. Such code runs prior to general startup code
+that initializes RAM and calls constructors, but after the bit
+of startup code from AVR-LibC that sets @code{EIND} to the segment
+where the vector table is located.
+@example
+#include <avr/io.h>
+
+static void
+__attribute__((section(".init3"),naked,used,no_instrument_function))
+init3_set_eind (void)
+@{
+ __asm volatile ("ldi r24,pm_hh8(__trampolines_start)\n\t"
+ "out %i0,r24" :: "n" (&EIND) : "r24","memory");
+@}
+@end example
+
+@noindent
+The @code{__trampolines_start} symbol is defined in the linker script.
+
+@item
+Stubs are generated automatically by the linker if
+the following two conditions are met:
+@itemize @minus
+
+@item The address of a label is taken by means of the @code{gs} modifier
+(short for @emph{generate stubs}) like so:
+@example
+LDI r24, lo8(gs(@var{func}))
+LDI r25, hi8(gs(@var{func}))
+@end example
+@item The final location of that label is in a code segment
+@emph{outside} the segment where the stubs are located.
+@end itemize
+
+@item
+The compiler emits such @code{gs} modifiers for code labels in the
+following situations:
+@itemize @minus
+@item Taking address of a function or code label.
+@item Computed goto.
+@item If prologue-save function is used, see @option{-mcall-prologues}
+command-line option.
+@item Switch/case dispatch tables. If you do not want such dispatch
+tables you can specify the @option{-fno-jump-tables} command-line option.
+@item C and C++ constructors/destructors called during startup/shutdown.
+@item If the tools hit a @code{gs()} modifier explained above.
+@end itemize
+
+@item
+Jumping to non-symbolic addresses like so is @emph{not} supported:
+
+@example
+int main (void)
+@{
+ /* Call function at word address 0x2 */
+ return ((int(*)(void)) 0x2)();
+@}
+@end example
+
+Instead, a stub has to be set up, i.e.@: the function has to be called
+through a symbol (@code{func_4} in the example):
+
+@example
+int main (void)
+@{
+ extern int func_4 (void);
+
+ /* Call function at byte address 0x4 */
+ return func_4();
+@}
+@end example
+
+and the application be linked with @code{-Wl,--defsym,func_4=0x4}.
+Alternatively, @code{func_4} can be defined in the linker script.
+@end itemize
+
+@subsubsection Handling of the @code{RAMPD}, @code{RAMPX}, @code{RAMPY} and @code{RAMPZ} Special Function Registers
+@cindex @code{RAMPD}
+@cindex @code{RAMPX}
+@cindex @code{RAMPY}
+@cindex @code{RAMPZ}
+Some AVR devices support memories larger than the 64@tie{}KiB range
+that can be accessed with 16-bit pointers. To access memory locations
+outside this 64@tie{}KiB range, the contentent of a @code{RAMP}
+register is used as high part of the address:
+The @code{X}, @code{Y}, @code{Z} address register is concatenated
+with the @code{RAMPX}, @code{RAMPY}, @code{RAMPZ} special function
+register, respectively, to get a wide address. Similarly,
+@code{RAMPD} is used together with direct addressing.
+
+@itemize
+@item
+The startup code initializes the @code{RAMP} special function
+registers with zero.
+
+@item
+If a @ref{AVR Named Address Spaces,named address space} other than
+generic or @code{__flash} is used, then @code{RAMPZ} is set
+as needed before the operation.
+
+@item
+If the device supports RAM larger than 64@tie{KiB} and the compiler
+needs to change @code{RAMPZ} to accomplish an operation, @code{RAMPZ}
+is reset to zero after the operation.
+
+@item
+If the device comes with a specific @code{RAMP} register, the ISR
+prologue/epilogue saves/restores that SFR and initializes it with
+zero in case the ISR code might (implicitly) use it.
+
+@item
+RAM larger than 64@tie{KiB} is not supported by GCC for AVR targets.
+If you use inline assembler to read from locations outside the
+16-bit address range and change one of the @code{RAMP} registers,
+you must reset it to zero after the access.
+
+@end itemize
+
+@subsubsection AVR Built-in Macros
+
+GCC defines several built-in macros so that the user code can test
+for the presence or absence of features. Almost any of the following
+built-in macros are deduced from device capabilities and thus
+triggered by the @code{-mmcu=} command-line option.
+
+For even more AVR-specific built-in macros see
+@ref{AVR Named Address Spaces} and @ref{AVR Built-in Functions}.
+
+@table @code
+
+@item __AVR_@var{Device}__
+Setting @code{-mmcu=@var{device}} defines this built-in macro which reflects
+the device's name. For example, @code{-mmcu=atmega8} defines the
+built-in macro @code{__AVR_ATmega8__}, @code{-mmcu=attiny261a} defines
+@code{__AVR_ATtiny261A__}, etc.
+
+The built-in macros' names follow
+the scheme @code{__AVR_@var{Device}__} where @var{Device} is
+the device name as from the AVR user manual. The difference between
+@var{Device} in the built-in macro and @var{device} in
+@code{-mmcu=@var{device}} is that the latter is always lowercase.
+
+@item __AVR_HAVE_ELPM__
+The device has the the @code{ELPM} instruction.
+
+@item __AVR_HAVE_ELPMX__
+The device has the @code{ELPM R@var{n},Z} and @code{ELPM
+R@var{n},Z+} instructions.
+
+@item __AVR_HAVE_MOVW__
+The device has the @code{MOVW} instruction to perform 16-bit
+register-register moves.
+
+@item __AVR_HAVE_LPMX__
+The device has the @code{LPM R@var{n},Z} and
+@code{LPM R@var{n},Z+} instructions.
+
+@item __AVR_HAVE_MUL__
+The device has a hardware multiplier.
+
+@item __AVR_HAVE_JMP_CALL__
+The device has the @code{JMP} and @code{CALL} instructions.
+This is the case for devices with at least 16@tie{}KiB of program
+memory and if @code{-mshort-calls} is not set.
+
+@item __AVR_HAVE_EIJMP_EICALL__
+@item __AVR_3_BYTE_PC__
+The device has the @code{EIJMP} and @code{EICALL} instructions.
+This is the case for devices with more than 128@tie{}KiB of program memory.
+This also means that the program counter
+(PC) is 3@tie{}bytes wide.
+
+@item __AVR_2_BYTE_PC__
+The program counter (PC) is 2@tie{}bytes wide. This is the case for devices
+with up to 128@tie{}KiB of program memory.
+
+@item __AVR_HAVE_8BIT_SP__
+@item __AVR_HAVE_16BIT_SP__
+The stack pointer (SP) register is treated as 8-bit respectively
+16-bit register by the compiler.
+The definition of these macros is affected by @code{-mtiny-stack}.
+
+@item __AVR_HAVE_SPH__
+@item __AVR_SP8__
+The device has the SPH (high part of stack pointer) special function
+register or has an 8-bit stack pointer, respectively.
+The definition of these macros is affected by @code{-mmcu=} and
+in the cases of @code{-mmcu=avr2} and @code{-mmcu=avr25} also
+by @code{-msp8}.
+
+@item __AVR_HAVE_RAMPD__
+@item __AVR_HAVE_RAMPX__
+@item __AVR_HAVE_RAMPY__
+@item __AVR_HAVE_RAMPZ__
+The device has the @code{RAMPD}, @code{RAMPX}, @code{RAMPY},
+@code{RAMPZ} special function register, respectively.
+
+@item __NO_INTERRUPTS__
+This macro reflects the @code{-mno-interrupts} command line option.
+
+@item __AVR_ERRATA_SKIP__
+@item __AVR_ERRATA_SKIP_JMP_CALL__
+Some AVR devices (AT90S8515, ATmega103) must not skip 32-bit
+instructions because of a hardware erratum. Skip instructions are
+@code{SBRS}, @code{SBRC}, @code{SBIS}, @code{SBIC} and @code{CPSE}.
+The second macro is only defined if @code{__AVR_HAVE_JMP_CALL__} is also
+set.
+
+@item __AVR_SFR_OFFSET__=@var{offset}
+Instructions that can address I/O special function registers directly
+like @code{IN}, @code{OUT}, @code{SBI}, etc.@: may use a different
+address as if addressed by an instruction to access RAM like @code{LD}
+or @code{STS}. This offset depends on the device architecture and has
+to be subtracted from the RAM address in order to get the
+respective I/O@tie{}address.
-@item -mint8
-@opindex mint8
-Assume int to be 8 bit integer. This affects the sizes of all types: A
-char will be 1 byte, an int will be 1 byte, a long will be 2 bytes
-and long long will be 4 bytes. Please note that this option does not
-comply to the C standards, but it will provide you with smaller code
-size.
@end table
@node Blackfin Options
Don't keep the frame pointer in a register for leaf functions. This
avoids the instructions to save, set up and restore frame pointers and
makes an extra register available in leaf functions. The option
-@option{-fomit-frame-pointer} removes the frame pointer for all functions
+@option{-fomit-frame-pointer} removes the frame pointer for all functions,
which might make debugging harder.
@item -mspecld-anomaly
Tells the compiler to perform function calls by first loading the
address of the function into a register and then performing a subroutine
call on this register. This switch is needed if the target function
-will lie outside of the 24 bit addressing range of the offset based
+lies outside of the 24-bit addressing range of the offset-based
version of subroutine call instruction.
This feature is not enabled by default. Specifying
@item -micplb
@opindex micplb
-Assume that ICPLBs are enabled at runtime. This has an effect on certain
+Assume that ICPLBs are enabled at run time. This has an effect on certain
anomaly workarounds. For Linux targets, the default is to assume ICPLBs
are enabled; for standalone applications the default is off.
@end table
@item -mbig-endian
@opindex mbig-endian
-Generate code for a big endian target.
+Generate code for a big-endian target.
@item -mlittle-endian
@opindex mlittle-endian
-Generate code for a little endian target. This is the default.
+Generate code for a little-endian target. This is the default.
@item -msim
@opindex msim
@opindex mno-prologue-epilogue
@opindex mprologue-epilogue
With @option{-mno-prologue-epilogue}, the normal function prologue and
-epilogue that sets up the stack-frame are omitted and no return
+epilogue which set up the stack frame are omitted and no return
instructions or return sequences are generated in the code. Use this
option only together with visual inspection of the compiled code: no
warnings or errors are generated when call-saved registers must be saved,
0x40000000 and zero-initialized data at 0x80000000.
@end table
+@node CR16 Options
+@subsection CR16 Options
+@cindex CR16 Options
+
+These options are defined specifically for the CR16 ports.
+
+@table @gcctabopt
+
+@item -mmac
+@opindex mmac
+Enable the use of multiply-accumulate instructions. Disabled by default.
+
+@item -mcr16cplus
+@itemx -mcr16c
+@opindex mcr16cplus
+@opindex mcr16c
+Generate code for CR16C or CR16C+ architecture. CR16C+ architecture
+is default.
+
+@item -msim
+@opindex msim
+Links the library libsim.a which is in compatible with simulator. Applicable
+to elf compiler only.
+
+@item -mint32
+@opindex mint32
+Choose integer type as 32-bit wide.
+
+@item -mbit-ops
+@opindex mbit-ops
+Generates sbit/cbit instructions for bit manipulations.
+
+@item -mdata-model=@var{model}
+@opindex mdata-model
+Choose a data model. The choices for @var{model} are @samp{near},
+@samp{far} or @samp{medium}. @samp{medium} is default.
+However, @samp{far} is not valid when -mcr16c option is chosen as
+CR16C architecture does not support far data model.
+@end table
+
@node Darwin Options
@subsection Darwin Options
@cindex Darwin options
If the compiler was built to use the system's headers by default,
then the default for this option is the system version on which the
-compiler is running, otherwise the default is to make choices which
+compiler is running, otherwise the default is to make choices that
are compatible with as many systems and code bases as possible.
@item -mkernel
@opindex mno-fp-regs
Generate code that uses (does not use) the floating-point register set.
@option{-mno-fp-regs} implies @option{-msoft-float}. If the floating-point
-register set is not used, floating point operands are passed in integer
+register set is not used, floating-point operands are passed in integer
registers as if they were integers and floating-point results are passed
in @code{$0} instead of @code{$f0}. This is a non-standard calling sequence,
so any function with a floating-point argument or return value called by code
@item -mieee
@opindex mieee
The Alpha architecture implements floating-point hardware optimized for
-maximum performance. It is mostly compliant with the IEEE floating
-point standard. However, for full compliance, software assistance is
-required. This option generates code fully IEEE compliant code
+maximum performance. It is mostly compliant with the IEEE floating-point
+standard. However, for full compliance, software assistance is
+required. This option generates code fully IEEE-compliant code
@emph{except} that the @var{inexact-flag} is not maintained (see below).
If this option is turned on, the preprocessor macro @code{_IEEE_FP} is
defined during compilation. The resulting code is less efficient but is
@table @samp
@item n
-Normal IEEE rounding mode. Floating point numbers are rounded towards
+Normal IEEE rounding mode. Floating-point numbers are rounded towards
the nearest machine number or towards the even machine number in case
of a tie.
Round towards minus infinity.
@item c
-Chopped rounding mode. Floating point numbers are rounded towards zero.
+Chopped rounding mode. Floating-point numbers are rounded towards zero.
@item d
-Dynamic rounding mode. A field in the floating point control register
+Dynamic rounding mode. A field in the floating-point control register
(@var{fpcr}, see Alpha architecture reference manual) controls the
rounding mode in effect. The C library initializes this register for
rounding towards plus infinity. Thus, unless your program modifies the
@item -mtrap-precision=@var{trap-precision}
@opindex mtrap-precision
-In the Alpha architecture, floating point traps are imprecise. This
+In the Alpha architecture, floating-point traps are imprecise. This
means without software assistance it is impossible to recover from a
floating trap and program execution normally needs to be terminated.
GCC can generate code that can assist operating system trap handlers
-in determining the exact location that caused a floating point trap.
+in determining the exact location that caused a floating-point trap.
Depending on the requirements of an application, different levels of
precisions can be selected:
@table @samp
@item p
Program precision. This option is the default and means a trap handler
-can only identify which program caused a floating point exception.
+can only identify which program caused a floating-point exception.
@item f
Function precision. The trap handler can determine the function that
-caused a floating point exception.
+caused a floating-point exception.
@item i
Instruction precision. The trap handler can determine the exact
-instruction that caused a floating point exception.
+instruction that caused a floating-point exception.
@end table
Other Alpha compilers provide the equivalent options called
Normally GCC examines a 32- or 64-bit integer constant to
see if it can construct it from smaller constants in two or three
instructions. If it cannot, it will output the constant as a literal and
-generate code to load it from the data segment at runtime.
+generate code to load it from the data segment at run time.
Use this option to require GCC to construct @emph{all} integer constants
using code, even if it takes more instructions (the maximum is six).
@itemx -mfloat-ieee
@opindex mfloat-vax
@opindex mfloat-ieee
-Generate code that uses (does not use) VAX F and G floating point
+Generate code that uses (does not use) VAX F and G floating-point
arithmetic instead of IEEE single and double precision.
@item -mexplicit-relocs
Schedules as an EV6 and supports the BWX, CIX, FIX, and MAX extensions.
@end table
-Native Linux/GNU toolchains also support the value @samp{native},
+Native toolchains also support the value @samp{native},
which selects the best architecture option for the host processor.
@option{-mcpu=native} has no effect if GCC does not recognize
the processor.
Set only the instruction scheduling parameters for machine type
@var{cpu_type}. The instruction set is not changed.
-Native Linux/GNU toolchains also support the value @samp{native},
+Native toolchains also support the value @samp{native},
which selects the best architecture option for the host processor.
@option{-mtune=native} has no effect if GCC does not recognize
the processor.
@item -mmalloc64
@opindex mmalloc64
-Default to 64bit memory allocation routines.
+Default to 64-bit memory allocation routines.
@end table
@node FR30 Options
@item -mno-lsim
@opindex mno-lsim
-Assume that run-time support has been provided and so there is no need
+Assume that runtime support has been provided and so there is no need
to include the simulator library (@file{libsim.a}) on the linker
command line.
@item -mgpr-32
@opindex mgpr-32
-Only use the first 32 general purpose registers.
+Only use the first 32 general-purpose registers.
@item -mgpr-64
@opindex mgpr-64
-Use all 64 general purpose registers.
+Use all 64 general-purpose registers.
@item -mfpr-32
@opindex mfpr-32
-Use only the first 32 floating point registers.
+Use only the first 32 floating-point registers.
@item -mfpr-64
@opindex mfpr-64
-Use all 64 floating point registers
+Use all 64 floating-point registers.
@item -mhard-float
@opindex mhard-float
-Use hardware instructions for floating point operations.
+Use hardware instructions for floating-point operations.
@item -msoft-float
@opindex msoft-float
-Use library routines for floating point operations.
+Use library routines for floating-point operations.
@item -malloc-cc
@opindex malloc-cc
@item -mdouble
@opindex mdouble
-Use floating point double instructions.
+Use floating-point double instructions.
@item -mno-double
@opindex mno-double
-Do not use floating point double instructions.
+Do not use floating-point double instructions.
@item -mmedia
@opindex mmedia
@item -mfdpic
@opindex mfdpic
-Select the FDPIC ABI, that uses function descriptors to represent
+Select the FDPIC ABI, which uses function descriptors to represent
pointers to functions. Without any PIC/PIE-related options, it
implies @option{-fPIE}. With @option{-fpic} or @option{-fpie}, it
assumes GOT entries and small data are within a 12-bit range from the
@item -malign-300
@opindex malign-300
On the H8/300H and H8S, use the same alignment rules as for the H8/300.
-The default for the H8/300H and H8S is to align longs and floats on 4
-byte boundaries.
-@option{-malign-300} causes them to be aligned on 2 byte boundaries.
+The default for the H8/300H and H8S is to align longs and floats on
+4-byte boundaries.
+@option{-malign-300} causes them to be aligned on 2-byte boundaries.
This option has no effect on the H8/300.
@end table
@item -mdisable-fpregs
@opindex mdisable-fpregs
-Prevent floating point registers from being used in any manner. This is
-necessary for compiling kernels which perform lazy context switching of
-floating point registers. If you use this option and attempt to perform
-floating point operations, the compiler will abort.
+Prevent floating-point registers from being used in any manner. This is
+necessary for compiling kernels that perform lazy context switching of
+floating-point registers. If you use this option and attempt to perform
+floating-point operations, the compiler aborts.
@item -mdisable-indexing
@opindex mdisable-indexing
@item -mfast-indirect-calls
@opindex mfast-indirect-calls
Generate code that assumes calls never cross space boundaries. This
-allows GCC to emit code which performs faster indirect calls.
+allows GCC to emit code that performs faster indirect calls.
This option will not work in the presence of shared libraries or nested
functions.
@option{--with-ld} configure option, GCC's program search path, and
finally by the user's @env{PATH}. The linker used by GCC can be printed
using @samp{which `gcc -print-prog-name=ld`}. This option is only available
-on the 64 bit HP-UX GCC, i.e.@: configured with @samp{hppa*64*-*-hpux*}.
+on the 64-bit HP-UX GCC, i.e.@: configured with @samp{hppa*64*-*-hpux*}.
@item -mhp-ld
@opindex mhp-ld
ld. The ld that is called is determined by the @option{--with-ld}
configure option, GCC's program search path, and finally by the user's
@env{PATH}. The linker used by GCC can be printed using @samp{which
-`gcc -print-prog-name=ld`}. This option is only available on the 64 bit
+`gcc -print-prog-name=ld`}. This option is only available on the 64-bit
HP-UX GCC, i.e.@: configured with @samp{hppa*64*-*-hpux*}.
@item -mlong-calls
@item corei7-avx
Intel Core i7 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3,
SSE4.1, SSE4.2, AVX, AES and PCLMUL instruction set support.
+@item core-avx-i
+Intel Core CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3,
+SSE4.1, SSE4.2, AVX, AES, PCLMUL, FSGSBASE, RDRND and F16C instruction
+set support.
@item atom
Intel Atom CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3
instruction set support.
AMD Family 10h core based CPUs with x86-64 instruction set support. (This
supersets MMX, SSE, SSE2, SSE3, SSE4A, 3DNow!, enhanced 3DNow!, ABM and 64-bit
instruction set extensions.)
+@item bdver1
+AMD Family 15h core based CPUs with x86-64 instruction set support. (This
+supersets FMA4, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE, SSE2, SSE3, SSE4A,
+SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set extensions.)
+@item bdver2
+AMD Family 15h core based CPUs with x86-64 instruction set support. (This
+supersets BMI, TBM, F16C, FMA, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE,
+SSE2, SSE3, SSE4A, SSSE3, SSE4.1, SSE4.2, ABM and 64-bit instruction set
+extensions.)
+@item btver1
+AMD Family 14h core based CPUs with x86-64 instruction set support. (This
+supersets MMX, SSE, SSE2, SSE3, SSSE3, SSE4A, CX16, ABM and 64-bit
+instruction set extensions.)
@item winchip-c6
IDT Winchip C6 CPU, dealt in same way as i486 with additional MMX instruction
set support.
While picking a specific @var{cpu-type} will schedule things appropriately
for that particular chip, the compiler will not generate any code that
-does not run on the i386 without the @option{-march=@var{cpu-type}} option
-being used.
+does not run on the default machine type without the @option{-march=@var{cpu-type}}
+option being used. For example, if GCC is configured for i686-pc-linux-gnu
+then @option{-mtune=pentium4} will generate code that is tuned for Pentium4
+but will still run on i686 machines.
@item -march=@var{cpu-type}
@opindex march
@item -mfpmath=@var{unit}
@opindex mfpmath
-Generate floating point arithmetics for selected unit @var{unit}. The choices
+Generate floating-point arithmetic for selected unit @var{unit}. The choices
for @var{unit} are:
@table @samp
@item 387
-Use the standard 387 floating point coprocessor present majority of chips and
-emulated otherwise. Code compiled with this option will run almost everywhere.
-The temporary results are computed in 80bit precision instead of precision
-specified by the type resulting in slightly different results compared to most
+Use the standard 387 floating-point coprocessor present on the majority of chips and
+emulated otherwise. Code compiled with this option runs almost everywhere.
+The temporary results are computed in 80-bit precision instead of the precision
+specified by the type, resulting in slightly different results compared to most
of other chips. See @option{-ffloat-store} for more detailed description.
This is the default choice for i386 compiler.
@item sse
-Use scalar floating point instructions present in the SSE instruction set.
+Use scalar floating-point instructions present in the SSE instruction set.
This instruction set is supported by Pentium3 and newer chips, in the AMD line
by Athlon-4, Athlon-xp and Athlon-mp chips. The earlier version of SSE
-instruction set supports only single precision arithmetics, thus the double and
-extended precision arithmetics is still done using 387. Later version, present
-only in Pentium4 and the future AMD x86-64 chips supports double precision
-arithmetics too.
+instruction set supports only single-precision arithmetic, thus the double and
+extended-precision arithmetic are still done using 387. A later version, present
+only in Pentium4 and the future AMD x86-64 chips, supports double-precision
+arithmetic too.
For the i386 compiler, you need to use @option{-march=@var{cpu-type}}, @option{-msse}
or @option{-msse2} switches to enable SSE extensions and make this option
The resulting code should be considerably faster in the majority of cases and avoid
the numerical instability problems of 387 code, but may break some existing
-code that expects temporaries to be 80bit.
+code that expects temporaries to be 80 bits.
This is the default choice for the x86-64 compiler.
@itemx -mno-ieee-fp
@opindex mieee-fp
@opindex mno-ieee-fp
-Control whether or not the compiler uses IEEE floating point
+Control whether or not the compiler uses IEEE floating-point
comparisons. These handle correctly the case where the result of a
comparison is unordered.
own arrangements to provide suitable library functions for
cross-compilation.
-On machines where a function returns floating point results in the 80387
-register stack, some floating point opcodes may be emitted even if
+On machines where a function returns floating-point results in the 80387
+register stack, some floating-point opcodes may be emitted even if
@option{-msoft-float} is used.
@item -mno-fp-ret-in-387
@opindex malign-double
@opindex mno-align-double
Control whether GCC aligns @code{double}, @code{long double}, and
-@code{long long} variables on a two word boundary or a one word
-boundary. Aligning @code{double} variables on a two word boundary will
-produce code that runs somewhat faster on a @samp{Pentium} at the
+@code{long long} variables on a two-word boundary or a one-word
+boundary. Aligning @code{double} variables on a two-word boundary
+produces code that runs somewhat faster on a @samp{Pentium} at the
expense of more memory.
On x86-64, @option{-malign-double} is enabled by default.
@opindex m128bit-long-double
These switches control the size of @code{long double} type. The i386
application binary interface specifies the size to be 96 bits,
-so @option{-m96bit-long-double} is the default in 32 bit mode.
+so @option{-m96bit-long-double} is the default in 32-bit mode.
-Modern architectures (Pentium and newer) would prefer @code{long double}
-to be aligned to an 8 or 16 byte boundary. In arrays or structures
-conforming to the ABI, this would not be possible. So specifying a
-@option{-m128bit-long-double} will align @code{long double}
-to a 16 byte boundary by padding the @code{long double} with an additional
-32 bit zero.
+Modern architectures (Pentium and newer) prefer @code{long double}
+to be aligned to an 8- or 16-byte boundary. In arrays or structures
+conforming to the ABI, this is not possible. So specifying
+@option{-m128bit-long-double} aligns @code{long double}
+to a 16-byte boundary by padding the @code{long double} with an additional
+32-bit zero.
In the x86-64 compiler, @option{-m128bit-long-double} is the default choice as
-its ABI specifies that @code{long double} is to be aligned on 16 byte boundary.
+its ABI specifies that @code{long double} is to be aligned on 16-byte boundary.
Notice that neither of these options enable any extra precision over the x87
standard of 80 bits for a @code{long double}.
Setting the rounding of floating-point operations to less than the default
80 bits can speed some programs by 2% or more. Note that some mathematical
-libraries assume that extended precision (80 bit) floating-point operations
+libraries assume that extended-precision (80-bit) floating-point operations
are enabled by default; routines in such libraries could suffer significant
loss of accuracy, typically through so-called "catastrophic cancellation",
when this option is used to set the precision to less than extended precision.
@opindex mstackrealign
Realign the stack at entry. On the Intel x86, the @option{-mstackrealign}
option will generate an alternate prologue and epilogue that realigns the
-runtime stack if necessary. This supports mixing legacy codes that keep
+run-time stack if necessary. This supports mixing legacy codes that keep
a 4-byte aligned stack with modern codes that keep a 16-byte stack for
SSE compatibility. See also the attribute @code{force_align_arg_pointer},
applicable to individual functions.
the one specified by @option{-mpreferred-stack-boundary} will be used.
On Pentium and PentiumPro, @code{double} and @code{long double} values
-should be aligned to an 8 byte boundary (see @option{-malign-double}) or
+should be aligned to an 8-byte boundary (see @option{-malign-double}) or
suffer significant run time performance penalties. On Pentium III, the
Streaming SIMD Extension (SSE) data type @code{__m128} may not work
-properly if it is not 16 byte aligned.
+properly if it is not 16-byte aligned.
To ensure proper alignment of this values on the stack, the stack boundary
must be as aligned as that required by any value stored on the stack.
@itemx -mno-sse4
@itemx -mavx
@itemx -mno-avx
+@itemx -mavx2
+@itemx -mno-avx2
@itemx -maes
@itemx -mno-aes
@itemx -mpclmul
@itemx -mabm
@itemx -mno-abm
@itemx -mbmi
+@itemx -mbmi2
@itemx -mno-bmi
+@itemx -mno-bmi2
+@itemx -mlzcnt
+@itemx -mno-lzcnt
@itemx -mtbm
@itemx -mno-tbm
@opindex mmmx
@opindex m3dnow
@opindex mno-3dnow
These switches enable or disable the use of instructions in the MMX, SSE,
-SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA,
-SSE4A, FMA4, XOP, LWP, ABM, BMI, or 3DNow!@: extended instruction sets.
+SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, F16C,
+FMA, SSE4A, FMA4, XOP, LWP, ABM, BMI, BMI2, LZCNT or 3DNow!
+@: extended instruction sets.
These extensions are also available as built-in functions: see
@ref{X86 Built-in Functions}, for details of the functions enabled and
disabled by these switches.
when needed.
These options will enable GCC to use these extended instructions in
-generated code, even without @option{-mfpmath=sse}. Applications which
-perform runtime CPU detection must compile separate files for each
+generated code, even without @option{-mfpmath=sse}. Applications that
+perform run-time CPU detection must compile separate files for each
supported architecture, using the appropriate flags. In particular,
the file containing the CPU detection code should be compiled without
these options.
ABI specifies the DF flag to be cleared on function entry, some operating
systems violate this specification by not clearing the DF flag in their
exception dispatchers. The exception handler can be invoked with the DF flag
-set which leads to wrong direction mode, when string instructions are used.
+set, which leads to wrong direction mode when string instructions are used.
This option can be enabled by default on 32-bit x86 targets by configuring
GCC with the @option{--enable-cld} configure option. Generation of @code{cld}
instructions can be suppressed with the @option{-mno-cld} compiler option
CMPXCHG16B allows for atomic operations on 128-bit double quadword (or oword)
data types. This is useful for high resolution counters that could be updated
by multiple processors (or cores). This instruction is generated as part of
-atomic built-in functions: see @ref{Atomic Builtins} for details.
+atomic built-in functions: see @ref{__sync Builtins} or
+@ref{__atomic Builtins} for details.
@item -msahf
@opindex msahf
This option will enable GCC to use RCPSS and RSQRTSS instructions (and their
vectorized variants RCPPS and RSQRTPS) with an additional Newton-Raphson step
to increase precision instead of DIVSS and SQRTSS (and their vectorized
-variants) for single precision floating point arguments. These instructions
+variants) for single-precision floating-point arguments. These instructions
are generated only when @option{-funsafe-math-optimizations} is enabled
together with @option{-finite-math-only} and @option{-fno-trapping-math}.
Note that while the throughput of the sequence is higher than the throughput
of the non-reciprocal instruction, the precision of the sequence can be
decreased by up to 2 ulp (i.e. the inverse of 1.0 equals 0.99999994).
-Note that GCC implements 1.0f/sqrtf(x) in terms of RSQRTSS (or RSQRTPS)
+Note that GCC implements @code{1.0f/sqrtf(@var{x})} in terms of RSQRTSS
+(or RSQRTPS) already with @option{-ffast-math} (or the above option
+combination), and doesn't need @option{-mrecip}.
+
+Also note that GCC emits the above sequence with additional Newton-Raphson step
+for vectorized single-float division and vectorized @code{sqrtf(@var{x})}
already with @option{-ffast-math} (or the above option combination), and
doesn't need @option{-mrecip}.
+@item -mrecip=@var{opt}
+@opindex mrecip=opt
+This option allows to control which reciprocal estimate instructions
+may be used. @var{opt} is a comma separated list of options, which may
+be preceded by a @code{!} to invert the option:
+@code{all}: enable all estimate instructions,
+@code{default}: enable the default instructions, equivalent to @option{-mrecip},
+@code{none}: disable all estimate instructions, equivalent to @option{-mno-recip},
+@code{div}: enable the approximation for scalar division,
+@code{vec-div}: enable the approximation for vectorized division,
+@code{sqrt}: enable the approximation for scalar square root,
+@code{vec-sqrt}: enable the approximation for vectorized square root.
+
+So for example, @option{-mrecip=all,!sqrt} would enable
+all of the reciprocal approximations, except for square root.
+
@item -mveclibabi=@var{type}
@opindex mveclibabi
Specifies the ABI type to use for vectorizing intrinsics using an
@item -minline-all-stringops
@opindex minline-all-stringops
-By default GCC inlines string operations only when destination is known to be
-aligned at least to 4 byte boundary. This enables more inlining, increase code
+By default GCC inlines string operations only when the destination is
+known to be aligned to least a 4-byte boundary.
+This enables more inlining, increase code
size, but may improve performance of code that depends on fast memcpy, strlen
and memset for short lengths.
@item -minline-stringops-dynamically
@opindex minline-stringops-dynamically
-For string operation of unknown size, inline runtime checks so for small
-blocks inline code is used, while for large blocks library call is used.
+For string operations of unknown size, use run-time checks with
+inline code for small blocks and a library call for large blocks.
@item -mstringop-strategy=@var{alg}
@opindex mstringop-strategy=@var{alg}
Don't keep the frame pointer in a register for leaf functions. This
avoids the instructions to save, set up and restore frame pointers and
makes an extra register available in leaf functions. The option
-@option{-fomit-frame-pointer} removes the frame pointer for all functions
+@option{-fomit-frame-pointer} removes the frame pointer for all functions,
which might make debugging harder.
@item -mtls-direct-seg-refs
@item -m8bit-idiv
@itemx -mno-8bit-idiv
@opindex 8bit-idiv
-On some processors, like Intel Atom, 8bit unsigned integer divide is
-much faster than 32bit/64bit integer divide. This option will generate a
-runt-time check. If both dividend and divisor are within range of 0
-to 255, 8bit unsigned integer divide will be used instead of
-32bit/64bit integer divide.
+On some processors, like Intel Atom, 8-bit unsigned integer divide is
+much faster than 32-bit/64-bit integer divide. This option generates a
+run-time check. If both dividend and divisor are within range of 0
+to 255, 8-bit unsigned integer divide is used instead of
+32-bit/64-bit integer divide.
@item -mavx256-split-unaligned-load
@item -mavx256-split-unaligned-store
@table @gcctabopt
@item -mbig-endian
@opindex mbig-endian
-Generate code for a big endian target. This is the default for HP-UX@.
+Generate code for a big-endian target. This is the default for HP-UX@.
@item -mlittle-endian
@opindex mlittle-endian
-Generate code for a little endian target. This is the default for AIX5
+Generate code for a little-endian target. This is the default for AIX5
and GNU/Linux.
@item -mgnu-as
@item -minline-float-divide-min-latency
@opindex minline-float-divide-min-latency
-Generate code for inline divides of floating point values
+Generate code for inline divides of floating-point values
using the minimum latency algorithm.
@item -minline-float-divide-max-throughput
@opindex minline-float-divide-max-throughput
-Generate code for inline divides of floating point values
+Generate code for inline divides of floating-point values
using the maximum throughput algorithm.
@item -mno-inline-float-divide
@opindex mno-inline-float-divide
-Do not generate inline code for divides of floating point values.
+Do not generate inline code for divides of floating-point values.
@item -minline-int-divide-min-latency
@opindex minline-int-divide-min-latency
@item -mmalloc64
@opindex mmalloc64
-Default to 64bit memory allocation routines.
+Default to 64-bit memory allocation routines.
@end table
@node LM32 Options
@item -mcfv4e
@opindex mcfv4e
Generate output for a ColdFire V4e family CPU (e.g.@: 547x/548x).
-This includes use of hardware floating point instructions.
+This includes use of hardware floating-point instructions.
The option is equivalent to @option{-mcpu=547x}, and is now
deprecated in favor of that option.
@item -m68020-40
@opindex m68020-40
Generate output for a 68040, without using any of the new instructions.
-This results in code which can run relatively efficiently on either a
+This results in code that can run relatively efficiently on either a
68020/68881 or a 68030 or a 68040. The generated code does use the
68881 instructions that are emulated on the 68040.
@item -m68020-60
@opindex m68020-60
Generate output for a 68060, without using any of the new instructions.
-This results in code which can run relatively efficiently on either a
+This results in code that can run relatively efficiently on either a
68020/68881 or a 68030 or a 68040. The generated code does use the
68881 instructions that are emulated on the 68060.
@itemx -mno-4byte-functions
@opindex m4byte-functions
@opindex mno-4byte-functions
-Force all functions to be aligned to a four byte boundary.
+Force all functions to be aligned to a 4-byte boundary.
@item -mcallgraph-data
@itemx -mno-callgraph-data
@itemx -mbig-endian
@opindex mlittle-endian
@opindex mbig-endian
-Generate code for a little endian target.
+Generate code for a little-endian target.
@item -m210
@itemx -m340
@item -mno-lsim
@opindex mno-lsim
-Assume that run-time support has been provided and so omit the
+Assume that runtime support has been provided and so omit the
simulator library (@file{libsim.a)} from the linker command line.
@item -mstack-increment=@var{size}
@opindex mstack-increment
Set the maximum amount for a single stack increment operation. Large
-values can increase the speed of programs which contain functions
+values can increase the speed of programs that contain functions
that need a large amount of stack space, but they can also trigger a
segmentation fault if the stack is extended too much. The default
value is 0x1000.
@opindex mbased=
Variables of size @var{n} bytes or smaller will be placed in the
@code{.based} section by default. Based variables use the @code{$tp}
-register as a base register, and there is a 128 byte limit to the
+register as a base register, and there is a 128-byte limit to the
@code{.based} section.
@item -mbitops
coprocessors, optional instructions, and peripherals. The
@code{MeP-Integrator} tool, not part of GCC, provides these
configurations through this option; using this option is the same as
-using all the corresponding command line options. The default
+using all the corresponding command-line options. The default
configuration is @code{default}.
@item -mcop
@item -ms
@opindex ms
Causes all variables to default to the @code{.tiny} section. Note
-that there is a 65536 byte limit to this section. Accesses to these
+that there is a 65536-byte limit to this section. Accesses to these
variables use the @code{%gp} base register.
@item -msatur
Variables that are @var{n} bytes or smaller will be allocated to the
@code{.tiny} section. These variables use the @code{$gp} base
register. The default for this option is 4, but note that there's a
-65536 byte limit to the @code{.tiny} section.
+65536-byte limit to the @code{.tiny} section.
@end table
@item -mhard-float
@opindex mhard-float
-Use hardware floating point instructions.
+Use hardware floating-point instructions.
@item -mmemcpy
@opindex mmemcpy
@item -mxl-float-convert
@opindex mxl-float-convert
-Use hardware floating point conversion instructions.
+Use hardware floating-point conversion instructions.
@item -mxl-float-sqrt
@opindex mxl-float-sqrt
-Use hardware floating point square root instruction.
+Use hardware floating-point square root instruction.
@item -mxl-mode-@var{app-model}
Select application model @var{app-model}. Valid models are
@samp{1004kc}, @samp{1004kf2_1}, @samp{1004kf1_1},
@samp{loongson2e}, @samp{loongson2f}, @samp{loongson3a},
@samp{m4k},
-@samp{octeon},
+@samp{octeon}, @samp{octeon+}, @samp{octeon2},
@samp{orion},
@samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{r4400},
@samp{r4600}, @samp{r4650}, @samp{r6000}, @samp{r8000},
most compatible architecture for the selected ABI (that is,
@samp{mips1} for 32-bit ABIs and @samp{mips3} for 64-bit ABIs)@.
-Native Linux/GNU toolchains also support the value @samp{native},
+Native Linux/GNU and IRIX toolchains also support the value @samp{native},
which selects the best architecture option for the host processor.
@option{-march=native} has no effect if GCC does not recognize
the processor.
@itemx -mno-fused-madd
@opindex mfused-madd
@opindex mno-fused-madd
-Enable (disable) use of the floating point multiply-accumulate
+Enable (disable) use of the floating-point multiply-accumulate
instructions, when they are available. The default is
@option{-mfused-madd}.
@opindex mfix-sb1
Work around certain SB-1 CPU core errata.
(This flag currently works around the SB-1 revision 2
-``F1'' and ``F2'' floating point errata.)
+``F1'' and ``F2'' floating-point errata.)
@item -mr10k-cache-barrier=@var{setting}
@opindex mr10k-cache-barrier
default for the selected architecture. By default, Branch Likely
instructions may be generated if they are supported by the selected
architecture. An exception is for the MIPS32 and MIPS64 architectures
-and processors which implement those architectures; for those, Branch
+and processors that implement those architectures; for those, Branch
Likely instructions will not be generated by default because the MIPS32
and MIPS64 architectures specifically deprecate their use.
@item -mam33
@opindex mam33
-Generate code which uses features specific to the AM33 processor.
+Generate code using features specific to the AM33 processor.
@item -mno-am33
@opindex mno-am33
-Do not generate code which uses features specific to the AM33 processor. This
+Do not generate code using features specific to the AM33 processor. This
is the default.
@item -mam33-2
@opindex mam33-2
-Generate code which uses features specific to the AM33/2.0 processor.
+Generate code using features specific to the AM33/2.0 processor.
@item -mam34
@opindex mam34
-Generate code which uses features specific to the AM34 processor.
+Generate code using features specific to the AM34 processor.
@item -mtune=@var{cpu-type}
@opindex mtune
@item -mreturn-pointer-on-d0
@opindex mreturn-pointer-on-d0
-When generating a function which returns a pointer, return the pointer
+When generating a function that returns a pointer, return the pointer
in both @code{a0} and @code{d0}. Otherwise, the pointer is returned
only in a0, and attempts to call such functions without a prototype
would result in errors. Note that this option is on by default; use
@item -mno-inefficient-warnings
Disables warnings about the generation of inefficient code. These
-warnings can be generated, for example, when compiling code which
+warnings can be generated, for example, when compiling code that
performs byte-level memory operations on the MAC AE type. The MAC AE has
no hardware support for byte-level memory operations, so all byte
load/stores must be synthesized from word load/store operations. This is
inefficient and a warning will be generated indicating to the programmer
that they should rewrite the code to avoid byte operations, or to target
-an AE type which has the necessary hardware support. This option enables
+an AE type that has the necessary hardware support. This option enables
the warning to be turned off.
@end table
These are listed under @xref{RS/6000 and PowerPC Options}.
+@node RL78 Options
+@subsection RL78 Options
+@cindex RL78 Options
+
+@table @gcctabopt
+
+@item -msim
+@opindex msim
+Links in additional target libraries to support operation within a
+simulator.
+
+@item -mmul=none
+@itemx -mmul=g13
+@itemx -mmul=rl78
+@opindex mmul
+Specifies the type of hardware multiplication support to be used. The
+default is @code{none}, which uses software multiplication functions.
+The @code{g13} option is for the hardware multiply/divide peripheral
+only on the RL78/G13 targets. The @code{rl78} option is for the
+standard hardware multiplication defined in the RL78 software manual.
+
+@end table
+
@node RS/6000 and PowerPC Options
@subsection IBM RS/6000 and PowerPC Options
@cindex RS/6000 and PowerPC Options
processor and other processors that support the PowerPC V2.01
architecture.
The @option{-mpopcntb} option allows GCC to generate the popcount and
-double precision FP reciprocal estimate instruction implemented on the
+double-precision FP reciprocal estimate instruction implemented on the
POWER5 processor and other processors that support the PowerPC V2.02
architecture.
The @option{-mpopcntd} option allows GCC to generate the popcount
instruction implemented on the POWER6 processor and other processors
that support the PowerPC V2.05 architecture.
The @option{-mmfpgpr} option allows GCC to generate the FP move to/from
-general purpose register instructions implemented on the POWER6X
+general-purpose register instructions implemented on the POWER6X
processor and other processors that support the extended PowerPC V2.05
architecture.
-The @option{-mhard-dfp} option allows GCC to generate the decimal floating
-point instructions implemented on some POWER processors.
+The @option{-mhard-dfp} option allows GCC to generate the decimal
+floating-point instructions implemented on some POWER processors.
The @option{-mpowerpc64} option allows GCC to generate the additional
64-bit instructions that are found in the full PowerPC64 architecture
@item -mfloat-gprs=@var{yes/single/double/no}
@itemx -mfloat-gprs
@opindex mfloat-gprs
-This switch enables or disables the generation of floating point
-operations on the general purpose registers for architectures that
+This switch enables or disables the generation of floating-point
+operations on the general-purpose registers for architectures that
support it.
The argument @var{yes} or @var{single} enables the use of
-single-precision floating point operations.
+single-precision floating-point operations.
The argument @var{double} enables the use of single and
-double-precision floating point operations.
+double-precision floating-point operations.
-The argument @var{no} disables floating point operations on the
-general purpose registers.
+The argument @var{no} disables floating-point operations on the
+general-purpose registers.
This option is currently only available on the MPC854x.
@option{-mno-fp-in-toc} prevents GCC from putting floating-point
constants in the TOC and @option{-mno-sum-in-toc} forces GCC to
generate code to calculate the sum of an address and a constant at
-run-time instead of putting that sum into the TOC@. You may specify one
+run time instead of putting that sum into the TOC@. You may specify one
or both of these options. Each causes GCC to produce very slightly
slower and larger code at the expense of conserving TOC space.
The AIX calling convention was extended but not initially documented to
handle an obscure K&R C case of calling a function that takes the
address of its arguments with fewer arguments than declared. IBM XL
-compilers access floating point arguments which do not fit in the
+compilers access floating-point arguments that do not fit in the
RSA from the stack when a subroutine is compiled without
optimization. Because always storing floating-point arguments on the
stack is inefficient and rarely needed, this option is not enabled by
@opindex msoft-float
@opindex mhard-float
Generate code that does not use (uses) the floating-point register set.
-Software floating point emulation is provided if you use the
+Software floating-point emulation is provided if you use the
@option{-msoft-float} option, and pass the option to GCC when linking.
@item -msingle-float
@itemx -mdouble-float
@opindex msingle-float
@opindex mdouble-float
-Generate code for single or double-precision floating point operations.
+Generate code for single- or double-precision floating-point operations.
@option{-mdouble-float} implies @option{-msingle-float}.
@item -msimple-fpu
@opindex msimple-fpu
-Do not generate sqrt and div instructions for hardware floating point unit.
+Do not generate sqrt and div instructions for hardware floating-point unit.
@item -mfpu
@opindex mfpu
-Specify type of floating point unit. Valid values are @var{sp_lite}
+Specify type of floating-point unit. Valid values are @var{sp_lite}
(equivalent to -msingle-float -msimple-fpu), @var{dp_lite} (equivalent
to -mdouble-float -msimple-fpu), @var{sp_full} (equivalent to -msingle-float),
and @var{dp_full} (equivalent to -mdouble-float).
@item -mxilinx-fpu
@opindex mxilinx-fpu
-Perform optimizations for floating point unit on Xilinx PPC 405/440.
+Perform optimizations for the floating-point unit on Xilinx PPC 405/440.
@item -mmultiple
@itemx -mno-multiple
Generate code that uses (does not use) the load multiple word
instructions and the store multiple word instructions. These
instructions are generated by default on POWER systems, and not
-generated on PowerPC systems. Do not use @option{-mmultiple} on little
-endian PowerPC systems, since those instructions do not work when the
-processor is in little endian mode. The exceptions are PPC740 and
-PPC750 which permit the instructions usage in little endian mode.
+generated on PowerPC systems. Do not use @option{-mmultiple} on little-endian
+PowerPC systems, since those instructions do not work when the
+processor is in little-endian mode. The exceptions are PPC740 and
+PPC750 which permit these instructions in little-endian mode.
@item -mstring
@itemx -mno-string
and the store string word instructions to save multiple registers and
do small block moves. These instructions are generated by default on
POWER systems, and not generated on PowerPC systems. Do not use
-@option{-mstring} on little endian PowerPC systems, since those
-instructions do not work when the processor is in little endian mode.
-The exceptions are PPC740 and PPC750 which permit the instructions
-usage in little endian mode.
+@option{-mstring} on little-endian PowerPC systems, since those
+instructions do not work when the processor is in little-endian mode.
+The exceptions are PPC740 and PPC750 which permit these instructions
+in little-endian mode.
@item -mupdate
@itemx -mno-update
@itemx -mno-fused-madd
@opindex mfused-madd
@opindex mno-fused-madd
-Generate code that uses (does not use) the floating point multiply and
+Generate code that uses (does not use) the floating-point multiply and
accumulate instructions. These instructions are generated by default
-if hardware floating point is used. The machine dependent
-@option{-mfused-madd} option is now mapped to the machine independent
+if hardware floating point is used. The machine-dependent
+@option{-mfused-madd} option is now mapped to the machine-independent
@option{-ffp-contract=fast} option, and @option{-mno-fused-madd} is
mapped to @option{-ffp-contract=off}.
bit-field.
For example, by default a structure containing nothing but 8
-@code{unsigned} bit-fields of length 1 would be aligned to a 4 byte
-boundary and have a size of 4 bytes. By using @option{-mno-bit-align},
-the structure would be aligned to a 1 byte boundary and be one byte in
+@code{unsigned} bit-fields of length 1 is aligned to a 4-byte
+boundary and has a size of 4 bytes. By using @option{-mno-bit-align},
+the structure is aligned to a 1-byte boundary and is 1 byte in
size.
@item -mno-strict-align
@opindex mrelocatable
@opindex mno-relocatable
Generate code that allows (does not allow) a static executable to be
-relocated to a different address at runtime. A simple embedded
+relocated to a different address at run time. A simple embedded
PowerPC system loader should relocate the entire contents of
@code{.got2} and 4-byte locations listed in the @code{.fixup} section,
a table of 32-bit addresses generated by this option. For this to
work, all objects linked together must be compiled with
@option{-mrelocatable} or @option{-mrelocatable-lib}.
-@option{-mrelocatable} code aligns the stack to an 8 byte boundary.
+@option{-mrelocatable} code aligns the stack to an 8-byte boundary.
@item -mrelocatable-lib
@itemx -mno-relocatable-lib
@opindex mno-relocatable-lib
Like @option{-mrelocatable}, @option{-mrelocatable-lib} generates a
@code{.fixup} section to allow static executables to be relocated at
-runtime, but @option{-mrelocatable-lib} does not use the smaller stack
+run time, but @option{-mrelocatable-lib} does not use the smaller stack
alignment of @option{-mrelocatable}. Objects compiled with
@option{-mrelocatable-lib} may be linked with objects compiled with
any combination of the @option{-mrelocatable} options.
@opindex mlittle
@opindex mlittle-endian
On System V.4 and embedded PowerPC systems compile code for the
-processor in little endian mode. The @option{-mlittle-endian} option is
+processor in little-endian mode. The @option{-mlittle-endian} option is
the same as @option{-mlittle}.
@item -mbig
@opindex mbig
@opindex mbig-endian
On System V.4 and embedded PowerPC systems compile code for the
-processor in big endian mode. The @option{-mbig-endian} option is
+processor in big-endian mode. The @option{-mbig-endian} option is
the same as @option{-mbig}.
@item -mdynamic-no-pic
@item -msingle-pic-base
@opindex msingle-pic-base
Treat the register used for PIC addressing as read-only, rather than
-loading it in the prologue for each function. The run-time system is
+loading it in the prologue for each function. The runtime system is
responsible for initializing this register with an appropriate value
before execution begins.
@var{all}: all dependences are costly,
@var{true_store_to_load}: a true dependence from store to load is costly,
@var{store_to_load}: any dependence from store to load is costly,
-@var{number}: any dependence which latency >= @var{number} is costly.
+@var{number}: any dependence for which latency >= @var{number} is costly.
@item -minsert-sched-nops=@var{scheme}
@opindex minsert-sched-nops
the second scheduling pass. The argument @var{scheme} takes one of the
following values:
@var{no}: Don't insert nops.
-@var{pad}: Pad with nops any dispatch group which has vacant issue slots,
+@var{pad}: Pad with nops any dispatch group that has vacant issue slots,
according to the scheduler's grouping.
@var{regroup_exact}: Insert nops to force costly dependent insns into
separate groups. Insert exactly as many nops as needed to force an insn
@item -mabi=ibmlongdouble
@opindex mabi=ibmlongdouble
-Change the current ABI to use IBM extended precision long double.
+Change the current ABI to use IBM extended-precision long double.
This is a PowerPC 32-bit SYSV ABI option.
@item -mabi=ieeelongdouble
@opindex mabi=ieeelongdouble
-Change the current ABI to use IEEE extended precision long double.
+Change the current ABI to use IEEE extended-precision long double.
This is a PowerPC 32-bit Linux ABI option.
@item -mprototype
variable argument functions are properly prototyped. Otherwise, the
compiler must insert an instruction before every non prototyped call to
set or clear bit 6 of the condition code register (@var{CR}) to
-indicate whether floating point values were passed in the floating point
-registers in case the function takes a variable arguments. With
+indicate whether floating-point values were passed in the floating-point
+registers in case the function takes variable arguments. With
@option{-mprototype}, only calls to prototyped variable argument functions
will set or clear the bit.
On System V.4 and embedded PowerPC systems do (do not) adhere to the
Embedded Applications Binary Interface (eabi) which is a set of
modifications to the System V.4 specifications. Selecting @option{-meabi}
-means that the stack is aligned to an 8 byte boundary, a function
+means that the stack is aligned to an 8-byte boundary, a function
@code{__eabi} is called to from @code{main} to set up the eabi
environment, and the @option{-msdata} option can use both @code{r2} and
@code{r13} to point to two separate small data areas. Selecting
-@option{-mno-eabi} means that the stack is aligned to a 16 byte boundary,
+@option{-mno-eabi} means that the stack is aligned to a 16-byte boundary,
do not call an initialization function from @code{main}, and the
@option{-msdata} option will only use @code{r13} to point to a single
small data area. The @option{-meabi} option is on by default if you
This option will enable GCC to use the reciprocal estimate and
reciprocal square root estimate instructions with additional
Newton-Raphson steps to increase precision instead of doing a divide or
-square root and divide for floating point arguments. You should use
+square root and divide for floating-point arguments. You should use
the @option{-ffast-math} option when using @option{-mrecip} (or at
least @option{-funsafe-math-optimizations},
@option{-finite-math-only}, @option{-freciprocal-math} and
@item -mrecip=@var{opt}
@opindex mrecip=opt
This option allows to control which reciprocal estimate instructions
-may be used. @var{opt} is a comma separated list of options, that may
+may be used. @var{opt} is a comma separated list of options, which may
be preceded by a @code{!} to invert the option:
@code{all}: enable all estimate instructions,
@code{default}: enable the default instructions, equivalent to @option{-mrecip},
@code{none}: disable all estimate instructions, equivalent to @option{-mno-recip};
@code{div}: enable the reciprocal approximation instructions for both single and double precision;
-@code{divf}: enable the single precision reciprocal approximation instructions;
-@code{divd}: enable the double precision reciprocal approximation instructions;
+@code{divf}: enable the single-precision reciprocal approximation instructions;
+@code{divd}: enable the double-precision reciprocal approximation instructions;
@code{rsqrt}: enable the reciprocal square root approximation instructions for both single and double precision;
-@code{rsqrtf}: enable the single precision reciprocal square root approximation instructions;
-@code{rsqrtd}: enable the double precision reciprocal square root approximation instructions;
+@code{rsqrtf}: enable the single-precision reciprocal square root approximation instructions;
+@code{rsqrtd}: enable the double-precision reciprocal square root approximation instructions;
So for example, @option{-mrecip=all,!rsqrtd} would enable the
all of the reciprocal estimate instructions, except for the
@code{FRSQRTE}, @code{XSRSQRTEDP}, and @code{XVRSQRTEDP} instructions
-which handle the double precision reciprocal square root calculations.
+which handle the double-precision reciprocal square root calculations.
@item -mrecip-precision
@itemx -mno-recip-precision
@opindex mrecip-precision
Assume (do not assume) that the reciprocal estimate instructions
-provide higher precision estimates than is mandated by the powerpc
+provide higher-precision estimates than is mandated by the PowerPC
ABI. Selecting @option{-mcpu=power6} or @option{-mcpu=power7}
-automatically selects @option{-mrecip-precision}. The double
-precision square root estimate instructions are not generated by
-default on low precision machines, since they do not provide an
+automatically selects @option{-mrecip-precision}. The double-precision
+square root estimate instructions are not generated by
+default on low-precision machines, since they do not provide an
estimate that converges after three steps.
@item -mveclibabi=@var{type}
@opindex mfriz
Generate (do not generate) the @code{friz} instruction when the
@option{-funsafe-math-optimizations} option is used to optimize
-rounding a floating point value to 64-bit integer and back to floating
+rounding of floating-point values to 64-bit integer and back to floating
point. The @code{friz} instruction does not return the same value if
-the floating point number is too large to fit in an integer.
+the floating-point number is too large to fit in an integer.
@item -mpointers-to-nested-functions
@itemx -mno-pointers-to-nested-functions
@opindex mpointers-to-nested-functions
Generate (do not generate) code to load up the static chain register
(@var{r11}) when calling through a pointer on AIX and 64-bit Linux
-systems where a function pointer points to a 3 word descriptor giving
+systems where a function pointer points to a 3-word descriptor giving
the function address, TOC value to be loaded in register @var{r2}, and
static chain value to be loaded in register @var{r11}. The
@option{-mpointers-to-nested-functions} is on by default. You will
not be able to call through pointers to nested functions or pointers
to functions compiled in other languages that use the static chain if
you use the @option{-mno-pointers-to-nested-functions}.
+
+@item -msave-toc-indirect
+@itemx -mno-save-toc-indirect
+@opindex msave-toc-indirect
+Generate (do not generate) code to save the TOC value in the reserved
+stack location in the function prologue if the function calls through
+a pointer on AIX and 64-bit Linux systems. If the TOC value is not
+saved in the prologue, it is saved just before the call through the
+pointer. The @option{-mno-save-toc-indirect} option is the default.
@end table
@node RX Options
@subsection RX Options
@cindex RX Options
-These command line options are defined for RX targets:
+These command-line options are defined for RX targets:
@table @gcctabopt
@item -m64bit-doubles
@itemx -m32bit-doubles
@opindex m64bit-doubles
@opindex m32bit-doubles
-Make the @code{double} data type be 64-bits (@option{-m64bit-doubles})
-or 32-bits (@option{-m32bit-doubles}) in size. The default is
-@option{-m32bit-doubles}. @emph{Note} RX floating point hardware only
+Make the @code{double} data type be 64 bits (@option{-m64bit-doubles})
+or 32 bits (@option{-m32bit-doubles}) in size. The default is
+@option{-m32bit-doubles}. @emph{Note} RX floating-point hardware only
works on 32-bit values, which is why the default is
@option{-m32bit-doubles}.
@opindex fpu
@opindex nofpu
Enables (@option{-fpu}) or disables (@option{-nofpu}) the use of RX
-floating point hardware. The default is enabled for the @var{RX600}
+floating-point hardware. The default is enabled for the @var{RX600}
series and disabled for the @var{RX200} series.
-Floating point instructions will only be generated for 32-bit floating
-point values however, so if the @option{-m64bit-doubles} option is in
+Floating-point instructions will only be generated for 32-bit floating-point
+values however, so if the @option{-m64bit-doubles} option is in
use then the FPU hardware will not be used for doubles.
@emph{Note} If the @option{-fpu} option is enabled then
The only difference between @var{RX600} and @var{RX610} is that the
@var{RX610} does not support the @code{MVTIPL} instruction.
-The @var{RX200} series does not have a hardware floating point unit
+The @var{RX200} series does not have a hardware floating-point unit
and so @option{-nofpu} is enabled by default when this type is
selected.
@opindex mbig-endian-data
@opindex mlittle-endian-data
Store data (but not code) in the big-endian format. The default is
-@option{-mlittle-endian-data}, i.e.@: to store data in the little endian
+@option{-mlittle-endian-data}, i.e.@: to store data in the little-endian
format.
@item -msmall-data-limit=@var{N}
area can lead to smaller and faster code, but the size of area is
limited and it is up to the programmer to ensure that the area does
not overflow. Also when the small data area is used one of the RX's
-registers (@code{r13}) is reserved for use pointing to this area, so
-it is no longer available for use by the compiler. This could result
-in slower and/or larger code if variables which once could have been
-held in @code{r13} are now pushed onto the stack.
+registers (usually @code{r13}) is reserved for use pointing to this
+area, so it is no longer available for use by the compiler. This
+could result in slower and/or larger code if variables which once
+could have been held in the reserved register are now pushed onto the
+stack.
-Note, common variables (variables which have not been initialised) and
+Note, common variables (variables that have not been initialized) and
constants are not placed into the small data area as they are assigned
to other sections in the output executable.
The default value is zero, which disables this feature. Note, this
feature is not enabled by default with higher optimization levels
(@option{-O2} etc) because of the potentially detrimental effects of
-reserving register @code{r13}. It is up to the programmer to
-experiment and discover whether this feature is of benefit to their
-program.
+reserving a register. It is up to the programmer to experiment and
+discover whether this feature is of benefit to their program. See the
+description of the @option{-mpid} option for a description of how the
+actual register to hold the small data area pointer is chosen.
@item -msim
@itemx -mno-sim
multiplications. The default is to ignore the accumulator as this
makes the interrupt handlers faster.
+@item -mpid
+@itemx -mno-pid
+@opindex mpid
+@opindex mno-pid
+Enables the generation of position independent data. When enabled any
+access to constant data will done via an offset from a base address
+held in a register. This allows the location of constant data to be
+determined at run time without requiring the executable to be
+relocated, which is a benefit to embedded applications with tight
+memory constraints. Data that can be modified is not affected by this
+option.
+
+Note, using this feature reserves a register, usually @code{r13}, for
+the constant data base address. This can result in slower and/or
+larger code, especially in complicated functions.
+
+The actual register chosen to hold the constant data base address
+depends upon whether the @option{-msmall-data-limit} and/or the
+@option{-mint-register} command-line options are enabled. Starting
+with register @code{r13} and proceeding downwards, registers are
+allocated first to satisfy the requirements of @option{-mint-register},
+then @option{-mpid} and finally @option{-msmall-data-limit}. Thus it
+is possible for the small data area register to be @code{r8} if both
+@option{-mint-register=4} and @option{-mpid} are specified on the
+command line.
+
+By default this feature is not enabled. The default can be restored
+via the @option{-mno-pid} command-line option.
+
@end table
-@emph{Note:} The generic GCC command line @option{-ffixed-@var{reg}}
+@emph{Note:} The generic GCC command-line option @option{-ffixed-@var{reg}}
has special significance to the RX port when used with the
@code{interrupt} function attribute. This attribute indicates a
function intended to process fast interrupts. GCC will will ensure
that it only uses the registers @code{r10}, @code{r11}, @code{r12}
and/or @code{r13} and only provided that the normal use of the
corresponding registers have been restricted via the
-@option{-ffixed-@var{reg}} or @option{-mint-register} command line
+@option{-ffixed-@var{reg}} or @option{-mint-register} command-line
options.
@node S/390 and zSeries Options
@opindex mlong-double-64
@opindex mlong-double-128
These switches control the size of @code{long double} type. A size
-of 64bit makes the @code{long double} type equivalent to the @code{double}
+of 64 bits makes the @code{long double} type equivalent to the @code{double}
type. This is the default.
@item -mbackchain
@itemx -mno-fused-madd
@opindex mfused-madd
@opindex mno-fused-madd
-Generate code that uses (does not use) the floating point multiply and
+Generate code that uses (does not use) the floating-point multiply and
accumulate instructions. These instructions are generated by default if
hardware floating point is used.
@item -mwarn-framesize=@var{framesize}
@opindex mwarn-framesize
Emit a warning if the current function exceeds the given frame size. Because
-this is a compile time check it doesn't need to be a real problem when the program
-runs. It is intended to identify functions which most probably cause
+this is a compile-time check it doesn't need to be a real problem when the program
+runs. It is intended to identify functions that most probably cause
a stack overflow. It is useful to be used in an environment with limited stack
size e.g.@: the linux kernel.
@table @gcctabopt
@item -meb
@opindex meb
-Compile code for big endian mode. This is the default.
+Compile code for big-endian mode. This is the default.
@item -mel
@opindex mel
-Compile code for little endian mode.
+Compile code for little-endian mode.
@item -mnhwloop
@opindex mnhwloop
@item -m2a-single-only
@opindex m2a-single-only
Generate code for the SH2a-FPU, in such a way that no double-precision
-floating point operations are used.
+floating-point operations are used.
@item -m2a-single
@opindex m2a-single
@item -m4a-single-only
@opindex m4a-single-only
Generate code for the SH4a, in such a way that no double-precision
-floating point operations are used.
+floating-point operations are used.
@item -m4a-single
@opindex m4a-single
@item -mb
@opindex mb
-Compile code for the processor in big endian mode.
+Compile code for the processor in big-endian mode.
@item -ml
@opindex ml
-Compile code for the processor in little endian mode.
+Compile code for the processor in little-endian mode.
@item -mdalign
@opindex mdalign
@item -mieee
@opindex mieee
-Increase IEEE-compliance of floating-point code.
+Increase IEEE compliance of floating-point code.
At the moment, this is equivalent to @option{-fno-finite-math-only}.
-When generating 16 bit SH opcodes, getting IEEE-conforming results for
+When generating 16-bit SH opcodes, getting IEEE-conforming results for
comparisons of NANs / infinities incurs extra overhead in every
-floating point comparison, therefore the default is set to
+floating-point comparison, therefore the default is set to
@option{-ffinite-math-only}.
@item -minline-ic_invalidate
This option is deprecated. It pads structures to multiple of 4 bytes,
which is incompatible with the SH ABI@.
+@item -msoft-atomic
+@opindex msoft-atomic
+Generate GNU/Linux compatible gUSA software atomic sequences for the atomic
+built-in functions. The generated atomic sequences require support from the
+interrupt / exception handling code of the system and are only suitable for
+single-core systems. They will not perform correctly on multi-core systems.
+This option is enabled by default when the target is @code{sh-*-linux*}.
+For details on the atomic built-in functions see @ref{__atomic Builtins}.
+
@item -mspace
@opindex mspace
Optimize for space instead of speed. Implied by @option{-Os}.
inv:call2, inv:fp .
"fp" performs the operation in floating point. This has a very high latency,
but needs only a few instructions, so it might be a good choice if
-your code has enough easily exploitable ILP to allow the compiler to
-schedule the floating point instructions together with other instructions.
-Division by zero causes a floating point exception.
+your code has enough easily-exploitable ILP to allow the compiler to
+schedule the floating-point instructions together with other instructions.
+Division by zero causes a floating-point exception.
"inv" uses integer operations to calculate the inverse of the divisor,
and then multiplies the dividend with the inverse. This strategy allows
cse and hoisting of the inverse calculation. Division by zero calculates
@item -mdivsi3_libfunc=@var{name}
@opindex mdivsi3_libfunc=@var{name}
-Set the name of the library function used for 32 bit signed division to
+Set the name of the library function used for 32-bit signed division to
@var{name}. This only affect the name used in the call and inv:call
division strategies, and the compiler will still expect the same
sets of input/output/clobbered registers as if this option was not present.
@item -mindexed-addressing
@opindex mindexed-addressing
Enable the use of the indexed addressing mode for SHmedia32/SHcompact.
-This is only safe if the hardware and/or OS implement 32 bit wrap-around
+This is only safe if the hardware and/or OS implement 32-bit wrap-around
semantics for the indexed addressing mode. The architecture allows the
-implementation of processors with 64 bit MMU, which the OS could use to
-get 32 bit addressing, but since no current hardware implementation supports
+implementation of processors with 64-bit MMU, which the OS could use to
+get 32-bit addressing, but since no current hardware implementation supports
this or any other way to make the indexed addressing mode safe to use in
-the 32 bit ABI, the default is -mno-indexed-addressing.
+the 32-bit ABI, the default is @option{-mno-indexed-addressing}.
@item -mgettrcost=@var{number}
@opindex mgettrcost=@var{number}
This option is only meaningful when @option{-mno-pt-fixed} is in effect.
It will then prevent cross-basic-block cse, hoisting and most scheduling
of symbol loads. The default is @option{-mno-invalid-symbols}.
+
+@item -mbranch-cost=@var{num}
+@opindex mbranch-cost=@var{num}
+Assume @var{num} to be the cost for a branch instruction. Higher numbers
+will make the compiler try to generate more branch-free code if possible.
+If not specified the value is selected depending on the processor type that
+is being compiled for.
+
+@item -mcbranchdi
+@opindex mcbranchdi
+Enable the @code{cbranchdi4} instruction pattern.
+
+@item -mcmpeqdi
+@opindex mcmpeqdi
+Emit the @code{cmpeqdi_t} instruction pattern even when @option{-mcbranchdi}
+is in effect.
+
+@item -mfused-madd
+@opindex mfused-madd
+Allow the usage of the @code{fmac} instruction (floating-point
+multiply-accumulate) if the processor type supports it. Enabling this
+option might generate code that produces different numeric floating-point
+results compared to strict IEEE 754 arithmetic.
+
+@item -mpretend-cmove
+@opindex mpretend-cmove
+Prefer zero-displacement conditional branches for conditional move instruction
+patterns. This can result in faster code on the SH4 processor.
+
@end table
@node Solaris 2 Options
@itemx -mhard-float
@opindex mfpu
@opindex mhard-float
-Generate output containing floating point instructions. This is the
+Generate output containing floating-point instructions. This is the
default.
@item -mno-fpu
used, but this cannot be done directly in cross-compilation. You must make
your own arrangements to provide suitable library functions for
cross-compilation. The embedded targets @samp{sparc-*-aout} and
-@samp{sparclite-*-*} do provide software floating point support.
+@samp{sparclite-*-*} do provide software floating-point support.
@option{-msoft-float} changes the calling convention in the output file;
therefore, it is only useful if you compile @emph{all} of a program with
@item -mhard-quad-float
@opindex mhard-quad-float
-Generate output containing quad-word (long double) floating point
+Generate output containing quad-word (long double) floating-point
instructions.
@item -msoft-quad-float
@opindex msoft-quad-float
Generate output containing library calls for quad-word (long double)
-floating point instructions. The functions called are those specified
+floating-point instructions. The functions called are those specified
in the SPARC ABI@. This is the default.
As of this writing, there are no SPARC implementations that have hardware
-support for the quad-word floating point instructions. They all invoke
+support for the quad-word floating-point instructions. They all invoke
a trap handler for one of these instructions, and then the trap handler
emulates the effect of the instruction. Because of the trap handler overhead,
this is much slower than calling the ABI library routines. Thus the
@itemx -munaligned-doubles
@opindex mno-unaligned-doubles
@opindex munaligned-doubles
-Assume that doubles have 8 byte alignment. This is the default.
+Assume that doubles have 8-byte alignment. This is the default.
-With @option{-munaligned-doubles}, GCC assumes that doubles have 8 byte
+With @option{-munaligned-doubles}, GCC assumes that doubles have 8-byte
alignment only if they are contained in another type, or if they have an
-absolute address. Otherwise, it assumes they have 4 byte alignment.
+absolute address. Otherwise, it assumes they have 4-byte alignment.
Specifying this option avoids some rare compatibility problems with code
generated by other compilers. It is not the default because it results
-in a performance loss, especially for floating point code.
+in a performance loss, especially for floating-point code.
@item -mno-faster-structs
@itemx -mfaster-structs
@opindex mno-faster-structs
@opindex mfaster-structs
With @option{-mfaster-structs}, the compiler assumes that structures
-should have 8 byte alignment. This enables the use of pairs of
+should have 8-byte alignment. This enables the use of pairs of
@code{ldd} and @code{std} instructions for copies in structure
assignment, in place of twice as many @code{ld} and @code{st} pairs.
However, the use of this changed alignment directly violates the SPARC
@samp{v7}, @samp{cypress}, @samp{v8}, @samp{supersparc}, @samp{hypersparc},
@samp{leon}, @samp{sparclite}, @samp{f930}, @samp{f934}, @samp{sparclite86x},
@samp{sparclet}, @samp{tsc701}, @samp{v9}, @samp{ultrasparc},
-@samp{ultrasparc3}, @samp{niagara} and @samp{niagara2}.
+@samp{ultrasparc3}, @samp{niagara}, @samp{niagara2}, @samp{niagara3},
+and @samp{niagara4}.
+
+Native Solaris and GNU/Linux toolchains also support the value @samp{native},
+which selects the best architecture option for the host processor.
+@option{-mcpu=native} has no effect if GCC does not recognize
+the processor.
Default instruction scheduling parameters are used for values that select
an architecture and not an implementation. These are @samp{v7}, @samp{v8},
Here is a list of each supported architecture and their supported
implementations.
-@smallexample
- v7: cypress
- v8: supersparc, hypersparc, leon
- sparclite: f930, f934, sparclite86x
- sparclet: tsc701
- v9: ultrasparc, ultrasparc3, niagara, niagara2
-@end smallexample
+@table @asis
+@item v7
+cypress
+
+@item v8
+supersparc, hypersparc, leon
+
+@item sparclite
+f930, f934, sparclite86x
+
+@item sparclet
+tsc701
+
+@item v9
+ultrasparc, ultrasparc3, niagara, niagara2, niagara3, niagara4
+@end table
By default (unless configured otherwise), GCC generates code for the V7
variant of the SPARC architecture. With @option{-mcpu=cypress}, the compiler
Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips. With
@option{-mcpu=niagara}, the compiler additionally optimizes it for
Sun UltraSPARC T1 chips. With @option{-mcpu=niagara2}, the compiler
-additionally optimizes it for Sun UltraSPARC T2 chips.
+additionally optimizes it for Sun UltraSPARC T2 chips. With
+@option{-mcpu=niagara3}, the compiler additionally optimizes it for Sun
+UltraSPARC T3 chips. With @option{-mcpu=niagara4}, the compiler
+additionally optimizes it for Sun UltraSPARC T4 chips.
@item -mtune=@var{cpu_type}
@opindex mtune
that select a particular CPU implementation. Those are @samp{cypress},
@samp{supersparc}, @samp{hypersparc}, @samp{leon}, @samp{f930}, @samp{f934},
@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, @samp{ultrasparc3},
-@samp{niagara}, and @samp{niagara2}.
+@samp{niagara}, @samp{niagara2}, @samp{niagara3} and @samp{niagara4}. With
+native Solaris and GNU/Linux toolchains, @samp{native} can also be used.
@item -mv8plus
@itemx -mno-v8plus
@opindex mno-v8plus
With @option{-mv8plus}, GCC generates code for the SPARC-V8+ ABI@. The
difference from the V8 ABI is that the global and out registers are
-considered 64-bit wide. This is enabled by default on Solaris in 32-bit
+considered 64 bits wide. This is enabled by default on Solaris in 32-bit
mode for all SPARC-V9 processors.
@item -mvis
@opindex mno-vis
With @option{-mvis}, GCC generates code that takes advantage of the UltraSPARC
Visual Instruction Set extensions. The default is @option{-mno-vis}.
+
+@item -mvis2
+@itemx -mno-vis2
+@opindex mvis2
+@opindex mno-vis2
+With @option{-mvis2}, GCC generates code that takes advantage of
+version 2.0 of the UltraSPARC Visual Instruction Set extensions. The
+default is @option{-mvis2} when targetting a cpu that supports such
+instructions, such as UltraSPARC-III and later. Setting @option{-mvis2}
+also sets @option{-mvis}.
+
+@item -mvis3
+@itemx -mno-vis3
+@opindex mvis3
+@opindex mno-vis3
+With @option{-mvis3}, GCC generates code that takes advantage of
+version 3.0 of the UltraSPARC Visual Instruction Set extensions. The
+default is @option{-mvis3} when targetting a cpu that supports such
+instructions, such as niagara-3 and later. Setting @option{-mvis3}
+also sets @option{-mvis2} and @option{-mvis}.
+
+@item -mpopc
+@itemx -mno-popc
+@opindex mpopc
+@opindex mno-popc
+With @option{-mpopc}, GCC generates code that takes advantage of the UltraSPARC
+population count instruction. The default is @option{-mpopc}
+when targetting a cpu that supports such instructions, such as Niagara-2 and
+later.
+
+@item -mfmaf
+@itemx -mno-fmaf
+@opindex mfmaf
+@opindex mno-fmaf
+With @option{-mfmaf}, GCC generates code that takes advantage of the UltraSPARC
+Fused Multiply-Add Floating-point extensions. The default is @option{-mfmaf}
+when targetting a cpu that supports such instructions, such as Niagara-3 and
+later.
+
+@item -mfix-at697f
+@opindex mfix-at697f
+Enable the documented workaround for the single erratum of the Atmel AT697F
+processor (which corresponds to erratum #13 of the AT697E processor).
@end table
These @samp{-m} options are supported in addition to the above
The 64-bit environment sets int to 32 bits and long and pointer
to 64 bits.
-@item -mcmodel=medlow
-@opindex mcmodel=medlow
-Generate code for the Medium/Low code model: 64-bit addresses, programs
+@item -mcmodel=@var{which}
+@opindex mcmodel
+Set the code model to one of
+
+@table @samp
+@item medlow
+The Medium/Low code model: 64-bit addresses, programs
must be linked in the low 32 bits of memory. Programs can be statically
or dynamically linked.
-@item -mcmodel=medmid
-@opindex mcmodel=medmid
-Generate code for the Medium/Middle code model: 64-bit addresses, programs
+@item medmid
+The Medium/Middle code model: 64-bit addresses, programs
must be linked in the low 44 bits of memory, the text and data segments must
be less than 2GB in size and the data segment must be located within 2GB of
the text segment.
-@item -mcmodel=medany
-@opindex mcmodel=medany
-Generate code for the Medium/Anywhere code model: 64-bit addresses, programs
+@item medany
+The Medium/Anywhere code model: 64-bit addresses, programs
may be linked anywhere in memory, the text and data segments must be less
than 2GB in size and the data segment must be located within 2GB of the
text segment.
-@item -mcmodel=embmedany
-@opindex mcmodel=embmedany
-Generate code for the Medium/Anywhere code model for embedded systems:
+@item embmedany
+The Medium/Anywhere code model for embedded systems:
64-bit addresses, the text and data segments must be less than 2GB in
size, both starting anywhere in memory (determined at link time). The
global register %g4 points to the base of the data segment. Programs
are statically linked and PIC is not supported.
+@end table
+
+@item -mmemory-model=@var{mem-model}
+@opindex mmemory-model
+Set the memory model in force on the processor to one of
+
+@table @samp
+@item default
+The default memory model for the processor and operating system.
+
+@item rmo
+Relaxed Memory Order
+
+@item pso
+Partial Store Order
+
+@item tso
+Total Store Order
+
+@item sc
+Sequential Consistency
+@end table
+
+These memory models are formally defined in Appendix D of the Sparc V9
+architecture manual, as set in the processor's @code{PSTATE.MM} field.
@item -mstack-bias
@itemx -mno-stack-bias
@opindex msafe-dma
@opindex munsafe-dma
-Instructions which initiate or test completion of DMA must not be
-reordered with respect to loads and stores of the memory which is being
+Instructions that initiate or test completion of DMA must not be
+reordered with respect to loads and stores of the memory that is being
accessed. Users typically address this problem using the volatile
keyword, but that can lead to inefficient code in places where the
memory is known to not change. Rather than mark the memory as volatile
By default, GCC generates code assuming that addresses are never larger
than 18 bits. With @option{-mlarge-mem} code is generated that assumes
-a full 32 bit address.
+a full 32-bit address.
@item -mstdmain
@opindex mstdmain
@item -msafe-hints
@opindex msafe-hints
-Work around a hardware bug which causes the SPU to stall indefinitely.
+Work around a hardware bug that causes the SPU to stall indefinitely.
By default, GCC will insert the @code{hbrp} instruction to make sure
this stall won't happen.
@c the generic assembler that comes with Solaris takes just -Ym.
@end table
+@node TILE-Gx Options
+@subsection TILE-Gx Options
+@cindex TILE-Gx options
+
+These @samp{-m} options are supported on the TILE-Gx:
+
+@table @gcctabopt
+@item -mcpu=@var{name}
+@opindex mcpu
+Selects the type of CPU to be targeted. Currently the only supported
+type is @samp{tilegx}.
+
+@item -m32
+@itemx -m64
+@opindex m32
+@opindex m64
+Generate code for a 32-bit or 64-bit environment. The 32-bit
+environment sets int, long, and pointer to 32 bits. The 64-bit
+environment sets int to 32 bits and long and pointer to 64 bits.
+@end table
+
+@node TILEPro Options
+@subsection TILEPro Options
+@cindex TILEPro options
+
+These @samp{-m} options are supported on the TILEPro:
+
+@table @gcctabopt
+@item -mcpu=@var{name}
+@opindex mcpu
+Selects the type of CPU to be targeted. Currently the only supported
+type is @samp{tilepro}.
+
+@item -m32
+@opindex m32
+Generate code for a 32-bit environment, which sets int, long, and
+pointer to 32 bits. This is the only supported behavior so the flag
+is essentially ignored.
+@end table
+
@node V850 Options
@subsection V850 Options
@cindex V850 Options
@item -mg
@opindex mg
-Output code for g-format floating point numbers instead of d-format.
+Output code for G-format floating-point numbers instead of D-format.
@end table
@node VxWorks Options
Most of them have both positive and negative forms; the negative form
of @option{-ffoo} would be @option{-fno-foo}. In the table below, only
-one of the forms is listed---the one which is not the default. You
+one of the forms is listed---the one that is not the default. You
can figure out the other form by either removing @samp{no-} or adding
it.
@table @gcctabopt
@item -fbounds-check
@opindex fbounds-check
-For front-ends that support it, generate additional code to check that
+For front ends that support it, generate additional code to check that
indices used to access arrays are within the declared range. This is
-currently only supported by the Java and Fortran front-ends, where
+currently only supported by the Java and Fortran front ends, where
this option defaults to true and false respectively.
@item -ftrapv
overflow of addition, subtraction and multiplication wraps around
using twos-complement representation. This flag enables some optimizations
and disables others. This option is enabled by default for the Java
-front-end, as required by the Java language specification.
+front end, as required by the Java language specification.
@item -fexceptions
@opindex fexceptions
unwind information for all functions, which can produce significant data
size overhead, although it does not affect execution. If you do not
specify this option, GCC will enable it by default for languages like
-C++ which normally require exception handling, and disable it for
+C++ that normally require exception handling, and disable it for
languages like C that do not normally require it. However, you may need
to enable this option when compiling C code that needs to interoperate
properly with exception handlers written in C++. You may also wish to
Generate code that allows trapping instructions to throw exceptions.
Note that this requires platform-specific runtime support that does
not exist everywhere. Moreover, it only allows @emph{trapping}
-instructions to throw exceptions, i.e.@: memory references or floating
-point instructions. It does not allow exceptions to be thrown from
+instructions to throw exceptions, i.e.@: memory references or floating-point
+instructions. It does not allow exceptions to be thrown from
arbitrary signal handlers such as @code{SIGALRM}.
@item -funwind-tables
@opindex fshort-enums
Allocate to an @code{enum} type only as many bytes as it needs for the
declared range of possible values. Specifically, the @code{enum} type
-will be equivalent to the smallest integer type which has enough room.
+will be equivalent to the smallest integer type that has enough room.
@strong{Warning:} the @option{-fshort-enums} switch causes GCC to generate
code that is not binary compatible with code generated without that switch.
In this case, you must compile with @option{-fcommon} instead.
Compiling with @option{-fno-common} is useful on targets for which
it provides better performance, or if you wish to verify that the
-program will work on other systems which always treat uninitialized
+program will work on other systems that always treat uninitialized
variable declarations this way.
@item -fno-ident
switch is related to the @option{-fverbose-asm} switch, but that
switch only records information in the assembler output file as
comments, so it never reaches the object file.
+See also @option{-grecord-gcc-switches} for another
+way of storing compiler options into the object file.
@item -fpic
@opindex fpic
Do not use jump tables for switch statements even where it would be
more efficient than other code generation strategies. This option is
of use in conjunction with @option{-fpic} or @option{-fPIC} for
-building code which forms part of a dynamic linker and cannot
+building code that forms part of a dynamic linker and cannot
reference the address of a jump table. On some targets, jump tables
do not require a GOT and this option is not needed.
overflow if the program is unable to allocate any more memory. This
is most useful when running threaded programs, as it is no longer
necessary to calculate a good stack size to use for each thread. This
-is currently only implemented for the i386 and x86_64 backends running
+is currently only implemented for the i386 and x86_64 back ends running
GNU/Linux.
When code compiled with @option{-fsplit-stack} calls code compiled
@item -fstrict-volatile-bitfields
@opindex fstrict-volatile-bitfields
-This option should be used if accesses to volatile bitfields (or other
+This option should be used if accesses to volatile bit-fields (or other
structure fields, although the compiler usually honors those types
anyway) should use a single access of the width of the
field's type, aligned to a natural alignment if possible. For
example, targets with memory-mapped peripheral registers might require
all such accesses to be 16 bits wide; with this flag the user could
-declare all peripheral bitfields as ``unsigned short'' (assuming short
-is 16 bits on these targets) to force GCC to use 16 bit accesses
-instead of, perhaps, a more efficient 32 bit access.
+declare all peripheral bit-fields as ``unsigned short'' (assuming short
+is 16 bits on these targets) to force GCC to use 16-bit accesses
+instead of, perhaps, a more efficient 32-bit access.
If this option is disabled, the compiler will use the most efficient
instruction. In the previous example, that might be a 32-bit load
instruction, even though that will access bytes that do not contain
-any portion of the bitfield, or memory-mapped registers unrelated to
+any portion of the bit-field, or memory-mapped registers unrelated to
the one being updated.
If the target requires strict alignment, and honoring the field
@findex LC_ALL
@cindex locale
These environment variables control the way that GCC uses
-localization information that allow GCC to work with different
+localization information which allows GCC to work with different
national conventions. GCC inspects the locale categories
@env{LC_CTYPE} and @env{LC_MESSAGES} if it has been configured to do
so. These locale categories can be set to any value supported by your
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