@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-@c 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
+@c 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
@ignore
@c man begin COPYRIGHT
Copyright @copyright{} 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
-1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
+1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
Permission is granted to copy, distribute and/or modify this document
under the terms of the GNU Free Documentation License, Version 1.2 or
@table @emph
@item Overall Options
@xref{Overall Options,,Options Controlling the Kind of Output}.
-@gccoptlist{-c -S -E -o @var{file} -pipe -pass-exit-codes @gol
+@gccoptlist{-c -S -E -o @var{file} -combine -pipe -pass-exit-codes @gol
-x @var{language} -v -### --help --target-help --version}
@item C Language Options
-trigraphs -no-integrated-cpp -traditional -traditional-cpp @gol
-fallow-single-precision -fcond-mismatch @gol
-fsigned-bitfields -fsigned-char @gol
--funsigned-bitfields -funsigned-char @gol
--fwritable-strings}
+-funsigned-bitfields -funsigned-char}
@item C++ Language Options
@xref{C++ Dialect Options,,Options Controlling C++ Dialect}.
@gccoptlist{-fabi-version=@var{n} -fno-access-control -fcheck-new @gol
-fconserve-space -fno-const-strings @gol
-fno-elide-constructors @gol
--fno-enforce-eh-specs -fexternal-templates @gol
--falt-external-templates @gol
+-fno-enforce-eh-specs @gol
-ffor-scope -fno-for-scope -fno-gnu-keywords @gol
-fno-implicit-templates @gol
-fno-implicit-inline-templates @gol
-Werror -Werror-implicit-function-declaration @gol
-Wfloat-equal -Wformat -Wformat=2 @gol
-Wno-format-extra-args -Wformat-nonliteral @gol
--Wformat-security -Wno-format-y2k @gol
+-Wformat-security -Wformat-y2k @gol
-Wimplicit -Wimplicit-function-declaration -Wimplicit-int @gol
-Wimport -Wno-import -Winit-self -Winline @gol
-Wno-invalid-offsetof -Winvalid-pch @gol
-Wno-multichar -Wnonnull -Wpacked -Wpadded @gol
-Wparentheses -Wpointer-arith -Wredundant-decls @gol
-Wreturn-type -Wsequence-point -Wshadow @gol
--Wsign-compare -Wstrict-aliasing @gol
+-Wsign-compare -Wstrict-aliasing -Wstrict-aliasing=2 @gol
-Wswitch -Wswitch-default -Wswitch-enum @gol
-Wsystem-headers -Wtrigraphs -Wundef -Wuninitialized @gol
-Wunknown-pragmas -Wunreachable-code @gol
-Wunused -Wunused-function -Wunused-label -Wunused-parameter @gol
--Wunused-value -Wunused-variable -Wwrite-strings}
+-Wunused-value -Wunused-variable -Wwrite-strings @gol
+-Wvariadic-macros}
@item C-only Warning Options
@gccoptlist{-Wbad-function-cast -Wmissing-declarations @gol
-feliminate-dwarf2-dups -feliminate-unused-debug-types @gol
-feliminate-unused-debug-symbols -fmem-report -fprofile-arcs @gol
-frandom-seed=@var{string} -fsched-verbose=@var{n} @gol
--ftest-coverage -ftime-report @gol
--g -g@var{level} -gcoff -gdwarf -gdwarf-1 -gdwarf-1+ -gdwarf-2 @gol
+-ftest-coverage -ftime-report -fvar-tracking @gol
+-g -g@var{level} -gcoff -gdwarf-2 @gol
-ggdb -gstabs -gstabs+ -gvms -gxcoff -gxcoff+ @gol
-p -pg -print-file-name=@var{library} -print-libgcc-file-name @gol
-print-multi-directory -print-multi-lib @gol
@gccoptlist{-falign-functions=@var{n} -falign-jumps=@var{n} @gol
-falign-labels=@var{n} -falign-loops=@var{n} @gol
-fbranch-probabilities -fprofile-values -fvpt -fbranch-target-load-optimize @gol
--fbranch-target-load-optimize2 -fcaller-saves -fcprop-registers @gol
+-fbranch-target-load-optimize2 -fbtr-bb-exclusive @gol
+-fcaller-saves -fcprop-registers @gol
-fcse-follow-jumps -fcse-skip-blocks -fdata-sections @gol
-fdelayed-branch -fdelete-null-pointer-checks @gol
-fexpensive-optimizations -ffast-math -ffloat-store @gol
-fno-trapping-math -fno-zero-initialized-in-bss @gol
-fomit-frame-pointer -foptimize-register-move @gol
-foptimize-sibling-calls -fprefetch-loop-arrays @gol
+-fprofile-generate -fprofile-use @gol
-freduce-all-givs -fregmove -frename-registers @gol
--freorder-blocks -freorder-functions @gol
+-freorder-blocks -freorder-blocks-and-partition -freorder-functions @gol
-frerun-cse-after-loop -frerun-loop-opt @gol
-frounding-math -fschedule-insns -fschedule-insns2 @gol
-fno-sched-interblock -fno-sched-spec -fsched-spec-load @gol
-fsched-stalled-insns=@var{n} -sched-stalled-insns-dep=@var{n} @gol
-fsched2-use-superblocks @gol
-fsched2-use-traces -fsignaling-nans @gol
--fsingle-precision-constant -fssa -fssa-ccp -fssa-dce @gol
+-fsingle-precision-constant @gol
-fstrength-reduce -fstrict-aliasing -ftracer -fthread-jumps @gol
-funroll-all-loops -funroll-loops -fpeel-loops @gol
-funswitch-loops -fold-unroll-loops -fold-unroll-all-loops @gol
@gccoptlist{-m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040 @gol
-m68060 -mcpu32 -m5200 -m68881 -mbitfield -mc68000 -mc68020 @gol
-mnobitfield -mrtd -mshort -msoft-float -mpcrel @gol
--malign-int -mstrict-align}
+-malign-int -mstrict-align -msep-data -mno-sep-data @gol
+-mshared-library-id=n -mid-shared-library -mno-id-shared-library}
@emph{M68hc1x Options}
@gccoptlist{-m6811 -m6812 -m68hc11 -m68hc12 -m68hcs12 @gol
@gccoptlist{-mcpu=@var{cpu-type} @gol
-mtune=@var{cpu-type} @gol
-mcmodel=@var{code-model} @gol
--m32 -m64 @gol
--mapp-regs -mbroken-saverestore -mcypress @gol
--mfaster-structs -mflat @gol
--mfpu -mhard-float -mhard-quad-float @gol
--mimpure-text -mlittle-endian -mlive-g0 -mno-app-regs @gol
--mno-faster-structs -mno-flat -mno-fpu @gol
--mno-impure-text -mno-stack-bias -mno-unaligned-doubles @gol
--msoft-float -msoft-quad-float -msparclite -mstack-bias @gol
--msupersparc -munaligned-doubles -mv8}
+-m32 -m64 -mapp-regs -mno-app-regs @gol
+-mfaster-structs -mno-faster-structs @gol
+-mfpu -mno-fpu -mhard-float -msoft-float @gol
+-mhard-quad-float -msoft-quad-float @gol
+-mimpure-text -mno-impure-text -mlittle-endian @gol
+-mstack-bias -mno-stack-bias @gol
+-munaligned-doubles -mno-unaligned-doubles @gol
+-mv8plus -mno-v8plus -mvis -mno-vis}
@emph{ARM Options}
@gccoptlist{-mapcs-frame -mno-apcs-frame @gol
+-mabi=@var{name} @gol
-mapcs-26 -mapcs-32 @gol
-mapcs-stack-check -mno-apcs-stack-check @gol
-mapcs-float -mno-apcs-float @gol
-msched-prolog -mno-sched-prolog @gol
-mlittle-endian -mbig-endian -mwords-little-endian @gol
-malignment-traps -mno-alignment-traps @gol
--msoft-float -mhard-float -mfpe @gol
+-mfloat-abi=@var{name} soft-float -mhard-float -mfpe @gol
-mthumb-interwork -mno-thumb-interwork @gol
--mcpu=@var{name} -march=@var{name} -mfpe=@var{name} @gol
+-mcpu=@var{name} -march=@var{name} -mfpu=@var{name} @gol
-mstructure-size-boundary=@var{n} @gol
-mabort-on-noreturn @gol
-mlong-calls -mno-long-calls @gol
-mtpcs-frame -mtpcs-leaf-frame @gol
-mcaller-super-interworking -mcallee-super-interworking}
-@emph{MN10200 Options}
-@gccoptlist{-mrelax}
-
@emph{MN10300 Options}
@gccoptlist{-mmult-bug -mno-mult-bug @gol
-mam33 -mno-am33 @gol
-mno-crt0 -mrelax}
@emph{M32R/D Options}
-@gccoptlist{-m32rx -m32r -mcode-model=@var{model-type} @gol
--msdata=@var{sdata-type} -G @var{num}}
-
-@emph{M88K Options}
-@gccoptlist{-m88000 -m88100 -m88110 -mbig-pic @gol
--mcheck-zero-division -mhandle-large-shift @gol
--midentify-revision -mno-check-zero-division @gol
--mno-ocs-debug-info -mno-ocs-frame-position @gol
--mno-optimize-arg-area -mno-serialize-volatile @gol
--mno-underscores -mocs-debug-info @gol
--mocs-frame-position -moptimize-arg-area @gol
--mserialize-volatile -mshort-data-@var{num} -msvr3 @gol
--msvr4 -mtrap-large-shift -muse-div-instruction @gol
--mversion-03.00 -mwarn-passed-structs}
+@gccoptlist{-m32r2 -m32rx -m32r @gol
+-mdebug @gol
+-malign-loops -mno-align-loops @gol
+-missue-rate=@var{number} @gol
+-mbranch-cost=@var{number} @gol
+-mmodel=@var{code-size-model-type} @gol
+-msdata=@var{sdata-type} @gol
+-mno-flush-func -mflush-func=@var{name} @gol
+-mno-flush-trap -mflush-trap=@var{number} @gol
+-G @var{num}}
@emph{RS/6000 and PowerPC Options}
@gccoptlist{-mcpu=@var{cpu-type} @gol
-unexported_symbols_list -weak_reference_mismatches @gol
-whatsloaded}
-@emph{RT Options}
-@gccoptlist{-mcall-lib-mul -mfp-arg-in-fpregs -mfp-arg-in-gregs @gol
--mfull-fp-blocks -mhc-struct-return -min-line-mul @gol
--mminimum-fp-blocks -mnohc-struct-return}
-
@emph{MIPS Options}
-@gccoptlist{-mabicalls -march=@var{cpu-type} -mtune=@var{cpu=type} @gol
--mcpu=@var{cpu-type} -membedded-data -muninit-const-in-rodata @gol
--membedded-pic -mfp32 -mfp64 -mfused-madd -mno-fused-madd @gol
--mgas -mgp32 -mgp64 -mhard-float -mint64 -mips1 @gol
--mips2 -mips3 -mips4 -mips32 -mips32r2 -mips64 @gol
--mlong64 -mlong32 -mlong-calls -mmemcpy @gol
--mmips-as -mmips-tfile -mno-abicalls -mxgot @gol
--mno-embedded-data -mno-uninit-const-in-rodata @gol
--mno-embedded-pic -mno-long-calls @gol
--mno-memcpy -mno-mips-tfile -mno-rnames @gol
--mrnames -msoft-float @gol
--m4650 -msingle-float -mmad @gol
--EL -EB -G @var{num} -nocpp @gol
--mabi=32 -mabi=n32 -mabi=64 -mabi=eabi -mabi-fake-default @gol
--mfix7000 -mfix-sb1 -mno-fix-sb1 @gol
--mno-crt0 -mflush-func=@var{func} -mno-flush-func @gol
--mbranch-likely -mno-branch-likely}
+@gccoptlist{-EL -EB -march=@var{arch} -mtune=@var{arch} @gol
+-mips1 -mips2 -mips3 -mips4 -mips32 -mips32r2 -mips64 @gol
+-mips16 -mno-mips16 -mabi=@var{abi} -mabicalls -mno-abicalls @gol
+-mxgot -mno-xgot -membedded-pic -mno-embedded-pic @gol
+-mgp32 -mgp64 -mfp32 -mfp64 -mhard-float -msoft-float @gol
+-msingle-float -mdouble-float -mint64 -mlong64 -mlong32 @gol
+-G@var{num} -membedded-data -mno-embedded-data @gol
+-muninit-const-in-rodata -mno-uninit-const-in-rodata @gol
+-msplit-addresses -mno-split-addresses @gol
+-mexplicit-relocs -mno-explicit-relocs @gol
+-mrnames -mno-rnames @gol
+-mcheck-zero-division -mno-check-zero-division @gol
+-mmemcpy -mno-memcpy -mlong-calls -mno-long-calls @gol
+-mmad -mno-mad -mfused-madd -mno-fused-madd -nocpp @gol
+-mfix-r4000 -mno-fix-r4000 -mfix-r4400 -mno-fix-r4400 @gol
+-mfix-vr4120 -mno-fix-vr4120 -mfix-sb1 -mno-fix-sb1 @gol
+-mflush-func=@var{func} -mno-flush-func @gol
+-mbranch-likely -mno-branch-likely}
@emph{i386 and x86-64 Options}
@gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol
-mno-fp-ret-in-387 -msoft-float -msvr3-shlib @gol
-mno-wide-multiply -mrtd -malign-double @gol
-mpreferred-stack-boundary=@var{num} @gol
--mmmx -msse -msse2 -mpni -m3dnow @gol
+-mmmx -msse -msse2 -msse3 -m3dnow @gol
-mthreads -mno-align-stringops -minline-all-stringops @gol
-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
-m96bit-long-double -mregparm=@var{num} -momit-leaf-frame-pointer @gol
-mschedule=@var{cpu-type} -mspace-regs -msio -mwsio @gol
-nolibdld -static -threads}
-@emph{Intel 960 Options}
-@gccoptlist{-m@var{cpu-type} -masm-compat -mclean-linkage @gol
--mcode-align -mcomplex-addr -mleaf-procedures @gol
--mic-compat -mic2.0-compat -mic3.0-compat @gol
--mintel-asm -mno-clean-linkage -mno-code-align @gol
--mno-complex-addr -mno-leaf-procedures @gol
--mno-old-align -mno-strict-align -mno-tail-call @gol
--mnumerics -mold-align -msoft-float -mstrict-align @gol
--mtail-call}
-
@emph{DEC Alpha Options}
@gccoptlist{-mno-fp-regs -msoft-float -malpha-as -mgas @gol
-mieee -mieee-with-inexact -mieee-conformant @gol
-minline-int-divide-max-throughput -mno-dwarf2-asm @gol
-mfixed-range=@var{register-range}}
-@emph{D30V Options}
-@gccoptlist{-mextmem -mextmemory -monchip -mno-asm-optimize @gol
--masm-optimize -mbranch-cost=@var{n} -mcond-exec=@var{n}}
-
@emph{S/390 and zSeries Options}
@gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol
-mhard-float -msoft-float -mbackchain -mno-backchain @gol
-metrax4 -metrax100 -mpdebug -mcc-init -mno-side-effects @gol
-mstack-align -mdata-align -mconst-align @gol
-m32-bit -m16-bit -m8-bit -mno-prologue-epilogue -mno-gotplt @gol
--melf -maout -melinux -mlinux -sim -sim2}
+-melf -maout -melinux -mlinux -sim -sim2 @gol
+-mmul-bug-workaround -mno-mul-bug-workaround}
@emph{PDP-11 Options}
@gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol
-malloc-cc -mfixed-cc -mdword -mno-dword @gol
-mdouble -mno-double @gol
-mmedia -mno-media -mmuladd -mno-muladd @gol
+-mfdpic -minline-plt -mgprel-ro -multilib-library-pic -mlinked-fp @gol
-mlibrary-pic -macc-4 -macc-8 @gol
-mpack -mno-pack -mno-eflags -mcond-move -mno-cond-move @gol
-mscc -mno-scc -mcond-exec -mno-cond-exec @gol
-fnon-call-exceptions -funwind-tables @gol
-fasynchronous-unwind-tables @gol
-finhibit-size-directive -finstrument-functions @gol
--fno-common -fno-ident -fno-gnu-linker @gol
+-fno-common -fno-ident @gol
-fpcc-struct-return -fpic -fPIC -fpie -fPIE @gol
-freg-struct-return -fshared-data -fshort-enums @gol
-fshort-double -fshort-wchar @gol
(rather than letting the compiler choose a default based on the file
name suffix). This option applies to all following input files until
the next @option{-x} option. Possible values for @var{language} are:
-@example
+@smallexample
c c-header cpp-output
c++ c++-header c++-cpp-output
objective-c objective-c-header objc-cpp-output
f77 f77-cpp-input ratfor
java
treelang
-@end example
+@end smallexample
@item -x none
Turn off any specification of a language, so that subsequent files are
sort of output is being produced, whether it be an executable file,
an object file, an assembler file or preprocessed C code.
-If you specify @option{-o} when compiling more than one input file, or
-you are producing an executable file as output, all the source files
-on the command line will be compiled at once.
-
If @option{-o} is not specified, the default is to put an executable file
in @file{a.out}, the object file for @file{@var{source}.@var{suffix}} in
@file{@var{source}.o}, its assembler file in @file{@var{source}.s}, and
the assembler is unable to read from a pipe; but the GNU assembler has
no trouble.
+@item -combine
+@opindex combine
+If you are compiling multiple source files, this option tells the driver
+to pass all the source files to the compiler at once (for those
+languages for which the compiler can handle this). This will allow
+intermodule analysis (IMA) to be performed by the compiler. Currently the only
+language for which this is supported is C. If you pass source files for
+multiple languages to the driver, using this option, the driver will invoke
+the compiler(s) that support IMA once each, passing each compiler all the
+source files appropriate for it. For those languages that do not support
+IMA this option will be ignored, and the compiler will be invoked once for
+each source file in that language. If you use this option in conjunction
+with -save-temps, the compiler will generate multiple pre-processed files
+(one for each source file), but only one (combined) .o or .s file.
+
@item --help
@opindex help
Print (on the standard output) a description of the command line options
Default, ISO C90 plus GNU extensions (including some C99 features).
@item gnu99
-@item gnu9x
+@itemx gnu9x
ISO C99 plus GNU extensions. When ISO C99 is fully implemented in GCC,
this will become the default. The name @samp{gnu9x} is deprecated.
declaration does not use either @code{signed} or @code{unsigned}. By
default, such a bit-field is signed, because this is consistent: the
basic integer types such as @code{int} are signed types.
-
-@item -fwritable-strings
-@opindex fwritable-strings
-Store string constants in the writable data segment and don't uniquize
-them. This is for compatibility with old programs which assume they can
-write into string constants.
-
-Writing into string constants is a very bad idea; ``constants'' should
-be constant.
@end table
@node C++ Dialect Options
regardless of what language your program is in. For example, you
might compile a file @code{firstClass.C} like this:
-@example
+@smallexample
g++ -g -frepo -O -c firstClass.C
-@end example
+@end smallexample
@noindent
In this example, only @option{-frepo} is an option meant
@item -fabi-version=@var{n}
@opindex fabi-version
-Use version @var{n} of the C++ ABI. Version 1 is the version of the C++
-ABI that first appeared in G++ 3.2. Version 0 will always be the
-version that conforms most closely to the C++ ABI specification.
-Therefore, the ABI obtained using version 0 will change as ABI bugs are
-fixed.
+Use version @var{n} of the C++ ABI. Version 2 is the version of the
+C++ ABI that first appeared in G++ 3.4. Version 1 is the version of
+the C++ ABI that first appeared in G++ 3.2. Version 0 will always be
+the version that conforms most closely to the C++ ABI specification.
+Therefore, the ABI obtained using version 0 will change as ABI bugs
+are fixed.
-The default is version 1.
+The default is version 2.
@item -fno-access-control
@opindex fno-access-control
Give string constants type @code{char *} instead of type @code{const
char *}. By default, G++ uses type @code{const char *} as required by
the standard. Even if you use @option{-fno-const-strings}, you cannot
-actually modify the value of a string constant, unless you also use
-@option{-fwritable-strings}.
+actually modify the value of a string constant.
This option might be removed in a future release of G++. For maximum
portability, you should structure your code so that it works with
size in production builds, much like defining @samp{NDEBUG}. The compiler
will still optimize based on the exception specifications.
-@item -fexternal-templates
-@opindex fexternal-templates
-
-Cause @samp{#pragma interface} and @samp{implementation} to apply to
-template instantiation; template instances are emitted or not according
-to the location of the template definition. @xref{Template
-Instantiation}, for more information.
-
-This option is deprecated.
-
-@item -falt-external-templates
-@opindex falt-external-templates
-Similar to @option{-fexternal-templates}, but template instances are
-emitted or not according to the place where they are first instantiated.
-@xref{Template Instantiation}, for more information.
-
-This option is deprecated.
-
@item -ffor-scope
@itemx -fno-for-scope
@opindex ffor-scope
@opindex Wabi
Warn when G++ generates code that is probably not compatible with the
vendor-neutral C++ ABI. Although an effort has been made to warn about
-all such cases, there are probably some cases that are not warned about,
+all such cases, there are probably some cases that are not warned about,
even though G++ is generating incompatible code. There may also be
cases where warnings are emitted even though the code that is generated
will be compatible.
@noindent
In this case, G++ will place @code{B::f2} into the same byte
-as@code{A::f1}; other compilers will not. You can avoid this problem
+as@code{A::f1}; other compilers will not. You can avoid this problem
by explicitly padding @code{A} so that its size is a multiple of the
byte size on your platform; that will cause G++ and other compilers to
layout @code{B} identically.
@item
Empty classes can be placed at incorrect offsets. For example:
-
+
@smallexample
struct A @{@};
@end itemize
-Also warn about violations of the following style guidelines from
+Also warn about violations of the following style guidelines from
Scott Meyers' @cite{More Effective C++} book:
@itemize @bullet
options regardless of what language your program is in. For example,
you might compile a file @code{some_class.m} like this:
-@example
+@smallexample
gcc -g -fgnu-runtime -O -c some_class.m
-@end example
+@end smallexample
@noindent
In this example, @option{-fgnu-runtime} is an option meant only for
@item -fno-nil-receivers
@opindex -fno-nil-receivers
-Assume that all Objective-C message dispatches (e.g.,
-@code{[receiver message:arg]}) in this translation unit ensure that the receiver
-is not @code{nil}. This allows for more efficient entry points in the runtime to be
-used. Currently, this option is only available in conjunction with
+Assume that all Objective-C message dispatches (e.g.,
+@code{[receiver message:arg]}) in this translation unit ensure that the receiver
+is not @code{nil}. This allows for more efficient entry points in the runtime to be
+used. Currently, this option is only available in conjunction with
the NeXT runtime on Mac OS X 10.3 and later.
@item -fobjc-exceptions
@opindex -fobjc-exceptions
-Enable syntactic support for structured exception handling in Objective-C,
-similar to what is offered by C++ and Java. Currently, this option is only
-available in conjunction with the NeXT runtime on Mac OS X 10.3 and later.
+Enable syntactic support for structured exception handling in Objective-C,
+similar to what is offered by C++ and Java. Currently, this option is only
+available in conjunction with the NeXT runtime on Mac OS X 10.3 and later.
@smallexample
@@try @{
@end smallexample
The @code{@@throw} statement may appear anywhere in an Objective-C or
-Objective-C++ program; when used inside of a @code{@@catch} block, the
-@code{@@throw} may appear without an argument (as shown above), in which case
+Objective-C++ program; when used inside of a @code{@@catch} block, the
+@code{@@throw} may appear without an argument (as shown above), in which case
the object caught by the @code{@@catch} will be rethrown.
Note that only (pointers to) Objective-C objects may be thrown and
caught using this scheme. When an object is thrown, it will be caught
by the nearest @code{@@catch} clause capable of handling objects of that type,
-analogously to how @code{catch} blocks work in C++ and Java. A
-@code{@@catch(id @dots{})} clause (as shown above) may also be provided to catch
+analogously to how @code{catch} blocks work in C++ and Java. A
+@code{@@catch(id @dots{})} clause (as shown above) may also be provided to catch
any and all Objective-C exceptions not caught by previous @code{@@catch}
clauses (if any).
@itemize @bullet
@item
-Although currently designed to be binary compatible with @code{NS_HANDLER}-style
+Although currently designed to be binary compatible with @code{NS_HANDLER}-style
idioms provided by the @code{NSException} class, the new
exceptions can only be used on Mac OS X 10.3 (Panther) and later
systems, due to additional functionality needed in the (NeXT) Objective-C
@item
As mentioned above, the new exceptions do not support handling
-types other than Objective-C objects. Furthermore, when used from
+types other than Objective-C objects. Furthermore, when used from
Objective-C++, the Objective-C exception model does not interoperate with C++
exceptions at this time. This means you cannot @code{@@throw} an exception
-from Objective-C and @code{catch} it in C++, or vice versa
+from Objective-C and @code{catch} it in C++, or vice versa
(i.e., @code{throw @dots{} @@catch}).
@end itemize
-
+
The @option{-fobjc-exceptions} switch also enables the use of synchronization
blocks for thread-safe execution:
Upon entering the @code{@@synchronized} block, a thread of execution shall
first check whether a lock has been placed on the corresponding @code{guard}
object by another thread. If it has, the current thread shall wait until
-the other thread relinquishes its lock. Once @code{guard} becomes available,
+the other thread relinquishes its lock. Once @code{guard} becomes available,
the current thread will place its own lock on it, execute the code contained in
the @code{@@synchronized} block, and finally relinquish the lock (thereby
making @code{guard} available to other threads).
Emit a special marker instructing @command{ld(1)} not to statically link in
the resulting object file, and allow @command{dyld(1)} to load it in at
run time instead. This is used in conjunction with the Fix-and-Continue
-debugging mode, where the object file in question may be recompiled and
+debugging mode, where the object file in question may be recompiled and
dynamically reloaded in the course of program execution, without the need
to restart the program itself. Currently, Fix-and-Continue functionality
-is only available in conjunction with the NeXT runtime on Mac OS X 10.3
+is only available in conjunction with the NeXT runtime on Mac OS X 10.3
and later.
@item -fzero-link
compile time) with static class references that get initialized at load time,
which improves run-time performance. Specifying the @option{-fzero-link} flag
suppresses this behavior and causes calls to @code{objc_getClass("@dots{}")}
-to be retained. This is useful in Zero-Link debugging mode, since it allows
+to be retained. This is useful in Zero-Link debugging mode, since it allows
for individual class implementations to be modified during program execution.
@item -gen-decls
@opindex Wundeclared-selector
Warn if a @code{@@selector(@dots{})} expression referring to an
undeclared selector is found. A selector is considered undeclared if no
-method with that name has been declared before the
+method with that name has been declared before the
@code{@@selector(@dots{})} expression, either explicitly in an
@code{@@interface} or @code{@@protocol} declaration, or implicitly in
an @code{@@implementation} section. This option always performs its
several functions, @option{-Wformat} also implies @option{-Wnonnull}.
@option{-Wformat} is included in @option{-Wall}. For more control over some
-aspects of format checking, the options @option{-Wno-format-y2k},
+aspects of format checking, the options @option{-Wformat-y2k},
@option{-Wno-format-extra-args}, @option{-Wno-format-zero-length},
@option{-Wformat-nonliteral}, @option{-Wformat-security}, and
@option{-Wformat=2} are available, but are not included in @option{-Wall}.
-@item -Wno-format-y2k
-@opindex Wno-format-y2k
-If @option{-Wformat} is specified, do not warn about @code{strftime}
+@item -Wformat-y2k
+@opindex Wformat-y2k
+If @option{-Wformat} is specified, also warn about @code{strftime}
formats which may yield only a two-digit year.
@item -Wno-format-extra-args
@opindex Wformat=2
Enable @option{-Wformat} plus format checks not included in
@option{-Wformat}. Currently equivalent to @samp{-Wformat
--Wformat-nonliteral -Wformat-security}.
+-Wformat-nonliteral -Wformat-security -Wformat-y2k}.
@item -Wnonnull
@opindex Wnonnull
@option{-Wnonnull} is included in @option{-Wall} and @option{-Wformat}. It
can be disabled with the @option{-Wno-nonnull} option.
-@item -Winit-self @r{(C, C++, and Objective-C only)}
+@item -Winit-self @r{(C, C++, and Objective-C only)}
@opindex Winit-self
Warn about uninitialized variables which are initialized with themselves.
Note this option can only be used with the @option{-Wuninitialized} option,
cases, but does attempt to catch the more common pitfalls. It is
included in @option{-Wall}.
+@item -Wstrict-aliasing=2
+@opindex Wstrict-aliasing=2
+This option is only active when @option{-fstrict-aliasing} is active.
+It warns about all code which might break the strict aliasing rules that the
+compiler is using for optimization. This warning catches all cases, but
+it will also give a warning for some ambiguous cases that are safe.
+
@item -Wall
@opindex Wall
All of the above @samp{-W} options combined. This enables all the
constants.) Note, these suffixes appear in macros defined in the system
headers of most modern systems, e.g.@: the @samp{_MIN}/@samp{_MAX} macros in @code{<limits.h>}.
Use of these macros in user code might normally lead to spurious
-warnings, however gcc's integrated preprocessor has enough context to
+warnings, however GCC's integrated preprocessor has enough context to
avoid warning in these cases.
@item
because these ISO C features will appear in your code when using
libiberty's traditional C compatibility macros, @code{PARAMS} and
@code{VPARAMS}. This warning is also bypassed for nested functions
-because that feature is already a gcc extension and thus not relevant to
+because that feature is already a GCC extension and thus not relevant to
traditional C compatibility.
@end itemize
@opindex Winline
Warn if a function can not be inlined and it was declared as inline.
Even with this option, the compiler will not warn about failures to
-inline functions declared in system headers.
+inline functions declared in system headers.
The compiler uses a variety of heuristics to determine whether or not
to inline a function. For example, the compiler takes into account
@option{-Wlong-long} and @option{-Wno-long-long} are taken into account
only when @option{-pedantic} flag is used.
+@item -Wvariadic-macros
+@opindex Wvariadic-macros
+@opindex Wno-variadic-macros
+Warn if variadic macros are used in pedantic ISO C90 mode, or the GNU
+alternate syntax when in pedantic ISO C99 mode. This is default.
+To inhibit the warning messages, use @option{-Wno-variadic-macros}.
+
@item -Wdisabled-optimization
@opindex Wdisabled-optimization
Warn if a requested optimization pass is disabled. This warning does
crash or
refuse to read the program. If you want to control for certain whether
to generate the extra information, use @option{-gstabs+}, @option{-gstabs},
-@option{-gxcoff+}, @option{-gxcoff}, @option{-gdwarf-1+}, @option{-gdwarf-1},
-or @option{-gvms} (see below).
+@option{-gxcoff+}, @option{-gxcoff}, or @option{-gvms} (see below).
Unlike most other C compilers, GCC allows you to use @option{-g} with
@option{-O}. The shortcuts taken by optimized code may occasionally
refuse to read the program, and may cause assemblers other than the GNU
assembler (GAS) to fail with an error.
-@item -gdwarf
-@opindex gdwarf
-Produce debugging information in DWARF version 1 format (if that is
-supported). This is the format used by SDB on most System V Release 4
-systems.
-
-This option is deprecated.
-
-@item -gdwarf+
-@opindex gdwarf+
-Produce debugging information in DWARF version 1 format (if that is
-supported), using GNU extensions understood only by the GNU debugger
-(GDB)@. The use of these extensions is likely to make other debuggers
-crash or refuse to read the program.
-
-This option is deprecated.
-
@item -gdwarf-2
@opindex gdwarf-2
Produce debugging information in DWARF version 2 format (if that is
you use @option{-g3}.
Note that in order to avoid confusion between DWARF1 debug level 2,
-and DWARF2, neither @option{-gdwarf} nor @option{-gdwarf-2} accept
-a concatenated debug level. Instead use an additional @option{-g@var{level}}
-option to change the debug level for DWARF1 or DWARF2.
+and DWARF2 @option{-gdwarf-2} does not accept a concatenated debug
+level. Instead use an additional @option{-g@var{level}} option to
+change the debug level for DWARF2.
@item -feliminate-dwarf2-dups
@opindex feliminate-dwarf2-dups
the @var{dumpname}. @var{dumpname} is generated from the name of the
output file, if explicitly specified and it is not an executable,
otherwise it is the basename of the source file. In both cases any
-suffix is removed (e.g. @file{foo.00.rtl} or @file{foo.01.sibling}).
+suffix is removed (e.g. @file{foo.01.rtl} or @file{foo.02.sibling}).
Here are the possible letters for use in @var{letters}, and their
meanings:
Annotate the assembler output with miscellaneous debugging information.
@item b
@opindex db
-Dump after computing branch probabilities, to @file{@var{file}.16.bp}.
+Dump after computing branch probabilities, to @file{@var{file}.12.bp}.
@item B
@opindex dB
-Dump after block reordering, to @file{@var{file}.32.bbro}.
+Dump after block reordering, to @file{@var{file}.31.bbro}.
@item c
@opindex dc
-Dump after instruction combination, to the file @file{@var{file}.22.combine}.
+Dump after instruction combination, to the file @file{@var{file}.20.combine}.
@item C
@opindex dC
-Dump after the first if conversion, to the file @file{@var{file}.17.ce1}.
-Also dump after the second if conversion, to the file @file{@var{file}.23.ce2}.
+Dump after the first if conversion, to the file @file{@var{file}.14.ce1}.
+Also dump after the second if conversion, to the file @file{@var{file}.21.ce2}.
@item d
@opindex dd
-Dump after branch target load optimization, to to @file{@var{file}.34.btl}.
-Also dump after delayed branch scheduling, to @file{@var{file}.37.dbr}.
+Dump after branch target load optimization, to to @file{@var{file}.32.btl}.
+Also dump after delayed branch scheduling, to @file{@var{file}.36.dbr}.
@item D
@opindex dD
Dump all macro definitions, at the end of preprocessing, in addition to
normal output.
-@item e
-@opindex de
-Dump after SSA optimizations, to @file{@var{file}.05.ssa} and
-@file{@var{file}.010.ussa}.
@item E
@opindex dE
-Dump after the second if conversion, to @file{@var{file}.33.ce3}.
+Dump after the third if conversion, to @file{@var{file}.30.ce3}.
@item f
@opindex df
-Dump after control and data flow analysis, to @file{@var{file}.15.cfg}.
-Also dump after life analysis, to @file{@var{file}.21.life}.
+Dump after control and data flow analysis, to @file{@var{file}.11.cfg}.
+Also dump after life analysis, to @file{@var{file}.19.life}.
@item F
@opindex dF
-Dump after purging @code{ADDRESSOF} codes, to @file{@var{file}.11.addressof}.
+Dump after purging @code{ADDRESSOF} codes, to @file{@var{file}.07.addressof}.
@item g
@opindex dg
-Dump after global register allocation, to @file{@var{file}.27.greg}.
+Dump after global register allocation, to @file{@var{file}.25.greg}.
@item G
@opindex dG
-Dump after GCSE, to @file{@var{file}.12.gcse}.
+Dump after GCSE, to @file{@var{file}.08.gcse}.
Also dump after jump bypassing and control flow optimizations, to
-@file{@var{file}.14.bypass}.
+@file{@var{file}.10.bypass}.
@item h
@opindex dh
Dump after finalization of EH handling code, to @file{@var{file}.03.eh}.
Dump after the first jump optimization, to @file{@var{file}.04.jump}.
@item k
@opindex dk
-Dump after conversion from registers to stack, to @file{@var{file}.36.stack}.
+Dump after conversion from registers to stack, to @file{@var{file}.34.stack}.
@item l
@opindex dl
-Dump after local register allocation, to @file{@var{file}.26.lreg}.
+Dump after local register allocation, to @file{@var{file}.24.lreg}.
@item L
@opindex dL
-Dump after loop optimization passes, to @file{@var{file}.13.loop} and
-@file{@var{file}.19.loop2}.
+Dump after loop optimization passes, to @file{@var{file}.09.loop} and
+@file{@var{file}.16.loop2}.
@item M
@opindex dM
Dump after performing the machine dependent reorganization pass, to
-@file{@var{file}.37.mach}.
+@file{@var{file}.35.mach}.
@item n
@opindex dn
-Dump after register renumbering, to @file{@var{file}.31.rnreg}.
+Dump after register renumbering, to @file{@var{file}.29.rnreg}.
@item N
@opindex dN
-Dump after the register move pass, to @file{@var{file}.24.regmove}.
+Dump after the register move pass, to @file{@var{file}.22.regmove}.
@item o
@opindex do
-Dump after post-reload optimizations, to @file{@var{file}.28.postreload}.
+Dump after post-reload optimizations, to @file{@var{file}.26.postreload}.
@item r
@opindex dr
Dump after RTL generation, to @file{@var{file}.01.rtl}.
@item R
@opindex dR
-Dump after the second scheduling pass, to @file{@var{file}.35.sched2}.
+Dump after the second scheduling pass, to @file{@var{file}.33.sched2}.
@item s
@opindex ds
Dump after CSE (including the jump optimization that sometimes follows
-CSE), to @file{@var{file}.019.cse}.
+CSE), to @file{@var{file}.06.cse}.
@item S
@opindex dS
-Dump after the first scheduling pass, to @file{@var{file}.25.sched}.
+Dump after the first scheduling pass, to @file{@var{file}.23.sched}.
@item t
@opindex dt
Dump after the second CSE pass (including the jump optimization that
-sometimes follows CSE), to @file{@var{file}.20.cse2}.
+sometimes follows CSE), to @file{@var{file}.18.cse2}.
@item T
@opindex dT
-Dump after running tracer, to @file{@var{file}.18.tracer}.
+Dump after running tracer, to @file{@var{file}.15.tracer}.
@item u
@opindex du
-Dump after null pointer elimination pass to @file{@var{file}.018.null}.
+Dump after null pointer elimination pass to @file{@var{file}.05.null}.
@item U
@opindex dU
Dump callgraph and unit-at-a-time optimization @file{@var{file}.00.unit}.
+@item V
+@opindex dV
+Dump after the value profile transformations, to @file{@var{file}.13.vpt}.
+Also dump after variable tracking, to @file{@var{file}.35.vartrack}.
@item w
@opindex dw
-Dump after the second flow pass, to @file{@var{file}.29.flow2}.
-@item W
-@opindex dW
-Dump after SSA conditional constant propagation, to
-@file{@var{file}.06.ssaccp}.
-@item X
-@opindex dX
-Dump after SSA dead code elimination, to @file{@var{file}.07.ssadce}.
+Dump after the second flow pass, to @file{@var{file}.27.flow2}.
@item z
@opindex dz
-Dump after the peephole pass, to @file{@var{file}.30.peephole2}.
+Dump after the peephole pass, to @file{@var{file}.28.peephole2}.
+@item Z
+@opindex dZ
+Dump after constructing the web, to @file{@var{file}.17.web}.
@item a
@opindex da
Produce all the dumps listed above.
time spent executing operating system routines on behalf of the program.
Both numbers are in seconds.
+@item -fvar-tracking
+@opindex fvar-tracking
+Run variable tracking pass. It computes where variables are stored at each
+position in code. Better debugging information is then generated
+(if the debugging information format supports this information).
+
+It is enabled by default when compiling with optimization (@option{-Os},
+@option{-O}, @option{-O2}, ...), debugging information (@option{-g}) and
+the debug info format supports it.
+
@item -print-file-name=@var{library}
@opindex print-file-name
Print the full absolute name of the library file @var{library} that
This is useful when you use @option{-nostdlib} or @option{-nodefaultlibs}
but you do want to link with @file{libgcc.a}. You can do
-@example
+@smallexample
gcc -nostdlib @var{files}@dots{} `gcc -print-libgcc-file-name`
-@end example
+@end smallexample
@item -print-search-dirs
@opindex print-search-dirs
Print the name of the configured installation directory and a list of
-program and library directories gcc will search---and don't do anything else.
+program and library directories @command{gcc} will search---and don't do anything else.
-This is useful when gcc prints the error message
+This is useful when @command{gcc} prints the error message
@samp{installation problem, cannot exec cpp0: No such file or directory}.
To resolve this you either need to put @file{cpp0} and the other compiler
-components where gcc expects to find them, or you can set the environment
+components where @command{gcc} expects to find them, or you can set the environment
variable @env{GCC_EXEC_PREFIX} to the directory where you installed them.
Don't forget the trailing '/'.
@xref{Environment Variables}.
the performance and/or code size at the expense of compilation time
and possibly the ability to debug the program.
-The compiler performs optimisation based on the knowledge it has of
+The compiler performs optimization based on the knowledge it has of
the program. Using the @option{-funit-at-a-time} flag will allow the
compiler to consider information gained from later functions in the
file when compiling a function. Compiling multiple files at once to a
time, without performing any optimizations that take a great deal of
compilation time.
-@option{-O} turns on the following optimization flags:
+@option{-O} turns on the following optimization flags:
@gccoptlist{-fdefer-pop @gol
-fmerge-constants @gol
-fthread-jumps @gol
-floop-optimize @gol
--fcrossjumping @gol
-fif-conversion @gol
-fif-conversion2 @gol
-fdelayed-branch @gol
-fpeephole2 @gol
-freorder-blocks -freorder-functions @gol
-fstrict-aliasing @gol
--funit-at-a-time -fweb @gol
+-funit-at-a-time @gol
-falign-functions -falign-jumps @gol
--falign-loops -falign-labels}
+-falign-loops -falign-labels @gol
+-fcrossjumping}
Please note the warning under @option{-fgcse} about
invoking @option{-O2} on programs that use computed gotos.
@option{-Os} disables the following optimization flags:
@gccoptlist{-falign-functions -falign-jumps -falign-loops @gol
--falign-labels -freorder-blocks -fprefetch-loop-arrays}
+-falign-labels -freorder-blocks -freorder-blocks-and-partition -fprefetch-loop-arrays}
If you use multiple @option{-O} options, with or without level numbers,
the last such option is the one that is effective.
@item -finline-limit=@var{n}
@opindex finline-limit
-By default, gcc limits the size of functions that can be inlined. This flag
+By default, GCC limits the size of functions that can be inlined. This flag
allows the control of this limit for functions that are explicitly marked as
inline (i.e., marked with the inline keyword or defined within the class
definition in c++). @var{n} is the size of functions that can be inlined in
Inlining is actually controlled by a number of parameters, which may be
specified individually by using @option{--param @var{name}=@var{value}}.
-The @option{-finline-limit=@var{n}} option sets some of these parameters
+The @option{-finline-limit=@var{n}} option sets some of these parameters
as follows:
@table @gcctabopt
- @item max-inline-insns
- is set to @var{n}.
@item max-inline-insns-single
is set to @var{n}/2.
@item max-inline-insns-auto
is set to @var{n}.
@end table
-Using @option{-finline-limit=600} thus results in the default settings
-for these parameters. See below for a documentation of the individual
+See below for a documentation of the individual
parameters controlling inlining.
@emph{Note:} pseudo instruction represents, in this particular context, an
@item -fnew-ra
@opindex fnew-ra
Use a graph coloring register allocator. Currently this option is meant
-for testing, so we are interested to hear about miscompilations with
-@option{-fnew-ra}.
+only for testing. Users should not specify this option, since it is not
+yet ready for production use.
@item -fno-branch-count-reg
@opindex fno-branch-count-reg
@item -fsched-stalled-insns-dep=@var{n}
@opindex fsched-stalled-insns-dep
-Define how many insn groups (cycles) will be examined for a dependency
-on a stalled insn that is candidate for premature removal from the queue
-of stalled insns. Has an effect only during the second scheduling pass,
+Define how many insn groups (cycles) will be examined for a dependency
+on a stalled insn that is candidate for premature removal from the queue
+of stalled insns. Has an effect only during the second scheduling pass,
and only if @option{-fsched-stalled-insns} is used and its value is not zero.
@item -fsched2-use-superblocks
algorithm. Superblock scheduling allows motion across basic block boundaries
resulting on faster schedules. This option is experimental, as not all machine
descriptions used by GCC model the CPU closely enough to avoid unreliable
-results from the algorithm.
+results from the algorithm.
This only makes sense when scheduling after register allocation, i.e.@: with
@option{-fschedule-insns2} or at @option{-O2} or higher.
@opindex fno-guess-branch-probability
Do not guess branch probabilities using a randomized model.
-Sometimes gcc will opt to use a randomized model to guess branch
+Sometimes GCC will opt to use a randomized model to guess branch
probabilities, when none are available from either profiling feedback
(@option{-fprofile-arcs}) or @samp{__builtin_expect}. This means that
different runs of the compiler on the same program may produce different
Enabled at levels @option{-O2}, @option{-O3}.
+@item -freorder-blocks-and-partition
+@opindex freorder-blocks-and-partition
+In addition to reordering basic blocks in the compiled function, in order
+to reduce number of taken branches, partitions hot and cold basic blocks
+into separate sections of the assembly and .o files, to improve
+paging and cache locality performance.
+
@item -freorder-functions
@opindex freorder-functions
Reorder basic blocks in the compiled function in order to reduce number of
taken branches and improve code locality. This is implemented by using special
-subsections @code{text.hot} for most frequently executed functions and
-@code{text.unlikely} for unlikely executed functions. Reordering is done by
+subsections @code{.text.hot} for most frequently executed functions and
+@code{.text.unlikely} for unlikely executed functions. Reordering is done by
the linker so object file format must support named sections and linker must
place them in a reasonable way.
type.
Pay special attention to code like this:
-@example
+@smallexample
union a_union @{
int i;
double d;
t.d = 3.0;
return t.i;
@}
-@end example
+@end smallexample
The practice of reading from a different union member than the one most
recently written to (called ``type-punning'') is common. Even with
@option{-fstrict-aliasing}, type-punning is allowed, provided the memory
is accessed through the union type. So, the code above will work as
expected. However, this code might not:
-@example
+@smallexample
int f() @{
a_union t;
int* ip;
ip = &t.i;
return *ip;
@}
-@end example
+@end smallexample
Every language that wishes to perform language-specific alias analysis
should define a function that computes, given an @code{tree}
Enabled at levels @option{-O2}, @option{-O3}.
-@item -frename-registers
-@opindex frename-registers
-Attempt to avoid false dependencies in scheduled code by making use
-of registers left over after register allocation. This optimization
-will most benefit processors with lots of registers. It can, however,
-make debugging impossible, since variables will no longer stay in
-a ``home register''.
-
@item -fweb
@opindex fweb
Constructs webs as commonly used for register allocation purposes and assign
however, make debugging impossible, since variables will no longer stay in a
``home register''.
-Enabled at levels @option{-O3}.
+Enabled at levels @option{-O2}, @option{-O3}, @option{-Os},
+on targets where the default format for debugging information supports
+variable tracking.
@item -fno-cprop-registers
@opindex fno-cprop-registers
Disabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
+@item -fprofile-generate
+@opindex fprofile-generate
+
+Enable options usually used for instrumenting application to produce
+profile useful for later recompilation with profile feedback based
+optimization. You must use @code{-fprofile-generate} both when
+compiling and when linking your program.
+
+The following options are enabled: @code{-fprofile-arcs}, @code{-fprofile-values}, @code{-fvpt}.
+
+@item -fprofile-use
+@opindex fprofile-use
+Enable profile feedback directed optimizations, and optimizations
+generally profitable only with profile feedback available.
+
+The following options are enabled: @code{-fbranch-probabilities},
+@code{-fvpt}, @code{-funroll-loops}, @code{-fpeel-loops}, @code{-ftracer}.
+
@end table
The following options control compiler behavior regarding floating
This option is experimental and does not currently guarantee to
disable all GCC optimizations that are affected by rounding mode.
-Future versions of gcc may provide finer control of this setting
+Future versions of GCC may provide finer control of this setting
using C99's @code{FENV_ACCESS} pragma. This command line option
will be used to specify the default state for @code{FENV_ACCESS}.
structure of the generated code, so you must use the same source code
and the same optimization options for both compilations.
-With @option{-fbranch-probabilities}, GCC puts a
+With @option{-fbranch-probabilities}, GCC puts a
@samp{REG_BR_PROB} note on each @samp{JUMP_INSN} and @samp{CALL_INSN}.
These can be used to improve optimization. Currently, they are only
used in one place: in @file{reorg.c}, instead of guessing which path a
from profiling values of expressions and adds @samp{REG_VALUE_PROFILE}
notes to instructions for their later usage in optimizations.
+Enabled with @option{-profile-generate} and @option{-profile-use}.
+
@item -fvpt
@opindex fvpt
If combined with @option{-fprofile-arcs}, it instructs the compiler to add
Currently the optimizations include specialization of division operation
using the knowledge about the value of the denominator.
+Enabled with @option{-profile-generate} and @option{-profile-use}.
+
+@item -frename-registers
+@opindex frename-registers
+Attempt to avoid false dependencies in scheduled code by making use
+of registers left over after register allocation. This optimization
+will most benefit processors with lots of registers. Depending on the
+debug information format adopted by the target, however, it can
+make debugging impossible, since variables will no longer stay in
+a ``home register''.
+
+Not enabled by default at any level because it has known bugs.
+
@item -fnew-ra
@opindex fnew-ra
Use a graph coloring register allocator. Currently this option is meant
simplifies the control flow of the function allowing other optimizations to do
better job.
+Enabled with @option{-profile-use}.
+
@item -funit-at-a-time
@opindex funit-at-a-time
Parse the whole compilation unit before starting to produce code.
This allows some extra optimizations to take place but consumes more
memory.
+Enabled at levels @option{-O2}, @option{-O3}.
+
@item -funroll-loops
@opindex funroll-loops
Unroll loops whose number of iterations can be determined at compile time or
(i.e. complete removal of loops with small constant number of iterations).
This option makes code larger, and may or may not make it run faster.
+Enabled with @option{-profile-use}.
+
@item -funroll-all-loops
@opindex funroll-all-loops
Unroll all loops, even if their number of iterations is uncertain when
roll much (from profile feedback). It also turns on complete loop peeling
(i.e. complete removal of loops with small constant number of iterations).
+Enabled with @option{-profile-use}.
+
@item -funswitch-loops
@opindex funswitch-loops
Move branches with loop invariant conditions out of the loop, with duplicates
recognition is based on notes from frontend. This usually makes programs run more slowly.
@option{-fold-unroll-all-loops} implies the same options as
@option{-fold-unroll-loops}.
-
-@item -funswitch-loops
-@opindex funswitch-loops
-Move branches with loop invariant conditions out of the loop, with duplicates
-of the loop on both branches (modified according to result of the condition).
-
-@item -funswitch-loops
-@opindex funswitch-loops
-Move branches with loop invariant conditions out of the loop, with duplicates
-of the loop on both branches (modified according to result of the condition).
@item -fprefetch-loop-arrays
@opindex fprefetch-loop-arrays
specify this option and you may have problems with debugging if
you specify both this option and @option{-g}.
-@item -fssa
-@opindex fssa
-Perform optimizations in static single assignment form. Each function's
-flow graph is translated into SSA form, optimizations are performed, and
-the flow graph is translated back from SSA form. Users should not
-specify this option, since it is not yet ready for production use.
-
-@item -fssa-ccp
-@opindex fssa-ccp
-Perform Sparse Conditional Constant Propagation in SSA form. Requires
-@option{-fssa}. Like @option{-fssa}, this is an experimental feature.
-
-@item -fssa-dce
-@opindex fssa-dce
-Perform aggressive dead-code elimination in SSA form. Requires @option{-fssa}.
-Like @option{-fssa}, this is an experimental feature.
-
@item -fbranch-target-load-optimize
@opindex fbranch-target-load-optimize
Perform branch target register load optimization before prologue / epilogue
Perform branch target register load optimization after prologue / epilogue
threading.
-
-
+@item -fbtr-bb-exclusive
+@opindex fbtr-bb-exclusive
+When performing branch target register load optimization, don't reuse
+branch target registers in within any basic block.
@item --param @var{name}=@var{value}
@opindex param
control some of these constants on the command-line using the
@option{--param} option.
+The names of specific parameters, and the meaning of the values, are
+tied to the internals of the compiler, and are subject to change
+without notice in future releases.
+
In each case, the @var{value} is an integer. The allowable choices for
@var{name} are given in the following table:
optimization will not be done.
@item max-gcse-passes
-The maximum number of passes of GCSE to run.
+The maximum number of passes of GCSE to run. The default is 1.
@item max-pending-list-length
The maximum number of pending dependencies scheduling will allow
@item max-inline-insns-single
Several parameters control the tree inliner used in gcc.
-This number sets the maximum number of instructions (counted in gcc's
-internal representation) in a single function that the tree inliner
+This number sets the maximum number of instructions (counted in GCC's
+internal representation) in a single function that the tree inliner
will consider for inlining. This only affects functions declared
inline and methods implemented in a class declaration (C++).
The default value is 500.
by the compiler will be investigated. To those functions, a different
(more restrictive) limit compared to functions declared inline can
be applied.
-The default value is 150.
-
-@item max-inline-insns
-The tree inliner does decrease the allowable size for single functions
-to be inlined after we already inlined the number of instructions
-given here by repeated inlining. This number should be a factor of
-two or more larger than the single function limit.
-Higher numbers result in better runtime performance, but incur higher
-compile-time resource (CPU time, memory) requirements and result in
-larger binaries. Very high values are not advisable, as too large
-binaries may adversely affect runtime performance.
-The default value is 200.
+The default value is 120.
@item large-function-insns
The limit specifying really large functions. For functions greater than this
This parameter is useful primarily to avoid extreme compilation time caused by non-linear
algorithms used by the backend.
This parameter is ignored when @option{-funit-at-a-time} is not used.
-The default value is 30000.
+The default value is 3000.
@item large-function-growth
-Specifies maximal growth of large functtion caused by inlining in percents.
+Specifies maximal growth of large function caused by inlining in percents.
This parameter is ignored when @option{-funit-at-a-time} is not used.
The default value is 200.
@item max-inline-insns-rtl
For languages that use the RTL inliner (this happens at a later stage
-than tree inlining), you can set the maximum allowable size (counted
+than tree inlining), you can set the maximum allowable size (counted
in RTL instructions) for the RTL inliner with this parameter.
The default value is 600.
-
@item max-unrolled-insns
The maximum number of instructions that a loop should have if that loop
is unrolled, and if the loop is unrolled, it determines how many times
@item max-cse-path-length
-Maximum number of basic blocks on path that cse considers.
+Maximum number of basic blocks on path that cse considers. The default is 10.
@item ggc-min-expand
this parameter and @option{ggc-min-expand} to zero causes a full
collection to occur at every opportunity.
+@item max-reload-search-insns
+The maximum number of instruction reload should look backward for equivalent
+register. Increasing values mean more aggressive optimization, making the
+compile time increase with probably slightly better performance. The default
+value is 100.
+
+@item max-cselib-memory-location
+The maximum number of memory locations cselib should take into acount.
+Increasing values mean more aggressive optimization, making the compile time
+increase with probably slightly better performance. The default value is 500.
+
@item reorder-blocks-duplicate
@itemx reorder-blocks-duplicate-feedback
feedback is available and may be set to higher values than
@option{reorder-block-duplicate} since information about the hot spots is more
accurate.
+
+@item max-sched-region-blocks
+The maximum number of blocks in a region to be considered for
+interblock scheduling. The default value is 10.
+
+@item max-sched-region-insns
+The maximum number of insns in a region to be considered for
+interblock scheduling. The default value is 100.
@end table
@end table
This way, @code{if-exists-else} can be used to select one file or another,
based on the existence of the first. Here is a small example of its usage:
-@smallexample
+@smallexample
*startfile:
crt0%O%s %:if-exists(crti%O%s) \
%:if-exists-else(crtbeginT%O%s crtbegin%O%s)
@end smallexample
-@end table
+@end table
@item %@{@code{S}@}
Substitutes the @code{-S} switch, if that switch was given to GCC@.
If @code{S} was given to GCC, substitutes @code{X}; else if @code{T} was
given to GCC, substitutes @code{Y}; else substitutes @code{D}. There can
-be as many clauses as you need. This may be combined with @code{.},
+be as many clauses as you need. This may be combined with @code{.},
@code{!}, @code{|}, and @code{*} as needed.
* VAX Options::
* SPARC Options::
* ARM Options::
-* MN10200 Options::
* MN10300 Options::
* M32R/D Options::
-* M88K Options::
* RS/6000 and PowerPC Options::
* Darwin Options::
-* RT Options::
* MIPS Options::
* i386 and x86-64 Options::
* HPPA Options::
-* Intel 960 Options::
* DEC Alpha Options::
* DEC Alpha/VMS Options::
* H8/300 Options::
* AVR Options::
* MCore Options::
* IA-64 Options::
-* D30V Options::
* S/390 and zSeries Options::
* CRIS Options::
* MMIX Options::
Do not (do) assume that unaligned memory references will be handled by
the system.
+@item -msep-data
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment. This allows for execute in place in
+an environment without virtual memory management. This option implies -fPIC.
+
+@item -mno-sep-data
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+
+@item -mid-shared-library
+Generate code that supports shared libraries via the library ID method.
+This allows for execute in place and shared libraries in an environment
+without virtual memory management. This option implies -fPIC.
+
+@item -mno-id-shared-library
+Generate code that doesn't assume ID based shared libraries are being used.
+This is the default.
+
+@item -mshared-library-id=n
+Specified the identification number of the ID based shared library being
+compiled. Specifying a value of 0 will generate more compact code, specifying
+other values will force the allocation of that number to the current
+library but is no more space or time efficient than omitting this option.
+
@end table
@node M68hc1x Options
@itemx -m68hcs12
@opindex m68S12
@opindex m68hcs12
-Generate output for a 68HCS12.
+Generate output for a 68HCS12.
@item -mauto-incdec
@opindex mauto-incdec
@subsection SPARC Options
@cindex SPARC options
-These @samp{-m} switches are supported on the SPARC:
+These @samp{-m} options are supported on the SPARC:
@table @gcctabopt
@item -mno-app-regs
floating point instructions. The functions called are those specified
in the SPARC ABI@. This is the default.
-As of this writing, there are no sparc implementations that have hardware
+As of this writing, there are no SPARC implementations that have hardware
support for the quad-word floating point instructions. They all invoke
a trap handler for one of these instructions, and then the trap handler
emulates the effect of the instruction. Because of the trap handler overhead,
this is much slower than calling the ABI library routines. Thus the
@option{-msoft-quad-float} option is the default.
-@item -mno-flat
-@itemx -mflat
-@opindex mno-flat
-@opindex mflat
-With @option{-mflat}, the compiler does not generate save/restore instructions
-and will use a ``flat'' or single register window calling convention.
-This model uses %i7 as the frame pointer and is compatible with the normal
-register window model. Code from either may be intermixed.
-The local registers and the input registers (0--5) are still treated as
-``call saved'' registers and will be saved on the stack as necessary.
-
-With @option{-mno-flat} (the default), the compiler emits save/restore
-instructions (except for leaf functions) and is the normal mode of operation.
-
@item -mno-unaligned-doubles
@itemx -munaligned-doubles
@opindex mno-unaligned-doubles
@option{-mimpure-text}, used in addition to @option{-shared}, tells
the compiler to not pass @option{-z text} to the linker when linking a
shared object. Using this option, you can link position-dependent
-code into a shared object.
+code into a shared object.
@option{-mimpure-text} suppresses the ``relocations remain against
allocatable but non-writable sections'' linker error message.
This option is only available on SunOS and Solaris.
-@item -mv8
-@itemx -msparclite
-@opindex mv8
-@opindex msparclite
-These two options select variations on the SPARC architecture.
-
-By default (unless specifically configured for the Fujitsu SPARClite),
-GCC generates code for the v7 variant of the SPARC architecture.
-
-@option{-mv8} will give you SPARC v8 code. The only difference from v7
-code is that the compiler emits the integer multiply and integer
-divide instructions which exist in SPARC v8 but not in SPARC v7.
-
-@option{-msparclite} will give you SPARClite code. This adds the integer
-multiply, integer divide step and scan (@code{ffs}) instructions which
-exist in SPARClite but not in SPARC v7.
-
-These options are deprecated and will be deleted in a future GCC release.
-They have been replaced with @option{-mcpu=xxx}.
-
-@item -mcypress
-@itemx -msupersparc
-@opindex mcypress
-@opindex msupersparc
-These two options select the processor for which the code is optimized.
-
-With @option{-mcypress} (the default), the compiler optimizes code for the
-Cypress CY7C602 chip, as used in the SPARCStation/SPARCServer 3xx series.
-This is also appropriate for the older SPARCStation 1, 2, IPX etc.
-
-With @option{-msupersparc} the compiler optimizes code for the SuperSPARC cpu, as
-used in the SPARCStation 10, 1000 and 2000 series. This flag also enables use
-of the full SPARC v8 instruction set.
-
-These options are deprecated and will be deleted in a future GCC release.
-They have been replaced with @option{-mcpu=xxx}.
-
@item -mcpu=@var{cpu_type}
@opindex mcpu
Set the instruction set, register set, and instruction scheduling parameters
for machine type @var{cpu_type}. Supported values for @var{cpu_type} are
@samp{v7}, @samp{cypress}, @samp{v8}, @samp{supersparc}, @samp{sparclite},
-@samp{hypersparc}, @samp{sparclite86x}, @samp{f930}, @samp{f934},
+@samp{f930}, @samp{f934}, @samp{hypersparc}, @samp{sparclite86x},
@samp{sparclet}, @samp{tsc701}, @samp{v9}, @samp{ultrasparc}, and
@samp{ultrasparc3}.
v9: ultrasparc, ultrasparc3
@end smallexample
+By default (unless configured otherwise), GCC generates code for the V7
+variant of the SPARC architecture. With @option{-mcpu=cypress}, the compiler
+additionally optimizes it for the Cypress CY7C602 chip, as used in the
+SPARCStation/SPARCServer 3xx series. This is also appropriate for the older
+SPARCStation 1, 2, IPX etc.
+
+With @option{-mcpu=v8}, GCC generates code for the V8 variant of the SPARC
+architecture. The only difference from V7 code is that the compiler emits
+the integer multiply and integer divide instructions which exist in SPARC-V8
+but not in SPARC-V7. With @option{-mcpu=supersparc}, the compiler additionally
+optimizes it for the SuperSPARC chip, as used in the SPARCStation 10, 1000 and
+2000 series.
+
+With @option{-mcpu=sparclite}, GCC generates code for the SPARClite variant of
+the SPARC architecture. This adds the integer multiply, integer divide step
+and scan (@code{ffs}) instructions which exist in SPARClite but not in SPARC-V7.
+With @option{-mcpu=f930}, the compiler additionally optimizes it for the
+Fujitsu MB86930 chip, which is the original SPARClite, with no FPU. With
+@option{-mcpu=f934}, the compiler additionally optimizes it for the Fujitsu
+MB86934 chip, which is the more recent SPARClite with FPU.
+
+With @option{-mcpu=sparclet}, GCC generates code for the SPARClet variant of
+the SPARC architecture. This adds the integer multiply, multiply/accumulate,
+integer divide step and scan (@code{ffs}) instructions which exist in SPARClet
+but not in SPARC-V7. With @option{-mcpu=tsc701}, the compiler additionally
+optimizes it for the TEMIC SPARClet chip.
+
+With @option{-mcpu=v9}, GCC generates code for the V9 variant of the SPARC
+architecture. This adds 64-bit integer and floating-point move instructions,
+3 additional floating-point condition code registers and conditional move
+instructions. With @option{-mcpu=ultrasparc}, the compiler additionally
+optimizes it for the Sun UltraSPARC I/II chips. With
+@option{-mcpu=ultrasparc3}, the compiler additionally optimizes it for the
+Sun UltraSPARC III chip.
+
@item -mtune=@var{cpu_type}
@opindex mtune
Set the instruction scheduling parameters for machine type
@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, and
@samp{ultrasparc3}.
+@item -mv8plus
+@itemx -mno-v8plus
+@opindex -mv8plus
+@opindex -mno-v8plus
+With @option{-mv8plus}, GCC generates code for the SPARC-V8+ ABI. The
+difference from the V8 ABI is that the global and out registers are
+considered 64-bit wide. This is enabled by default on Solaris in 32-bit
+mode for all SPARC-V9 processors.
+
+@item -mvis
+@itemx -mno-vis
+@opindex -mvis
+@opindex -mno-vis
+With @option{-mvis}, GCC generates code that takes advantage of the UltraSPARC
+Visual Instruction Set extensions. The default is @option{-mno-vis}.
@end table
-These @samp{-m} switches are supported in addition to the above
-on the SPARCLET processor.
-
-@table @gcctabopt
-@item -mlittle-endian
-@opindex mlittle-endian
-Generate code for a processor running in little-endian mode.
-
-@item -mlive-g0
-@opindex mlive-g0
-Treat register @code{%g0} as a normal register.
-GCC will continue to clobber it as necessary but will not assume
-it always reads as 0.
-
-@item -mbroken-saverestore
-@opindex mbroken-saverestore
-Generate code that does not use non-trivial forms of the @code{save} and
-@code{restore} instructions. Early versions of the SPARCLET processor do
-not correctly handle @code{save} and @code{restore} instructions used with
-arguments. They correctly handle them used without arguments. A @code{save}
-instruction used without arguments increments the current window pointer
-but does not allocate a new stack frame. It is assumed that the window
-overflow trap handler will properly handle this case as will interrupt
-handlers.
-@end table
-
-These @samp{-m} switches are supported in addition to the above
-on SPARC V9 processors in 64-bit environments.
+These @samp{-m} options are supported in addition to the above
+on SPARC-V9 processors in 64-bit environments:
@table @gcctabopt
@item -mlittle-endian
@item -mcmodel=medlow
@opindex mcmodel=medlow
-Generate code for the Medium/Low code model: the program must be linked
-in the low 32 bits of the address space. Pointers are 64 bits.
-Programs can be statically or dynamically linked.
+Generate code for the Medium/Low code model: 64-bit addresses, programs
+must be linked in the low 32 bits of memory. Programs can be statically
+or dynamically linked.
@item -mcmodel=medmid
@opindex mcmodel=medmid
-Generate code for the Medium/Middle code model: the program must be linked
-in the low 44 bits of the address space, the text segment must be less than
-2G bytes, and data segment must be within 2G of the text segment.
-Pointers are 64 bits.
+Generate code for the Medium/Middle code model: 64-bit addresses, programs
+must be linked in the low 44 bits of memory, the text and data segments must
+be less than 2GB in size and the data segment must be located within 2GB of
+the text segment.
@item -mcmodel=medany
@opindex mcmodel=medany
-Generate code for the Medium/Anywhere code model: the program may be linked
-anywhere in the address space, the text segment must be less than
-2G bytes, and data segment must be within 2G of the text segment.
-Pointers are 64 bits.
+Generate code for the Medium/Anywhere code model: 64-bit addresses, programs
+may be linked anywhere in memory, the text and data segments must be less
+than 2GB in size and the data segment must be located within 2GB of the
+text segment.
@item -mcmodel=embmedany
@opindex mcmodel=embmedany
Generate code for the Medium/Anywhere code model for embedded systems:
-assume a 32-bit text and a 32-bit data segment, both starting anywhere
-(determined at link time). Register %g4 points to the base of the
-data segment. Pointers are still 64 bits.
-Programs are statically linked, PIC is not supported.
+64-bit addresses, the text and data segments must be less than 2GB in
+size, both starting anywhere in memory (determined at link time). The
+global register %g4 points to the base of the data segment. Programs
+are statically linked and PIC is not supported.
@item -mstack-bias
@itemx -mno-stack-bias
@opindex mno-stack-bias
With @option{-mstack-bias}, GCC assumes that the stack pointer, and
frame pointer if present, are offset by @minus{}2047 which must be added back
-when making stack frame references.
+when making stack frame references. This is the default in 64-bit mode.
Otherwise, assume no such offset is present.
@end table
architectures:
@table @gcctabopt
+@item -mabi=@var{name}
+@opindex mabi
+Generate code for the specified ABI. Permissible values are: @samp{apcs-gnu},
+@samp{atpcs}, @samp{aapcs} and @samp{iwmmxt}.
+
@item -mapcs-frame
@opindex mapcs-frame
Generate a stack frame that is compliant with the ARM Procedure Call
library that comes with GCC, with @option{-msoft-float} in order for
this to work.
+@item -mfloat-abi=@var{name}
+@opindex mfloat-abi
+Specifies which ABI to use for floating point values. Permissible values
+are: @samp{soft}, @samp{softfp} and @samp{hard}.
+
+@samp{soft} and @samp{hard} are equivalent to @option{-msoft-float}
+and @option{-mhard-float} respectively. @samp{softfp} allows the generation
+of floating point instructions, but still uses the soft-float calling
+conventions.
+
@item -mlittle-endian
@opindex mlittle-endian
Generate code for a processor running in little-endian mode. This is
assembly code. This option can be used in conjunction with or instead
of the @option{-mcpu=} option. Permissible names are: @samp{armv2},
@samp{armv2a}, @samp{armv3}, @samp{armv3m}, @samp{armv4}, @samp{armv4t},
-@samp{armv5}, @samp{armv5t}, @samp{armv5te}, @samp{armv6j},
+@samp{armv5}, @samp{armv5t}, @samp{armv5te}, @samp{armv6}, @samp{armv6j},
@samp{iwmmxt}, @samp{ep9312}.
-@item -mfpe=@var{number}
+@item -mfpu=@var{name}
+@itemx -mfpe=@var{number}
@itemx -mfp=@var{number}
+@opindex mfpu
@opindex mfpe
@opindex mfp
-This specifies the version of the floating point emulation available on
-the target. Permissible values are 2 and 3. @option{-mfp=} is a synonym
-for @option{-mfpe=}, for compatibility with older versions of GCC@.
+This specifies what floating point hardware (or hardware emulation) is
+available on the target. Permissible names are: @samp{fpa}, @samp{fpe2},
+@samp{fpe3}, @samp{maverick}, @samp{vfp}. @option{-mfp} and @option{-mfpe}
+are synonyms for @option{-mfpu}=@samp{fpe}@var{number}, for compatibility
+with older versions of GCC@.
+
+If @option{-msoft-float} is specified this specifies the format of
+floating point values.
@item -mstructure-size-boundary=@var{n}
@opindex mstructure-size-boundary
The size of all structures and unions will be rounded up to a multiple
-of the number of bits set by this option. Permissible values are 8 and
-32. The default value varies for different toolchains. For the COFF
-targeted toolchain the default value is 8. Specifying the larger number
-can produce faster, more efficient code, but can also increase the size
-of the program. The two values are potentially incompatible. Code
-compiled with one value cannot necessarily expect to work with code or
-libraries compiled with the other value, if they exchange information
-using structures or unions.
+of the number of bits set by this option. Permissible values are 8, 32
+and 64. The default value varies for different toolchains. For the COFF
+targeted toolchain the default value is 8. A value of 64 is only allowed
+if the underlying ABI supports it.
+
+Specifying the larger number can produce faster, more efficient code, but
+can also increase the size of the program. Different values are potentially
+incompatible. Code compiled with one value cannot necessarily expect to
+work with code or libraries compiled with another value, if they exchange
+information using structures or unions.
@item -mabort-on-noreturn
@opindex mabort-on-noreturn
@end table
-@node MN10200 Options
-@subsection MN10200 Options
-@cindex MN10200 options
-
-These @option{-m} options are defined for Matsushita MN10200 architectures:
-@table @gcctabopt
-
-@item -mrelax
-@opindex mrelax
-Indicate to the linker that it should perform a relaxation optimization pass
-to shorten branches, calls and absolute memory addresses. This option only
-has an effect when used on the command line for the final link step.
-
-This option makes symbolic debugging impossible.
-@end table
-
@node MN10300 Options
@subsection MN10300 Options
@cindex MN10300 options
@subsection M32R/D Options
@cindex M32R/D options
-These @option{-m} options are defined for Mitsubishi M32R/D architectures:
+These @option{-m} options are defined for Renesas M32R/D architectures:
@table @gcctabopt
+@item -m32r2
+@opindex m32r2
+Generate code for the M32R/2@.
+
@item -m32rx
@opindex m32rx
Generate code for the M32R/X@.
@opindex m32r
Generate code for the M32R@. This is the default.
-@item -mcode-model=small
-@opindex mcode-model=small
+@item -mmodel=small
+@opindex mmodel=small
Assume all objects live in the lower 16MB of memory (so that their addresses
can be loaded with the @code{ld24} instruction), and assume all subroutines
are reachable with the @code{bl} instruction.
The addressability of a particular object can be set with the
@code{model} attribute.
-@item -mcode-model=medium
-@opindex mcode-model=medium
+@item -mmodel=medium
+@opindex mmodel=medium
Assume objects may be anywhere in the 32-bit address space (the compiler
will generate @code{seth/add3} instructions to load their addresses), and
assume all subroutines are reachable with the @code{bl} instruction.
-@item -mcode-model=large
-@opindex mcode-model=large
+@item -mmodel=large
+@opindex mmodel=large
Assume objects may be anywhere in the 32-bit address space (the compiler
will generate @code{seth/add3} instructions to load their addresses), and
assume subroutines may not be reachable with the @code{bl} instruction
doesn't the linker will give an error message---incorrect code will not be
generated.
-@end table
-
-@node M88K Options
-@subsection M88K Options
-@cindex M88k options
-
-These @samp{-m} options are defined for Motorola 88k architectures:
-
-@table @gcctabopt
-@item -m88000
-@opindex m88000
-Generate code that works well on both the m88100 and the
-m88110.
-
-@item -m88100
-@opindex m88100
-Generate code that works best for the m88100, but that also
-runs on the m88110.
-
-@item -m88110
-@opindex m88110
-Generate code that works best for the m88110, and may not run
-on the m88100.
-
-@item -mbig-pic
-@opindex mbig-pic
-Obsolete option to be removed from the next revision.
-Use @option{-fPIC}.
-
-@item -midentify-revision
-@opindex midentify-revision
-@cindex identifying source, compiler (88k)
-Include an @code{ident} directive in the assembler output recording the
-source file name, compiler name and version, timestamp, and compilation
-flags used.
-
-@item -mno-underscores
-@opindex mno-underscores
-@cindex underscores, avoiding (88k)
-In assembler output, emit symbol names without adding an underscore
-character at the beginning of each name. The default is to use an
-underscore as prefix on each name.
-
-@item -mocs-debug-info
-@itemx -mno-ocs-debug-info
-@opindex mocs-debug-info
-@opindex mno-ocs-debug-info
-@cindex OCS (88k)
-@cindex debugging, 88k OCS
-Include (or omit) additional debugging information (about registers used
-in each stack frame) as specified in the 88open Object Compatibility
-Standard, ``OCS''@. This extra information allows debugging of code that
-has had the frame pointer eliminated. The default for SVr4 and Delta 88
-SVr3.2 is to include this information; other 88k configurations omit this
-information by default.
-
-@item -mocs-frame-position
-@opindex mocs-frame-position
-@cindex register positions in frame (88k)
-When emitting COFF debugging information for automatic variables and
-parameters stored on the stack, use the offset from the canonical frame
-address, which is the stack pointer (register 31) on entry to the
-function. The SVr4 and Delta88 SVr3.2, and BCS configurations use
-@option{-mocs-frame-position}; other 88k configurations have the default
-@option{-mno-ocs-frame-position}.
-
-@item -mno-ocs-frame-position
-@opindex mno-ocs-frame-position
-@cindex register positions in frame (88k)
-When emitting COFF debugging information for automatic variables and
-parameters stored on the stack, use the offset from the frame pointer
-register (register 30). When this option is in effect, the frame
-pointer is not eliminated when debugging information is selected by the
--g switch.
-
-@item -moptimize-arg-area
-@opindex moptimize-arg-area
-@cindex arguments in frame (88k)
-Save space by reorganizing the stack frame. This option generates code
-that does not agree with the 88open specifications, but uses less
-memory.
-
-@itemx -mno-optimize-arg-area
-@opindex mno-optimize-arg-area
-Do not reorganize the stack frame to save space. This is the default.
-The generated conforms to the specification, but uses more memory.
-
-@item -mshort-data-@var{num}
-@opindex mshort-data
-@cindex smaller data references (88k)
-@cindex r0-relative references (88k)
-Generate smaller data references by making them relative to @code{r0},
-which allows loading a value using a single instruction (rather than the
-usual two). You control which data references are affected by
-specifying @var{num} with this option. For example, if you specify
-@option{-mshort-data-512}, then the data references affected are those
-involving displacements of less than 512 bytes.
-@option{-mshort-data-@var{num}} is not effective for @var{num} greater
-than 64k.
-
-@item -mserialize-volatile
-@opindex mserialize-volatile
-@itemx -mno-serialize-volatile
-@opindex mno-serialize-volatile
-@cindex sequential consistency on 88k
-Do, or don't, generate code to guarantee sequential consistency
-of volatile memory references. By default, consistency is
-guaranteed.
-
-The order of memory references made by the MC88110 processor does
-not always match the order of the instructions requesting those
-references. In particular, a load instruction may execute before
-a preceding store instruction. Such reordering violates
-sequential consistency of volatile memory references, when there
-are multiple processors. When consistency must be guaranteed,
-GCC generates special instructions, as needed, to force
-execution in the proper order.
-
-The MC88100 processor does not reorder memory references and so
-always provides sequential consistency. However, by default, GCC
-generates the special instructions to guarantee consistency
-even when you use @option{-m88100}, so that the code may be run on an
-MC88110 processor. If you intend to run your code only on the
-MC88100 processor, you may use @option{-mno-serialize-volatile}.
-
-The extra code generated to guarantee consistency may affect the
-performance of your application. If you know that you can safely
-forgo this guarantee, you may use @option{-mno-serialize-volatile}.
-
-@item -msvr4
-@itemx -msvr3
-@opindex msvr4
-@opindex msvr3
-@cindex assembler syntax, 88k
-@cindex SVr4
-Turn on (@option{-msvr4}) or off (@option{-msvr3}) compiler extensions
-related to System V release 4 (SVr4). This controls the following:
-
-@enumerate
-@item
-Which variant of the assembler syntax to emit.
-@item
-@option{-msvr4} makes the C preprocessor recognize @samp{#pragma weak}
-that is used on System V release 4.
-@item
-@option{-msvr4} makes GCC issue additional declaration directives used in
-SVr4.
-@end enumerate
-
-@option{-msvr4} is the default for the m88k-motorola-sysv4 configuration.
-@option{-msvr3} is the default for all other m88k configurations.
-
-@item -mversion-03.00
-@opindex mversion-03.00
-This option is obsolete, and is ignored.
-@c ??? which asm syntax better for GAS? option there too?
-
-@item -mno-check-zero-division
-@itemx -mcheck-zero-division
-@opindex mno-check-zero-division
-@opindex mcheck-zero-division
-@cindex zero division on 88k
-Do, or don't, generate code to guarantee that integer division by
-zero will be detected. By default, detection is guaranteed.
-
-Some models of the MC88100 processor fail to trap upon integer
-division by zero under certain conditions. By default, when
-compiling code that might be run on such a processor, GCC
-generates code that explicitly checks for zero-valued divisors
-and traps with exception number 503 when one is detected. Use of
-@option{-mno-check-zero-division} suppresses such checking for code
-generated to run on an MC88100 processor.
-
-GCC assumes that the MC88110 processor correctly detects all instances
-of integer division by zero. When @option{-m88110} is specified, no
-explicit checks for zero-valued divisors are generated, and both
-@option{-mcheck-zero-division} and @option{-mno-check-zero-division} are
-ignored.
+@item -mdebug
+@opindex -mdebug
+Makes the M32R specific code in the compiler display some statistics
+that might help in debugging programs.
+
+@item -malign-loops
+@opindex malign-loops
+Align all loops to a 32-byte boundary.
+
+@item -mno-align-loops
+@opindex mno-align-loops
+Do not enforce a 32-byte alignment for loops. This is the default.
+
+@item -missue-rate=@var{number}
+@opindex missue-rate=@var{number}
+Issue @var{number} instructions per cycle. @var{number} can only be 1
+or 2.
+
+@item -mbranch-cost=@var{number}
+@opindex mbranch-cost=@var{number}
+@var{number} can only be 1 or 2. If it is 1 then branches will be
+preferred over conditional code, if it is 2, then the opposite will
+apply.
+
+@item -mflush-trap=@var{number}
+@opindex mflush-trap=@var{number}
+Specifies the trap number to use to flush the cache. The default is
+12. Valid numbers are between 0 and 15 inclusive.
+
+@item -mno-flush-trap
+@opindex mno-flush-trap
+Specifies that the cache cannot be flushed by using a trap.
+
+@item -mflush-func=@var{name}
+@opindex mflush-func=@var{name}
+Specifies the name of the operating system function to call to flush
+the cache. The default is @emph{_flush_cache}, but a function call
+will only be used if a trap is not available.
+
+@item -mno-flush-func
+@opindex mno-flush-func
+Indicates that there is no OS function for flushing the cache.
-@item -muse-div-instruction
-@opindex muse-div-instruction
-@cindex divide instruction, 88k
-Use the div instruction for signed integer division on the
-MC88100 processor. By default, the div instruction is not used.
-
-On the MC88100 processor the signed integer division instruction
-div) traps to the operating system on a negative operand. The
-operating system transparently completes the operation, but at a
-large cost in execution time. By default, when compiling code
-that might be run on an MC88100 processor, GCC emulates signed
-integer division using the unsigned integer division instruction
-divu), thereby avoiding the large penalty of a trap to the
-operating system. Such emulation has its own, smaller, execution
-cost in both time and space. To the extent that your code's
-important signed integer division operations are performed on two
-nonnegative operands, it may be desirable to use the div
-instruction directly.
-
-On the MC88110 processor the div instruction (also known as the
-divs instruction) processes negative operands without trapping to
-the operating system. When @option{-m88110} is specified,
-@option{-muse-div-instruction} is ignored, and the div instruction is used
-for signed integer division.
-
-Note that the result of dividing @code{INT_MIN} by @minus{}1 is undefined. In
-particular, the behavior of such a division with and without
-@option{-muse-div-instruction} may differ.
-
-@item -mtrap-large-shift
-@itemx -mhandle-large-shift
-@opindex mtrap-large-shift
-@opindex mhandle-large-shift
-@cindex bit shift overflow (88k)
-@cindex large bit shifts (88k)
-Include code to detect bit-shifts of more than 31 bits; respectively,
-trap such shifts or emit code to handle them properly. By default GCC
-makes no special provision for large bit shifts.
-
-@item -mwarn-passed-structs
-@opindex mwarn-passed-structs
-@cindex structure passing (88k)
-Warn when a function passes a struct as an argument or result.
-Structure-passing conventions have changed during the evolution of the C
-language, and are often the source of portability problems. By default,
-GCC issues no such warning.
@end table
-@c break page here to avoid unsightly interparagraph stretch.
-@c -zw, 2001-8-17
-@page
-
@node RS/6000 and PowerPC Options
@subsection IBM RS/6000 and PowerPC Options
@cindex RS/6000 and PowerPC Options
@opindex mcpu
Set architecture type, register usage, choice of mnemonics, and
instruction scheduling parameters for machine type @var{cpu_type}.
-Supported values for @var{cpu_type} are @samp{rios}, @samp{rios1},
-@samp{rsc}, @samp{rios2}, @samp{rs64a}, @samp{601}, @samp{602},
-@samp{603}, @samp{603e}, @samp{604}, @samp{604e}, @samp{620},
-@samp{630}, @samp{740}, @samp{7400}, @samp{7450}, @samp{750},
-@samp{power}, @samp{power2}, @samp{powerpc}, @samp{403}, @samp{505},
-@samp{801}, @samp{821}, @samp{823}, and @samp{860} and @samp{common}.
+Supported values for @var{cpu_type} are @samp{401}, @samp{403},
+@samp{405}, @samp{405fp}, @samp{440}, @samp{440fp}, @samp{505},
+@samp{601}, @samp{602}, @samp{603}, @samp{603e}, @samp{604},
+@samp{604e}, @samp{620}, @samp{630}, @samp{740}, @samp{7400},
+@samp{7450}, @samp{750}, @samp{801}, @samp{821}, @samp{823},
+@samp{860}, @samp{970}, @samp{common}, @samp{ec603e}, @samp{G3},
+@samp{G4}, @samp{G5}, @samp{power}, @samp{power2}, @samp{power3},
+@samp{power4}, @samp{power5}, @samp{powerpc}, @samp{powerpc64},
+@samp{rios}, @samp{rios1}, @samp{rios2}, @samp{rsc}, and @samp{rs64a}.
@option{-mcpu=common} selects a completely generic processor. Code
generated under this option will run on any POWER or PowerPC processor.
those options will run best on that processor, and may not run at all on
others.
-The @option{-mcpu} options automatically enable or disable other
-@option{-m} options as follows:
-
-@table @samp
-@item common
-@option{-mno-power}, @option{-mno-powerpc}
-
-@item power
-@itemx power2
-@itemx rios1
-@itemx rios2
-@itemx rsc
-@option{-mpower}, @option{-mno-powerpc}, @option{-mno-new-mnemonics}
-
-@item powerpc
-@itemx rs64a
-@itemx 602
-@itemx 603
-@itemx 603e
-@itemx 604
-@itemx 620
-@itemx 630
-@itemx 740
-@itemx 7400
-@itemx 7450
-@itemx 750
-@itemx 505
-@option{-mno-power}, @option{-mpowerpc}, @option{-mnew-mnemonics}
-
-@item 601
-@option{-mpower}, @option{-mpowerpc}, @option{-mnew-mnemonics}
-
-@item 403
-@itemx 821
-@itemx 860
-@option{-mno-power}, @option{-mpowerpc}, @option{-mnew-mnemonics}, @option{-msoft-float}
-@end table
+The @option{-mcpu} options automatically enable or disable the
+following options: @option{-maltivec}, @option{-mhard-float},
+@option{-mmfcrf}, @option{-mmultiple}, @option{-mnew-mnemonics},
+@option{-mpower}, @option{-mpower2}, @option{-mpowerpc64},
+@option{-mpowerpc-gpopt}, @option{-mpowerpc-gfxopt},
+@option{-mstring}. The particular options set for any particular CPU
+will vary between compiler versions, depending on what setting seems
+to produce optimal code for that CPU; it doesn't necessarily reflect
+the actual hardware's capabilities. If you wish to set an individual
+option to a particular value, you may specify it after the
+@option{-mcpu} option, like @samp{-mcpu=970 -mno-altivec}.
+
+On AIX, the @option{-maltivec} and @option{-mpowerpc64} options are
+not enabled or disabled by the @option{-mcpu} option at present, since
+AIX does not have full support for these options. You may still
+enable or disable them individually if you're sure it'll work in your
+environment.
@item -mtune=@var{cpu_type}
@opindex mtune
@itemx -malign-power
@opindex malign-natural
@opindex malign-power
-On AIX, Darwin, and 64-bit PowerPC Linux, the option
+On AIX, Darwin, and 64-bit PowerPC GNU/Linux, the option
@option{-malign-natural} overrides the ABI-defined alignment of larger
types, such as floating-point doubles, on their natural size-based boundary.
The option @option{-malign-power} instructs GCC to follow the ABI-specified
@item -mprioritize-restricted-insns=@var{priority}
@opindex mprioritize-restricted-insns
-This option controls the priority that is assigned to
-dispatch-slot restricted instructions during the second scheduling
-pass. The argument @var{priority} takes the value @var{0/1/2} to assign
-@var{no/highest/second-highest} priority to dispatch slot restricted
+This option controls the priority that is assigned to
+dispatch-slot restricted instructions during the second scheduling
+pass. The argument @var{priority} takes the value @var{0/1/2} to assign
+@var{no/highest/second-highest} priority to dispatch slot restricted
instructions.
@item -msched-costly-dep=@var{dependence_type}
This option controls which dependences are considered costly
by the target during instruction scheduling. The argument
@var{dependence_type} takes one of the following values:
-@var{no}: no dependence is costly,
-@var{all}: all dependences are costly,
+@var{no}: no dependence is costly,
+@var{all}: all dependences are costly,
@var{true_store_to_load}: a true dependence from store to load is costly,
@var{store_to_load}: any dependence from store to load is costly,
@var{number}: any dependence which latency >= @var{number} is costly.
-
+
@item -minsert-sched-nops=@var{scheme}
@opindex minsert-sched-nops
This option controls which nop insertion scheme will be used during
according to the scheduler's grouping.
@var{regroup_exact}: Insert nops to force costly dependent insns into
separate groups. Insert exactly as many nops as needed to force an insn
-to a new group, according to the estimatied processor grouping.
-@var{number}: Insert nops to force costly dependent insns into
+to a new group, according to the estimated processor grouping.
+@var{number}: Insert nops to force costly dependent insns into
separate groups. Insert @var{number} nops to force an insn to a new group.
@item -mcall-sysv
@itemx -mno-longcall
@opindex mlongcall
@opindex mno-longcall
-Default to making all function calls via pointers, so that functions
-which reside further than 64 megabytes (67,108,864 bytes) from the
-current location can be called. This setting can be overridden by the
-@code{shortcall} function attribute, or by @code{#pragma longcall(0)}.
+Default to making all function calls indirectly, using a register, so
+that functions which reside further than 32 megabytes (33,554,432
+bytes) from the current location can be called. This setting can be
+overridden by the @code{shortcall} function attribute, or by
+@code{#pragma longcall(0)}.
Some linkers are capable of detecting out-of-range calls and generating
glue code on the fly. On these systems, long calls are unnecessary and
as can the GNU linker for PowerPC/64. It is planned to add this feature
to the GNU linker for 32-bit PowerPC systems as well.
+On Darwin/PPC systems, @code{#pragma longcall} will generate ``jbsr
+callee, L42'', plus a ``branch island'' (glue code). The two target
+addresses represent the callee and the ``branch island.'' The
+Darwin/PPC linker will prefer the first address and generate a ``bl
+callee'' if the PPC ``bl'' instruction will reach the callee directly;
+otherwise, the linker will generate ``bl L42'' to call the ``branch
+island.'' The ``branch island'' is appended to the body of the
+calling function; it computes the full 32-bit address of the callee
+and jumps to it.
+
+On Mach-O (Darwin) systems, this option directs the compiler emit to
+the glue for every direct call, and the Darwin linker decides whether
+to use or discard it.
+
In the future, we may cause GCC to ignore all longcall specifications
when the linker is known to generate glue.
system. They are useful for compatibility with other Mac OS compilers.
@table @gcctabopt
-@item -all_load
-@opindex all_load
+@item -all_load
+@opindex all_load
Loads all members of static archive libraries.
See man ld(1) for more information.
Causes the output file to be marked such that the dynamic linker will
bind all undefined references when the file is loaded or launched.
-@item -bundle
+@item -bundle
@opindex bundle
Produce a Mach-o bundle format file.
See man ld(1) for more information.
output file being linked. See man ld(1) for more information.
@item -allowable_client @var{client_name}
-@item -arch_only
-
-@item -client_name
-@item -compatibility_version
-@item -current_version
-@item -dependency-file
-@item -dylib_file
-@item -dylinker_install_name
-@item -dynamic
-@item -dynamiclib
-@item -exported_symbols_list
-@item -filelist
-@item -flat_namespace
-@item -force_cpusubtype_ALL
-@item -force_flat_namespace
-@item -headerpad_max_install_names
-@item -image_base
-@item -init
-@item -install_name
-@item -keep_private_externs
-@item -multi_module
-@item -multiply_defined
-@item -multiply_defined_unused
-@item -noall_load
-@item -nofixprebinding
-@item -nomultidefs
-@item -noprebind
-@item -noseglinkedit
-@item -pagezero_size
-@item -prebind
-@item -prebind_all_twolevel_modules
-@item -private_bundle
-@item -read_only_relocs
-@item -sectalign
-@item -sectobjectsymbols
-@item -whyload
-@item -seg1addr
-@item -sectcreate
-@item -sectobjectsymbols
-@item -sectorder
-@item -seg_addr_table
-@item -seg_addr_table_filename
-@item -seglinkedit
-@item -segprot
-@item -segs_read_only_addr
-@item -segs_read_write_addr
-@item -single_module
-@item -static
-@item -sub_library
-@item -sub_umbrella
-@item -twolevel_namespace
-@item -umbrella
-@item -undefined
-@item -unexported_symbols_list
-@item -weak_reference_mismatches
-@item -whatsloaded
+@itemx -arch_only
+
+@itemx -client_name
+@itemx -compatibility_version
+@itemx -current_version
+@itemx -dependency-file
+@itemx -dylib_file
+@itemx -dylinker_install_name
+@itemx -dynamic
+@itemx -dynamiclib
+@itemx -exported_symbols_list
+@itemx -filelist
+@itemx -flat_namespace
+@itemx -force_cpusubtype_ALL
+@itemx -force_flat_namespace
+@itemx -headerpad_max_install_names
+@itemx -image_base
+@itemx -init
+@itemx -install_name
+@itemx -keep_private_externs
+@itemx -multi_module
+@itemx -multiply_defined
+@itemx -multiply_defined_unused
+@itemx -noall_load
+@itemx -nofixprebinding
+@itemx -nomultidefs
+@itemx -noprebind
+@itemx -noseglinkedit
+@itemx -pagezero_size
+@itemx -prebind
+@itemx -prebind_all_twolevel_modules
+@itemx -private_bundle
+@itemx -read_only_relocs
+@itemx -sectalign
+@itemx -sectobjectsymbols
+@itemx -whyload
+@itemx -seg1addr
+@itemx -sectcreate
+@itemx -sectobjectsymbols
+@itemx -sectorder
+@itemx -seg_addr_table
+@itemx -seg_addr_table_filename
+@itemx -seglinkedit
+@itemx -segprot
+@itemx -segs_read_only_addr
+@itemx -segs_read_write_addr
+@itemx -single_module
+@itemx -static
+@itemx -sub_library
+@itemx -sub_umbrella
+@itemx -twolevel_namespace
+@itemx -umbrella
+@itemx -undefined
+@itemx -unexported_symbols_list
+@itemx -weak_reference_mismatches
+@itemx -whatsloaded
@opindex allowable_client
-@opindex arch_only
+@opindex arch_only
@opindex client_name
@opindex compatibility_version
@opindex current_version
@opindex dynamic
@opindex dynamiclib
@opindex exported_symbols_list
-@opindex filelist
-@opindex flat_namespace
+@opindex filelist
+@opindex flat_namespace
@opindex force_cpusubtype_ALL
@opindex force_flat_namespace
@opindex headerpad_max_install_names
@opindex image_base
-@opindex init
+@opindex init
@opindex install_name
@opindex keep_private_externs
-@opindex multi_module
+@opindex multi_module
@opindex multiply_defined
-@opindex multiply_defined_unused
-@opindex noall_load
+@opindex multiply_defined_unused
+@opindex noall_load
@opindex nofixprebinding
-@opindex nomultidefs
+@opindex nomultidefs
@opindex noprebind
-@opindex noseglinkedit
+@opindex noseglinkedit
@opindex pagezero_size
@opindex prebind
@opindex prebind_all_twolevel_modules
-@opindex private_bundle
+@opindex private_bundle
@opindex read_only_relocs
-@opindex sectalign
-@opindex sectobjectsymbols
-@opindex whyload
+@opindex sectalign
+@opindex sectobjectsymbols
+@opindex whyload
@opindex seg1addr
-@opindex sectcreate
-@opindex sectobjectsymbols
-@opindex sectorder
+@opindex sectcreate
+@opindex sectobjectsymbols
+@opindex sectorder
@opindex seg_addr_table
@opindex seg_addr_table_filename
@opindex seglinkedit
@opindex weak_reference_mismatches
@opindex whatsloaded
-This options are available for Darwin linker. Darwin linker man page
+These options are available for Darwin linker. Darwin linker man page
describes them in detail.
@end table
-@node RT Options
-@subsection IBM RT Options
-@cindex RT options
-@cindex IBM RT options
-
-These @samp{-m} options are defined for the IBM RT PC:
-
-@table @gcctabopt
-@item -min-line-mul
-@opindex min-line-mul
-Use an in-line code sequence for integer multiplies. This is the
-default.
-
-@item -mcall-lib-mul
-@opindex mcall-lib-mul
-Call @code{lmul$$} for integer multiples.
-
-@item -mfull-fp-blocks
-@opindex mfull-fp-blocks
-Generate full-size floating point data blocks, including the minimum
-amount of scratch space recommended by IBM@. This is the default.
-
-@item -mminimum-fp-blocks
-@opindex mminimum-fp-blocks
-Do not include extra scratch space in floating point data blocks. This
-results in smaller code, but slower execution, since scratch space must
-be allocated dynamically.
-
-@cindex @file{stdarg.h} and RT PC
-@item -mfp-arg-in-fpregs
-@opindex mfp-arg-in-fpregs
-Use a calling sequence incompatible with the IBM calling convention in
-which floating point arguments are passed in floating point registers.
-Note that @code{stdarg.h} will not work with floating point operands
-if this option is specified.
-
-@item -mfp-arg-in-gregs
-@opindex mfp-arg-in-gregs
-Use the normal calling convention for floating point arguments. This is
-the default.
-
-@item -mhc-struct-return
-@opindex mhc-struct-return
-Return structures of more than one word in memory, rather than in a
-register. This provides compatibility with the MetaWare HighC (hc)
-compiler. Use the option @option{-fpcc-struct-return} for compatibility
-with the Portable C Compiler (pcc).
-
-@item -mnohc-struct-return
-@opindex mnohc-struct-return
-Return some structures of more than one word in registers, when
-convenient. This is the default. For compatibility with the
-IBM-supplied compilers, use the option @option{-fpcc-struct-return} or the
-option @option{-mhc-struct-return}.
-@end table
-
@node MIPS Options
@subsection MIPS Options
@cindex MIPS options
-These @samp{-m} options are defined for the MIPS family of computers:
-
@table @gcctabopt
+@item -EB
+@opindex EB
+Generate big-endian code.
+
+@item -EL
+@opindex EL
+Generate little-endian code. This is the default for @samp{mips*el-*-*}
+configurations.
+
@item -march=@var{arch}
@opindex march
Generate code that will run on @var{arch}, which can be the name of a
@samp{rm9000},
@samp{orion},
@samp{sb1},
-@samp{vr4100}, @samp{vr4111}, @samp{vr4120}, @samp{vr4300},
+@samp{vr4100}, @samp{vr4111}, @samp{vr4120}, @samp{vr4130}, @samp{vr4300},
@samp{vr5000}, @samp{vr5400} and @samp{vr5500}.
The special value @samp{from-abi} selects the
most compatible architecture for the selected ABI (that is,
@opindex mips64
Equivalent to @samp{-march=mips64}.
-@item -mfused-madd
-@itemx -mno-fused-madd
-@opindex mfused-madd
-@opindex mno-fused-madd
-Generate code that uses (does not use) the floating point multiply and
-accumulate instructions, when they are available. These instructions
-are generated by default if they are available, but this may be
-undesirable if the extra precision causes problems or on certain chips
-in the mode where denormals are rounded to zero where denormals
-generated by multiply and accumulate instructions cause exceptions
-anyway.
-
-@item -mfp32
-@opindex mfp32
-Assume that floating point registers are 32 bits wide.
-
-@item -mfp64
-@opindex mfp64
-Assume that floating point registers are 64 bits wide.
-
-@item -mgp32
-@opindex mgp32
-Assume that general purpose registers are 32 bits wide.
-
-@item -mgp64
-@opindex mgp64
-Assume that general purpose registers are 64 bits wide.
-
-@item -mint64
-@opindex mint64
-Force int and long types to be 64 bits wide. See @option{-mlong32} for an
-explanation of the default, and the width of pointers.
-
-@item -mlong64
-@opindex mlong64
-Force long types to be 64 bits wide. See @option{-mlong32} for an
-explanation of the default, and the width of pointers.
-
-@item -mlong32
-@opindex mlong32
-Force long, int, and pointer types to be 32 bits wide.
-
-The default size of ints, longs and pointers depends on the ABI@. All
-the supported ABIs use 32-bit ints. The n64 ABI uses 64-bit longs, as
-does the 64-bit Cygnus EABI; the others use 32-bit longs. Pointers
-are the same size as longs, or the same size as integer registers,
-whichever is smaller.
+@item -mips16
+@itemx -mno-mips16
+@opindex mips16
+@opindex mno-mips16
+Use (do not use) the MIPS16 ISA.
@item -mabi=32
@itemx -mabi=o64
@itemx -mabi=n32
@itemx -mabi=64
@itemx -mabi=eabi
-@itemx -mabi=meabi
@opindex mabi=32
@opindex mabi=o64
@opindex mabi=n32
@opindex mabi=64
@opindex mabi=eabi
-@opindex mabi=meabi
Generate code for the given ABI@.
-Note that there are two embedded ABIs: @option{-mabi=eabi}
-selects the one defined by Cygnus while @option{-meabi=meabi}
-selects the one defined by MIPS@. Both these ABIs have
-32-bit and 64-bit variants. Normally, GCC will generate
-64-bit code when you select a 64-bit architecture, but you
+Note that the EABI has a 32-bit and a 64-bit variant. GCC normally
+generates 64-bit code when you select a 64-bit architecture, but you
can use @option{-mgp32} to get 32-bit code instead.
-@item -mabi-fake-default
-@opindex mabi-fake-default
-You don't want to know what this option does. No, really. I mean
-it. Move on to the next option.
-
-What? You're still here? Oh, well@enddots{} Ok, here's the deal. GCC
-wants the default set of options to get the root of the multilib tree,
-and the shared library SONAMEs without any multilib-indicating
-suffixes. This is not convenience for @samp{mips64-linux-gnu}, since
-we want to default to the N32 ABI, while still being binary-compatible
-with @samp{mips-linux-gnu} if you stick to the O32 ABI@. Being
-binary-compatible means shared libraries should have the same SONAMEs,
-and libraries should live in the same location. Having O32 libraries
-in a sub-directory named say @file{o32} is not acceptable.
-
-So we trick GCC into believing that O32 is the default ABI, except
-that we override the default with some internal command-line
-processing magic. Problem is, if we stopped at that, and you then
-created a multilib-aware package that used the output of @command{gcc
--print-multi-lib} to decide which multilibs to build, and how, and
-you'd find yourself in an awkward situation when you found out that
-some of the options listed ended up mapping to the same multilib, and
-none of your libraries was actually built for the multilib that
-@option{-print-multi-lib} claims to be the default. So we added this
-option that disables the default switcher, falling back to GCC's
-original notion of the default library. Confused yet?
-
-For short: don't ever use this option, unless you find it in the list
-of additional options to be used when building for multilibs, in the
-output of @option{gcc -print-multi-lib}.
-
-@item -mmips-as
-@opindex mmips-as
-Generate code for the MIPS assembler, and invoke @file{mips-tfile} to
-add normal debug information. This is the default for all
-platforms except for the OSF/1 reference platform, using the OSF/rose
-object format. If the either of the @option{-gstabs} or @option{-gstabs+}
-switches are used, the @file{mips-tfile} program will encapsulate the
-stabs within MIPS ECOFF@.
-
-@item -mgas
-@opindex mgas
-Generate code for the GNU assembler. This is the default on the OSF/1
-reference platform, using the OSF/rose object format. Also, this is
-the default if the configure option @option{--with-gnu-as} is used.
-
-@item -msplit-addresses
-@itemx -mno-split-addresses
-@opindex msplit-addresses
-@opindex mno-split-addresses
-Generate code to load the high and low parts of address constants separately.
-This allows GCC to optimize away redundant loads of the high order
-bits of addresses. This optimization requires GNU as and GNU ld.
-This optimization is enabled by default for some embedded targets where
-GNU as and GNU ld are standard.
-
-@item -mrnames
-@itemx -mno-rnames
-@opindex mrnames
-@opindex mno-rnames
-The @option{-mrnames} switch says to output code using the MIPS software
-names for the registers, instead of the hardware names (ie, @var{a0}
-instead of @var{$4}). The only known assembler that supports this option
-is the Algorithmics assembler.
-
-@item -mmemcpy
-@itemx -mno-memcpy
-@opindex mmemcpy
-@opindex mno-memcpy
-The @option{-mmemcpy} switch makes all block moves call the appropriate
-string function (@samp{memcpy} or @samp{bcopy}) instead of possibly
-generating inline code.
-
-@item -mmips-tfile
-@itemx -mno-mips-tfile
-@opindex mmips-tfile
-@opindex mno-mips-tfile
-The @option{-mno-mips-tfile} switch causes the compiler not
-postprocess the object file with the @file{mips-tfile} program,
-after the MIPS assembler has generated it to add debug support. If
-@file{mips-tfile} is not run, then no local variables will be
-available to the debugger. In addition, @file{stage2} and
-@file{stage3} objects will have the temporary file names passed to the
-assembler embedded in the object file, which means the objects will
-not compare the same. The @option{-mno-mips-tfile} switch should only
-be used when there are bugs in the @file{mips-tfile} program that
-prevents compilation.
-
-@item -msoft-float
-@opindex msoft-float
-Generate output containing library calls for floating point.
-@strong{Warning:} the requisite libraries are not part of GCC@.
-Normally the facilities of the machine's usual C compiler are used, but
-this can't be done directly in cross-compilation. You must make your
-own arrangements to provide suitable library functions for
-cross-compilation.
-
-@item -mhard-float
-@opindex mhard-float
-Generate output containing floating point instructions. This is the
-default if you use the unmodified sources.
+For information about the O64 ABI, see
+@w{@uref{http://gcc.gnu.org/projects/mipso64-abi.html}}.
@item -mabicalls
@itemx -mno-abicalls
@opindex mabicalls
@opindex mno-abicalls
-Emit (or do not emit) the pseudo operations @samp{.abicalls},
-@samp{.cpload}, and @samp{.cprestore} that some System V.4 ports use for
-position independent code.
+Generate (do not generate) SVR4-style position-independent code.
+@option{-mabicalls} is the default for SVR4-based systems.
@item -mxgot
@itemx -mno-xgot
@opindex mxgot
@opindex mno-xgot
-Lift (or do not lift) the usual restrictions on the size of the global
+Lift (do not lift) the usual restrictions on the size of the global
offset table.
GCC normally uses a single instruction to load values from the GOT.
These options have no effect unless GCC is generating position
independent code.
-@item -mlong-calls
-@itemx -mno-long-calls
-@opindex mlong-calls
-@opindex mno-long-calls
-Do all calls with the @samp{JALR} instruction, which requires
-loading up a function's address into a register before the call.
-You need to use this switch, if you call outside of the current
-512 megabyte segment to functions that are not through pointers.
-
@item -membedded-pic
@itemx -mno-embedded-pic
@opindex membedded-pic
@opindex mno-embedded-pic
-Generate PIC code suitable for some embedded systems. All calls are
-made using PC relative address, and all data is addressed using the $gp
-register. No more than 65536 bytes of global data may be used. This
-requires GNU as and GNU ld which do most of the work. This currently
-only works on targets which use ECOFF; it does not work with ELF@.
+Generate (do not generate) position-independent code suitable for some
+embedded systems. All calls are made using PC relative addresses, and
+all data is addressed using the $gp register. No more than 65536
+bytes of global data may be used. This requires GNU as and GNU ld,
+which do most of the work.
+
+@item -mgp32
+@opindex mgp32
+Assume that general-purpose registers are 32 bits wide.
+
+@item -mgp64
+@opindex mgp64
+Assume that general-purpose registers are 64 bits wide.
+
+@item -mfp32
+@opindex mfp32
+Assume that floating-point registers are 32 bits wide.
+
+@item -mfp64
+@opindex mfp64
+Assume that floating-point registers are 64 bits wide.
+
+@item -mhard-float
+@opindex mhard-float
+Use floating-point coprocessor instructions.
+
+@item -msoft-float
+@opindex msoft-float
+Do not use floating-point coprocessor instructions. Implement
+floating-point calculations using library calls instead.
+
+@item -msingle-float
+@opindex msingle-float
+Assume that the floating-point coprocessor only supports single-precision
+operations.
+
+@itemx -mdouble-float
+@opindex mdouble-float
+Assume that the floating-point coprocessor supports double-precision
+operations. This is the default.
+
+@item -mint64
+@opindex mint64
+Force @code{int} and @code{long} types to be 64 bits wide. See
+@option{-mlong32} for an explanation of the default and the way
+that the pointer size is determined.
+
+@item -mlong64
+@opindex mlong64
+Force @code{long} types to be 64 bits wide. See @option{-mlong32} for
+an explanation of the default and the way that the pointer size is
+determined.
+
+@item -mlong32
+@opindex mlong32
+Force @code{long}, @code{int}, and pointer types to be 32 bits wide.
+
+The default size of @code{int}s, @code{long}s and pointers depends on
+the ABI@. All the supported ABIs use 32-bit @code{int}s. The n64 ABI
+uses 64-bit @code{long}s, as does the 64-bit EABI; the others use
+32-bit @code{long}s. Pointers are the same size as @code{long}s,
+or the same size as integer registers, whichever is smaller.
+
+@item -G @var{num}
+@opindex G
+@cindex smaller data references (MIPS)
+@cindex gp-relative references (MIPS)
+Put global and static items less than or equal to @var{num} bytes into
+the small data or bss section instead of the normal data or bss section.
+This allows the data to be accessed using a single instruction.
+
+All modules should be compiled with the same @option{-G @var{num}}
+value.
@item -membedded-data
@itemx -mno-embedded-data
@itemx -mno-uninit-const-in-rodata
@opindex muninit-const-in-rodata
@opindex mno-uninit-const-in-rodata
-When used together with @option{-membedded-data}, it will always store uninitialized
-const variables in the read-only data section.
+Put uninitialized @code{const} variables in the read-only data section.
+This option is only meaningful in conjunction with @option{-membedded-data}.
-@item -msingle-float
-@itemx -mdouble-float
-@opindex msingle-float
-@opindex mdouble-float
-The @option{-msingle-float} switch tells gcc to assume that the floating
-point coprocessor only supports single precision operations, as on the
-@samp{r4650} chip. The @option{-mdouble-float} switch permits gcc to use
-double precision operations. This is the default.
+@item -msplit-addresses
+@itemx -mno-split-addresses
+@opindex msplit-addresses
+@opindex mno-split-addresses
+Enable (disable) use of the @code{%hi()} and @code{%lo()} assembler
+relocation operators. This option has been superceded by
+@option{-mexplicit-relocs} but is retained for backwards compatibility.
+
+@item -mexplicit-relocs
+@itemx -mno-explicit-relocs
+@opindex mexplicit-relocs
+@opindex mno-explicit-relocs
+Use (do not use) assembler relocation operators when dealing with symbolic
+addresses. The alternative, selected by @option{-mno-explicit-relocs},
+is to use assembler macros instead.
+
+@option{-mexplicit-relocs} is usually the default if GCC was configured
+to use an assembler that supports relocation operators. However, the
+combination of @option{-mabicalls} and @option{-fno-unit-at-a-time}
+implies @option{-mno-explicit-relocs} unless explicitly overridden.
+This is because, when generating abicalls, the choice of relocation
+depends on whether a symbol is local or global. In some rare cases,
+GCC will not be able to decide this until the whole compilation unit
+has been read.
+
+@item -mrnames
+@itemx -mno-rnames
+@opindex mrnames
+@opindex mno-rnames
+Generate (do not generate) code that refers to registers using their
+software names. The default is @option{-mno-rnames}, which tells GCC
+to use hardware names like @samp{$4} instead of software names like
+@samp{a0}. The only assembler known to support @option{-rnames} is
+the Algorithmics assembler.
+
+@item -mcheck-zero-division
+@itemx -mno-check-zero-division
+@opindex mcheck-zero-division
+@opindex mno-check-zero-division
+Trap (do not trap) on integer division by zero. The default is
+@option{-mcheck-zero-division}.
+
+@item -mmemcpy
+@itemx -mno-memcpy
+@opindex mmemcpy
+@opindex mno-memcpy
+Force (do not force) the use of @code{memcpy()} for non-trivial block
+moves. The default is @option{-mno-memcpy}, which allows GCC to inline
+most constant-sized copies.
+
+@item -mlong-calls
+@itemx -mno-long-calls
+@opindex mlong-calls
+@opindex mno-long-calls
+Disable (do not disable) use of the @code{jal} instruction. Calling
+functions using @code{jal} is more efficient but requires the caller
+and callee to be in the same 256 megabyte segment.
+
+This option has no effect on abicalls code. The default is
+@option{-mno-long-calls}.
@item -mmad
@itemx -mno-mad
@opindex mmad
@opindex mno-mad
-Permit use of the @samp{mad}, @samp{madu} and @samp{mul} instructions,
-as on the @samp{r4650} chip.
+Enable (disable) use of the @code{mad}, @code{madu} and @code{mul}
+instructions, as provided by the R4650 ISA.
-@item -m4650
-@opindex m4650
-Turns on @option{-msingle-float}, @option{-mmad}, and, at least for now,
-@option{-mcpu=r4650}.
-
-@item -mips16
-@itemx -mno-mips16
-@opindex mips16
-@opindex mno-mips16
-Enable 16-bit instructions.
-
-@item -EL
-@opindex EL
-Compile code for the processor in little endian mode.
-The requisite libraries are assumed to exist.
-
-@item -EB
-@opindex EB
-Compile code for the processor in big endian mode.
-The requisite libraries are assumed to exist.
+@item -mfused-madd
+@itemx -mno-fused-madd
+@opindex mfused-madd
+@opindex mno-fused-madd
+Enable (disable) use of the floating point multiply-accumulate
+instructions, when they are available. The default is
+@option{-mfused-madd}.
-@item -G @var{num}
-@opindex G
-@cindex smaller data references (MIPS)
-@cindex gp-relative references (MIPS)
-Put global and static items less than or equal to @var{num} bytes into
-the small data or bss sections instead of the normal data or bss
-section. This allows the assembler to emit one word memory reference
-instructions based on the global pointer (@var{gp} or @var{$28}),
-instead of the normal two words used. By default, @var{num} is 8 when
-the MIPS assembler is used, and 0 when the GNU assembler is used. The
-@option{-G @var{num}} switch is also passed to the assembler and linker.
-All modules should be compiled with the same @option{-G @var{num}}
-value.
+When multiply-accumulate instructions are used, the intermediate
+product is calculated to infinite precision and is not subject to
+the FCSR Flush to Zero bit. This may be undesirable in some
+circumstances.
@item -nocpp
@opindex nocpp
Tell the MIPS assembler to not run its preprocessor over user
assembler files (with a @samp{.s} suffix) when assembling them.
-@item -mfix7000
-@opindex mfix7000
-Pass an option to gas which will cause nops to be inserted if
-the read of the destination register of an mfhi or mflo instruction
-occurs in the following two instructions.
+@item -mfix-r4000
+@itemx -mno-fix-r4000
+@opindex mfix-r4000
+@opindex mno-fix-r4000
+Work around certain R4000 CPU errata:
+@itemize @minus
+@item
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+@item
+A double-word or a variable shift may give an incorrect result if executed
+while an integer multiplication is in progress.
+@item
+An integer division may give an incorrect result if started in a delay slot
+of a taken branch or a jump.
+@end itemize
+
+@item -mfix-r4400
+@itemx -mno-fix-r4400
+@opindex mfix-r4400
+@opindex mno-fix-r4400
+Work around certain R4400 CPU errata:
+@itemize @minus
+@item
+A double-word or a variable shift may give an incorrect result if executed
+immediately after starting an integer division.
+@end itemize
+
+@item -mfix-vr4120
+@itemx -mno-fix-vr4120
+@opindex mfix-vr4120
+Work around certain VR4120 errata:
+@itemize @minus
+@item
+@code{dmultu} does not always produce the correct result.
+@item
+@code{div} and @code{ddiv} do not always produce the correct result if one
+of the operands is negative.
+@end itemize
+The workarounds for the division errata rely on special functions in
+@file{libgcc.a}. At present, these functions are only provided by
+the @code{mips64vr*-elf} configurations.
+
+Other VR4120 errata require a nop to be inserted between certain pairs of
+instructions. These errata are handled by the assembler, not by GCC itself.
@item -mfix-sb1
@itemx -mno-fix-sb1
(This flag currently works around the SB-1 revision 2
``F1'' and ``F2'' floating point errata.)
-@item -no-crt0
-@opindex no-crt0
-Do not include the default crt0.
-
@item -mflush-func=@var{func}
@itemx -mno-flush-func
@opindex mflush-func
arguments as the common @code{_flush_func()}, that is, the address of the
memory range for which the cache is being flushed, the size of the
memory range, and the number 3 (to flush both caches). The default
-depends on the target gcc was configured for, but commonly is either
+depends on the target GCC was configured for, but commonly is either
@samp{_flush_func} or @samp{__cpu_flush}.
@item -mbranch-likely
@opindex mtune
Tune to @var{cpu-type} everything applicable about the generated code, except
for the ABI and the set of available instructions. The choices for
-@var{cpu-type} are @samp{i386}, @samp{i486}, @samp{i586}, @samp{i686},
-@samp{pentium}, @samp{pentium-mmx}, @samp{pentiumpro}, @samp{pentium2},
-@samp{pentium3}, @samp{pentium4}, @samp{k6}, @samp{k6-2}, @samp{k6-3},
-@samp{athlon}, @samp{athlon-tbird}, @samp{athlon-4}, @samp{athlon-xp},
-@samp{athlon-mp}, @samp{winchip-c6}, @samp{winchip2}, @samp{k8}, @samp{c3}
-and @samp{c3-2}.
+@var{cpu-type} are:
+@table @emph
+@item i386
+Original Intel's i386 CPU.
+@item i486
+Intel's i486 CPU. (No scheduling is implemented for this chip.)
+@item i586, pentium
+Intel Pentium CPU with no MMX support.
+@item pentium-mmx
+Intel PentiumMMX CPU based on Pentium core with MMX instruction set support.
+@item i686, pentiumpro
+Intel PentiumPro CPU.
+@item pentium2
+Intel Pentium2 CPU based on PentiumPro core with MMX instruction set support.
+@item pentium3, pentium3m
+Intel Pentium3 CPU based on PentiumPro core with MMX and SSE instruction set
+support.
+@item pentium-m
+Low power version of Intel Pentium3 CPU with MMX, SSE and SSE2 instruction set
+support. Used by Centrino notebooks.
+@item pentium4, pentium4m
+Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set support.
+@item prescott
+Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and SSE3 instruction
+set support.
+@item nocona
+Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE,
+SSE2 and SSE3 instruction set support.
+@item k6
+AMD K6 CPU with MMX instruction set support.
+@item k6-2, k6-3
+Improved versions of AMD K6 CPU with MMX and 3dNOW! instruction set support.
+@item athlon, athlon-tbird
+AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and SSE prefetch instructions
+support.
+@item athlon-4, athlon-xp, athlon-mp
+Improved AMD Athlon CPU with MMX, 3dNOW!, enhanced 3dNOW! and full SSE
+instruction set support.
+@item k8, opteron, athlon64, athlon-fx
+AMD K8 core based CPUs with x86-64 instruction set support. (This supersets
+MMX, SSE, SSE2, 3dNOW!, enhanced 3dNOW! and 64-bit instruction set extensions.)
+@item winchip-c6
+IDT Winchip C6 CPU, dealt in same way as i486 with additional MMX instruction
+set support.
+@item winchip2
+IDT Winchip2 CPU, dealt in same way as i486 with additional MMX and 3dNOW!
+instruction set support.
+@item c3
+Via C3 CPU with MMX and 3dNOW! instruction set support. (No scheduling is
+implemented for this chip.)
+@item c3-2
+Via C3-2 CPU with MMX and SSE instruction set support. (No scheduling is
+implemented for this chip.)
+@end table
While picking a specific @var{cpu-type} will schedule things appropriately
for that particular chip, the compiler will not generate any code that
does not run on the i386 without the @option{-march=@var{cpu-type}} option
-being used. @samp{i586} is equivalent to @samp{pentium} and @samp{i686}
-is equivalent to @samp{pentiumpro}. @samp{k6} and @samp{athlon} are the
-AMD chips as opposed to the Intel ones.
+being used.
@item -march=@var{cpu-type}
@opindex march
@item -mfpmath=@var{unit}
@opindex march
-generate floating point arithmetics for selected unit @var{unit}. the choices
+Generate floating point arithmetics for selected unit @var{unit}. The choices
for @var{unit} are:
@table @samp
@option{-msse2} switches to enable SSE extensions and make this option
effective. For x86-64 compiler, these extensions are enabled by default.
-The resulting code should be considerably faster in majority of cases and avoid
+The resulting code should be considerably faster in the majority of cases and avoid
the numerical instability problems of 387 code, but may break some existing
code that expects temporaries to be 80bit.
-This is the default choice for x86-64 compiler.
-
-@item pni
-Use all SSE extensions enabled by @option{-msse2} as well as the new
-SSE extensions in Prescott New Instructions. @option{-mpni} also
-enables 2 builtin functions, @code{__builtin_ia32_monitor} and
-@code{__builtin_ia32_mwait}, for new instructions @code{monitor} and
-@code{mwait}.
+This is the default choice for the x86-64 compiler.
@item sse,387
Attempt to utilize both instruction sets at once. This effectively double the
amount of available registers and on chips with separate execution units for
387 and SSE the execution resources too. Use this option with care, as it is
-still experimental, because gcc register allocator does not model separate
+still experimental, because the GCC register allocator does not model separate
functional units well resulting in instable performance.
@end table
without that switch.
@item -m96bit-long-double
-@item -m128bit-long-double
+@itemx -m128bit-long-double
@opindex m96bit-long-double
@opindex m128bit-long-double
-These switches control the size of @code{long double} type. The i386
-application binary interface specifies the size to be 96 bits,
+These switches control the size of @code{long double} type. The i386
+application binary interface specifies the size to be 96 bits,
so @option{-m96bit-long-double} is the default in 32 bit mode.
Modern architectures (Pentium and newer) would prefer @code{long double}
-to be aligned to an 8 or 16 byte boundary. In arrays or structures
-conforming to the ABI, this would not be possible. So specifying a
+to be aligned to an 8 or 16 byte boundary. In arrays or structures
+conforming to the ABI, this would not be possible. So specifying a
@option{-m128bit-long-double} will align @code{long double}
to a 16 byte boundary by padding the @code{long double} with an additional
-32 bit zero.
+32 bit zero.
In the x86-64 compiler, @option{-m128bit-long-double} is the default choice as
its ABI specifies that @code{long double} is to be aligned on 16 byte boundary.
-
+
Notice that neither of these options enable any extra precision over the x87
-standard of 80 bits for a @code{long double}.
+standard of 80 bits for a @code{long double}.
@strong{Warning:} if you override the default value for your target ABI, the
-structures and arrays containing @code{long double} will change their size as
-well as function calling convention for function taking @code{long double}
-will be modified. Hence they will not be binary compatible with arrays or
-structures in code compiled without that switch.
+structures and arrays containing @code{long double} variables will change
+their size as well as function calling convention for function taking
+@code{long double} will be modified. Hence they will not be binary
+compatible with arrays or structures in code compiled without that switch.
@item -msvr3-shlib
@itemx -mno-sse
@item -msse2
@itemx -mno-sse2
-@item -mpni
-@itemx -mno-pni
+@item -msse3
+@itemx -mno-sse3
@item -m3dnow
@itemx -mno-3dnow
@opindex mmmx
@opindex m3dnow
@opindex mno-3dnow
These switches enable or disable the use of built-in functions that allow
-direct access to the MMX, SSE and 3Dnow extensions of the instruction set.
+direct access to the MMX, SSE, SSE2, SSE3 and 3Dnow extensions of the
+instruction set.
@xref{X86 Built-in Functions}, for details of the functions enabled
and disabled by these switches.
@opindex mno-align-stringops
Do not align destination of inlined string operations. This switch reduces
code size and improves performance in case the destination is already aligned,
-but gcc don't know about it.
+but GCC doesn't know about it.
@item -minline-all-stringops
@opindex minline-all-stringops
explicitly or implicitly, with the GNU linker. This option does not
have any affect on which ld is called, it only changes what parameters
are passed to that ld. The ld that is called is determined by the
-@option{--with-ld} configure option, gcc's program search path, and
+@option{--with-ld} configure option, GCC's program search path, and
finally by the user's @env{PATH}. The linker used by GCC can be printed
using @samp{which `gcc -print-prog-name=ld`}.
implicitly, with the HP linker. This option does not have any affect on
which ld is called, it only changes what parameters are passed to that
ld. The ld that is called is determined by the @option{--with-ld}
-configure option, gcc's program search path, and finally by the user's
+configure option, GCC's program search path, and finally by the user's
@env{PATH}. The linker used by GCC can be printed using @samp{which
`gcc -print-prog-name=ld`}.
+@item -mfdpic
+@opindex mfdpic
+
+Select the FDPIC ABI, that uses function descriptors to represent
+pointers to functions. Without any PIC/PIE-related options, it
+implies @option{-fPIE}. With @option{-fpic} or @option{-fpie}, it
+assumes GOT entries and small data are within a 12-bit range from the
+GOT base address; with @option{-fPIC} or @option{-fPIE}, GOT offsets
+are computed with 32 bits.
+
+@item -minline-plt
+@opindex minline-plt
+
+Enable inlining of PLT entries in function calls to functions that are
+not known to bind locally. It has no effect without @option{-mfdpic}.
+It's enabled by default if optimizing for speed and compiling for
+shared libraries (i.e., @option{-fPIC} or @option{-fpic}), or when an
+optimization option such as @option{-O3} or above is present in the
+command line.
+
+@item -mgprel-ro
+@opindex mgprel-ro
+
+Enable the use of @code{GPREL} relocations in the FDPIC ABI for data
+that is known to be in read-only sections. It's enabled by default,
+except for @option{-fpic} or @option{-fpie}: even though it may help
+make the global offset table smaller, it trades 1 instruction for 4.
+With @option{-fPIC} or @option{-fPIE}, it trades 3 instructions for 4,
+one of which may be shared by multiple symbols, and it avoids the need
+for a GOT entry for the referenced symbol, so it's more likely to be a
+win. If it is not, @option{-mno-gprel-ro} can be used to disable it.
+
+@item -multilib-library-pic
+@opindex multilib-library-pic
+
+Link with the (library, not FD) pic libraries. It's implied by
+@option{-mlibrary-pic}, as well as by @option{-fPIC} and
+@option{-fpic} without @option{-mfdpic}. You should never have to use
+it explicitly.
+
+@item -mlinked-fp
+@opindex mlinked-fp
+
+Follow the EABI requirement of always creating a frame pointer whenever
+a stack frame is allocated. This option is enabled by default and can
+be disabled with @option{-mno-linked-fp}.
+
@item -mlong-calls
@opindex mno-long-calls
Generate code that uses long call sequences. This ensures that a call
linker.
@end table
-@node Intel 960 Options
-@subsection Intel 960 Options
-
-These @samp{-m} options are defined for the Intel 960 implementations:
-
-@table @gcctabopt
-@item -m@var{cpu-type}
-@opindex mka
-@opindex mkb
-@opindex mmc
-@opindex mca
-@opindex mcf
-@opindex msa
-@opindex msb
-Assume the defaults for the machine type @var{cpu-type} for some of
-the other options, including instruction scheduling, floating point
-support, and addressing modes. The choices for @var{cpu-type} are
-@samp{ka}, @samp{kb}, @samp{mc}, @samp{ca}, @samp{cf},
-@samp{sa}, and @samp{sb}.
-The default is
-@samp{kb}.
-
-@item -mnumerics
-@itemx -msoft-float
-@opindex mnumerics
-@opindex msoft-float
-The @option{-mnumerics} option indicates that the processor does support
-floating-point instructions. The @option{-msoft-float} option indicates
-that floating-point support should not be assumed.
-
-@item -mleaf-procedures
-@itemx -mno-leaf-procedures
-@opindex mleaf-procedures
-@opindex mno-leaf-procedures
-Do (or do not) attempt to alter leaf procedures to be callable with the
-@code{bal} instruction as well as @code{call}. This will result in more
-efficient code for explicit calls when the @code{bal} instruction can be
-substituted by the assembler or linker, but less efficient code in other
-cases, such as calls via function pointers, or using a linker that doesn't
-support this optimization.
-
-@item -mtail-call
-@itemx -mno-tail-call
-@opindex mtail-call
-@opindex mno-tail-call
-Do (or do not) make additional attempts (beyond those of the
-machine-independent portions of the compiler) to optimize tail-recursive
-calls into branches. You may not want to do this because the detection of
-cases where this is not valid is not totally complete. The default is
-@option{-mno-tail-call}.
-
-@item -mcomplex-addr
-@itemx -mno-complex-addr
-@opindex mcomplex-addr
-@opindex mno-complex-addr
-Assume (or do not assume) that the use of a complex addressing mode is a
-win on this implementation of the i960. Complex addressing modes may not
-be worthwhile on the K-series, but they definitely are on the C-series.
-The default is currently @option{-mcomplex-addr} for all processors except
-the CB and CC@.
-
-@item -mcode-align
-@itemx -mno-code-align
-@opindex mcode-align
-@opindex mno-code-align
-Align code to 8-byte boundaries for faster fetching (or don't bother).
-Currently turned on by default for C-series implementations only.
-
-@ignore
-@item -mclean-linkage
-@itemx -mno-clean-linkage
-@opindex mclean-linkage
-@opindex mno-clean-linkage
-These options are not fully implemented.
-@end ignore
-
-@item -mic-compat
-@itemx -mic2.0-compat
-@itemx -mic3.0-compat
-@opindex mic-compat
-@opindex mic2.0-compat
-@opindex mic3.0-compat
-Enable compatibility with iC960 v2.0 or v3.0.
-
-@item -masm-compat
-@itemx -mintel-asm
-@opindex masm-compat
-@opindex mintel-asm
-Enable compatibility with the iC960 assembler.
-
-@item -mstrict-align
-@itemx -mno-strict-align
-@opindex mstrict-align
-@opindex mno-strict-align
-Do not permit (do permit) unaligned accesses.
-
-@item -mold-align
-@opindex mold-align
-Enable structure-alignment compatibility with Intel's gcc release version
-1.3 (based on gcc 1.37). This option implies @option{-mstrict-align}.
-
-@item -mlong-double-64
-@opindex mlong-double-64
-Implement type @samp{long double} as 64-bit floating point numbers.
-Without the option @samp{long double} is implemented by 80-bit
-floating point numbers. The only reason we have it because there is
-no 128-bit @samp{long double} support in @samp{fp-bit.c} yet. So it
-is only useful for people using soft-float targets. Otherwise, we
-should recommend against use of it.
-
-@end table
-
@node DEC Alpha Options
@subsection DEC Alpha Options
@table @samp
@item ev4
-@item ev45
+@itemx ev45
@itemx 21064
Schedules as an EV4 and has no instruction set extensions.
Schedules as an EV6 and supports the BWX, FIX, and MAX extensions.
@item ev67
-@item 21264a
+@itemx 21264a
Schedules as an EV6 and supports the BWX, CIX, FIX, and MAX extensions.
@end table
@opindex mrelax
Shorten some address references at link time, when possible; uses the
linker option @option{-relax}. @xref{H8/300,, @code{ld} and the H8/300,
-ld.info, Using ld}, for a fuller description.
+ld, Using ld}, for a fuller description.
@item -mh
@opindex mh
TMS320C40.
@item -mbig-memory
-@item -mbig
+@itemx -mbig
@itemx -msmall-memory
@itemx -msmall
@opindex mbig-memory
@item -mno-app-regs
@opindex mno-app-regs
This option will cause r2 and r5 to be treated as fixed registers.
-
+
@item -mv850e1
@opindex mv850e1
Specify that the target processor is the V850E1. The preprocessor
@item -mlittle-endian
@opindex mlittle-endian
Generate code for a little endian target. This is the default for AIX5
-and Linux.
+and GNU/Linux.
@item -mgnu-as
@itemx -mno-gnu-as
scheduling, but does not always do so.
@end table
-@node D30V Options
-@subsection D30V Options
-@cindex D30V Options
-
-These @samp{-m} options are defined for D30V implementations:
-
-@table @gcctabopt
-@item -mextmem
-@opindex mextmem
-Link the @samp{.text}, @samp{.data}, @samp{.bss}, @samp{.strings},
-@samp{.rodata}, @samp{.rodata1}, @samp{.data1} sections into external
-memory, which starts at location @code{0x80000000}.
-
-@item -mextmemory
-@opindex mextmemory
-Same as the @option{-mextmem} switch.
-
-@item -monchip
-@opindex monchip
-Link the @samp{.text} section into onchip text memory, which starts at
-location @code{0x0}. Also link @samp{.data}, @samp{.bss},
-@samp{.strings}, @samp{.rodata}, @samp{.rodata1}, @samp{.data1} sections
-into onchip data memory, which starts at location @code{0x20000000}.
-
-@item -mno-asm-optimize
-@itemx -masm-optimize
-@opindex mno-asm-optimize
-@opindex masm-optimize
-Disable (enable) passing @option{-O} to the assembler when optimizing.
-The assembler uses the @option{-O} option to automatically parallelize
-adjacent short instructions where possible.
-
-@item -mbranch-cost=@var{n}
-@opindex mbranch-cost
-Increase the internal costs of branches to @var{n}. Higher costs means
-that the compiler will issue more instructions to avoid doing a branch.
-The default is 2.
-
-@item -mcond-exec=@var{n}
-@opindex mcond-exec
-Specify the maximum number of conditionally executed instructions that
-replace a branch. The default is 4.
-@end table
-
@node S/390 and zSeries Options
@subsection S/390 and zSeries Options
@cindex S/390 and zSeries Options
@opindex mno-backchain
Generate (or do not generate) code which maintains an explicit
backchain within the stack frame that points to the caller's frame.
-This is currently needed to allow debugging. The default is to
-generate the backchain.
+This may be needed to allow debugging using tools that do not understand
+DWARF-2 call frame information. The default is not to generate the
+backchain.
@item -msmall-exec
@itemx -mno-small-exec
@opindex m64
@opindex m31
When @option{-m31} is specified, generate code compliant to the
-Linux for S/390 ABI@. When @option{-m64} is specified, generate
-code compliant to the Linux for zSeries ABI@. This allows GCC in
+GNU/Linux for S/390 ABI@. When @option{-m64} is specified, generate
+code compliant to the GNU/Linux for zSeries ABI@. This allows GCC in
particular to generate 64-bit instructions. For the @samp{s390}
targets, the default is @option{-m31}, while the @samp{s390x}
targets default to @option{-m64}.
@itemx -mesa
@opindex mzarch
@opindex mesa
-When @option{-mzarch} is specified, generate code using the
-instructions available on z/Architecture.
-When @option{-mesa} is specified, generate code using the
+When @option{-mzarch} is specified, generate code using the
+instructions available on z/Architecture.
+When @option{-mesa} is specified, generate code using the
instructions available on ESA/390. Note that @option{-mesa} is
not possible with @option{-m64}.
-When generating code compliant to the Linux for S/390 ABI,
+When generating code compliant to the GNU/Linux for S/390 ABI,
the default is @option{-mesa}. When generating code compliant
-to the Linux for zSeries ABI, the default is @option{-mzarch}.
+to the GNU/Linux for zSeries ABI, the default is @option{-mzarch}.
@item -mmvcle
@itemx -mno-mvcle
The options @option{-metrax4} and @option{-metrax100} are synonyms for
@option{-march=v3} and @option{-march=v8} respectively.
+@item -mmul-bug-workaround
+@itemx -mno-mul-bug-workaround
+@opindex mmul-bug-workaround
+@opindex mno-mul-bug-workaround
+Work around a bug in the @code{muls} and @code{mulu} instructions for CPU
+models where it applies. This option is active by default.
+
@item -mpdebug
@opindex mpdebug
Enable CRIS-specific verbose debug-related information in the assembly
Use 64-bit @code{float}. This is the default.
@item -mfloat32
-@item -mno-float64
+@itemx -mno-float64
@opindex mfloat32
@opindex mno-float64
Use 32-bit @code{float}.
@item -mlibrary-pic
@opindex mlibrary-pic
-Enable PIC support for building libraries
+Generate position-independent EABI code.
@item -macc-4
@opindex macc-4
@opindex fno-ident
Ignore the @samp{#ident} directive.
-@item -fno-gnu-linker
-@opindex fno-gnu-linker
-Do not output global initializations (such as C++ constructors and
-destructors) in the form used by the GNU linker (on systems where the GNU
-linker is the standard method of handling them). Use this option when
-you want to use a non-GNU linker, which also requires using the
-@command{collect2} program to make sure the system linker includes
-constructors and destructors. (@command{collect2} is included in the GCC
-distribution.) For systems which @emph{must} use @command{collect2}, the
-compiler driver @command{gcc} is configured to do this automatically.
-
@item -finhibit-size-directive
@opindex finhibit-size-directive
Don't output a @code{.size} assembler directive, or anything else that
the GOT size for the linked executable exceeds a machine-specific
maximum size, you get an error message from the linker indicating that
@option{-fpic} does not work; in that case, recompile with @option{-fPIC}
-instead. (These maximums are 16k on the m88k, 8k on the SPARC, and 32k
+instead. (These maximums are 8k on the SPARC and 32k
on the m68k and RS/6000. The 386 has no such limit.)
Position-independent code requires special support, and therefore works
@opindex fPIC
If supported for the target machine, emit position-independent code,
suitable for dynamic linking and avoiding any limit on the size of the
-global offset table. This option makes a difference on the m68k, m88k,
+global offset table. This option makes a difference on the m68k
and the SPARC.
Position-independent code requires special support, and therefore works
function, so the call site information may not be available to the
profiling functions otherwise.)
-@example
+@smallexample
void __cyg_profile_func_enter (void *this_fn,
void *call_site);
void __cyg_profile_func_exit (void *this_fn,
void *call_site);
-@end example
+@end smallexample
The first argument is the address of the start of the current function,
which may be looked up exactly in the symbol table.
`precompile' a header file; then, if builds can use the precompiled
header file they will be much faster.
+@strong{Caution:} There are a few known situations where GCC will
+crash when trying to use a precompiled header. If you have trouble
+with a precompiled header, you should remove the precompiled header
+and compile without it. In addition, please use GCC's on-line
+defect-tracking system to report any problems you encounter with
+precompiled headers. @xref{Bugs}.
+
To create a precompiled header file, simply compile it as you would any
other file, if necessary using the @option{-x} option to make the driver
treat it as a C or C++ header file. You will probably want to use a
A precompiled header file will be searched for when @code{#include} is
seen in the compilation. As it searches for the included file
-(@pxref{Search Path,,Search Path,cpp.info,The C Preprocessor}) the
+(@pxref{Search Path,,Search Path,cpp,The C Preprocessor}) the
compiler looks for a precompiled header in each directory just before it
looks for the include file in that directory. The name searched for is
the name specified in the @code{#include} with @samp{.gch} appended. If
If you need to precompile the same header file for different
languages, targets, or compiler options, you can instead make a
@emph{directory} named like @file{all.h.gch}, and put each precompiled
-header in the directory. (It doesn't matter what you call the files
-in the directory, every precompiled header in the directory will be
-considered.) The first precompiled header encountered in the
-directory that is valid for this compilation will be used; they're
-searched in no particular order.
+header in the directory, perhaps using @option{-o}. It doesn't matter
+what you call the files in the directory, every precompiled header in
+the directory will be considered. The first precompiled header
+encountered in the directory that is valid for this compilation will
+be used; they're searched in no particular order.
There are many other possibilities, limited only by your imagination,
good sense, and the constraints of your build system.
@itemize
@item
Only one precompiled header can be used in a particular compilation.
+
@item
A precompiled header can't be used once the first C token is seen. You
can have preprocessor directives before a precompiled header; you can
even include a precompiled header from inside another header, so long as
there are no C tokens before the @code{#include}.
+
@item
The precompiled header file must be produced for the same language as
the current compilation. You can't use a C precompiled header for a C++
compilation.
+
@item
The precompiled header file must be produced by the same compiler
version and configuration as the current compilation is using.
The easiest way to guarantee this is to use the same compiler binary
for creating and using precompiled headers.
+
@item
-Any macros defined before the precompiled header (including with
-@option{-D}) must either be defined in the same way as when the
-precompiled header was generated, or must not affect the precompiled
-header, which usually means that the they don't appear in the
-precompiled header at all.
+Any macros defined before the precompiled header is included must
+either be defined in the same way as when the precompiled header was
+generated, or must not affect the precompiled header, which usually
+means that the they don't appear in the precompiled header at all.
+
+The @option{-D} option is one way to define a macro before a
+precompiled header is included; using a @code{#define} can also do it.
+There are also some options that define macros implicitly, like
+@option{-O} and @option{-Wdeprecated}; the same rule applies to macros
+defined this way.
+
+@item If debugging information is output when using the precompiled
+header, using @option{-g} or similar, the same kind of debugging information
+must have been output when building the precompiled header. However,
+a precompiled header built using @option{-g} can be used in a compilation
+when no debugging information is being output.
+
+@item The same @option{-m} options must generally be used when building
+and using the precompiled header. @xref{Submodel Options},
+for any cases where this rule is relaxed.
+
+@item Each of the following options must be the same when building and using
+the precompiled header:
+
+@gccoptlist{-fexceptions -funit-at-a-time}
+
@item
-Certain command-line options must be defined in the same way as when the
-precompiled header was generated. At present, it's not clear which
-options are safe to change and which are not; the safest choice is to
-use exactly the same options when generating and using the precompiled
-header.
+Some other command-line options starting with @option{-f},
+@option{-p}, or @option{-O} must be defined in the same way as when
+the precompiled header was generated. At present, it's not clear
+which options are safe to change and which are not; the safest choice
+is to use exactly the same options when generating and using the
+precompiled header. The following are known to be safe:
+
+@gccoptlist{-pedantic-errors}
+
@end itemize
-For all of these but the last, the compiler will automatically ignore
-the precompiled header if the conditions aren't met. For the last item,
-some option changes will cause the precompiled header to be rejected,
-but not all incompatible option combinations have yet been found. If
-you find a new incompatible combination, please consider filing a bug
-report, see @ref{Bugs}.
+For all of these except the last, the compiler will automatically
+ignore the precompiled header if the conditions aren't met. If you
+find an option combination that doesn't work and doesn't cause the
+precompiled header to be ignored, please consider filing a bug report,
+see @ref{Bugs}.
@node Running Protoize
@section Running Protoize
the existing @samp{.X} file because it is newer than the source file.
For example:
-@example
+@smallexample
gcc -Dfoo=bar file1.c -aux-info file1.X
protoize *.c
-@end example
+@end smallexample
@noindent
You need to include the special files along with the rest in the
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