Many options have long names starting with @samp{-f} or with
@samp{-W}---for example,
-@option{-fstrength-reduce}, @option{-Wformat} and so on. Most of
+@option{-fmove-loop-invariants}, @option{-Wformat} and so on. Most of
these have both positive and negative forms; the negative form of
@option{-ffoo} would be @option{-fno-foo}. This manual documents
only one of these two forms, whichever one is not the default.
@xref{C Dialect Options,,Options Controlling C Dialect}.
@gccoptlist{-ansi -std=@var{standard} -aux-info @var{filename} @gol
-fno-asm -fno-builtin -fno-builtin-@var{function} @gol
--fhosted -ffreestanding -fms-extensions @gol
+-fhosted -ffreestanding -fopenmp -fms-extensions @gol
-trigraphs -no-integrated-cpp -traditional -traditional-cpp @gol
-fallow-single-precision -fcond-mismatch @gol
-fsigned-bitfields -fsigned-char @gol
@item Objective-C and Objective-C++ Language Options
@xref{Objective-C and Objective-C++ Dialect Options,,Options Controlling
Objective-C and Objective-C++ Dialects}.
-@gccoptlist{
--fconstant-string-class=@var{class-name} @gol
+@gccoptlist{-fconstant-string-class=@var{class-name} @gol
-fgnu-runtime -fnext-runtime @gol
-fno-nil-receivers @gol
-fobjc-call-cxx-cdtors @gol
@item Language Independent Options
@xref{Language Independent Options,,Options to Control Diagnostic Messages Formatting}.
@gccoptlist{-fmessage-length=@var{n} @gol
--fdiagnostics-show-location=@r{[}once@r{|}every-line@r{]}} @gol
--fdiagnostics-show-options
+-fdiagnostics-show-location=@r{[}once@r{|}every-line@r{]} @gol
+-fdiagnostics-show-option}
@item Warning Options
@xref{Warning Options,,Options to Request or Suppress Warnings}.
-w -Wextra -Wall -Waggregate-return -Walways-true -Wno-attributes @gol
-Wc++-compat -Wcast-align -Wcast-qual -Wchar-subscripts -Wcomment @gol
-Wconversion -Wno-deprecated-declarations @gol
--Wdisabled-optimization -Wno-div-by-zero -Wno-endif-labels @gol
+-Wdisabled-optimization -Wno-div-by-zero @gol
+-Wempty-body -Wno-endif-labels @gol
-Werror -Werror-* -Werror-implicit-function-declaration @gol
-Wfatal-errors -Wfloat-equal -Wformat -Wformat=2 @gol
-Wno-format-extra-args -Wformat-nonliteral @gol
-Wmain -Wmissing-braces -Wmissing-field-initializers @gol
-Wmissing-format-attribute -Wmissing-include-dirs @gol
-Wmissing-noreturn @gol
--Wno-multichar -Wnonnull -Woverlength-strings -Wpacked -Wpadded @gol
+-Wno-multichar -Wnonnull -Wno-overflow @gol
+-Woverlength-strings -Wpacked -Wpadded @gol
-Wparentheses -Wpointer-arith -Wno-pointer-to-int-cast @gol
-Wredundant-decls @gol
-Wreturn-type -Wsequence-point -Wshadow @gol
@item C-only Warning Options
@gccoptlist{-Wbad-function-cast -Wmissing-declarations @gol
-Wmissing-prototypes -Wnested-externs -Wold-style-definition @gol
--Wstrict-prototypes -Wtraditional @gol
+-Wstrict-prototypes -Wtraditional -Wtraditional-conversion @gol
-Wdeclaration-after-statement -Wpointer-sign}
@item Debugging Options
@xref{Debugging Options,,Options for Debugging Your Program or GCC}.
@gccoptlist{-d@var{letters} -dumpspecs -dumpmachine -dumpversion @gol
--fdump-unnumbered -fdump-translation-unit@r{[}-@var{n}@r{]} @gol
+-fdump-noaddr -fdump-unnumbered -fdump-translation-unit@r{[}-@var{n}@r{]} @gol
-fdump-class-hierarchy@r{[}-@var{n}@r{]} @gol
-fdump-ipa-all -fdump-ipa-cgraph @gol
-fdump-tree-all @gol
-ftree-vectorizer-verbose=@var{n} @gol
-fdump-tree-storeccp@r{[}-@var{n}@r{]} @gol
-feliminate-dwarf2-dups -feliminate-unused-debug-types @gol
--feliminate-unused-debug-symbols -fmem-report -fprofile-arcs @gol
+-feliminate-unused-debug-symbols -femit-class-debug-always @gol
+-fmem-report -fprofile-arcs @gol
-frandom-seed=@var{string} -fsched-verbose=@var{n} @gol
-ftest-coverage -ftime-report -fvar-tracking @gol
-g -g@var{level} -gcoff -gdwarf-2 @gol
-fcse-skip-blocks -fcx-limited-range -fdata-sections @gol
-fdelayed-branch -fdelete-null-pointer-checks -fearly-inlining @gol
-fexpensive-optimizations -ffast-math -ffloat-store @gol
--fforce-addr -ffunction-sections @gol
+-fforce-addr -fforward-propagate -ffunction-sections @gol
-fgcse -fgcse-lm -fgcse-sm -fgcse-las -fgcse-after-reload @gol
--floop-optimize -fcrossjumping -fif-conversion -fif-conversion2 @gol
+-fcrossjumping -fif-conversion -fif-conversion2 @gol
-finline-functions -finline-functions-called-once @gol
-finline-limit=@var{n} -fkeep-inline-functions @gol
-fkeep-static-consts -fmerge-constants -fmerge-all-constants @gol
-fprofile-generate -fprofile-use @gol
-fregmove -frename-registers @gol
-freorder-blocks -freorder-blocks-and-partition -freorder-functions @gol
--frerun-cse-after-loop -frerun-loop-opt @gol
+-frerun-cse-after-loop @gol
-frounding-math -frtl-abstract-sequences @gol
-fschedule-insns -fschedule-insns2 @gol
-fno-sched-interblock -fno-sched-spec -fsched-spec-load @gol
-fsched-spec-load-dangerous @gol
-fsched-stalled-insns=@var{n} -fsched-stalled-insns-dep=@var{n} @gol
-fsched2-use-superblocks @gol
--fsched2-use-traces -freschedule-modulo-scheduled-loops @gol
--fsignaling-nans -fsingle-precision-constant @gol
+-fsched2-use-traces -fsee -freschedule-modulo-scheduled-loops @gol
+-fsection-anchors -fsignaling-nans -fsingle-precision-constant @gol
-fstack-protector -fstack-protector-all @gol
--fstrength-reduce -fstrict-aliasing -ftracer -fthread-jumps @gol
+-fstrict-aliasing -ftracer -fthread-jumps @gol
-funroll-all-loops -funroll-loops -fpeel-loops @gol
-fsplit-ivs-in-unroller -funswitch-loops @gol
-fvariable-expansion-in-unroller @gol
-ftree-loop-linear -ftree-loop-im -ftree-loop-ivcanon -fivopts @gol
-ftree-dominator-opts -ftree-dse -ftree-copyrename -ftree-sink @gol
-ftree-ch -ftree-sra -ftree-ter -ftree-lrs -ftree-fre -ftree-vectorize @gol
--ftree-vect-loop-version -ftree-salias -fweb @gol
+-ftree-vect-loop-version -ftree-salias -fipa-pta -fweb @gol
-ftree-copy-prop -ftree-store-ccp -ftree-store-copy-prop -fwhole-program @gol
--param @var{name}=@var{value}
-O -O0 -O1 -O2 -O3 -Os}
@emph{Blackfin Options}
@gccoptlist{-momit-leaf-frame-pointer -mno-omit-leaf-frame-pointer @gol
-mspecld-anomaly -mno-specld-anomaly -mcsync-anomaly -mno-csync-anomaly @gol
--mlow-64k -mno-low64k -mid-shared-library @gol
+-mlow-64k -mno-low64k -mstack-check-l1 -mid-shared-library @gol
-mno-id-shared-library -mshared-library-id=@var{n} @gol
--mlong-calls -mno-long-calls}
+-mleaf-id-shared-library -mno-leaf-id-shared-library @gol
+-msep-data -mno-sep-data -mlong-calls -mno-long-calls}
@emph{CRIS Options}
@gccoptlist{-mcpu=@var{cpu} -march=@var{cpu} -mtune=@var{cpu} @gol
-twolevel_namespace -umbrella -undefined @gol
-unexported_symbols_list -weak_reference_mismatches @gol
-whatsloaded -F -gused -gfull -mmacosx-version-min=@var{version} @gol
--mone-byte-bool}
+-mkernel -mone-byte-bool}
@emph{DEC Alpha Options}
@gccoptlist{-mno-fp-regs -msoft-float -malpha-as -mgas @gol
-mTLS -mtls @gol
-mcpu=@var{cpu}}
+@emph{GNU/Linux Options}
+@gccoptlist{-muclibc}
+
@emph{H8/300 Options}
@gccoptlist{-mrelax -mh -ms -mn -mint32 -malign-300}
-mno-fp-ret-in-387 -msoft-float -msvr3-shlib @gol
-mno-wide-multiply -mrtd -malign-double @gol
-mpreferred-stack-boundary=@var{num} @gol
--mmmx -msse -msse2 -msse3 -m3dnow -msselibm @gol
+-mmmx -msse -msse2 -msse3 -mssse3 -m3dnow @gol
-mthreads -mno-align-stringops -minline-all-stringops @gol
-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol
-m96bit-long-double -mregparm=@var{num} -msseregparm @gol
+-mstackrealign @gol
-momit-leaf-frame-pointer -mno-red-zone -mno-tls-direct-seg-refs @gol
-mcmodel=@var{code-model} @gol
-m32 -m64 -mlarge-data-threshold=@var{num}}
-minline-sqrt-min-latency -minline-sqrt-max-throughput @gol
-mno-dwarf2-asm -mearly-stop-bits @gol
-mfixed-range=@var{register-range} -mtls-size=@var{tls-size} @gol
--mtune=@var{cpu-type} -mt -pthread -milp32 -mlp64}
+-mtune=@var{cpu-type} -mt -pthread -milp32 -mlp64 @gol
+-mno-sched-br-data-spec -msched-ar-data-spec -mno-sched-control-spec @gol
+-msched-br-in-data-spec -msched-ar-in-data-spec -msched-in-control-spec @gol
+-msched-ldc -mno-sched-control-ldc -mno-sched-spec-verbose @gol
+-mno-sched-prefer-non-data-spec-insns @gol
+-mno-sched-prefer-non-control-spec-insns @gol
+-mno-sched-count-spec-in-critical-path}
@emph{M32R/D Options}
@gccoptlist{-m32r2 -m32rx -m32r @gol
@gccoptlist{-EL -EB -march=@var{arch} -mtune=@var{arch} @gol
-mips1 -mips2 -mips3 -mips4 -mips32 -mips32r2 -mips64 @gol
-mips16 -mno-mips16 -mabi=@var{abi} -mabicalls -mno-abicalls @gol
--mxgot -mno-xgot -mgp32 -mgp64 -mfp32 -mfp64 @gol
--mhard-float -msoft-float -msingle-float -mdouble-float @gol
--mdsp -mpaired-single -mips3d @gol
+-mshared -mno-shared -mxgot -mno-xgot -mgp32 -mgp64 @gol
+-mfp32 -mfp64 -mhard-float -msoft-float @gol
+-msingle-float -mdouble-float -mdsp -mpaired-single -mips3d @gol
-mlong64 -mlong32 -msym32 -mno-sym32 @gol
-G@var{num} -membedded-data -mno-embedded-data @gol
-muninit-const-in-rodata -mno-uninit-const-in-rodata @gol
-mpowerpc-gpopt -mno-powerpc-gpopt @gol
-mpowerpc-gfxopt -mno-powerpc-gfxopt @gol
-mmfcrf -mno-mfcrf -mpopcntb -mno-popcntb -mfprnd -mno-fprnd @gol
+-mmfpgpr -mno-mfpgpr @gol
-mnew-mnemonics -mold-mnemonics @gol
-mfull-toc -mminimal-toc -mno-fp-in-toc -mno-sum-in-toc @gol
-m64 -m32 -mxl-compat -mno-xl-compat -mpe @gol
-mspe=yes -mspe=no @gol
-mvrsave -mno-vrsave @gol
-mmulhw -mno-mulhw @gol
+-mdlmzb -mno-dlmzb @gol
-mfloat-gprs=yes -mfloat-gprs=no -mfloat-gprs=single -mfloat-gprs=double @gol
-mprototype -mno-prototype @gol
-msim -mmvme -mads -myellowknife -memb -msdata @gol
-mtpf-trace -mno-tpf-trace -mfused-madd -mno-fused-madd @gol
-mwarn-framesize -mwarn-dynamicstack -mstack-size -mstack-guard}
+@emph{Score Options}
+@gccoptlist{-mel -mel @gol
+-mmac @gol
+-mscore5u -mscore7}
+
@emph{SH Options}
@gccoptlist{-m1 -m2 -m2e -m3 -m3e @gol
-m4-nofpu -m4-single-only -m4-single -m4 @gol
-m5-compact -m5-compact-nofpu @gol
-mb -ml -mdalign -mrelax @gol
-mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol
--mieee -misize -mpadstruct -mspace @gol
+-mieee -misize -minline-ic_invalidate -mpadstruct -mspace @gol
-mprefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol
-mdivsi3_libfunc=@var{name} @gol
-madjust-unroll -mindexed-addressing -mgettrcost=@var{number} -mpt-fixed @gol
-mv8plus -mno-v8plus -mvis -mno-vis
-threads -pthreads -pthread}
+@emph{SPU Options}
+@gccoptlist{-mwarn-reloc -merror-reloc @gol
+-msafe-dma -munsafe-dma @gol
+-mbranch-hints @gol
+-msmall-mem -mlarge-mem -mstdmain @gol
+-mfixed-range=@var{register-range}}
+
@emph{System V Options}
@gccoptlist{-Qy -Qn -YP,@var{paths} -Ym,@var{dir}}
-fno-common -fno-ident @gol
-fpcc-struct-return -fpic -fPIC -fpie -fPIE @gol
-fno-jump-tables @gol
--freg-struct-return -fshared-data -fshort-enums @gol
+-frecord-gcc-switches @gol
+-freg-struct-return -fshort-enums @gol
-fshort-double -fshort-wchar @gol
-fverbose-asm -fpack-struct[=@var{n}] -fstack-check @gol
-fstack-limit-register=@var{reg} -fstack-limit-symbol=@var{sym} @gol
-fargument-alias -fargument-noalias @gol
--fargument-noalias-global -fleading-underscore @gol
--ftls-model=@var{model} @gol
+-fargument-noalias-global -fargument-noalias-anything
+-fleading-underscore -ftls-model=@var{model} @gol
-ftrapv -fwrapv -fbounds-check @gol
--fvisibility -fopenmp}
+-fvisibility}
@end table
@menu
objective-c++ objective-c++-header objective-c++-cpp-output
assembler assembler-with-cpp
ada
-f77 f77-cpp-input
f95 f95-cpp-input
java
treelang
phase of the compiler returns a non-success return code. If you specify
@option{-pass-exit-codes}, the @command{gcc} program will instead return with
numerically highest error produced by any phase that returned an error
-indication.
+indication. The C, C++, and Fortran frontends return 4, if an internal
+compiler error is encountered.
@end table
If you only want some of the stages of compilation, you can use
@findex g++
@findex c++
-However, C++ programs often require class libraries as well as a
-compiler that understands the C++ language---and under some
-circumstances, you might want to compile programs or header files from
-standard input, or otherwise without a suffix that flags them as C++
-programs. You might also like to precompile a C header file with a
-@samp{.h} extension to be used in C++ compilations. @command{g++} is a
-program that calls GCC with the default language set to C++, and
-automatically specifies linking against the C++ library. On many
-systems, @command{g++} is also installed with the name @command{c++}.
+However, the use of @command{gcc} does not add the C++ library.
+@command{g++} is a program that calls GCC and treats @samp{.c},
+@samp{.h} and @samp{.i} files as C++ source files instead of C source
+files unless @option{-x} is used, and automatically specifies linking
+against the C++ library. This program is also useful when
+precompiling a C header file with a @samp{.h} extension for use in C++
+compilations. On many systems, @command{g++} is also installed with
+the name @command{c++}.
@cindex invoking @command{g++}
When you compile C++ programs, you may specify many of the same
@item gnu++98
The same as @option{-std=c++98} plus GNU extensions. This is the
default for C++ code.
+
+@item c++0x
+The working draft of the upcoming ISO C++0x standard. This option
+enables experimental features that are likely to be included in
+C++0x. The working draft is constantly changing, and any feature that is
+enabled by this flag may be removed from future versions of GCC if it is
+not part of the C++0x standard.
+
+@item gnu++0x
+The same as @option{-std=c++0x} plus GNU extensions. As with
+@option{-std=c++0x}, this option enables experimental features that may
+be removed in future versions of GCC.
@end table
Even when this option is not specified, you can still use some of the
@xref{Standards,,Language Standards Supported by GCC}, for details of
freestanding and hosted environments.
+@item -fopenmp
+@opindex fopenmp
+@cindex openmp parallel
+Enable handling of OpenMP directives @code{#pragma omp} in C/C++ and
+@code{!$omp} in Fortran. When @option{-fopenmp} is specified, the
+compiler generates parallel code according to the OpenMP Application
+Program Interface v2.5 @w{@uref{http://www.openmp.org/}}.
+
@item -fms-extensions
@opindex fms-extensions
Accept some non-standard constructs used in Microsoft header files.
(@samp{dynamic_cast} and @samp{typeid}). If you don't use those parts
of the language, you can save some space by using this flag. Note that
exception handling uses the same information, but it will generate it as
-needed.
+needed. The @samp{dynamic_cast} operator can still be used for casts that
+do not require runtime type information, i.e. casts to @code{void *} or to
+unambiguous base classes.
@item -fstats
@opindex fstats
destructors, but will only work if your C library supports
@code{__cxa_atexit}.
+@item -fno-use-cxa-get-exception-ptr
+@opindex fno-use-cxa-get-exception-ptr
+Don't use the @code{__cxa_get_exception_ptr} runtime routine. This
+will cause @code{std::uncaught_exception} to be incorrect, but is necessary
+if the runtime routine is not available.
+
@item -fvisibility-inlines-hidden
@opindex fvisibility-inlines-hidden
-Causes all inlined methods to be marked with
+This switch declares that the user does not attempt to compare
+pointers to inline methods where the addresses of the two functions
+were taken in different shared objects.
+
+The effect of this is that GCC may, effectively, mark inline methods with
@code{__attribute__ ((visibility ("hidden")))} so that they do not
appear in the export table of a DSO and do not require a PLT indirection
when used within the DSO@. Enabling this option can have a dramatic effect
on load and link times of a DSO as it massively reduces the size of the
-dynamic export table when the library makes heavy use of templates. While
-it can cause bloating through duplication of code within each DSO where
-it is used, often the wastage is less than the considerable space occupied
-by a long symbol name in the export table which is typical when using
-templates and namespaces. For even more savings, combine with the
-@option{-fvisibility=hidden} switch.
+dynamic export table when the library makes heavy use of templates.
+
+The behaviour of this switch is not quite the same as marking the
+methods as hidden directly, because it does not affect static variables
+local to the function or cause the compiler to deduce that
+the function is defined in only one shared object.
+
+You may mark a method as having a visibility explicitly to negate the
+effect of the switch for that method. For example, if you do want to
+compare pointers to a particular inline method, you might mark it as
+having default visibility. Marking the enclosing class with explicit
+visibility will have no effect.
+
+Explicitly instantiated inline methods are unaffected by this option
+as their linkage might otherwise cross a shared library boundary.
+@xref{Template Instantiation}.
@item -fno-weak
@opindex fno-weak
prefix) for physical lines that result from the process of breaking
a message which is too long to fit on a single line.
-@item -fdiagnostics-show-options
-@opindex fdiagnostics-show-options
+@item -fdiagnostics-show-option
+@opindex fdiagnostics-show-option
This option instructs the diagnostic machinery to add text to each
diagnostic emitted, which indicates which command line option directly
controls that diagnostic, when such an option is known to the
Warn if parentheses are omitted in certain contexts, such
as when there is an assignment in a context where a truth value
is expected, or when operators are nested whose precedence people
-often get confused about. Only the warning for an assignment used as
-a truth value is supported when compiling C++; the other warnings are
-only supported when compiling C@.
+often get confused about.
Also warn if a comparison like @samp{x<=y<=z} appears; this is
equivalent to @samp{(x<=y ? 1 : 0) <= z}, which is a different
@end group
@end smallexample
-In C, every @code{else} branch belongs to the innermost possible @code{if}
-statement, which in this example is @code{if (b)}. This is often not
-what the programmer expected, as illustrated in the above example by
-indentation the programmer chose. When there is the potential for this
-confusion, GCC will issue a warning when this flag is specified.
-To eliminate the warning, add explicit braces around the innermost
-@code{if} statement so there is no way the @code{else} could belong to
-the enclosing @code{if}. The resulting code would look like this:
+In C/C++, every @code{else} branch belongs to the innermost possible
+@code{if} statement, which in this example is @code{if (b)}. This is
+often not what the programmer expected, as illustrated in the above
+example by indentation the programmer chose. When there is the
+potential for this confusion, GCC will issue a warning when this flag
+is specified. To eliminate the warning, add explicit braces around
+the innermost @code{if} statement so there is no way the @code{else}
+could belong to the enclosing @code{if}. The resulting code would
+look like this:
@smallexample
@group
@item -Wunused-variable
@opindex Wunused-variable
Warn whenever a local variable or non-constant static variable is unused
-aside from its declaration
+aside from its declaration.
This warning is enabled by @option{-Wall}.
To suppress this warning use the @samp{unused} attribute
These warnings are possible only in optimizing compilation,
because they require data flow information that is computed only
-when optimizing. If you don't specify @option{-O}, you simply won't
-get these warnings.
+when optimizing. If you do not specify @option{-O}, you will not get
+these warnings. Instead, GCC will issue a warning about @option{-Wuninitialized}
+requiring @option{-O}.
If you want to warn about code which uses the uninitialized value of the
variable in its own initializer, use the @option{-Winit-self} option.
@option{-Wmissing-field-initializers}.
@item
+An initialized field without side effects is overridden when using
+designated initializers (@pxref{Designated Inits, , Designated
+Initializers}). This warning can be independently controlled by
+@option{-Woverride-init}.
+
+@item
A function parameter is declared without a type specifier in K&R-style
functions:
@end smallexample
@item
-An empty body occurs in an @samp{if} or @samp{else} statement.
+An empty body occurs in an @samp{if} or @samp{else} statement. This
+warning can be independently controlled by @option{-Wempty-body}.
@item
A pointer is compared against integer zero with @samp{<}, @samp{<=},
Conversions by prototypes between fixed/floating point values and vice
versa. The absence of these prototypes when compiling with traditional
C would cause serious problems. This is a subset of the possible
-conversion warnings, for the full set use @option{-Wconversion}.
+conversion warnings, for the full set use @option{-Wtraditional-conversion}.
@item
Use of ISO C style function definitions. This warning intentionally is
traditional C compatibility.
@end itemize
+@item -Wtraditional-conversion @r{(C only)}
+@opindex Wtraditional-conversion
+Warn if a prototype causes a type conversion that is different from what
+would happen to the same argument in the absence of a prototype. This
+includes conversions of fixed point to floating and vice versa, and
+conversions changing the width or signedness of a fixed point argument
+except when the same as the default promotion.
+
@item -Wdeclaration-after-statement @r{(C only)}
@opindex Wdeclaration-after-statement
Warn when a declaration is found after a statement in a block. This
char[@var{length}]} so that
copying the address of one into a non-@code{const} @code{char *}
pointer will get a warning; when compiling C++, warn about the
-deprecated conversion from string constants to @code{char *}.
+deprecated conversion from string literals to @code{char *}. This
+warning, by default, is enabled for C++ programs.
These warnings will help you find at
compile time code that can try to write into a string constant, but
only if you have been very careful about using @code{const} in
@item -Wconversion
@opindex Wconversion
-Warn if a prototype causes a type conversion that is different from what
-would happen to the same argument in the absence of a prototype. This
-includes conversions of fixed point to floating and vice versa, and
-conversions changing the width or signedness of a fixed point argument
-except when the same as the default promotion.
-
-Also, warn if a negative integer constant expression is implicitly
-converted to an unsigned type. For example, warn about the assignment
-@code{x = -1} if @code{x} is unsigned. But do not warn about explicit
-casts like @code{(unsigned) -1}.
+Warn for implicit conversions that may alter a value. This includes
+conversions between real and integer, like @code{abs (x)} when
+@code{x} is @code{double}; conversions between signed and unsigned,
+like @code{unsigned ui = -1}; and conversions to smaller types, like
+@code{sqrtf (M_PI)}. Do not warn for explicit casts like @code{abs
+((int) x)} and @code{ui = (unsigned) -1}, or if the value is not
+changed by the conversion like in @code{abs (2.0)}.
+
+@item -Wempty-body
+@opindex Wempty-body
+An empty body occurs in an @samp{if} or @samp{else} statement.
+This warning is also enabled by @option{-Wextra}.
@item -Wsign-compare
@opindex Wsign-compare
been applied. For instance @code{\u207F}, ``SUPERSCRIPT LATIN SMALL
LETTER N'', will display just like a regular @code{n} which has been
placed in a superscript. ISO 10646 defines the @dfn{NFKC}
-normalisation scheme to convert all these into a standard form as
+normalization scheme to convert all these into a standard form as
well, and GCC will warn if your code is not in NFKC if you use
@option{-Wnormalized=nfkc}. This warning is comparable to warning
about every identifier that contains the letter O because it might be
@item -Wno-deprecated-declarations
@opindex Wno-deprecated-declarations
-Do not warn about uses of functions, variables, and types marked as
-deprecated by using the @code{deprecated} attribute.
-(@pxref{Function Attributes}, @pxref{Variable Attributes},
-@pxref{Type Attributes}.)
+Do not warn about uses of functions (@pxref{Function Attributes}),
+variables (@pxref{Variable Attributes}), and types (@pxref{Type
+Attributes}) marked as deprecated by using the @code{deprecated}
+attribute.
+
+@item -Wno-overflow
+@opindex Wno-overflow
+Do not warn about compile-time overflow in constant expressions.
+
+@item -Woverride-init
+@opindex Woverride-init
+@opindex W
+@opindex Wextra
+Warn if an initialized field without side effects is overridden when
+using designated initializers (@pxref{Designated Inits, , Designated
+Initializers}).
+
+This warning is included in @option{-Wextra}. To get other
+@option{-Wextra} warnings without this one, use @samp{-Wextra
+-Wno-override-init}.
@item -Wpacked
@opindex Wpacked
Produce debugging information in stabs format (if that is supported),
for only symbols that are actually used.
+@item -femit-class-debug-always
+Instead of emitting debugging information for a C++ class in only one
+object file, emit it in all object files using the class. This option
+should be used only with debuggers that are unable to handle the way GCC
+normally emits debugging information for classes because using this
+option will increase the size of debugging information by as much as a
+factor of two.
+
@item -gstabs+
@opindex gstabs+
Produce debugging information in stabs format (if that is supported),
@opindex dA
Annotate the assembler output with miscellaneous debugging information.
-@item -db
-@itemx -fdump-rtl-bp
-@opindex db
-@opindex fdump-rtl-bp
-Dump after computing branch probabilities, to @file{@var{file}.09.bp}.
-
@item -dB
@itemx -fdump-rtl-bbro
@opindex dB
@opindex fdump-rtl-bbro
-Dump after block reordering, to @file{@var{file}.30.bbro}.
+Dump after block reordering, to @file{@var{file}.148r.bbro}.
@item -dc
@itemx -fdump-rtl-combine
@opindex dc
@opindex fdump-rtl-combine
-Dump after instruction combination, to the file @file{@var{file}.17.combine}.
+Dump after instruction combination, to the file @file{@var{file}.129r.combine}.
@item -dC
@itemx -fdump-rtl-ce1
@opindex fdump-rtl-ce1
@opindex fdump-rtl-ce2
@option{-dC} and @option{-fdump-rtl-ce1} enable dumping after the
-first if conversion, to the file @file{@var{file}.11.ce1}. @option{-dC}
+first if conversion, to the file @file{@var{file}.117r.ce1}. @option{-dC}
and @option{-fdump-rtl-ce2} enable dumping after the second if
-conversion, to the file @file{@var{file}.18.ce2}.
+conversion, to the file @file{@var{file}.130r.ce2}.
@item -dd
@itemx -fdump-rtl-btl
@itemx -fdump-rtl-ce3
@opindex dE
@opindex fdump-rtl-ce3
-Dump after the third if conversion, to @file{@var{file}.28.ce3}.
+Dump after the third if conversion, to @file{@var{file}.146r.ce3}.
@item -df
@itemx -fdump-rtl-cfg
@opindex fdump-rtl-cfg
@opindex fdump-rtl-life
@option{-df} and @option{-fdump-rtl-cfg} enable dumping after control
-and data flow analysis, to @file{@var{file}.08.cfg}. @option{-df}
+and data flow analysis, to @file{@var{file}.116r.cfg}. @option{-df}
and @option{-fdump-rtl-cfg} enable dumping dump after life analysis,
-to @file{@var{file}.16.life}.
+to @file{@var{file}.128r.life1} and @file{@var{file}.135r.life2}.
@item -dg
@itemx -fdump-rtl-greg
@opindex dg
@opindex fdump-rtl-greg
-Dump after global register allocation, to @file{@var{file}.23.greg}.
+Dump after global register allocation, to @file{@var{file}.139r.greg}.
@item -dG
@itemx -fdump-rtl-gcse
@opindex fdump-rtl-gcse
@opindex fdump-rtl-bypass
@option{-dG} and @option{-fdump-rtl-gcse} enable dumping after GCSE, to
-@file{@var{file}.05.gcse}. @option{-dG} and @option{-fdump-rtl-bypass}
+@file{@var{file}.114r.gcse}. @option{-dG} and @option{-fdump-rtl-bypass}
enable dumping after jump bypassing and control flow optimizations, to
-@file{@var{file}.07.bypass}.
+@file{@var{file}.115r.bypass}.
@item -dh
@itemx -fdump-rtl-eh
@itemx -fdump-rtl-sibling
@opindex di
@opindex fdump-rtl-sibling
-Dump after sibling call optimizations, to @file{@var{file}.01.sibling}.
+Dump after sibling call optimizations, to @file{@var{file}.106r.sibling}.
@item -dj
@itemx -fdump-rtl-jump
@opindex dj
@opindex fdump-rtl-jump
-Dump after the first jump optimization, to @file{@var{file}.03.jump}.
+Dump after the first jump optimization, to @file{@var{file}.112r.jump}.
@item -dk
@itemx -fdump-rtl-stack
@opindex dk
@opindex fdump-rtl-stack
-Dump after conversion from registers to stack, to @file{@var{file}.33.stack}.
+Dump after conversion from registers to stack, to @file{@var{file}.152r.stack}.
@item -dl
@itemx -fdump-rtl-lreg
@opindex dl
@opindex fdump-rtl-lreg
-Dump after local register allocation, to @file{@var{file}.22.lreg}.
+Dump after local register allocation, to @file{@var{file}.138r.lreg}.
@item -dL
-@itemx -fdump-rtl-loop
@itemx -fdump-rtl-loop2
@opindex dL
-@opindex fdump-rtl-loop
@opindex fdump-rtl-loop2
-@option{-dL} and @option{-fdump-rtl-loop} enable dumping after the first
-loop optimization pass, to @file{@var{file}.06.loop}. @option{-dL} and
-@option{-fdump-rtl-loop2} enable dumping after the second pass, to
-@file{@var{file}.13.loop2}.
+@option{-dL} and @option{-fdump-rtl-loop2} enable dumping after the
+loop optimization pass, to @file{@var{file}.119r.loop2},
+@file{@var{file}.120r.loop2_init},
+@file{@var{file}.121r.loop2_invariant}, and
+@file{@var{file}.125r.loop2_done}.
@item -dm
@itemx -fdump-rtl-sms
@opindex dm
@opindex fdump-rtl-sms
-Dump after modulo scheduling, to @file{@var{file}.20.sms}.
+Dump after modulo scheduling, to @file{@var{file}.136r.sms}.
@item -dM
@itemx -fdump-rtl-mach
@opindex dM
@opindex fdump-rtl-mach
Dump after performing the machine dependent reorganization pass, to
-@file{@var{file}.35.mach}.
+@file{@var{file}.155r.mach}.
@item -dn
@itemx -fdump-rtl-rnreg
@opindex dn
@opindex fdump-rtl-rnreg
-Dump after register renumbering, to @file{@var{file}.29.rnreg}.
+Dump after register renumbering, to @file{@var{file}.147r.rnreg}.
@item -dN
@itemx -fdump-rtl-regmove
@opindex dN
@opindex fdump-rtl-regmove
-Dump after the register move pass, to @file{@var{file}.19.regmove}.
+Dump after the register move pass, to @file{@var{file}.132r.regmove}.
@item -do
@itemx -fdump-rtl-postreload
@itemx -fdump-rtl-expand
@opindex dr
@opindex fdump-rtl-expand
-Dump after RTL generation, to @file{@var{file}.00.expand}.
+Dump after RTL generation, to @file{@var{file}.104r.expand}.
@item -dR
@itemx -fdump-rtl-sched2
@opindex dR
@opindex fdump-rtl-sched2
-Dump after the second scheduling pass, to @file{@var{file}.32.sched2}.
+Dump after the second scheduling pass, to @file{@var{file}.149r.sched2}.
@item -ds
@itemx -fdump-rtl-cse
@opindex ds
@opindex fdump-rtl-cse
Dump after CSE (including the jump optimization that sometimes follows
-CSE), to @file{@var{file}.04.cse}.
+CSE), to @file{@var{file}.113r.cse}.
@item -dS
-@itemx -fdump-rtl-sched
+@itemx -fdump-rtl-sched1
@opindex dS
-@opindex fdump-rtl-sched
-Dump after the first scheduling pass, to @file{@var{file}.21.sched}.
+@opindex fdump-rtl-sched1
+Dump after the first scheduling pass, to @file{@var{file}.136r.sched1}.
@item -dt
@itemx -fdump-rtl-cse2
@opindex dt
@opindex fdump-rtl-cse2
Dump after the second CSE pass (including the jump optimization that
-sometimes follows CSE), to @file{@var{file}.15.cse2}.
+sometimes follows CSE), to @file{@var{file}.127r.cse2}.
@item -dT
@itemx -fdump-rtl-tracer
@opindex dT
@opindex fdump-rtl-tracer
-Dump after running tracer, to @file{@var{file}.12.tracer}.
+Dump after running tracer, to @file{@var{file}.118r.tracer}.
@item -dV
@itemx -fdump-rtl-vpt
@option{-dV} and @option{-fdump-rtl-vpt} enable dumping after the value
profile transformations, to @file{@var{file}.10.vpt}. @option{-dV}
and @option{-fdump-rtl-vartrack} enable dumping after variable tracking,
-to @file{@var{file}.34.vartrack}.
+to @file{@var{file}.154r.vartrack}.
@item -dw
@itemx -fdump-rtl-flow2
@opindex dw
@opindex fdump-rtl-flow2
-Dump after the second flow pass, to @file{@var{file}.26.flow2}.
+Dump after the second flow pass, to @file{@var{file}.142r.flow2}.
@item -dz
@itemx -fdump-rtl-peephole2
@opindex dz
@opindex fdump-rtl-peephole2
-Dump after the peephole pass, to @file{@var{file}.27.peephole2}.
+Dump after the peephole pass, to @file{@var{file}.145r.peephole2}.
@item -dZ
@itemx -fdump-rtl-web
@opindex dZ
@opindex fdump-rtl-web
-Dump after live range splitting, to @file{@var{file}.14.web}.
+Dump after live range splitting, to @file{@var{file}.126r.web}.
@item -da
@itemx -fdump-rtl-all
Dump debugging information during parsing, to standard error.
@end table
+@item -fdump-noaddr
+@opindex fdump-noaddr
+When doing debugging dumps (see @option{-d} option above), suppress
+address output. This makes it more feasible to use diff on debugging
+dumps for compiler invocations with different compiler binaries and/or
+different text / bss / data / heap / stack / dso start locations.
+
@item -fdump-unnumbered
@opindex fdump-unnumbered
When doing debugging dumps (see @option{-d} option above), suppress instruction
-numbers and line number note output. This makes it more feasible to
+numbers, line number note and address output. This makes it more feasible to
use diff on debugging dumps for compiler invocations with different
options, in particular with and without @option{-g}.
@item -ftree-vectorizer-verbose=@var{n}
@opindex ftree-vectorizer-verbose
This option controls the amount of debugging output the vectorizer prints.
-This information is written to standard error, unless @option{-fdump-tree-all}
-or @option{-fdump-tree-vect} is specified, in which case it is output to the
-usual dump listing file, @file{.vect}.
+This information is written to standard error, unless
+@option{-fdump-tree-all} or @option{-fdump-tree-vect} is specified,
+in which case it is output to the usual dump listing file, @file{.vect}.
+For @var{n}=0 no diagnostic information is reported.
+If @var{n}=1 the vectorizer reports each loop that got vectorized,
+and the total number of loops that got vectorized.
+If @var{n}=2 the vectorizer also reports non-vectorized loops that passed
+the first analysis phase (vect_analyze_loop_form) - i.e. countable,
+inner-most, single-bb, single-entry/exit loops. This is the same verbosity
+level that @option{-fdump-tree-vect-stats} uses.
+Higher verbosity levels mean either more information dumped for each
+reported loop, or same amount of information reported for more loops:
+If @var{n}=3, alignment related information is added to the reports.
+If @var{n}=4, data-references related information (e.g. memory dependences,
+memory access-patterns) is added to the reports.
+If @var{n}=5, the vectorizer reports also non-vectorized inner-most loops
+that did not pass the first analysis phase (i.e. may not be countable, or
+may have complicated control-flow).
+If @var{n}=6, the vectorizer reports also non-vectorized nested loops.
+For @var{n}=7, all the information the vectorizer generates during its
+analysis and transformation is reported. This is the same verbosity level
+that @option{-fdump-tree-vect-details} uses.
@item -frandom-seed=@var{string}
@opindex frandom-string
and possibly the ability to debug the program.
The compiler performs optimization based on the knowledge it has of
-the program. Optimization levels @option{-O2} and above, in
+the program. Optimization levels @option{-O} and above, in
particular, enable @emph{unit-at-a-time} mode, which allows the
compiler to consider information gained from later functions in
the file when compiling a function. Compiling multiple files at
-fdelayed-branch @gol
-fguess-branch-probability @gol
-fcprop-registers @gol
--floop-optimize @gol
-fif-conversion @gol
-fif-conversion2 @gol
-ftree-ccp @gol
-ftree-copyrename @gol
-ftree-fre @gol
-ftree-ch @gol
+-funit-at-a-time @gol
-fmerge-constants}
@option{-O} also turns on @option{-fomit-frame-pointer} on machines
-fcse-follow-jumps -fcse-skip-blocks @gol
-fgcse -fgcse-lm @gol
-fexpensive-optimizations @gol
--fstrength-reduce @gol
--frerun-cse-after-loop -frerun-loop-opt @gol
+-frerun-cse-after-loop @gol
-fcaller-saves @gol
-fpeephole2 @gol
-fschedule-insns -fschedule-insns2 @gol
-fstrict-aliasing @gol
-fdelete-null-pointer-checks @gol
-freorder-blocks -freorder-functions @gol
--funit-at-a-time @gol
-falign-functions -falign-jumps @gol
-falign-loops -falign-labels @gol
-ftree-vrp @gol
Force memory address constants to be copied into registers before
doing arithmetic on them.
+@item -fforward-propagate
+@opindex fforward-propagate
+Perform a forward propagation pass on RTL. The pass tries to combine two
+instructions and checks if the result can be simplified. If loop unrolling
+is active, two passes are performed and the second is scheduled after
+loop unrolling.
+
+This option is enabled by default at optimization levels @option{-O2},
+@option{-O3}, @option{-Os}.
+
@item -fomit-frame-pointer
@opindex fomit-frame-pointer
Don't keep the frame pointer in a register for functions that
as follows:
@table @gcctabopt
- @item max-inline-insns-single
- is set to @var{n}/2.
- @item max-inline-insns-auto
- is set to @var{n}/2.
- @item min-inline-insns
- is set to 130 or @var{n}/4, whichever is smaller.
- @item max-inline-insns-rtl
- is set to @var{n}.
+@item max-inline-insns-single
+ is set to @var{n}/2.
+@item max-inline-insns-auto
+ is set to @var{n}/2.
+@item min-inline-insns
+ is set to 130 or @var{n}/4, whichever is smaller.
+@item max-inline-insns-rtl
+ is set to @var{n}.
@end table
See below for a documentation of the individual
In C, emit @code{static} functions that are declared @code{inline}
into the object file, even if the function has been inlined into all
of its callers. This switch does not affect functions using the
-@code{extern inline} extension in GNU C@. In C++, emit any and all
+@code{extern inline} extension in GNU C89@. In C++, emit any and all
inline functions into the object file.
@item -fkeep-static-consts
This option is only meaningful on architectures that support such
instructions, which include x86, PowerPC, IA-64 and S/390.
-The default is @option{-fbranch-count-reg}, enabled when
-@option{-fstrength-reduce} is enabled.
+The default is @option{-fbranch-count-reg}.
@item -fno-function-cse
@opindex fno-function-cse
some protection against outright memory corrupting writes, but allows
erroneously read data to propagate within a program.
-@item -fopenmp
-@opindex fopenmp
-@cindex openmp parallel
-Enable handling of OpenMP directives @code{#pragma omp} in C/C++ and
-@code{!$omp} in Fortran. When @option{-fopenmp} is specified, the
-compiler generates parallel code according to the OpenMP Application
-Program Interface v2.5. To generate the final exectuable, the runtime
-library @code{libgomp} must be linked in using @option{-lgomp}.
-
-@item -fstrength-reduce
-@opindex fstrength-reduce
-Perform the optimizations of loop strength reduction and
-elimination of iteration variables.
-
-Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
-
@item -fthread-jumps
@opindex fthread-jumps
Perform optimizations where we check to see if a jump branches to a
Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
-@item -frerun-loop-opt
-@opindex frerun-loop-opt
-Run the loop optimizer twice.
-
-Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
-
@item -fgcse
@opindex fgcse
Perform a global common subexpression elimination pass.
pass is performed after reload. The purpose of this pass is to cleanup
redundant spilling.
-@item -floop-optimize
-@opindex floop-optimize
-Perform loop optimizations: move constant expressions out of loops, simplify
-exit test conditions and optionally do strength-reduction as well.
-
-Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
-
@item -funsafe-loop-optimizations
@opindex funsafe-loop-optimizations
If given, the loop optimizer will assume that loop indices do not
sense when scheduling after register allocation, i.e.@: with
@option{-fschedule-insns2} or at @option{-O2} or higher.
+@item -fsee
+@opindex fsee
+Eliminates redundant extension instructions and move the non redundant
+ones to optimal placement using LCM.
+
@item -freschedule-modulo-scheduled-loops
@opindex fscheduling-in-modulo-scheduled-loops
The modulo scheduling comes before the traditional scheduling, if a loop was modulo scheduled
Perform structural alias analysis on trees. This flag
is enabled by default at @option{-O} and higher.
+@item -fipa-pta
+Perform interprocedural pointer analysis.
+
@item -ftree-sink
Perform forward store motion on trees. This flag is
enabled by default at @option{-O} and higher.
@item -funroll-loops
@opindex funroll-loops
Unroll loops whose number of iterations can be determined at compile
-time or upon entry to the loop. @option{-funroll-loops} implies both
-@option{-fstrength-reduce} and @option{-frerun-cse-after-loop}. This
-option makes code larger, and may or may not make it run faster.
+time or upon entry to the loop. @option{-funroll-loops} implies
+@option{-frerun-cse-after-loop}. This option makes code larger,
+and may or may not make it run faster.
@item -funroll-all-loops
@opindex funroll-all-loops
If supported by the target machine, generate instructions to prefetch
memory to improve the performance of loops that access large arrays.
-These options may generate better or worse code; results are highly
+This option may generate better or worse code; results are highly
dependent on the structure of loops within the source code.
+Disabled at level @option{-Os}.
+
@item -fno-peephole
@itemx -fno-peephole2
@opindex fno-peephole
@}
@end smallexample
-Every language that wishes to perform language-specific alias analysis
-should define a function that computes, given an @code{tree}
-node, an alias set for the node. Nodes in different alias sets are not
-allowed to alias. For an example, see the C front-end function
-@code{c_get_alias_set}.
-
Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
@item -falign-functions
As a temporary workaround, @option{-fno-unit-at-a-time} can be used,
but this scheme may not be supported by future releases of GCC@.
-Enabled at levels @option{-O2}, @option{-O3}.
+Enabled at levels @option{-O}, @option{-O2}, @option{-O3}, @option{-Os}.
@item -fno-toplevel-reorder
Do not reorder top-level functions, variables, and @code{asm}
generally profitable only with profile feedback available.
The following options are enabled: @code{-fbranch-probabilities}, @code{-fvpt},
-@code{-funroll-loops}, @code{-fpeel-loops}, @code{-ftracer},
-@code{-fno-loop-optimize}.
+@code{-funroll-loops}, @code{-fpeel-loops}, @code{-ftracer}
@end table
@item -fmove-loop-invariants
@opindex fmove-loop-invariants
-Enables the loop invariant motion pass in the new loop optimizer. Enabled
+Enables the loop invariant motion pass in the RTL loop optimizer. Enabled
at level @option{-O1}
@item -funswitch-loops
Move branches with loop invariant conditions out of the loop, with duplicates
of the loop on both branches (modified according to result of the condition).
-@item -fprefetch-loop-arrays
-@opindex fprefetch-loop-arrays
-If supported by the target machine, generate instructions to prefetch
-memory to improve the performance of loops that access large arrays.
-
-Disabled at level @option{-Os}.
-
@item -ffunction-sections
@itemx -fdata-sections
@opindex ffunction-sections
@item -fstack-protector-all
Like @option{-fstack-protector} except that all functions are protected.
+@item -fsection-anchors
+@opindex fsection-anchors
+Try to reduce the number of symbolic address calculations by using
+shared ``anchor'' symbols to address nearby objects. This transformation
+can help to reduce the number of GOT entries and GOT accesses on some
+targets.
+
+For example, the implementation of the following function @code{foo}:
+
+@smallexample
+static int a, b, c;
+int foo (void) @{ return a + b + c; @}
+@end smallexample
+
+would usually calculate the addresses of all three variables, but if you
+compile it with @option{-fsection-anchors}, it will access the variables
+from a common anchor point instead. The effect is similar to the
+following pseudocode (which isn't valid C):
+
+@smallexample
+int foo (void)
+@{
+ register int *xr = &x;
+ return xr[&a - &x] + xr[&b - &x] + xr[&c - &x];
+@}
+@end smallexample
+
+Not all targets support this option.
+
@item --param @var{name}=@var{value}
@opindex param
In some places, GCC uses various constants to control the amount of
The default value is 50 which limits unit growth to 1.5 times the original
size.
+@item large-stack-frame
+The limit specifying large stack frames. While inlining the algorithm is trying
+to not grow past this limit too much. Default value is 256 bytes.
+
+@item large-stack-frame-growth
+Specifies maximal growth of large stack frames caused by inlining in percents.
+The default value is 1000 which limits large stack frame growth to 11 times
+the original size.
+
@item max-inline-insns-recursive
@itemx max-inline-insns-recursive-auto
Specifies maximum number of instructions out-of-line copy of self recursive inline
function can grow into by performing recursive inlining.
For functions declared inline @option{--param max-inline-insns-recursive} is
-taken into acount. For function not declared inline, recursive inlining
+taken into account. For function not declared inline, recursive inlining
happens only when @option{-finline-functions} (included in @option{-O3}) is
enabled and @option{--param max-inline-insns-recursive-auto} is used. The
default value is 450.
Specifies maximum recursion depth used by the recursive inlining.
For functions declared inline @option{--param max-inline-recursive-depth} is
-taken into acount. For function not declared inline, recursive inlining
+taken into account. For function not declared inline, recursive inlining
happens only when @option{-finline-functions} (included in @option{-O3}) is
enabled and @option{--param max-inline-recursive-depth-auto} is used. The
default value is 450.
@item max-cse-insns
The maximum instructions CSE process before flushing. The default is 1000.
-@item global-var-threshold
-
-Counts the number of function calls (@var{n}) and the number of
-call-clobbered variables (@var{v}). If @var{n}x@var{v} is larger than this limit, a
-single artificial variable will be created to represent all the
-call-clobbered variables at function call sites. This artificial
-variable will then be made to alias every call-clobbered variable.
-(done as @code{int * size_t} on the host machine; beware overflow).
-
@item max-aliased-vops
-Maximum number of virtual operands allowed to represent aliases
-before triggering the alias grouping heuristic. Alias grouping
-reduces compile times and memory consumption needed for aliasing at
-the expense of precision loss in alias information.
+Maximum number of virtual operands per statement allowed to represent
+aliases before triggering the alias grouping heuristic. Alias
+grouping reduces compile times and memory consumption needed for
+aliasing at the expense of precision loss in alias information.
@item ggc-min-expand
compile time increase with probably slightly better performance. The default
value is 100.
-@item max-cselib-memory-location
-The maximum number of memory locations cselib should take into acount.
+@item max-cselib-memory-locations
+The maximum number of memory locations cselib should take into account.
Increasing values mean more aggressive optimization, making the compile time
increase with probably slightly better performance. The default value is 500.
-@item max-flow-memory-location
-Similar as @option{max-cselib-memory-location} but for dataflow liveness.
+@item max-flow-memory-locations
+Similar as @option{max-cselib-memory-locations} but for dataflow liveness.
The default value is 100.
@item reorder-blocks-duplicate
@option{reorder-block-duplicate} since information about the hot spots is more
accurate.
+@item max-sched-ready-insns
+The maximum number of instructions ready to be issued the scheduler should
+consider at any given time during the first scheduling pass. Increasing
+values mean more thorough searches, making the compilation time increase
+with probably little benefit. The default value is 100.
+
@item max-sched-region-blocks
The maximum number of blocks in a region to be considered for
interblock scheduling. The default value is 10.
The minimum probability (in percents) of reaching a source block
for interblock speculative scheduling. The default value is 40.
+@item max-sched-extend-regions-iters
+The maximum number of iterations through CFG to extend regions.
+0 - disable region extension,
+N - do at most N iterations.
+The default value is 0.
+
+@item max-sched-insn-conflict-delay
+The maximum conflict delay for an insn to be considered for speculative motion.
+The default value is 3.
+
+@item sched-spec-prob-cutoff
+The minimal probability of speculation success (in percents), so that
+speculative insn will be scheduled.
+The default value is 40.
+
@item max-last-value-rtl
The maximum size measured as number of RTLs that can be recorded in an expression
@item max-jump-thread-duplication-stmts
Maximum number of statements allowed in a block that needs to be
duplicated when threading jumps.
+
+@item max-fields-for-field-sensitive
+Maximum number of fields in a structure we will treat in
+a field sensitive manner during pointer analysis.
+
+@item prefetch-latency
+Estimate on average number of instructions that are executed before
+prefetch finishes. The distance we prefetch ahead is proportional
+to this constant. Increasing this number may also lead to less
+streams being prefetched (see @option{simultaneous-prefetches}).
+
+@item simultaneous-prefetches
+Maximum number of prefetches that can run at the same time.
+
+@item l1-cache-line-size
+The size of cache line in L1 cache, in bytes.
+
+@item l1-cache-size
+The number of cache lines in L1 cache.
+
@end table
@end table
* DEC Alpha Options::
* DEC Alpha/VMS Options::
* FRV Options::
+* GNU/Linux Options::
* H8/300 Options::
* HPPA Options::
* i386 and x86-64 Options::
* PowerPC Options::
* RS/6000 and PowerPC Options::
* S/390 and zSeries Options::
+* Score Options::
* SH Options::
* SPARC Options::
+* SPU Options::
* System V Options::
* TMS320C3x/C4x Options::
* V850 Options::
@opindex mno-low-64k
Assume that the program is arbitrarily large. This is the default.
+@item -mstack-check-l1
+@opindex mstack-check-l1
+Do stack checking using information placed into L1 scratchpad memory by the
+uClinux kernel.
+
@item -mid-shared-library
@opindex mid-shared-library
Generate code that supports shared libraries via the library ID method.
Generate code that doesn't assume ID based shared libraries are being used.
This is the default.
+@item -mleaf-id-shared-library
+@opindex mleaf-id-shared-library
+Generate code that supports shared libraries via the library ID method,
+but assumes that this library or executable won't link against any other
+ID shared libraries. That allows the compiler to use faster code for jumps
+and calls.
+
+@item -mno-leaf-id-shared-library
+@opindex mno-leaf-id-shared-library
+Do not assume that the code being compiled won't link against any ID shared
+libraries. Slower code will be generated for jump and call insns.
+
@item -mshared-library-id=n
@opindex mshared-library-id
Specified the identification number of the ID based shared library being
other values will force the allocation of that number to the current
library but is no more space or time efficient than omitting this option.
+@item -msep-data
+@opindex msep-data
+Generate code that allows the data segment to be located in a different
+area of memory from the text segment. This allows for execute in place in
+an environment without virtual memory management by eliminating relocations
+against the text section.
+
+@item -mno-sep-data
+@opindex mno-sep-data
+Generate code that assumes that the data segment follows the text segment.
+This is the default.
+
@item -mlong-calls
@itemx -mno-long-calls
@opindex mlong-calls
The default for this option is to make choices that seem to be most
useful.
+@item -mkernel
+@opindex mkernel
+Enable kernel development mode. The @option{-mkernel} option sets
+@option{-static}, @option{-fno-common}, @option{-fno-cxa-atexit},
+@option{-fno-exceptions}, @option{-fno-non-call-exceptions},
+@option{-fapple-kext}, @option{-fno-weak} and @option{-fno-rtti} where
+applicable. This mode also sets @option{-mno-altivec},
+@option{-msoft-float}, @option{-fno-builtin} and
+@option{-mlong-branch} for PowerPC targets.
+
@item -mone-byte-bool
@opindex -mone-byte-bool
Override the defaults for @samp{bool} so that @samp{sizeof(bool)==1}.
as well.
@item su
-Like @samp{su}, but the instructions are marked to be safe for software
+Like @samp{u}, but the instructions are marked to be safe for software
completion (see Alpha architecture manual for details).
@item sui
@end table
+@node GNU/Linux Options
+@subsection GNU/Linux Options
+
+These @samp{-m} options are defined for GNU/Linux targets:
+
+@table @gcctabopt
+@item -mglibc
+@opindex mglibc
+Use the GNU C library instead of uClibc. This is the default except
+on @samp{*-*-linux-*uclibc*} targets.
+
+@item -muclibc
+@opindex muclibc
+Use uClibc instead of the GNU C library. This is the default on
+@samp{*-*-linux-*uclibc*} targets.
+@end table
+
@node H8/300 Options
@subsection H8/300 Options
generic instruction set applicable to all processors. In contrast,
@option{-mtune} indicates the processor (or, in this case, collection of
processors) for which the code is optimized.
+@item native
+This selects the CPU to tune for at compilation time by determining
+the processor type of the compiling machine. Using @option{-mtune=native}
+will produce code optimized for the local machine under the constraints
+of the selected instruction set. Using @option{-march=native} will
+enable all instruction subsets supported by the local machine (hence
+the result might not run on different machines).
@item i386
Original Intel's i386 CPU@.
@item i486
Intel PentiumPro CPU@.
@item i686
Same as @code{generic}, but when used as @code{march} option, PentiumPro
-instruction set will be used, so the code will run on all i686 familly chips.
+instruction set will be used, so the code will run on all i686 family chips.
@item pentium2
Intel Pentium2 CPU based on PentiumPro core with MMX instruction set support.
@item pentium3, pentium3m
@item nocona
Improved version of Intel Pentium4 CPU with 64-bit extensions, MMX, SSE,
SSE2 and SSE3 instruction set support.
+@item core2
+Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3 and SSSE3
+instruction set support.
@item k6
AMD K6 CPU with MMX instruction set support.
@item k6-2, k6-3
@item c3-2
Via C3-2 CPU with MMX and SSE instruction set support. (No scheduling is
implemented for this chip.)
+@item geode
+Embedded AMD CPU with MMX and 3dNOW! instruction set support.
@end table
While picking a specific @var{cpu-type} will schedule things appropriately
produce code that runs somewhat faster on a @samp{Pentium} at the
expense of more memory.
+On x86-64, @option{-malign-double} is enabled by default.
+
@strong{Warning:} if you use the @option{-malign-double} switch,
structures containing the above types will be aligned differently than
the published application binary interface specifications for the 386
modules with the same value, including any libraries. This includes
the system libraries and startup modules.
+@item -mstackrealign
+@opindex mstackrealign
+Realign the stack at entry. On the Intel x86, the
+@option{-mstackrealign} option will generate an alternate prologue and
+epilogue that realigns the runtime stack. This supports mixing legacy
+codes that keep a 4-byte aligned stack with modern codes that keep a
+16-byte stack for SSE compatibility. The alternate prologue and
+epilogue are slower and bigger than the regular ones, and the
+alternate prologue requires an extra scratch register; this lowers the
+number of registers available if used in conjunction with the
+@code{regparm} attribute. The @option{-mstackrealign} option is
+incompatible with the nested function prologue; this is considered a
+hard error. See also the attribute @code{force_align_arg_pointer},
+applicable to individual functions.
+
@item -mpreferred-stack-boundary=@var{num}
@opindex mpreferred-stack-boundary
Attempt to keep the stack boundary aligned to a 2 raised to @var{num}
byte boundary. If @option{-mpreferred-stack-boundary} is not specified,
-the default is 4 (16 bytes or 128 bits), except when optimizing for code
-size (@option{-Os}), in which case the default is the minimum correct
-alignment (4 bytes for x86, and 8 bytes for x86-64).
+the default is 4 (16 bytes or 128 bits).
On Pentium and PentiumPro, @code{double} and @code{long double} values
should be aligned to an 8 byte boundary (see @option{-malign-double}) or
suffer significant run time performance penalties. On Pentium III, the
-Streaming SIMD Extension (SSE) data type @code{__m128} suffers similar
-penalties if it is not 16 byte aligned.
+Streaming SIMD Extension (SSE) data type @code{__m128} may not work
+properly if it is not 16 byte aligned.
To ensure proper alignment of this values on the stack, the stack boundary
must be as aligned as that required by any value stored on the stack.
@itemx -mno-sse2
@item -msse3
@itemx -mno-sse3
+@item -mssse3
+@itemx -mno-ssse3
@item -m3dnow
@itemx -mno-3dnow
@opindex mmmx
@opindex m3dnow
@opindex mno-3dnow
These switches enable or disable the use of instructions in the MMX,
-SSE, SSE2 or 3DNow! extended instruction sets. These extensions are
-also available as built-in functions: see @ref{X86 Built-in Functions},
-for details of the functions enabled and disabled by these switches.
+SSE, SSE2, SSE3, SSSE3 or 3DNow! extended instruction sets.
+These extensions are also available as built-in functions: see
+@ref{X86 Built-in Functions}, for details of the functions enabled and
+disabled by these switches.
To have SSE/SSE2 instructions generated automatically from floating-point
code (as opposed to 387 instructions), see @option{-mfpmath=sse}.
the file containing the CPU detection code should be compiled without
these options.
-@item -msselibm
-@opindex msselibm
-Use special versions of certain libm routines that come with an SSE
-ABI and an SSE implementation. Useful together with @option{-mfpmath=sse}
-to avoid moving values between SSE registers and the x87 FP stack.
-
@item -mpush-args
@itemx -mno-push-args
@opindex mpush-args
size, but may improve performance of code that depends on fast memcpy, strlen
and memset for short lengths.
+@item -minline-stringops-dynamically
+@opindex minline-stringops-dynamically
+For string operation of unknown size, inline runtime checks so for small
+blocks inline code is used, while for large blocks library call is used.
+
+@item -mstringop-strategy=@var{alg}
+@opindex mstringop-strategy=@var{alg}
+Overwrite internal decision heuristic about particular algorithm to inline
+string operation with. The allowed values are @code{rep_byte},
+@code{rep_4byte}, @code{rep_8byte} for expanding using i386 @code{rep} prefix
+of specified size, @code{byte_loop}, @code{loop}, @code{unrolled_loop} for
+expanding inline loop, @code{libcall} for always expanding library call.
+
@item -momit-leaf-frame-pointer
@opindex momit-leaf-frame-pointer
Don't keep the frame pointer in a register for leaf functions. This
The 64-bit environment sets int to 32 bits and long and pointer
to 64 bits. These are HP-UX specific flags.
+@item -mno-sched-br-data-spec
+@itemx -msched-br-data-spec
+@opindex -mno-sched-br-data-spec
+@opindex -msched-br-data-spec
+(Dis/En)able data speculative scheduling before reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'disable'.
+
+@item -msched-ar-data-spec
+@itemx -mno-sched-ar-data-spec
+@opindex -msched-ar-data-spec
+@opindex -mno-sched-ar-data-spec
+(En/Dis)able data speculative scheduling after reload.
+This will result in generation of the ld.a instructions and
+the corresponding check instructions (ld.c / chk.a).
+The default is 'enable'.
+
+@item -mno-sched-control-spec
+@itemx -msched-control-spec
+@opindex -mno-sched-control-spec
+@opindex -msched-control-spec
+(Dis/En)able control speculative scheduling. This feature is
+available only during region scheduling (i.e. before reload).
+This will result in generation of the ld.s instructions and
+the corresponding check instructions chk.s .
+The default is 'disable'.
+
+@item -msched-br-in-data-spec
+@itemx -mno-sched-br-in-data-spec
+@opindex -msched-br-in-data-spec
+@opindex -mno-sched-br-in-data-spec
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads before reload.
+This is effective only with @option{-msched-br-data-spec} enabled.
+The default is 'enable'.
+
+@item -msched-ar-in-data-spec
+@itemx -mno-sched-ar-in-data-spec
+@opindex -msched-ar-in-data-spec
+@opindex -mno-sched-ar-in-data-spec
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the data speculative loads after reload.
+This is effective only with @option{-msched-ar-data-spec} enabled.
+The default is 'enable'.
+
+@item -msched-in-control-spec
+@itemx -mno-sched-in-control-spec
+@opindex -msched-in-control-spec
+@opindex -mno-sched-in-control-spec
+(En/Dis)able speculative scheduling of the instructions that
+are dependent on the control speculative loads.
+This is effective only with @option{-msched-control-spec} enabled.
+The default is 'enable'.
+
+@item -msched-ldc
+@itemx -mno-sched-ldc
+@opindex -msched-ldc
+@opindex -mno-sched-ldc
+(En/Dis)able use of simple data speculation checks ld.c .
+If disabled, only chk.a instructions will be emitted to check
+data speculative loads.
+The default is 'enable'.
+
+@item -mno-sched-control-ldc
+@itemx -msched-control-ldc
+@opindex -mno-sched-control-ldc
+@opindex -msched-control-ldc
+(Dis/En)able use of ld.c instructions to check control speculative loads.
+If enabled, in case of control speculative load with no speculatively
+scheduled dependent instructions this load will be emitted as ld.sa and
+ld.c will be used to check it.
+The default is 'disable'.
+
+@item -mno-sched-spec-verbose
+@itemx -msched-spec-verbose
+@opindex -mno-sched-spec-verbose
+@opindex -msched-spec-verbose
+(Dis/En)able printing of the information about speculative motions.
+
+@item -mno-sched-prefer-non-data-spec-insns
+@itemx -msched-prefer-non-data-spec-insns
+@opindex -mno-sched-prefer-non-data-spec-insns
+@opindex -msched-prefer-non-data-spec-insns
+If enabled, data speculative instructions will be chosen for schedule
+only if there are no other choices at the moment. This will make
+the use of the data speculation much more conservative.
+The default is 'disable'.
+
+@item -mno-sched-prefer-non-control-spec-insns
+@itemx -msched-prefer-non-control-spec-insns
+@opindex -mno-sched-prefer-non-control-spec-insns
+@opindex -msched-prefer-non-control-spec-insns
+If enabled, control speculative instructions will be chosen for schedule
+only if there are no other choices at the moment. This will make
+the use of the control speculation much more conservative.
+The default is 'disable'.
+
+@item -mno-sched-count-spec-in-critical-path
+@itemx -msched-count-spec-in-critical-path
+@opindex -mno-sched-count-spec-in-critical-path
+@opindex -msched-count-spec-in-critical-path
+If enabled, speculative dependencies will be considered during
+computation of the instructions priorities. This will make the use of the
+speculation a bit more conservative.
+The default is 'disable'.
+
@end table
@node M32C Options
@samp{mips32}, @samp{mips32r2}, and @samp{mips64}.
The processor names are:
@samp{4kc}, @samp{4km}, @samp{4kp},
+@samp{4kec}, @samp{4kem}, @samp{4kep},
@samp{5kc}, @samp{5kf},
@samp{20kc},
-@samp{24k}, @samp{24kc}, @samp{24kf}, @samp{24kx},
+@samp{24kc}, @samp{24kf}, @samp{24kx},
+@samp{24kec}, @samp{24kef}, @samp{24kex},
+@samp{34kc}, @samp{34kf}, @samp{34kx},
@samp{m4k},
@samp{orion},
@samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{r4400},
For information about the O64 ABI, see
@w{@uref{http://gcc.gnu.org/projects/mipso64-abi.html}}.
+GCC supports a variant of the o32 ABI in which floating-point registers
+are 64 rather than 32 bits wide. You can select this combination with
+@option{-mabi=32} @option{-mfp64}. This ABI relies on the @samp{mthc1}
+and @samp{mfhc1} instructions and is therefore only supported for
+MIPS32R2 processors.
+
+The register assignments for arguments and return values remain the
+same, but each scalar value is passed in a single 64-bit register
+rather than a pair of 32-bit registers. For example, scalar
+floating-point values are returned in @samp{$f0} only, not a
+@samp{$f0}/@samp{$f1} pair. The set of call-saved registers also
+remains the same, but all 64 bits are saved.
+
@item -mabicalls
@itemx -mno-abicalls
@opindex mabicalls
@opindex mno-abicalls
-Generate (do not generate) SVR4-style position-independent code.
-@option{-mabicalls} is the default for SVR4-based systems.
+Generate (do not generate) code that is suitable for SVR4-style
+dynamic objects. @option{-mabicalls} is the default for SVR4-based
+systems.
+
+@item -mshared
+@itemx -mno-shared
+Generate (do not generate) code that is fully position-independent,
+and that can therefore be linked into shared libraries. This option
+only affects @option{-mabicalls}.
+
+All @option{-mabicalls} code has traditionally been position-independent,
+regardless of options like @option{-fPIC} and @option{-fpic}. However,
+as an extension, the GNU toolchain allows executables to use absolute
+accesses for locally-binding symbols. It can also use shorter GP
+initialization sequences and generate direct calls to locally-defined
+functions. This mode is selected by @option{-mno-shared}.
+
+@option{-mno-shared} depends on binutils 2.16 or higher and generates
+objects that can only be linked by the GNU linker. However, the option
+does not affect the ABI of the final executable; it only affects the ABI
+of relocatable objects. Using @option{-mno-shared} will generally make
+executables both smaller and quicker.
+
+@option{-mshared} is the default.
@item -mxgot
@itemx -mno-xgot
@itemx -mno-popcntb
@itemx -mfprnd
@itemx -mno-fprnd
+@itemx -mmfpgpr
+@itemx -mno-mfpgpr
@opindex mpower
@opindex mno-power
@opindex mpower2
@opindex mno-popcntb
@opindex mfprnd
@opindex mno-fprnd
+@opindex mmfpgpr
+@opindex mno-mfpgpr
GCC supports two related instruction set architectures for the
RS/6000 and PowerPC@. The @dfn{POWER} instruction set are those
instructions supported by the @samp{rios} chip set used in the original
The @option{-mfprnd} option allows GCC to generate the FP round to
integer instructions implemented on the POWER5+ processor and other
processors that support the PowerPC V2.03 architecture.
+The @option{-mmfpgpr} option allows GCC to generate the FP move to/from
+general purpose register instructions implemented on the POWER6X
+processor and other processors that support the extended PowerPC V2.05
+architecture.
The @option{-mpowerpc64} option allows GCC to generate the additional
64-bit instructions that are found in the full PowerPC64 architecture
@samp{7450}, @samp{750}, @samp{801}, @samp{821}, @samp{823},
@samp{860}, @samp{970}, @samp{8540}, @samp{ec603e}, @samp{G3},
@samp{G4}, @samp{G5}, @samp{power}, @samp{power2}, @samp{power3},
-@samp{power4}, @samp{power5}, @samp{power5+},
-@samp{common}, @samp{powerpc}, @samp{powerpc64},
+@samp{power4}, @samp{power5}, @samp{power5+}, @samp{power6},
+@samp{power6x}, @samp{common}, @samp{powerpc}, @samp{powerpc64},
@samp{rios}, @samp{rios1}, @samp{rios2}, @samp{rsc}, and @samp{rs64}.
@option{-mcpu=common} selects a completely generic processor. Code
@option{-mhard-float}, @option{-mmfcrf}, @option{-mmultiple},
@option{-mnew-mnemonics}, @option{-mpopcntb}, @option{-mpower},
@option{-mpower2}, @option{-mpowerpc64}, @option{-mpowerpc-gpopt},
-@option{-mpowerpc-gfxopt}, @option{-mstring}, @option{-mmulhw}.
-The particular options
-set for any particular CPU will vary between compiler versions,
-depending on what setting seems to produce optimal code for that CPU;
-it doesn't necessarily reflect the actual hardware's capabilities. If
-you wish to set an individual option to a particular value, you may
-specify it after the @option{-mcpu} option, like @samp{-mcpu=970
--mno-altivec}.
+@option{-mpowerpc-gfxopt}, @option{-mstring}, @option{-mmulhw},
+@option{-mdlmzb}, @option{-mmfpgpr}.
+The particular options set for any particular CPU will vary between
+compiler versions, depending on what setting seems to produce optimal
+code for that CPU; it doesn't necessarily reflect the actual hardware's
+capabilities. If you wish to set an individual option to a particular
+value, you may specify it after the @option{-mcpu} option, like
+@samp{-mcpu=970 -mno-altivec}.
On AIX, the @option{-maltivec} and @option{-mpowerpc64} options are
not enabled or disabled by the @option{-mcpu} option at present because
@option{-mno-isel} instead.
@item -mspe
-@itemx -mno-isel
+@itemx -mno-spe
@opindex mspe
@opindex mno-spe
This switch enables or disables the generation of SPE simd
These instructions are generated by default when targetting those
processors.
+@item -mdlmzb
+@itemx -mno-dlmzb
+@opindex mdlmzb
+@opindex mno-dlmzb
+Generate code that uses (does not use) the string-search @samp{dlmzb}
+instruction on the IBM 405 and 440 processors. This instruction is
+generated by default when targetting those processors.
+
@item -mno-bit-align
@itemx -mbit-align
@opindex mno-bit-align
@itemx -mno-longcall
@opindex mlongcall
@opindex mno-longcall
-Default to making all function calls indirectly, using a register, so
-that functions which reside further than 32 megabytes (33,554,432
-bytes) from the current location can be called. This setting can be
-overridden by the @code{shortcall} function attribute, or by
-@code{#pragma longcall(0)}.
+By default assume that all calls are far away so that a longer more
+expensive calling sequence is required. This is required for calls
+further than 32 megabytes (33,554,432 bytes) from the current location.
+A short call will be generated if the compiler knows
+the call cannot be that far away. This setting can be overridden by
+the @code{shortcall} function attribute, or by @code{#pragma
+longcall(0)}.
Some linkers are capable of detecting out-of-range calls and generating
glue code on the fly. On these systems, long calls are unnecessary and
at an address aligned to the value given by @var{stack-size}.
@end table
+@node Score Options
+@subsection Score Options
+@cindex Score Options
+
+These options are defined for Score implementations:
+
+@table @gcctabopt
+@item -mel
+@opindex -mel
+Compile code for little endian mode.
+
+@item -meb
+@opindex meb
+Compile code for big endian mode. This is the default.
+
+@item -mmac
+@opindex mmac
+Enable the use of multiply-accumulate instructions. Disabled by default.
+
+@item -mscore5u
+@opindex mscore5u
+Specify the SCORE5U of the target architecture.
+
+@item -mscore7
+@opindex mscore7
+Specify the SCORE7 of the target architecture. This is the default.
+@end table
+
@node SH Options
@subsection SH Options
floating point comparison, therefore the default is set to
@option{-ffinite-math-only}.
+@item -minline-ic_invalidate
+@opindex minline-ic_invalidate
+Inline code to invalidate instruction cache entries after setting up
+nested function trampolines.
+This option has no effect if -musermode is in effect and the selected
+code generation option (e.g. -m4) does not allow the use of the icbi
+instruction.
+If the selected code generation option does not allow the use of the icbi
+instruction, and -musermode is not in effect, the inlined code will
+manipulate the instruction cache address array directly with an associative
+write. This not only requires privileged mode, but it will also
+fail if the cache line had been mapped via the TLB and has become unmapped.
+
@item -misize
@opindex misize
Dump instruction size and location in the assembly code.
@item -musermode
@opindex musermode
-Generate a library function call to invalidate instruction cache
-entries, after fixing up a trampoline. This library function call
-doesn't assume it can write to the whole memory address space. This
-is the default when the target is @code{sh-*-linux*}.
+Don't generate privileged mode only code; implies -mno-inline-ic_invalidate
+if the inlined code would not work in user mode.
+This is the default when the target is @code{sh-*-linux*}.
@item -multcost=@var{number}
@opindex multcost=@var{number}
for machine type @var{cpu_type}. Supported values for @var{cpu_type} are
@samp{v7}, @samp{cypress}, @samp{v8}, @samp{supersparc}, @samp{sparclite},
@samp{f930}, @samp{f934}, @samp{hypersparc}, @samp{sparclite86x},
-@samp{sparclet}, @samp{tsc701}, @samp{v9}, @samp{ultrasparc}, and
-@samp{ultrasparc3}.
+@samp{sparclet}, @samp{tsc701}, @samp{v9}, @samp{ultrasparc},
+@samp{ultrasparc3}, and @samp{niagara}.
Default instruction scheduling parameters are used for values that select
an architecture and not an implementation. These are @samp{v7}, @samp{v8},
v8: supersparc, hypersparc
sparclite: f930, f934, sparclite86x
sparclet: tsc701
- v9: ultrasparc, ultrasparc3
+ v9: ultrasparc, ultrasparc3, niagara
@end smallexample
By default (unless configured otherwise), GCC generates code for the V7
architecture. This adds 64-bit integer and floating-point move instructions,
3 additional floating-point condition code registers and conditional move
instructions. With @option{-mcpu=ultrasparc}, the compiler additionally
-optimizes it for the Sun UltraSPARC I/II chips. With
+optimizes it for the Sun UltraSPARC I/II/IIi chips. With
@option{-mcpu=ultrasparc3}, the compiler additionally optimizes it for the
-Sun UltraSPARC III chip.
+Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+ chips. With
+@option{-mcpu=niagara}, the compiler additionally optimizes it for
+Sun UltraSPARC T1 chips.
@item -mtune=@var{cpu_type}
@opindex mtune
@option{-mtune=@var{cpu_type}}, but the only useful values are those
that select a particular cpu implementation. Those are @samp{cypress},
@samp{supersparc}, @samp{hypersparc}, @samp{f930}, @samp{f934},
-@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, and
-@samp{ultrasparc3}.
+@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc},
+@samp{ultrasparc3}, and @samp{niagara}.
@item -mv8plus
@itemx -mno-v8plus
This is a synonym for @option{-pthreads}.
@end table
+@node SPU Options
+@subsection SPU Options
+@cindex SPU options
+
+These @samp{-m} options are supported on the SPU:
+
+@table @gcctabopt
+@item -mwarn-reloc
+@itemx -merror-reloc
+@opindex mwarn-reloc
+@opindex merror-reloc
+
+The loader for SPU does not handle dynamic relocations. By default, GCC
+will give an error when it generates code that requires a dynamic
+relocation. @option{-mno-error-reloc} disables the error,
+@option{-mwarn-reloc} will generate a warning instead.
+
+@item -msafe-dma
+@itemx -munsafe-dma
+@opindex msafe-dma
+@opindex munsafe-dma
+
+Instructions which initiate or test completion of DMA must not be
+reordered with respect to loads and stores of the memory which is being
+accessed. Users typically address this problem using the volatile
+keyword, but that can lead to inefficient code in places where the
+memory is known to not change. Rather than mark the memory as volatile
+we treat the DMA instructions as potentially effecting all memory. With
+@option{-munsafe-dma} users must use the volatile keyword to protect
+memory accesses.
+
+@item -mbranch-hints
+@opindex mbranch-hints
+
+By default, GCC will generate a branch hint instruction to avoid
+pipeline stalls for always taken or probably taken branches. A hint
+will not be generated closer than 8 instructions away from its branch.
+There is little reason to disable them, except for debugging purposes,
+or to make an object a little bit smaller.
+
+@item -msmall-mem
+@itemx -mlarge-mem
+@opindex msmall-mem
+@opindex mlarge-mem
+
+By default, GCC generates code assuming that addresses are never larger
+than 18 bits. With @option{-mlarge-mem} code is generated that assumes
+a full 32 bit address.
+
+@item -mstdmain
+@opindex mstdmain
+
+By default, GCC links against startup code that assumes the SPU-style
+main function interface (which has an unconventional parameter list).
+With @option{-mstdmain}, GCC will link your program against startup
+code that assumes a C99-style interface to @code{main}, including a
+local copy of @code{argv} strings.
+
+@item -mfixed-range=@var{register-range}
+@opindex mfixed-range
+Generate code treating the given register range as fixed registers.
+A fixed register is one that the register allocator can not use. This is
+useful when compiling kernel code. A register range is specified as
+two registers separated by a dash. Multiple register ranges can be
+specified separated by a comma.
+
+@end table
+
@node System V Options
@subsection Options for System V
@opindex fbounds-check
For front-ends that support it, generate additional code to check that
indices used to access arrays are within the declared range. This is
-currently only supported by the Java and Fortran 77 front-ends, where
+currently only supported by the Java and Fortran front-ends, where
this option defaults to true and false respectively.
@item -ftrapv
code that is not binary compatible with code generated without that switch.
Use it to conform to a non-default application binary interface.
-@item -fshared-data
-@opindex fshared-data
-Requests that the data and non-@code{const} variables of this
-compilation be shared data rather than private data. The distinction
-makes sense only on certain operating systems, where shared data is
-shared between processes running the same program, while private data
-exists in one copy per process.
-
@item -fno-common
@opindex fno-common
In C, allocate even uninitialized global variables in the data section of the
extra information to be omitted and is useful when comparing two assembler
files.
+@item -frecord-gcc-switches
+@opindex frecord-gcc-switches
+This switch causes the command line that was used to invoke the
+compiler to be recorded into the object file that is being created.
+This switch is only implemented on some targets and the exact format
+of the recording is target and binary file format dependent, but it
+usually takes the form of a section containing ASCII text. This
+switch is related to the @option{-fverbose-asm} switch, but that
+switch only records information in the assembler output file as
+comments, so it never reaches the object file.
+
@item -fpic
@opindex fpic
@cindex global offset table
@item -fargument-alias
@itemx -fargument-noalias
@itemx -fargument-noalias-global
+@itemx -fargument-noalias-anything
@opindex fargument-alias
@opindex fargument-noalias
@opindex fargument-noalias-global
+@opindex fargument-noalias-anything
Specify the possible relationships among parameters and between
parameters and global data.
each other, but may alias global storage.@*
@option{-fargument-noalias-global} specifies that arguments do not
alias each other and do not alias global storage.
+@option{-fargument-noalias-anything} specifies that arguments do not
+alias any other storage.
Each language will automatically use whatever option is required by
the language standard. You should not need to use these options yourself.
Note that due to ISO C++ specification requirements, operator new and
operator delete must always be of default visibility.
+Be aware that headers from outside your project, in particular system
+headers and headers from any other library you use, may not be
+expecting to be compiled with visibility other than the default. You
+may need to explicitly say @samp{#pragma GCC visibility push(default)}
+before including any such headers.
+
+@samp{extern} declarations are not affected by @samp{-fvisibility}, so
+a lot of code can be recompiled with @samp{-fvisibility=hidden} with
+no modifications. However, this means that calls to @samp{extern}
+functions with no explicit visibility will use the PLT, so it is more
+effective to use @samp{__attribute ((visibility))} and/or
+@samp{#pragma GCC visibility} to tell the compiler which @samp{extern}
+declarations should be treated as hidden.
+
+Note that @samp{-fvisibility} does affect C++ vague linkage
+entities. This means that, for instance, an exception class that will
+be thrown between DSOs must be explicitly marked with default
+visibility so that the @samp{type_info} nodes will be unified between
+the DSOs.
+
An overview of these techniques, their benefits and how to use them
is at @w{@uref{http://gcc.gnu.org/wiki/Visibility}}.
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