In G++, the result value of a statement expression undergoes array and
function pointer decay, and is returned by value to the enclosing
-expression. For instance, if @code{A} is a class, then
+expression. For instance, if @code{A} is a class, then
@smallexample
A a;
@cindex macros, local labels
GCC allows you to declare @dfn{local labels} in any nested block
-scope. A local label is just like an ordinary label, but you can
+scope. A local label is just like an ordinary label, but you can
only reference it (with a @code{goto} statement, or by taking its
address) within the block in which it was declared.
attributes.
@table @code
-@c Keep this table alphabetized by attribute name. Treat _ as space.
+@c Keep this table alphabetized by attribute name. Treat _ as space.
@item alias ("@var{target}")
@cindex @code{alias} attribute
functions, unless the @option{-fkeep-inline-functions} flag has been
used. The attribute is also ignored for undefined symbols.
-When applied to C++ classes. the attribute marks defined non-inlined
-member functions and static data members as exports. Static consts
+When applied to C++ classes, the attribute marks defined non-inlined
+member functions and static data members as exports. Static consts
initialized in-class are not marked unless they are also defined
out-of-class.
On Microsoft Windows and Symbian OS targets, the @code{dllimport}
attribute causes the compiler to reference a function or variable via
a global pointer to a pointer that is set up by the DLL exporting the
-symbol. The attribute implies @code{extern} storage. On Microsoft
+symbol. The attribute implies @code{extern} storage. On Microsoft
Windows targets, the pointer name is formed by combining @code{_imp__}
and the function or variable name.
@code{__attribute__ ((dllimport))} for compatibility with other
compilers.
-Currently, the attribute is ignored for inlined functions. If the
+Currently, the attribute is ignored for inlined functions. If the
attribute is applied to a symbol @emph{definition}, an error is reported.
If a symbol previously declared @code{dllimport} is later defined, the
attribute is ignored in subsequent references, and a warning is emitted.
using thunks.
On the SH Symbian OS target the @code{dllimport} attribute also has
-another affect - it can cause the vtable and run-time type information
+another affect---it can cause the vtable and run-time type information
for a class to be exported. This happens when the class has a
dllimport'ed constructor or a non-inline, non-pure virtual function
and, for either of those two conditions, the class also has a inline
For Microsoft Windows based targets the use of the @code{dllimport}
attribute on functions is not necessary, but provides a small
-performance benefit by eliminating a thunk in the DLL. The use of the
+performance benefit by eliminating a thunk in the DLL@. The use of the
@code{dllimport} attribute on imported variables was required on older
versions of the GNU linker, but can now be avoided by passing the
-@option{--enable-auto-import} switch to the GNU linker. As with
+@option{--enable-auto-import} switch to the GNU linker. As with
functions, using the attribute for a variable eliminates a thunk in
-the DLL.
+the DLL@.
One drawback to using this attribute is that a pointer to a function
or variable marked as @code{dllimport} cannot be used as a constant
On 68HC11 the compiler will generate a sequence of instructions
to invoke a board-specific routine to switch the memory bank and call the
-real function. The board-specific routine simulates a @code{call}.
+real function. The board-specific routine simulates a @code{call}.
At the end of a function, it will jump to a board-specific routine
-instead of using @code{rts}. The board-specific return routine simulates
+instead of using @code{rts}. The board-specific return routine simulates
the @code{rtc}.
@item fastcall
@cindex functions that pop the argument stack on the 386
On the Intel 386, the @code{fastcall} attribute causes the compiler to
-pass the first two arguments in the registers ECX and EDX. Subsequent
-arguments are passed on the stack. The called function will pop the
-arguments off the stack. If the number of arguments is variable all
+pass the first two arguments in the registers ECX and EDX@. Subsequent
+arguments are passed on the stack. The called function will pop the
+arguments off the stack. If the number of arguments is variable all
arguments are pushed on the stack.
@item format (@var{archetype}, @var{string-index}, @var{first-to-check})
attribute are 2 and 3.
@opindex ffreestanding
+@opindex fno-builtin
The @code{format} attribute allows you to identify your own functions
which take format strings as arguments, so that GCC can check the
calls to these functions for errors. The compiler always (unless
-@option{-ffreestanding} is used) checks formats
+@option{-ffreestanding} or @option{-fno-builtin} is used) checks formats
for the standard library functions @code{printf}, @code{fprintf},
@code{sprintf}, @code{scanf}, @code{fscanf}, @code{sscanf}, @code{strftime},
@code{vprintf}, @code{vfprintf} and @code{vsprintf} whenever such
The compiler always treats @code{gettext}, @code{dgettext}, and
@code{dcgettext} in this manner except when strict ISO C support is
requested by @option{-ansi} or an appropriate @option{-std} option, or
-@option{-ffreestanding} is used. @xref{C Dialect Options,,Options
+@option{-ffreestanding} or @option{-fno-builtin}
+is used. @xref{C Dialect Options,,Options
Controlling C Dialect}.
@item function_vector
The @code{noreturn} keyword does not affect the exceptional path when that
applies: a @code{noreturn}-marked function may still return to the caller
-by throwing an exception.
+by throwing an exception or calling @code{longjmp}.
Do not assume that registers saved by the calling function are
restored before calling the @code{noreturn} function.
The attribute is automatically set with a position of 0 for the built-in
functions @code{execl} and @code{execlp}. The built-in function
-@code{execle} has the attribute set set with a position of 1.
+@code{execle} has the attribute set with a position of 1.
A valid @code{NULL} in this context is defined as zero with any pointer
type. If your system defines the @code{NULL} macro with an integer type
@c keep this list of visibilities in alphabetical order.
@item default
-Default visibility is the normal case for ELF. This value is
+Default visibility is the normal case for ELF@. This value is
available for the visibility attribute to override other options
that may change the assumed visibility of symbols.
that may be unused but which is compiled with @option{-Wall}. It would
not normally be appropriate to use in it human-written code, though it
could be useful in cases where the code that jumps to the label is
-contained within an @code{#ifdef} conditional. GNU C++ does not permit
+contained within an @code{#ifdef} conditional. GNU C++ does not permit
such placement of attribute lists, as it is permissible for a
declaration, which could begin with an attribute list, to be labelled in
-C++. Declarations cannot be labelled in C90 or C99, so the ambiguity
+C++. Declarations cannot be labelled in C90 or C99, so the ambiguity
does not arise there.
An attribute specifier list may appear as part of a @code{struct},
specifiers and qualifiers may be an attribute specifier list with no
other specifiers or qualifiers.
+At present, the first parameter in a function prototype must have some
+type specifier which is not an attribute specifier; this resolves an
+ambiguity in the interpretation of @code{void f(int
+(__attribute__((foo)) x))}, but is subject to change. At present, if
+the parentheses of a function declarator contain only attributes then
+those attributes are ignored, rather than yielding an error or warning
+or implying a single parameter of type int, but this is subject to
+change.
+
An attribute specifier list may appear immediately before a declarator
(other than the first) in a comma-separated list of declarators in a
declaration of more than one identifier using a single list of
@opindex fno-common
The @code{common} attribute requests GCC to place a variable in
``common'' storage. The @code{nocommon} attribute requests the
-opposite -- to allocate space for it directly.
+opposite---to allocate space for it directly.
These attributes override the default chosen by the
@option{-fno-common} and @option{-fcommon} flags respectively.
@subsection M32R/D Variable Attributes
-One attribute is currently defined for the M32R/D.
+One attribute is currently defined for the M32R/D@.
@table @code
@item model (@var{model-name})
@item packed
This attribute, attached to @code{struct} or @code{union} type
definition, specifies that each member of the structure or union is
-placed to minimize the memory required. When attached to an @code{enum}
+placed to minimize the memory required. When attached to an @code{enum}
definition, it indicates that the smallest integral type should be used.
@opindex fshort-enums
In the following example @code{struct my_packed_struct}'s members are
packed closely together, but the internal layout of its @code{s} member
-is not packed -- to do that, @code{struct my_unpacked_struct} would need to
+is not packed---to do that, @code{struct my_unpacked_struct} would need to
be packed too.
@smallexample
@option{-fstrict-aliasing}, which is on by default at @option{-O2} or
above in recent GCC versions.
+@subsection ARM Type Attributes
+
+On those ARM targets that support @code{dllimport} (such as Symbian
+OS), you can use the @code{notshared} attribute to indicate that the
+virtual table and other similar data for a class should not be
+exported from a DLL@. For example:
+
+@smallexample
+class __declspec(notshared) C @{
+public:
+ __declspec(dllimport) C();
+ virtual void f();
+@}
+
+__declspec(dllexport)
+C::C() @{@}
+@end smallexample
+
+In this code, @code{C::C} is exported from the current DLL, but the
+virtual table for @code{C} is not exported. (You can use
+@code{__attribute__} instead of @code{__declspec} if you prefer, but
+most Symbian OS code uses @code{__declspec}.)
+
@subsection i386 Type Attributes
Two attributes are currently defined for i386 configurations:
output operand from the first input, if any. Commas separate the
operands within each group. The total number of operands is currently
limited to 30; this limitation may be lifted in some future version of
-GCC.
+GCC@.
If there are no output operands but there are input operands, you must
place two consecutive colons surrounding the place where the output
: "r" (test), "r"(new), "[result]"(old));
@end smallexample
+Sometimes you need to make an @code{asm} operand be a specific register,
+but there's no matching constraint letter for that register @emph{by
+itself}. To force the operand into that register, use a local variable
+for the operand and specify the register in the variable declaration.
+@xref{Explicit Reg Vars}. Then for the @code{asm} operand, use any
+register constraint letter that matches the register:
+
+@smallexample
+register int *p1 asm ("r0") = @dots{};
+register int *p2 asm ("r1") = @dots{};
+register int *result asm ("r0");
+asm ("sysint" : "=r" (result) : "0" (p1), "r" (p2));
+@end smallexample
+
+@anchor{Example of asm with clobbered asm reg}
+In the above example, beware that a register that is call-clobbered by
+the target ABI will be overwritten by any function call in the
+assignment, including library calls for arithmetic operators.
+Assuming it is a call-clobbered register, this may happen to @code{r0}
+above by the assignment to @code{p2}. If you have to use such a
+register, use temporary variables for expressions between the register
+assignment and use:
+
+@smallexample
+int t1 = @dots{};
+register int *p1 asm ("r0") = @dots{};
+register int *p2 asm ("r1") = t1;
+register int *result asm ("r0");
+asm ("sysint" : "=r" (result) : "0" (p1), "r" (p2));
+@end smallexample
+
Some instructions clobber specific hard registers. To describe this,
write a third colon after the input operands, followed by the names of
the clobbered hard registers (given as strings). Here is a realistic
int result;
asm ("magic stuff accessing an 'int' pointed to by '%1'"
"=&d" (r) : "a" (y), "m" (*y));
- return result;
+ return result;
@}
@end smallexample
appears not to change, the old value of the variable may be reused later
if it happens to be found in a register.
-You can prevent an @code{asm} instruction from being deleted, moved
-significantly, or combined, by writing the keyword @code{volatile} after
+You can prevent an @code{asm} instruction from being deleted
+by writing the keyword @code{volatile} after
the @code{asm}. For example:
@smallexample
@end smallexample
@noindent
-If you write an @code{asm} instruction with no outputs, GCC will know
-the instruction has side-effects and will not delete the instruction or
-move it outside of loops.
-
The @code{volatile} keyword indicates that the instruction has
important side-effects. GCC will not delete a volatile @code{asm} if
it is reachable. (The instruction can still be deleted if GCC can
prove that control-flow will never reach the location of the
-instruction.) In addition, GCC will not reschedule instructions
-across a volatile @code{asm} instruction. For example:
+instruction.) Note that even a volatile @code{asm} instruction
+can be moved relative to other code, including across jump
+instructions. For example, on many targets there is a system
+register which can be set to control the rounding mode of
+floating point operations. You might try
+setting it with a volatile @code{asm}, like this PowerPC example:
@smallexample
-*(volatile int *)addr = foo;
-asm volatile ("eieio" : : );
+ asm volatile("mtfsf 255,%0" : : "f" (fpenv));
+ sum = x + y;
@end smallexample
@noindent
-Assume @code{addr} contains the address of a memory mapped device
-register. The PowerPC @code{eieio} instruction (Enforce In-order
-Execution of I/O) tells the CPU to make sure that the store to that
-device register happens before it issues any other I/O@.
-
-Note that even a volatile @code{asm} instruction can be moved in ways
-that appear insignificant to the compiler, such as across jump
-instructions. You can't expect a sequence of volatile @code{asm}
-instructions to remain perfectly consecutive. If you want consecutive
-output, use a single @code{asm}. Also, GCC will perform some
-optimizations across a volatile @code{asm} instruction; GCC does not
-``forget everything'' when it encounters a volatile @code{asm}
-instruction the way some other compilers do.
-
-An @code{asm} instruction without any operands or clobbers (an ``old
-style'' @code{asm}) will be treated identically to a volatile
-@code{asm} instruction.
+This will not work reliably, as the compiler may move the addition back
+before the volatile @code{asm}. To make it work you need to add an
+artificial dependency to the @code{asm} referencing a variable in the code
+you don't want moved, for example:
+
+@smallexample
+ asm volatile ("mtfsf 255,%1" : "=X"(sum): "f"(fpenv));
+ sum = x + y;
+@end smallexample
+
+Similarly, you can't expect a
+sequence of volatile @code{asm} instructions to remain perfectly
+consecutive. If you want consecutive output, use a single @code{asm}.
+Also, GCC will perform some optimizations across a volatile @code{asm}
+instruction; GCC does not ``forget everything'' when it encounters
+a volatile @code{asm} instruction the way some other compilers do.
+
+An @code{asm} instruction without any output operands will be treated
+identically to a volatile @code{asm} instruction.
It is a natural idea to look for a way to give access to the condition
code left by the assembler instruction. However, when we attempted to
@item
Local register variables in specific registers do not reserve the
-registers. The compiler's data flow analysis is capable of determining
+registers, except at the point where they are used as input or output
+operands in an @code{asm} statement and the @code{asm} statement itself is
+not deleted. The compiler's data flow analysis is capable of determining
where the specified registers contain live values, and where they are
available for other uses. Stores into local register variables may be deleted
when they appear to be dead according to dataflow analysis. References
This option does not guarantee that GCC will generate code that has
this variable in the register you specify at all times. You may not
-code an explicit reference to this register in an @code{asm} statement
-and assume it will always refer to this variable.
+code an explicit reference to this register in the @emph{assembler
+instruction template} part of an @code{asm} statement and assume it will
+always refer to this variable. However, using the variable as an
+@code{asm} @emph{operand} guarantees that the specified register is used
+for the operand.
Stores into local register variables may be deleted when they appear to be dead
according to dataflow analysis. References to local register variables may
be deleted or moved or simplified.
+As for global register variables, it's recommended that you choose a
+register which is normally saved and restored by function calls on
+your machine, so that library routines will not clobber it. A common
+pitfall is to initialize multiple call-clobbered registers with
+arbitrary expressions, where a function call or library call for an
+arithmetic operator will overwrite a register value from a previous
+assignment, for example @code{r0} below:
+@smallexample
+register int *p1 asm ("r0") = @dots{};
+register int *p2 asm ("r1") = @dots{};
+@end smallexample
+In those cases, a solution is to use a temporary variable for
+each arbitrary expression. @xref{Example of asm with clobbered asm reg}.
+
@node Alternate Keywords
@section Alternate Keywords
@cindex alternate keywords
one of its callers. The @var{level} argument is number of frames to
scan up the call stack. A value of @code{0} yields the return address
of the current function, a value of @code{1} yields the return address
-of the caller of the current function, and so forth. When inlining
+of the caller of the current function, and so forth. When inlining
the expected behavior is that the function will return the address of
the function that will be returned to. To work around this behavior use
the @code{noinline} function attribute.
On some machines it may be impossible to determine the return address of
any function other than the current one; in such cases, or when the top
of the stack has been reached, this function will return @code{0} or a
-random value. In addition, @code{__builtin_frame_address} may be used
+random value. In addition, @code{__builtin_frame_address} may be used
to determine if the top of the stack has been reached.
This function should only be used with a nonzero argument for debugging
GCC includes built-in versions of many of the functions in the standard
C library. The versions prefixed with @code{__builtin_} will always be
treated as having the same meaning as the C library function even if you
-specify the @option{-fno-builtin} option. (@pxref{C Dialect Options})
+specify the @option{-fno-builtin} option. (@pxref{C Dialect Options})
Many of these functions are only optimized in certain cases; if they are
not optimized in a particular case, a call to the library function will
be emitted.
@})
@end smallexample
-@emph{Note:} This construct is only available for C.
+@emph{Note:} This construct is only available for C@.
@end deftypefn
(void)0))
@end smallexample
-@emph{Note:} This construct is only available for C. Furthermore, the
+@emph{Note:} This construct is only available for C@. Furthermore, the
unused expression (@var{exp1} or @var{exp2} depending on the value of
@var{const_exp}) may still generate syntax errors. This may change in
future revisions.
in the significand such that the least significant bit of the number
is at the least significant bit of the significand. The number is
truncated to fit the significand field provided. The significand is
-forced to be a quiet NaN.
+forced to be a quiet NaN@.
This function, if given a string literal, is evaluated early enough
that it is considered a compile-time constant.
@deftypefn {Built-in Function} double __builtin_nans (const char *str)
Similar to @code{__builtin_nan}, except the significand is forced
-to be a signaling NaN. The @code{nans} function is proposed by
+to be a signaling NaN@. The @code{nans} function is proposed by
@uref{http://www.open-std.org/jtc1/sc22/wg14/www/docs/n965.htm,,WG14 N965}.
@end deftypefn
@end deftypefn
@deftypefn {Built-in Function} int __builtin_parity (unsigned int x)
-Returns the parity of @var{x}, i.@:e. the number of 1-bits in @var{x}
+Returns the parity of @var{x}, i.e.@: the number of 1-bits in @var{x}
modulo 2.
@end deftypefn
* ARM Built-in Functions::
* FR-V Built-in Functions::
* X86 Built-in Functions::
+* MIPS Paired-Single Support::
* PowerPC AltiVec Built-in Functions::
+* SPARC VIS Built-in Functions::
@end menu
@node Alpha Built-in Functions
v2si __builtin_ia32_pswapdsi (v2si)
@end smallexample
+@node MIPS Paired-Single Support
+@subsection MIPS Paired-Single Support
+
+The MIPS64 architecture includes a number of instructions that
+operate on pairs of single-precision floating-point values.
+Each pair is packed into a 64-bit floating-point register,
+with one element being designated the ``upper half'' and
+the other being designated the ``lower half''.
+
+GCC supports paired-single operations using both the generic
+vector extensions (@pxref{Vector Extensions}) and a collection of
+MIPS-specific built-in functions. Both kinds of support are
+enabled by the @option{-mpaired-single} command-line option.
+
+The vector type associated with paired-single values is usually
+called @code{v2sf}. It can be defined in C as follows:
+
+@smallexample
+typedef float v2sf __attribute__ ((vector_size (8)));
+@end smallexample
+
+@code{v2sf} values are initialized in the same way as aggregates.
+For example:
+
+@smallexample
+v2sf a = @{1.5, 9.1@};
+v2sf b;
+float e, f;
+b = (v2sf) @{e, f@};
+@end smallexample
+
+@emph{Note:} The CPU's endianness determines which value is stored in
+the upper half of a register and which value is stored in the lower half.
+On little-endian targets, the first value is the lower one and the second
+value is the upper one. The opposite order applies to big-endian targets.
+For example, the code above will set the lower half of @code{a} to
+@code{1.5} on little-endian targets and @code{9.1} on big-endian targets.
+
+@menu
+* Paired-Single Arithmetic::
+* Paired-Single Built-in Functions::
+* MIPS-3D Built-in Functions::
+@end menu
+
+@node Paired-Single Arithmetic
+@subsubsection Paired-Single Arithmetic
+
+The table below lists the @code{v2sf} operations for which hardware
+support exists. @code{a}, @code{b} and @code{c} are @code{v2sf}
+values and @code{x} is an integral value.
+
+@multitable @columnfractions .50 .50
+@item C code @tab MIPS instruction
+@item @code{a + b} @tab @code{add.ps}
+@item @code{a - b} @tab @code{sub.ps}
+@item @code{-a} @tab @code{neg.ps}
+@item @code{a * b} @tab @code{mul.ps}
+@item @code{a * b + c} @tab @code{madd.ps}
+@item @code{a * b - c} @tab @code{msub.ps}
+@item @code{-(a * b + c)} @tab @code{nmadd.ps}
+@item @code{-(a * b - c)} @tab @code{nmsub.ps}
+@item @code{x ? a : b} @tab @code{movn.ps}/@code{movz.ps}
+@end multitable
+
+Note that the multiply-accumulate instructions can be disabled
+using the command-line option @code{-mno-fused-madd}.
+
+@node Paired-Single Built-in Functions
+@subsubsection Paired-Single Built-in Functions
+
+The following paired-single functions map directly to a particular
+MIPS instruction. Please refer to the architecture specification
+for details on what each instruction does.
+
+@table @code
+@item v2sf __builtin_mips_pll_ps (v2sf, v2sf)
+Pair lower lower (@code{pll.ps}).
+
+@item v2sf __builtin_mips_pul_ps (v2sf, v2sf)
+Pair upper lower (@code{pul.ps}).
+
+@item v2sf __builtin_mips_plu_ps (v2sf, v2sf)
+Pair lower upper (@code{plu.ps}).
+
+@item v2sf __builtin_mips_puu_ps (v2sf, v2sf)
+Pair upper upper (@code{puu.ps}).
+
+@item v2sf __builtin_mips_cvt_ps_s (float, float)
+Convert pair to paired single (@code{cvt.ps.s}).
+
+@item float __builtin_mips_cvt_s_pl (v2sf)
+Convert pair lower to single (@code{cvt.s.pl}).
+
+@item float __builtin_mips_cvt_s_pu (v2sf)
+Convert pair upper to single (@code{cvt.s.pu}).
+
+@item v2sf __builtin_mips_abs_ps (v2sf)
+Absolute value (@code{abs.ps}).
+
+@item v2sf __builtin_mips_alnv_ps (v2sf, v2sf, int)
+Align variable (@code{alnv.ps}).
+
+@emph{Note:} The value of the third parameter must be 0 or 4
+modulo 8, otherwise the result will be unpredictable. Please read the
+instruction description for details.
+@end table
+
+The following multi-instruction functions are also available.
+In each case, @var{cond} can be any of the 16 floating-point conditions:
+@code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, @code{ult},
+@code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, @code{ngl},
+@code{lt}, @code{nge}, @code{le} or @code{ngt}.
+
+@table @code
+@item v2sf __builtin_mips_movt_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+@itemx v2sf __builtin_mips_movf_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+Conditional move based on floating point comparison (@code{c.@var{cond}.ps},
+@code{movt.ps}/@code{movf.ps}).
+
+The @code{movt} functions return the value @var{x} computed by:
+
+@smallexample
+c.@var{cond}.ps @var{cc},@var{a},@var{b}
+mov.ps @var{x},@var{c}
+movt.ps @var{x},@var{d},@var{cc}
+@end smallexample
+
+The @code{movf} functions are similar but use @code{movf.ps} instead
+of @code{movt.ps}.
+
+@item int __builtin_mips_upper_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+@itemx int __builtin_mips_lower_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+Comparison of two paired-single values (@code{c.@var{cond}.ps},
+@code{bc1t}/@code{bc1f}).
+
+These functions compare @var{a} and @var{b} using @code{c.@var{cond}.ps}
+and return either the upper or lower half of the result. For example:
+
+@smallexample
+v2sf a, b;
+if (__builtin_mips_upper_c_eq_ps (a, b))
+ upper_halves_are_equal ();
+else
+ upper_halves_are_unequal ();
+
+if (__builtin_mips_lower_c_eq_ps (a, b))
+ lower_halves_are_equal ();
+else
+ lower_halves_are_unequal ();
+@end smallexample
+@end table
+
+@node MIPS-3D Built-in Functions
+@subsubsection MIPS-3D Built-in Functions
+
+The MIPS-3D Application-Specific Extension (ASE) includes additional
+paired-single instructions that are designed to improve the performance
+of 3D graphics operations. Support for these instructions is controlled
+by the @option{-mips3d} command-line option.
+
+The functions listed below map directly to a particular MIPS-3D
+instruction. Please refer to the architecture specification for
+more details on what each instruction does.
+
+@table @code
+@item v2sf __builtin_mips_addr_ps (v2sf, v2sf)
+Reduction add (@code{addr.ps}).
+
+@item v2sf __builtin_mips_mulr_ps (v2sf, v2sf)
+Reduction multiply (@code{mulr.ps}).
+
+@item v2sf __builtin_mips_cvt_pw_ps (v2sf)
+Convert paired single to paired word (@code{cvt.pw.ps}).
+
+@item v2sf __builtin_mips_cvt_ps_pw (v2sf)
+Convert paired word to paired single (@code{cvt.ps.pw}).
+
+@item float __builtin_mips_recip1_s (float)
+@itemx double __builtin_mips_recip1_d (double)
+@itemx v2sf __builtin_mips_recip1_ps (v2sf)
+Reduced precision reciprocal (sequence step 1) (@code{recip1.@var{fmt}}).
+
+@item float __builtin_mips_recip2_s (float, float)
+@itemx double __builtin_mips_recip2_d (double, double)
+@itemx v2sf __builtin_mips_recip2_ps (v2sf, v2sf)
+Reduced precision reciprocal (sequence step 2) (@code{recip2.@var{fmt}}).
+
+@item float __builtin_mips_rsqrt1_s (float)
+@itemx double __builtin_mips_rsqrt1_d (double)
+@itemx v2sf __builtin_mips_rsqrt1_ps (v2sf)
+Reduced precision reciprocal square root (sequence step 1)
+(@code{rsqrt1.@var{fmt}}).
+
+@item float __builtin_mips_rsqrt2_s (float, float)
+@itemx double __builtin_mips_rsqrt2_d (double, double)
+@itemx v2sf __builtin_mips_rsqrt2_ps (v2sf, v2sf)
+Reduced precision reciprocal square root (sequence step 2)
+(@code{rsqrt2.@var{fmt}}).
+@end table
+
+The following multi-instruction functions are also available.
+In each case, @var{cond} can be any of the 16 floating-point conditions:
+@code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, @code{ult},
+@code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq},
+@code{ngl}, @code{lt}, @code{nge}, @code{le} or @code{ngt}.
+
+@table @code
+@item int __builtin_mips_cabs_@var{cond}_s (float @var{a}, float @var{b})
+@itemx int __builtin_mips_cabs_@var{cond}_d (double @var{a}, double @var{b})
+Absolute comparison of two scalar values (@code{cabs.@var{cond}.@var{fmt}},
+@code{bc1t}/@code{bc1f}).
+
+These functions compare @var{a} and @var{b} using @code{cabs.@var{cond}.s}
+or @code{cabs.@var{cond}.d} and return the result as a boolean value.
+For example:
+
+@smallexample
+float a, b;
+if (__builtin_mips_cabs_eq_s (a, b))
+ true ();
+else
+ false ();
+@end smallexample
+
+@item int __builtin_mips_upper_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+@itemx int __builtin_mips_lower_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+Absolute comparison of two paired-single values (@code{cabs.@var{cond}.ps},
+@code{bc1t}/@code{bc1f}).
+
+These functions compare @var{a} and @var{b} using @code{cabs.@var{cond}.ps}
+and return either the upper or lower half of the result. For example:
+
+@smallexample
+v2sf a, b;
+if (__builtin_mips_upper_cabs_eq_ps (a, b))
+ upper_halves_are_equal ();
+else
+ upper_halves_are_unequal ();
+
+if (__builtin_mips_lower_cabs_eq_ps (a, b))
+ lower_halves_are_equal ();
+else
+ lower_halves_are_unequal ();
+@end smallexample
+
+@item v2sf __builtin_mips_movt_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+@itemx v2sf __builtin_mips_movf_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+Conditional move based on absolute comparison (@code{cabs.@var{cond}.ps},
+@code{movt.ps}/@code{movf.ps}).
+
+The @code{movt} functions return the value @var{x} computed by:
+
+@smallexample
+cabs.@var{cond}.ps @var{cc},@var{a},@var{b}
+mov.ps @var{x},@var{c}
+movt.ps @var{x},@var{d},@var{cc}
+@end smallexample
+
+The @code{movf} functions are similar but use @code{movf.ps} instead
+of @code{movt.ps}.
+
+@item int __builtin_mips_any_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+@itemx int __builtin_mips_all_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+@itemx int __builtin_mips_any_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+@itemx int __builtin_mips_all_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
+Comparison of two paired-single values
+(@code{c.@var{cond}.ps}/@code{cabs.@var{cond}.ps},
+@code{bc1any2t}/@code{bc1any2f}).
+
+These functions compare @var{a} and @var{b} using @code{c.@var{cond}.ps}
+or @code{cabs.@var{cond}.ps}. The @code{any} forms return true if either
+result is true and the @code{all} forms return true if both results are true.
+For example:
+
+@smallexample
+v2sf a, b;
+if (__builtin_mips_any_c_eq_ps (a, b))
+ one_is_true ();
+else
+ both_are_false ();
+
+if (__builtin_mips_all_c_eq_ps (a, b))
+ both_are_true ();
+else
+ one_is_false ();
+@end smallexample
+
+@item int __builtin_mips_any_c_@var{cond}_4s (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+@itemx int __builtin_mips_all_c_@var{cond}_4s (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+@itemx int __builtin_mips_any_cabs_@var{cond}_4s (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+@itemx int __builtin_mips_all_cabs_@var{cond}_4s (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
+Comparison of four paired-single values
+(@code{c.@var{cond}.ps}/@code{cabs.@var{cond}.ps},
+@code{bc1any4t}/@code{bc1any4f}).
+
+These functions use @code{c.@var{cond}.ps} or @code{cabs.@var{cond}.ps}
+to compare @var{a} with @var{b} and to compare @var{c} with @var{d}.
+The @code{any} forms return true if any of the four results are true
+and the @code{all} forms return true if all four results are true.
+For example:
+
+@smallexample
+v2sf a, b, c, d;
+if (__builtin_mips_any_c_eq_4s (a, b, c, d))
+ some_are_true ();
+else
+ all_are_false ();
+
+if (__builtin_mips_all_c_eq_4s (a, b, c, d))
+ all_are_true ();
+else
+ some_are_false ();
+@end smallexample
+@end table
+
@node PowerPC AltiVec Built-in Functions
@subsection PowerPC AltiVec Built-in Functions
same type as the variable it is initializing.
@item
-If @code{signed} or @code{unsigned} is omitted, the vector type defaults
-to @code{signed} for @code{vector int} or @code{vector short} and to
-@code{unsigned} for @code{vector char}.
+If @code{signed} or @code{unsigned} is omitted, the signedness of the
+vector type is the default signedness of the base type. The default
+varies depending on the operating system, so a portable program should
+always specify the signedness.
@item
Compiling with @option{-maltivec} adds keywords @code{__vector},
int vec_any_out (vector float, vector float);
@end smallexample
+@node SPARC VIS Built-in Functions
+@subsection SPARC VIS Built-in Functions
+
+GCC supports SIMD operations on the SPARC using both the generic vector
+extensions (@pxref{Vector Extensions}) as well as built-in functions for
+the SPARC Visual Instruction Set (VIS). When you use the @option{-mvis}
+switch, the VIS extension is exposed as the following built-in functions:
+
+@smallexample
+typedef int v2si __attribute__ ((vector_size (8)));
+typedef short v4hi __attribute__ ((vector_size (8)));
+typedef short v2hi __attribute__ ((vector_size (4)));
+typedef char v8qi __attribute__ ((vector_size (8)));
+typedef char v4qi __attribute__ ((vector_size (4)));
+
+void * __builtin_vis_alignaddr (void *, long);
+int64_t __builtin_vis_faligndatadi (int64_t, int64_t);
+v2si __builtin_vis_faligndatav2si (v2si, v2si);
+v4hi __builtin_vis_faligndatav4hi (v4si, v4si);
+v8qi __builtin_vis_faligndatav8qi (v8qi, v8qi);
+
+v4hi __builtin_vis_fexpand (v4qi);
+
+v4hi __builtin_vis_fmul8x16 (v4qi, v4hi);
+v4hi __builtin_vis_fmul8x16au (v4qi, v4hi);
+v4hi __builtin_vis_fmul8x16al (v4qi, v4hi);
+v4hi __builtin_vis_fmul8sux16 (v8qi, v4hi);
+v4hi __builtin_vis_fmul8ulx16 (v8qi, v4hi);
+v2si __builtin_vis_fmuld8sux16 (v4qi, v2hi);
+v2si __builtin_vis_fmuld8ulx16 (v4qi, v2hi);
+
+v4qi __builtin_vis_fpack16 (v4hi);
+v8qi __builtin_vis_fpack32 (v2si, v2si);
+v2hi __builtin_vis_fpackfix (v2si);
+v8qi __builtin_vis_fpmerge (v4qi, v4qi);
+
+int64_t __builtin_vis_pdist (v8qi, v8qi, int64_t);
+@end smallexample
+
@node Target Format Checks
@section Format Checks Specific to Particular Target Machines
Increase the minimum alignment of each @var{variable} to @var{alignment}.
This is the same as GCC's @code{aligned} attribute @pxref{Variable
-Attributes}).
+Attributes}). Macro expansion occurs on the arguments to this pragma
+when compiling C and Objective-C. It does not currently occur when
+compiling C++, but this is a bug which may be fixed in a future
+release.
@item fini (@var{function} [, @var{function}]...)
@cindex pragma, fini
This effect may be terminated with another @code{extern_prefix} pragma
whose argument is an empty string. The preprocessor macro
@code{__PRAGMA_EXTERN_PREFIX} will be defined if this pragma is
-available (currently only on Tru64 UNIX).
+available (currently only on Tru64 UNIX)@.
@end table
These pragmas and the asm labels extension interact in a complicated
@end enumerate
@node Unnamed Fields
-@section Unnamed struct/union fields within structs/unions.
+@section Unnamed struct/union fields within structs/unions
@cindex struct
@cindex union
Such constructs are not supported and must be avoided. In the future,
such constructs may be detected and treated as compilation errors.
+@opindex fms-extensions
+Unless @option{-fms-extensions} is used, the unnamed field must be a
+structure or union definition without a tag (for example, @samp{struct
+@{ int a; @};}). If @option{-fms-extensions} is used, the field may
+also be a definition with a tag such as @samp{struct foo @{ int a;
+@};}, a reference to a previously defined structure or union such as
+@samp{struct foo;}, or a reference to a @code{typedef} name for a
+previously defined structure or union type.
+
@node Thread-Local
@section Thread-Local Storage
@cindex Thread-Local Storage
it is required for backwards compatibility @xref{Backwards Compatibility}.
@end table
+G++ allows a virtual function returning @samp{void *} to be overridden
+by one returning a different pointer type. This extension to the
+covariant return type rules is now deprecated and will be removed from a
+future version.
+
The named return value extension has been deprecated, and is now
removed from G++.
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