builtin_define ("__RX__"); \
builtin_assert ("cpu=RX"); \
if (rx_cpu_type == RX610) \
- builtin_assert ("machine=RX610"); \
+ { \
+ builtin_define ("__RX610__"); \
+ builtin_assert ("machine=RX610"); \
+ } \
else \
builtin_assert ("machine=RX600"); \
\
#define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
#define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
-#ifdef __RX_BIG_ENDIAN__
-#define LIBGCC2_WORDS_BIG_ENDIAN 1
-#else
-#define LIBGCC2_WORDS_BIG_ENDIAN 0
-#endif
-
#define UNITS_PER_WORD 4
#define INT_TYPE_SIZE 32
#ifdef __RX_32BIT_DOUBLES__
#define LIBGCC2_HAS_DF_MODE 0
#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32
-#define LIBGCC2_DOUBLE_TYPE_SIZE 32
#else
#define LIBGCC2_HAS_DF_MODE 1
#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
-#define LIBGCC2_DOUBLE_TYPE_SIZE 64
#endif
#define DEFAULT_SIGNED_CHAR 0
#define STACK_BOUNDARY 32
#define PARM_BOUNDARY 8
-#define FUNCTION_ARG_BOUNDARY(MODE, TYPE) 32
-
#define STACK_GROWS_DOWNWARD 1
#define FRAME_GROWS_DOWNWARD 0
#define FIRST_PARM_OFFSET(FNDECL) 0
#define POINTER_SIZE 32
#undef SIZE_TYPE
#define SIZE_TYPE "long unsigned int"
+#undef PTRDIFF_TYPE
+#define PTRDIFF_TYPE "long int"
+#undef WCHAR_TYPE
+#define WCHAR_TYPE "long int"
+#undef WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE BITS_PER_WORD
#define POINTERS_EXTEND_UNSIGNED 1
#define FUNCTION_MODE QImode
#define CASE_VECTOR_MODE Pmode
#define MOVE_MAX 4
#define STARTING_FRAME_OFFSET 0
-#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
#define LEGITIMATE_CONSTANT_P(X) rx_is_legitimate_constant (X)
-#define HANDLE_PRAGMA_PACK_PUSH_POP 1
-
#define HAVE_PRE_DECCREMENT 1
#define HAVE_POST_INCREMENT 1
GR_REGS, LIM_REG_CLASSES \
}
+#define SMALL_REGISTER_CLASSES 0
#define N_REG_CLASSES (int) LIM_REG_CLASSES
#define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
+ UNITS_PER_WORD - 1) \
#define BASE_REG_CLASS GR_REGS
#define INDEX_REG_CLASS GR_REGS
-#define FIRST_PSEUDO_REGISTER 16
+#define FIRST_PSEUDO_REGISTER 17
#define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
? GR_REGS : NO_REGS)
#define STATIC_CHAIN_REGNUM 8
#define TRAMPOLINE_TEMP_REGNUM 9
#define STRUCT_VAL_REGNUM 15
+#define CC_REGNUM 16
/* This is the register which is used to hold the address of the start
of the small data area, if that feature is being used. Note - this
#define FIXED_REGISTERS \
{ \
- 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
+ 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 \
}
#define CALL_USED_REGISTERS \
{ \
- 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1 \
+ 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 \
}
-#define CONDITIONAL_REGISTER_USAGE \
- rx_conditional_register_usage ()
-
#define LIBCALL_VALUE(MODE) \
gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
|| GET_MODE_SIZE (MODE) >= 4) \
{ 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
}
-#define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
-
#define REGNO_IN_RANGE(REGNO, MIN, MAX) \
(IN_RANGE ((REGNO), (MIN), (MAX)) \
|| (reg_renumber != NULL \
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
(CUM) = 0
-#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
- rx_function_arg (& CUM, MODE, TYPE, NAMED)
-
-#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
- (CUM) += rx_function_arg_size (MODE, TYPE)
\f
#define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
#define TRAMPOLINE_ALIGNMENT 32
#define REGISTER_NAMES \
{ \
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
- "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" \
- };
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "cc" \
+ }
#define ADDITIONAL_REGISTER_NAMES \
{ \
they contain are always computed between two same-section symbols. */
#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
\f
-#define PRINT_OPERAND(FILE, X, CODE) \
- rx_print_operand (FILE, X, CODE)
-#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
- rx_print_operand_address (FILE, ADDR)
-\f
-#define CC_NO_CARRY 0400
-#define NOTICE_UPDATE_CC(EXP, INSN) rx_notice_update_cc (EXP, INSN)
-
extern int rx_float_compare_mode;
\f
/* This is a version of REG_P that also returns TRUE for SUBREGs. */
/* Like REG_P except that this macro is true for SET expressions. */
#define SET_P(rtl) (GET_CODE (rtl) == SET)
\f
-#define CAN_DEBUG_WITHOUT_FP 1
-
/* The AS100 assembler does not support .leb128 and .uleb128, but
the compiler-build-time configure tests will have enabled their
use because GAS supports them. So default to generating STABS
#define ARG_POINTER_CFA_OFFSET(FNDECL) 4
#define FRAME_POINTER_CFA_OFFSET(FNDECL) 4
\f
-/* Translate -nofpu into -mnofpu so that it gets passed from gcc to cc1. */
-#define TARGET_OPTION_TRANSLATE_TABLE \
- {"-nofpu", "-mnofpu" }
-
-#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
- rx_set_optimization_options ()
-
#define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
/* This macro is used to decide when RX FPU instructions can be used. */
#define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU)
+
+#define BRANCH_COST(SPEED,PREDICT) 1
+#define REGISTER_MOVE_COST(MODE,FROM,TO) 2
+
+#define SELECT_CC_MODE(OP,X,Y) \
+ (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CC_ZSmode : \
+ (GET_CODE (X) == PLUS || GET_CODE (X) == MINUS ? CC_ZSCmode : \
+ (GET_CODE (X) == ABS ? CC_ZSOmode : \
+ (GET_CODE (X) == AND || GET_CODE (X) == NOT || GET_CODE (X) == IOR \
+ || GET_CODE (X) == XOR || GET_CODE (X) == ROTATE \
+ || GET_CODE (X) == ROTATERT || GET_CODE (X) == ASHIFTRT \
+ || GET_CODE (X) == LSHIFTRT || GET_CODE (X) == ASHIFT ? CC_ZSmode : \
+ CCmode))))
OSDN Git Service
