PR target/24997

[pf3gnuchains/gcc-fork.git] / gcc / config / rs6000 / rs6000.c

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index d8d00a5..d013916 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -2731,13 +2731,23 @@ legitimate_indexed_address_p (rtx x, int strict)
   op0 = XEXP (x, 0);
   op1 = XEXP (x, 1);
 
-  if (!REG_P (op0) || !REG_P (op1))
-    return false;
-
-  return ((INT_REG_OK_FOR_BASE_P (op0, strict)
-          && INT_REG_OK_FOR_INDEX_P (op1, strict))
-         || (INT_REG_OK_FOR_BASE_P (op1, strict)
-             && INT_REG_OK_FOR_INDEX_P (op0, strict)));
+  if (REG_P (op0) && REG_P (op1))
+    return ((INT_REG_OK_FOR_BASE_P (op0, strict)
+            && INT_REG_OK_FOR_INDEX_P (op1, strict))
+           || (INT_REG_OK_FOR_BASE_P (op1, strict)
+               && INT_REG_OK_FOR_INDEX_P (op0, strict)));
+
+  /* Recognize the rtl generated by reload which we know will later be
+     replaced by a base reg.  We rely on nothing but reload generating
+     this particular pattern, a reasonable assumption because it is not
+     canonical.  */
+  else if (reload_in_progress
+          && GET_CODE (op0) == PLUS
+          && REG_P (XEXP (op0, 0))
+          && GET_CODE (XEXP (op0, 1)) == CONST_INT
+          && REG_P (op1))
+    return INT_REG_OK_FOR_INDEX_P (op1, strict);
+  return false;
 }
 
 inline bool