/* Definitions of target machine for GNU compiler.
Matsushita MN10300 series
- Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004
- Free Software Foundation, Inc.
+ Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+ 2007, 2008, 2009 Free Software Foundation, Inc.
Contributed by Jeff Law (law@cygnus.com).
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
+the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
#undef ASM_SPEC
{ \
builtin_define ("__mn10300__"); \
builtin_define ("__MN10300__"); \
+ builtin_assert ("cpu=mn10300"); \
+ builtin_assert ("machine=mn10300"); \
} \
while (0)
/* Allocation boundary (in *bits*) for storing arguments in argument list. */
#define PARM_BOUNDARY 32
-/* The stack goes in 32 bit lumps. */
+/* The stack goes in 32-bit lumps. */
#define STACK_BOUNDARY 32
/* Allocation boundary (in *bits*) for the code of a function.
, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
}
+/* Note: The definition of CALL_REALLY_USED_REGISTERS is not
+ redundant. It is needed when compiling in PIC mode because
+ the a2 register becomes fixed (and hence must be marked as
+ call_used) but in order to preserve the ABI it is not marked
+ as call_really_used. */
+#define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS
+
#define REG_ALLOC_ORDER \
{ 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9 \
, 42, 43, 44, 45, 46, 47, 48, 49, 34, 35, 36, 37, 38, 39, 40, 41 \
For any two classes, it is very desirable that there be another
class that represents their union. */
-
+
enum reg_class {
NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
- DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
+ DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS,
- SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS,
+ SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS,
FP_REGS, FP_ACC_REGS,
GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
};
{ 0xffffffff, 0x3ffff } /* ALL_REGS */ \
}
+/* The following macro defines cover classes for Integrated Register
+ Allocator. Cover classes is a set of non-intersected register
+ classes covering all hard registers used for register allocation
+ purpose. Any move between two registers of a cover class should be
+ cheaper than load or store of the registers. The macro value is
+ array of register classes with LIM_REG_CLASSES used as the end
+ marker. */
+
+#define IRA_COVER_CLASSES \
+{ \
+ GENERAL_REGS, FP_REGS, LIM_REG_CLASSES \
+}
+
/* The same information, inverted:
Return the class number of the smallest class containing
reg number REGNO. This could be a conditional expression
#define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS
#define BASE_REG_CLASS SP_OR_ADDRESS_REGS
-/* Get reg_class from a letter such as appears in the machine description. */
-
-#define REG_CLASS_FROM_LETTER(C) \
- ((C) == 'd' ? DATA_REGS : \
- (C) == 'a' ? ADDRESS_REGS : \
- (C) == 'y' ? SP_REGS : \
- ! TARGET_AM33 ? NO_REGS : \
- (C) == 'x' ? EXTENDED_REGS : \
- ! TARGET_AM33_2 ? NO_REGS : \
- (C) == 'f' ? FP_REGS : \
- (C) == 'A' ? FP_ACC_REGS : \
- NO_REGS)
-
/* Macros to check register numbers against specific register classes. */
/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
(!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS)
#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
- secondary_reload_class(CLASS,MODE,IN)
+ mn10300_secondary_reload_class(CLASS,MODE,IN)
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS. */
loaded the register. */
#define CLASS_CANNOT_CHANGE_SIZE FP_REGS
-/* The letters I, J, K, L, M, N, O, P in a register constraint string
- can be used to stand for particular ranges of immediate operands.
- This macro defines what the ranges are.
- C is the letter, and VALUE is a constant value.
- Return 1 if VALUE is in the range specified by C. */
+/* Return 1 if VALUE is in the range specified. */
#define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
#define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
-#define CONST_OK_FOR_I(VALUE) ((VALUE) == 0)
-#define CONST_OK_FOR_J(VALUE) ((VALUE) == 1)
-#define CONST_OK_FOR_K(VALUE) ((VALUE) == 2)
-#define CONST_OK_FOR_L(VALUE) ((VALUE) == 4)
-#define CONST_OK_FOR_M(VALUE) ((VALUE) == 3)
-#define CONST_OK_FOR_N(VALUE) ((VALUE) == 255 || (VALUE) == 65535)
-
-#define CONST_OK_FOR_LETTER_P(VALUE, C) \
- ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \
- (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \
- (C) == 'K' ? CONST_OK_FOR_K (VALUE) : \
- (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \
- (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \
- (C) == 'N' ? CONST_OK_FOR_N (VALUE) : 0)
-
-
-/* Similar, but for floating constants, and defining letters G and H.
- Here VALUE is the CONST_DOUBLE rtx itself.
-
- `G' is a floating-point zero. */
-
-#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
- ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
- && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) : 0)
-
\f
/* Stack layout; function entry, exit and calling. */
#define STACK_GROWS_DOWNWARD
-/* Define this if the nominal address of the stack frame
+/* Define this to nonzero if the nominal address of the stack frame
is at the high-address end of the local variables;
that is, each additional local variable allocated
goes at a more negative offset in the frame. */
-#define FRAME_GROWS_DOWNWARD
+#define FRAME_GROWS_DOWNWARD 1
/* Offset within stack frame to start allocating local variables at.
If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
-#define CAN_ELIMINATE(FROM, TO) 1
-
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
OFFSET = initial_offset (FROM, TO)
/* We can debug without frame pointers on the mn10300, so eliminate
them whenever possible. */
-#define FRAME_POINTER_REQUIRED 0
#define CAN_DEBUG_WITHOUT_FP
/* Value is the number of bytes of arguments automatically
/* We use d0/d1 for passing parameters, so allocate 8 bytes of space
for a register flushback area. */
#define REG_PARM_STACK_SPACE(DECL) 8
-#define OUTGOING_REG_PARM_STACK_SPACE
+#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
#define ACCUMULATE_OUTGOING_ARGS 1
/* So we can allocate space for return pointers once for the function
NAMED is nonzero if this argument is a named parameter
(otherwise it is an extra parameter matching an ellipsis). */
-/* On the MN10300 all args are pushed. */
+/* On the MN10300 all args are pushed. */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
function_arg (&CUM, MODE, TYPE, NAMED)
-/* Define how to find the value returned by a function.
- VALTYPE is the data type of the value (as a tree).
- If the precise function being called is known, FUNC is its FUNCTION_DECL;
- otherwise, FUNC is 0. */
-
-#define FUNCTION_VALUE(VALTYPE, FUNC) \
- gen_rtx_REG (TYPE_MODE (VALTYPE), POINTER_TYPE_P (VALTYPE) \
- ? FIRST_ADDRESS_REGNUM : FIRST_DATA_REGNUM)
-
-/* Define how to find the value returned by a library function
- assuming the value has mode MODE. */
-
-#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_DATA_REGNUM)
-
-/* 1 if N is a possible register number for a function value. */
-
-#define FUNCTION_VALUE_REGNO_P(N) \
- ((N) == FIRST_DATA_REGNUM || (N) == FIRST_ADDRESS_REGNUM)
+#define FUNCTION_VALUE_REGNO_P(N) mn10300_function_value_regno_p (N)
#define DEFAULT_PCC_STRUCT_RETURN 0
#define FUNCTION_PROFILER(FILE, LABELNO) ;
-#define TRAMPOLINE_TEMPLATE(FILE) \
- do { \
- fprintf (FILE, "\tadd -4,sp\n"); \
- fprintf (FILE, "\t.long 0x0004fffa\n"); \
- fprintf (FILE, "\tmov (0,sp),a0\n"); \
- fprintf (FILE, "\tadd 4,sp\n"); \
- fprintf (FILE, "\tmov (13,a0),a1\n"); \
- fprintf (FILE, "\tmov (17,a0),a0\n"); \
- fprintf (FILE, "\tjmp (a0)\n"); \
- fprintf (FILE, "\t.long 0\n"); \
- fprintf (FILE, "\t.long 0\n"); \
- } while (0)
-
/* Length in units of the trampoline for entering a nested function. */
#define TRAMPOLINE_SIZE 0x1b
#define TRAMPOLINE_ALIGNMENT 32
-/* Emit RTL insns to initialize the variable parts of a trampoline.
- FNADDR is an RTX for the address of the function's pure code.
- CXT is an RTX for the static chain value for the function. */
-
-#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
-{ \
- emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x14)), \
- (CXT)); \
- emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 0x18)), \
- (FNADDR)); \
-}
/* A C expression whose value is RTL representing the value of the return
address for the frame COUNT steps up from the current frame.
((COUNT == 0) \
? gen_rtx_MEM (Pmode, arg_pointer_rtx) \
: (rtx) 0)
-
-/* Implement `va_start' for varargs and stdarg. */
-#define EXPAND_BUILTIN_VA_START(valist, nextarg) \
- mn10300_va_start (valist, nextarg)
\f
-/* 1 if X is an rtx for a constant that is a valid address. */
-
-#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
-
-/* Extra constraints. */
-
-#define OK_FOR_Q(OP) \
- (GET_CODE (OP) == MEM && ! CONSTANT_ADDRESS_P (XEXP (OP, 0)))
-
-#define OK_FOR_R(OP) \
- (GET_CODE (OP) == MEM \
- && GET_MODE (OP) == QImode \
- && (CONSTANT_ADDRESS_P (XEXP (OP, 0)) \
- || (GET_CODE (XEXP (OP, 0)) == REG \
- && REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \
- && XEXP (OP, 0) != stack_pointer_rtx) \
- || (GET_CODE (XEXP (OP, 0)) == PLUS \
- && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
- && REG_OK_FOR_BIT_BASE_P (XEXP (XEXP (OP, 0), 0)) \
- && XEXP (XEXP (OP, 0), 0) != stack_pointer_rtx \
- && GET_CODE (XEXP (XEXP (OP, 0), 1)) == CONST_INT \
- && INT_8_BITS (INTVAL (XEXP (XEXP (OP, 0), 1))))))
-
-#define OK_FOR_T(OP) \
- (GET_CODE (OP) == MEM \
- && GET_MODE (OP) == QImode \
- && (GET_CODE (XEXP (OP, 0)) == REG \
- && REG_OK_FOR_BIT_BASE_P (XEXP (OP, 0)) \
- && XEXP (OP, 0) != stack_pointer_rtx))
-
-#define EXTRA_CONSTRAINT(OP, C) \
- ((C) == 'R' ? OK_FOR_R (OP) \
- : (C) == 'Q' ? OK_FOR_Q (OP) \
- : (C) == 'S' && flag_pic \
- ? GET_CODE (OP) == UNSPEC && (XINT (OP, 1) == UNSPEC_PLT \
- || XINT (OP, 1) == UNSPEC_PIC) \
- : (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF \
- : (C) == 'T' ? OK_FOR_T (OP) \
- : 0)
-
/* Maximum number of registers that can appear in a valid memory address. */
#define MAX_REGS_PER_ADDRESS 2
\f
#define HAVE_POST_INCREMENT (TARGET_AM33)
-/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
- that is a valid memory address for an instruction.
- The MODE argument is the machine mode for the MEM expression
- that wants to use this address.
-
- The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
- except for CONSTANT_ADDRESS_P which is actually
- machine-independent.
-
- On the mn10300, the value in the address register must be
- in the same memory space/segment as the effective address.
-
- This is problematical for reload since it does not understand
- that base+index != index+base in a memory reference.
-
- Note it is still possible to use reg+reg addressing modes,
- it's just much more difficult. For a discussion of a possible
- workaround and solution, see the comments in pa.c before the
- function record_unscaled_index_insn_codes. */
-
/* Accept either REG or SUBREG where a register is valid. */
-
+
#define RTX_OK_FOR_BASE_P(X, strict) \
((REG_P (X) && REGNO_STRICT_OK_FOR_BASE_P (REGNO (X), \
(strict))) \
&& REGNO_STRICT_OK_FOR_BASE_P (REGNO (SUBREG_REG (X)), \
(strict))))
-#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
-do \
- { \
- if (legitimate_address_p ((MODE), (X), REG_STRICT)) \
- goto ADDR; \
- } \
-while (0)
-
\f
-/* Try machine-dependent ways of modifying an illegitimate address
- to be legitimate. If we find one, return the new, valid address.
- This macro is used in only one place: `memory_address' in explow.c.
-
- OLDX is the address as it was before break_out_memory_refs was called.
- In some cases it is useful to look at this to decide what needs to be done.
-
- MODE and WIN are passed so that this macro can use
- GO_IF_LEGITIMATE_ADDRESS.
-
- It is always safe for this macro to do nothing. It exists to recognize
- opportunities to optimize the output. */
-
-#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
-{ rtx orig_x = (X); \
- (X) = legitimize_address (X, OLDX, MODE); \
- if ((X) != orig_x && memory_address_p (MODE, X)) \
- goto WIN; }
-
-/* Go to LABEL if ADDR (a legitimate address expression)
- has an effect that depends on the machine mode it is used for. */
-
-#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
- if (GET_CODE (ADDR) == POST_INC) \
- goto LABEL
/* Nonzero if the constant value X is a legitimate general operand.
It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
constants. Used for PIC-specific UNSPECs. */
#define OUTPUT_ADDR_CONST_EXTRA(STREAM, X, FAIL) \
do \
- if (GET_CODE (X) == UNSPEC && XVECLEN ((X), 0) == 1) \
+ if (GET_CODE (X) == UNSPEC) \
{ \
switch (XINT ((X), 1)) \
{ \
case UNSPEC_INT_LABEL: \
- asm_fprintf ((STREAM), ".%LLIL%d", \
+ asm_fprintf ((STREAM), ".%LLIL" HOST_WIDE_INT_PRINT_DEC, \
INTVAL (XVECEXP ((X), 0, 0))); \
break; \
case UNSPEC_PIC: \
output_addr_const ((STREAM), XVECEXP ((X), 0, 0)); \
fputs ("@PLT", (STREAM)); \
break; \
+ case UNSPEC_GOTSYM_OFF: \
+ assemble_name (STREAM, GOT_SYMBOL_NAME); \
+ fputs ("-(", STREAM); \
+ output_addr_const (STREAM, XVECEXP (X, 0, 0)); \
+ fputs ("-.)", STREAM); \
+ break; \
default: \
goto FAIL; \
} \
than accessing full words. */
#define SLOW_BYTE_ACCESS 1
-/* Dispatch tables on the mn10300 are extremely expensive in terms of code
- and readonly data size. So we crank up the case threshold value to
- encourage a series of if/else comparisons to implement many small switch
- statements. In theory, this value could be increased much more if we
- were solely optimizing for space, but we keep it "reasonable" to avoid
- serious code efficiency lossage. */
-#define CASE_VALUES_THRESHOLD 6
-
#define NO_FUNCTION_CSE
/* According expr.c, a value of around 6 should minimize code size, and
for the MN10300 series, that's our primary concern. */
-#define MOVE_RATIO 6
+#define MOVE_RATIO(speed) 6
#define TEXT_SECTION_ASM_OP "\t.section .text"
#define DATA_SECTION_ASM_OP "\t.section .data"
#define ASM_APP_OFF "#NO_APP\n"
+#undef USER_LABEL_PREFIX
+#define USER_LABEL_PREFIX "_"
+
/* This says how to output the assembler to define a global
uninitialized but not common symbol.
Try to use asm_output_bss to implement this macro. */
#undef ASM_OUTPUT_LABELREF
#define ASM_OUTPUT_LABELREF(FILE, NAME) \
- fprintf (FILE, "_%s", (*targetm.strip_name_encoding) (NAME))
+ asm_fprintf (FILE, "%U%s", (*targetm.strip_name_encoding) (NAME))
#define ASM_PN_FORMAT "%s___%lu"
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