/* Definitions of target machine for GNU compiler,
for Motorola M*CORE Processor.
Copyright (C) 1993, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007,
- 2008 Free Software Foundation, Inc.
+ 2008, 2009, 2010 Free Software Foundation, Inc.
This file is part of GCC.
/* The MCore ABI says that bitfields are unsigned by default. */
#define CC1_SPEC "-funsigned-bitfields"
-/* What options are we going to default to specific settings when
- -O* happens; the user can subsequently override these settings.
-
- Omitting the frame pointer is a very good idea on the MCore.
- Scheduling isn't worth anything on the current MCore implementation. */
-#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
-{ \
- if (LEVEL) \
- { \
- flag_no_function_cse = 1; \
- flag_omit_frame_pointer = 1; \
- \
- if (LEVEL >= 2) \
- { \
- flag_caller_saves = 0; \
- flag_schedule_insns = 0; \
- flag_schedule_insns_after_reload = 0; \
- } \
- } \
- if (SIZE) \
- { \
- target_flags &= ~MASK_HARDLIT; \
- } \
-}
-
-/* What options are we going to force to specific settings,
- regardless of what the user thought he wanted.
- We also use this for some post-processing of options. */
-#define OVERRIDE_OPTIONS mcore_override_options ()
-
/* Target machine storage Layout. */
#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
numbered. */
#define WORDS_BIG_ENDIAN (! TARGET_LITTLE_END)
-#define LIBGCC2_WORDS_BIG_ENDIAN 1
-#ifdef __MCORELE__
-#undef LIBGCC2_WORDS_BIG_ENDIAN
-#define LIBGCC2_WORDS_BIG_ENDIAN 0
-#endif
-
#define MAX_BITS_PER_WORD 32
/* Width of a word, in units (bytes). */
#define STACK_BOUNDARY (TARGET_8ALIGN ? 64 : 32)
/* Largest increment in UNITS we allow the stack to grow in a single operation. */
-extern int mcore_stack_increment;
#define STACK_UNITS_MAXSTEP 4096
/* Allocation boundary (in *bits*) for the code of a function. */
#define MODES_TIEABLE_P(MODE1, MODE2) \
((MODE1) == (MODE2) || GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
-/* Value should be nonzero if functions must have frame pointers.
- Zero means the frame pointer need not be set up (and parms may be accessed
- via the stack pointer) in functions that seem suitable. */
-#define FRAME_POINTER_REQUIRED 0
-
/* Definitions for register eliminations.
We have two registers that can be eliminated on the MCore. First, the
{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},}
-/* Given FROM and TO register numbers, say whether this elimination
- is allowed. */
-#define CAN_ELIMINATE(FROM, TO) \
- (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
-
/* Define the offset between two registers, one to be eliminated, and the other
its replacement, at the start of a routine. */
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
reg number REGNO. This could be a conditional expression
or could index an array. */
-extern const int regno_reg_class[FIRST_PSEUDO_REGISTER];
+extern const enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
#define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
-/* When defined, the compiler allows registers explicitly used in the
- rtl to be used as spill registers but prevents the compiler from
- extending the lifetime of these registers. */
-#define SMALL_REGISTER_CLASSES 1
+/* When this hook returns true for MODE, the compiler allows
+ registers explicitly used in the rtl to be used as spill registers
+ but prevents the compiler from extending the lifetime of these
+ registers. */
+#define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS NO_REGS
/* Offset of first parameter from the argument pointer register value. */
#define FIRST_PARM_OFFSET(FNDECL) 0
-/* Value is the number of byte of arguments automatically
- popped when returning from a subroutine call.
- FUNTYPE is the data type of the function (as a tree),
- or for a library call it is an identifier node for the subroutine name.
- SIZE is the number of bytes of arguments passed on the stack.
-
- On the MCore, the callee does not pop any of its arguments that were passed
- on the stack. */
-#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
-
/* Define how to find the value returned by a function.
VALTYPE is the data type of the value (as a tree).
If the precise function being called is known, FUNC is its FUNCTION_DECL;
No definition is equivalent to always zero. */
#define EXIT_IGNORE_STACK 0
-/* Output assembler code for a block containing the constant parts
- of a trampoline, leaving space for the variable parts.
-
- On the MCore, the trampoline looks like:
- lrw r1, function
- lrw r13, area
- jmp r13
- or r0, r0
- .literals */
-#define TRAMPOLINE_TEMPLATE(FILE) \
-{ \
- fprintf ((FILE), " .short 0x7102\n"); \
- fprintf ((FILE), " .short 0x7d02\n"); \
- fprintf ((FILE), " .short 0x00cd\n"); \
- fprintf ((FILE), " .short 0x1e00\n"); \
- fprintf ((FILE), " .long 0\n"); \
- fprintf ((FILE), " .long 0\n"); \
-}
-
/* Length in units of the trampoline for entering a nested function. */
#define TRAMPOLINE_SIZE 12
/* Alignment required for a trampoline in bits. */
#define TRAMPOLINE_ALIGNMENT 32
-/* Emit RTL insns to initialize the variable parts of a trampoline.
- FNADDR is an RTX for the address of the function's pure code.
- CXT is an RTX for the static chain value for the function. */
-#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
-{ \
- emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 8)), \
- (CXT)); \
- emit_move_insn (gen_rtx_MEM (SImode, plus_constant ((TRAMP), 12)), \
- (FNADDR)); \
-}
-
/* Macros to check register numbers against specific register classes. */
/* These assume that REGNO is a hard or pseudo reg number.
{ \
if (GET_MODE_SIZE (MODE) >= 4 \
&& (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 4) == 0 \
- && ((unsigned HOST_WIDE_INT) INTVAL (OP)) <= 64 - GET_MODE_SIZE (MODE)) \
+ && ((unsigned HOST_WIDE_INT) INTVAL (OP)) \
+ <= (unsigned HOST_WIDE_INT) 64 - GET_MODE_SIZE (MODE)) \
goto LABEL; \
if (GET_MODE_SIZE (MODE) == 2 \
&& (((unsigned HOST_WIDE_INT) INTVAL (OP)) % 2) == 0 \
#undef TARGET_ASM_NAMED_SECTION
#define TARGET_ASM_NAMED_SECTION mcore_asm_named_section
+#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, LK_REG)
+
/* This is how to output an insn to push a register on the stack.
It need not be very fast code. */
#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
} \
while (0)
-/* Print operand X (an rtx) in assembler syntax to file FILE.
- CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
- For `%' followed by punctuation, CODE is the punctuation and X is null. */
-#define PRINT_OPERAND(STREAM, X, CODE) mcore_print_operand (STREAM, X, CODE)
-
-/* Print a memory address as an operand to reference that memory location. */
-#define PRINT_OPERAND_ADDRESS(STREAM,X) mcore_print_operand_address (STREAM, X)
-
-#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
- ((CHAR)=='.' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^' || (CHAR) == '!')
-
#endif /* ! GCC_MCORE_H */
OSDN Git Service
