/* Definitions of target machine for GNU compiler,
for m68k (including m68010) NetBSD platforms using the
ELF object format.
- Copyright (C) 2002 Free Software Foundation, Inc.
+ Copyright (C) 2002, 2003, 2004, 2006 Free Software Foundation, Inc.
Contributed by Wasabi Systems. Inc.
This file is derived from <m68k/m68kv4.h>, <m68k/m68kelf.h>,
and <m68k/linux.h>.
-This file is part of GNU CC.
+This file is part of GCC.
-GNU CC is free software; you can redistribute it and/or modify
+GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 1, or (at your option)
+the Free Software Foundation; either version 2, or (at your option)
any later version.
-GNU CC is distributed in the hope that it will be useful,
+GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with GNU CC; see the file COPYING. If not, write to
-the Free Software Foundation, 59 Temple Place - Suite 330,
-Boston, MA 02111-1307, USA. */
+along with GCC; see the file COPYING. If not, write to
+the Free Software Foundation, 51 Franklin Street, Fifth Floor,
+Boston, MA 02110-1301, USA. */
#define TARGET_OS_CPP_BUILTINS() \
do \
builtin_define ("__m68k__"); \
builtin_define ("__SVR4_ABI__"); \
builtin_define ("__motorola__"); \
- builtin_assert ("cpu=m68k"); \
- builtin_assert ("machine=m68k"); \
+ if (TARGET_HARD_FLOAT) \
+ builtin_define ("__HAVE_FPU__"); \
} \
while (0)
-/* Default target comes from config.gcc */
-#undef TARGET_DEFAULT
-#define TARGET_DEFAULT TARGET_CPU_DEFAULT
-
-
/* Don't try using XFmode on the 68010. */
#undef LONG_DOUBLE_TYPE_SIZE
-#define LONG_DOUBLE_TYPE_SIZE \
- ((TARGET_68020 || TARGET_68040 || TARGET_68040_ONLY || \
- TARGET_68060) ? 96 : 64)
+#define LONG_DOUBLE_TYPE_SIZE (TARGET_68020 ? 80 : 64)
#ifdef __mc68010__
#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
#else
-#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 96
+#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 80
#endif
-#define EXTRA_SPECS \
- { "cpp_cpu_default_spec", CPP_CPU_DEFAULT_SPEC }, \
- { "cpp_cpu_spec", CPP_CPU_SPEC }, \
- { "cpp_fpu_spec", CPP_FPU_SPEC }, \
- { "asm_default_spec", ASM_DEFAULT_SPEC }, \
- { "netbsd_cpp_spec", NETBSD_CPP_SPEC }, \
+#undef SUBTARGET_EXTRA_SPECS
+#define SUBTARGET_EXTRA_SPECS \
{ "netbsd_entry_point", NETBSD_ENTRY_POINT },
-#define CPP_CPU_SPEC \
- "%{m68010:-D__mc68010__} \
- %{m68020:-D__mc68020__} \
- %{m68030:-D__mc68030__} \
- %{m68040:-D__mc68040__} \
- %(cpp_cpu_default_spec)"
-
-
#undef TARGET_VERSION
-#if TARGET_DEFAULT & MASK_68020
-#define TARGET_VERSION fprintf (stderr, " (NetBSD/m68k ELF)");
-#define CPP_CPU_DEFAULT_SPEC "%{!m680*:-D__mc68020__}"
-#define ASM_DEFAULT_SPEC "%{!m680*:-m68020}"
-#else
-#define TARGET_VERSION fprintf (stderr, " (NetBSD/68010 ELF)");
-#define CPP_CPU_DEFAULT_SPEC "%{!m680*:-D__mc68010__}"
-#define ASM_DEFAULT_SPEC "%{!m680*:-m68010}"
-#endif
-
-
-#if TARGET_DEFAULT & MASK_68881
-#define CPP_FPU_SPEC "%{!msoft-float:-D__HAVE_68881__ -D__HAVE_FPU__}"
-#else
-#define CPP_FPU_SPEC "%{m68881:-D__HAVE_68881__ -D__HAVE_FPU__}"
-#endif
+#define TARGET_VERSION \
+ fprintf (stderr, \
+ TARGET_68010 \
+ ? " (NetBSD/68010 ELF)" \
+ : " (NetBSD/m68k ELF)");
/* Provide a CPP_SPEC appropriate for NetBSD m68k targets. Currently we
whether or not use of the FPU is allowed. */
#undef CPP_SPEC
-#define CPP_SPEC \
- "%(netbsd_cpp_spec) %(cpp_cpu_spec) %(cpp_fpu_spec)"
+#define CPP_SPEC NETBSD_CPP_SPEC
-/* Provide an ASM_SPEC appropriate for NetBSD m68k ELF targets. We pass
- on some CPU options, as well as PIC code generation options. */
+/* Provide an ASM_SPEC appropriate for NetBSD m68k ELF targets. We need
+ to passn PIC code generation options. */
#undef ASM_SPEC
-#define ASM_SPEC \
- " %| %(asm_default_spec) \
- %{m68010} %{m68020} %{m68030} %{m68040} %{m68060} \
- %{fpic:-k} %{fPIC:-k -K}"
+#define ASM_SPEC "%(asm_cpu_spec) %{fpic|fpie:-k} %{fPIC|fPIE:-k -K}"
+
+#define AS_NEEDS_DASH_FOR_PIPED_INPUT
/* Provide a LINK_SPEC appropriate for a NetBSD/m68k ELF target. */
Here is a bunch of stuff lifted from m68kelf.h. We don't use that
file directly, because it has a lot of baggage we don't want. */
-#define MOTOROLA /* Use Motorola syntax */
-#define USE_GAS /* But GAS wants jbsr instead of jsr */
-
/* The prefix for register names. Note that REGISTER_NAMES
is supposed to include this prefix. Also note that this is NOT an
#define ASM_COMMENT_START "|"
-/* How to refer to registers in assembler output.
- This sequence is indexed by compiler's hard-register-number.
- Motorola format uses different register names than defined in m68k.h.
- We also take this chance to convert 'a6' to 'fp' */
-
-#undef REGISTER_NAMES
-
-#ifndef SUPPORT_SUN_FPA
-
-#define REGISTER_NAMES \
-{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
- "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
- "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" }
-
-#else /* SUPPORT_SUN_FPA */
-
-#define REGISTER_NAMES \
-{"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
- "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
- "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", \
- "%fpa0", "%fpa1", "%fpa2", "%fpa3", "%fpa4", "%fpa5", "%fpa6","%fpa7", \
- "%fpa8", "%fpa9", "%fpa10","%fpa11","%fpa12","%fpa13","%fpa14","%fpa15", \
- "%fpa16","%fpa17","%fpa18","%fpa19","%fpa20","%fpa21","%fpa22","%fpa23", \
- "%fpa24","%fpa25","%fpa26","%fpa27","%fpa28","%fpa29","%fpa30","%fpa31" }
-
-#endif /* ! SUPPORT_SUN_FPA */
-
-
/* Currently, JUMP_TABLES_IN_TEXT_SECTION must be defined in order to
keep switch tables in the text section. */
/* Use the default action for outputting the case label. */
#undef ASM_OUTPUT_CASE_LABEL
-#define ASM_RETURN_CASE_JUMP \
-do \
- { \
- if (TARGET_5200) \
- return "ext%.l %0\n\tjmp %%pc@(2,%0:l)"; \
- else \
- return "jmp %%pc@(2,%0:w)"; \
- } \
-while (0)
+#define ASM_RETURN_CASE_JUMP \
+ do { \
+ if (TARGET_COLDFIRE) \
+ { \
+ if (ADDRESS_REG_P (operands[0])) \
+ return "jmp %%pc@(2,%0:l)"; \
+ else \
+ return "ext%.l %0\n\tjmp %%pc@(2,%0:l)"; \
+ } \
+ else \
+ return "jmp %%pc@(2,%0:w)"; \
+ } while (0)
/* This is how to output an assembler line that says to advance the
#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
( fputs (".comm ", (FILE)), \
assemble_name ((FILE), (NAME)), \
- fprintf ((FILE), ",%u\n", (SIZE)))
+ fprintf ((FILE), ",%u\n", (int)(SIZE)))
#undef ASM_OUTPUT_LOCAL
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
( fputs (".lcomm ", (FILE)), \
assemble_name ((FILE), (NAME)), \
- fprintf ((FILE), ",%u\n", (SIZE)))
+ fprintf ((FILE), ",%u\n", (int)(SIZE)))
/* XXX
/* Register in which address to store a structure value is passed to a
function. The default in m68k.h is a1. For m68k/SVR4 it is a0. */
-#undef STRUCT_VALUE_REGNUM
-#define STRUCT_VALUE_REGNUM 8
+#undef M68K_STRUCT_VALUE_REGNUM
+#define M68K_STRUCT_VALUE_REGNUM 8
/* Register in which static-chain is passed to a function. The
function. VALTYPE is the data type of the value (as a tree). If
the precise function being called is known, FUNC is its
FUNCTION_DECL; otherwise, FUNC is 0. For m68k/SVR4 generate the
- result in d0, a0, or fp0 as appropriate. */
+ result in d0, a0, or fp0 as appropriate. */
#undef FUNCTION_VALUE
#define FUNCTION_VALUE(VALTYPE, FUNC) \
- (TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_68881 \
- ? gen_rtx_REG (TYPE_MODE (VALTYPE), 16) \
- : (POINTER_TYPE_P (VALTYPE) \
- ? gen_rtx_REG (TYPE_MODE (VALTYPE), 8) \
- : gen_rtx_REG (TYPE_MODE (VALTYPE), 0)))
+ m68k_function_value (VALTYPE, FUNC)
/* For compatibility with the large body of existing code which does
#undef LIBCALL_VALUE
#define LIBCALL_VALUE(MODE) \
- ((((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode) \
- && TARGET_68881) \
- ? gen_rtx_REG (MODE, 16) \
- : gen_rtx_REG (MODE, 0))
+ m68k_libcall_value (MODE)
/* Boundary (in *bits*) on which stack pointer should be aligned.
- The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
+ The m68k/SVR4 convention is to keep the stack pointer longword aligned. */
#undef STACK_BOUNDARY
#define STACK_BOUNDARY 32
/* Alignment of field after `int : 0' in a structure.
- For m68k/SVR4, this is the next longword boundary. */
+ For m68k/SVR4, this is the next longword boundary. */
#undef EMPTY_FIELD_BOUNDARY
#define EMPTY_FIELD_BOUNDARY 32
#define BIGGEST_ALIGNMENT 64
-/* In m68k svr4, a symbol_ref rtx can be a valid PIC operand if it is
- an operand of a function call. */
-
-#undef LEGITIMATE_PIC_OPERAND_P
-#define LEGITIMATE_PIC_OPERAND_P(X) \
- ((! symbolic_operand (X, VOIDmode) \
- && ! (GET_CODE (X) == CONST_DOUBLE && mem_for_const_double (X) \
- && GET_CODE (mem_for_const_double (X)) == MEM \
- && symbolic_operand (XEXP (mem_for_const_double (X), 0), \
- VOIDmode))) \
- || (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)) \
- || PCREL_GENERAL_OPERAND_OK)
-
-
/* For m68k SVR4, structures are returned using the reentrant
- technique. */
+ technique. */
#undef PCC_STATIC_STRUCT_RETURN
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