/* Definitions of target machine for GNU compiler.
Vitesse IQ2000 processors
- Copyright (C) 2003 Free Software Foundation, Inc.
+ Copyright (C) 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+ Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
- by the Free Software Foundation; either version 2, or (at your
+ by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
License for more details.
You should have received a copy of the GNU General Public License
- along with GCC; see the file COPYING. If not, write to the Free
- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA. */
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
/* Driver configuration. */
-#undef SWITCH_TAKES_ARG
-#define SWITCH_TAKES_ARG(CHAR) \
- (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
-
/* The svr4.h LIB_SPEC with -leval and --*group tacked on */
#undef LIB_SPEC
#define LIB_SPEC "%{!shared:%{!symbolic:--start-group -lc -leval -lgcc --end-group}}"
#define TARGET_CPU_CPP_BUILTINS() \
do \
{ \
- builtin_define ("__iq2000__"); \
- builtin_assert ("cpu=iq2000"); \
- builtin_assert ("machine=iq2000"); \
+ builtin_define ("__iq2000__"); \
+ builtin_assert ("cpu=iq2000"); \
+ builtin_assert ("machine=iq2000"); \
} \
while (0)
-
-extern int target_flags;
-
-#define MASK_GPOPT 0x00000008 /* Optimize for global pointer */
-#define MASK_EMBEDDED_DATA 0x00008000 /* Reduce RAM usage, not fast code */
-#define MASK_UNINIT_CONST_IN_RODATA \
- 0x00800000 /* Store uninitialized
- consts in rodata */
-
/* Macros used in the machine description to test the flags. */
#define TARGET_STATS 0
- /* for embedded systems, optimize for
- reduced RAM space instead of for
- fastest code. */
-#define TARGET_EMBEDDED_DATA (target_flags & MASK_EMBEDDED_DATA)
-
-#define TARGET_DEBUG_MODE (target_flags & 0)
-#define TARGET_DEBUG_A_MODE (target_flags & 0)
-#define TARGET_DEBUG_B_MODE (target_flags & 0)
-#define TARGET_DEBUG_C_MODE (target_flags & 0)
-#define TARGET_DEBUG_D_MODE (target_flags & 0)
-
-#define TARGET_SWITCHES \
-{ \
- {"no-crt0", 0, \
- N_("No default crt0.o") }, \
- {"gpopt", MASK_GPOPT, \
- N_("Use GP relative sdata/sbss sections")}, \
- {"no-gpopt", -MASK_GPOPT, \
- N_("Don't use GP relative sdata/sbss sections")}, \
- {"embedded-data", MASK_EMBEDDED_DATA, \
- N_("Use ROM instead of RAM")}, \
- {"no-embedded-data", -MASK_EMBEDDED_DATA, \
- N_("Don't use ROM instead of RAM")}, \
- {"uninit-const-in-rodata", MASK_UNINIT_CONST_IN_RODATA, \
- N_("Put uninitialized constants in ROM (needs -membedded-data)")}, \
- {"no-uninit-const-in-rodata", -MASK_UNINIT_CONST_IN_RODATA, \
- N_("Don't put uninitialized constants in ROM")}, \
- {"", (TARGET_DEFAULT \
- | TARGET_CPU_DEFAULT), \
- NULL}, \
-}
-
-/* Default target_flags if no switches are specified. */
-
-#define TARGET_DEFAULT 0
-
-#ifndef TARGET_CPU_DEFAULT
-#define TARGET_CPU_DEFAULT 0
-#endif
+#define TARGET_DEBUG_MODE 0
+#define TARGET_DEBUG_A_MODE 0
+#define TARGET_DEBUG_B_MODE 0
+#define TARGET_DEBUG_C_MODE 0
+#define TARGET_DEBUG_D_MODE 0
#ifndef IQ2000_ISA_DEFAULT
#define IQ2000_ISA_DEFAULT 1
#endif
-#define TARGET_OPTIONS \
-{ \
- SUBTARGET_TARGET_OPTIONS \
- { "cpu=", & iq2000_cpu_string, \
- N_("Specify CPU for scheduling purposes")}, \
- { "arch=", & iq2000_arch_string, \
- N_("Specify CPU for code generation purposes")}, \
-}
-
-/* This is meant to be redefined in the host dependent files. */
-#define SUBTARGET_TARGET_OPTIONS
-
#define IQ2000_VERSION "[1.0]"
#ifndef MACHINE_TYPE
#ifndef TARGET_VERSION
#define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
#endif
-
-#define OVERRIDE_OPTIONS override_options ()
-
-#define CAN_DEBUG_WITHOUT_FP
\f
/* Storage Layout. */
-#define BITS_BIG_ENDIAN 0
-
-#define BYTES_BIG_ENDIAN 1
-
-#define WORDS_BIG_ENDIAN 1
-
-#define LIBGCC2_WORDS_BIG_ENDIAN 1
-
-#define BITS_PER_WORD 32
-
-#define MAX_BITS_PER_WORD 64
-
-#define UNITS_PER_WORD 4
-
-#define MIN_UNITS_PER_WORD 4
-
-#define POINTER_SIZE 32
+#define BITS_BIG_ENDIAN 0
+#define BYTES_BIG_ENDIAN 1
+#define WORDS_BIG_ENDIAN 1
+#define BITS_PER_WORD 32
+#define MAX_BITS_PER_WORD 64
+#define UNITS_PER_WORD 4
+#define MIN_UNITS_PER_WORD 4
+#define POINTER_SIZE 32
/* Define this macro if it is advisable to hold scalars in registers
in a wider mode than that declared by the program. In such cases,
&& GET_MODE_SIZE (MODE) < 4) \
(MODE) = SImode;
-#define PROMOTE_FUNCTION_ARGS
-
-#define PROMOTE_FUNCTION_RETURN
-
#define PARM_BOUNDARY 32
#define STACK_BOUNDARY 64
#define BIGGEST_ALIGNMENT 64
-#undef DATA_ALIGNMENT
+#undef DATA_ALIGNMENT
#define DATA_ALIGNMENT(TYPE, ALIGN) \
((((ALIGN) < BITS_PER_WORD) \
&& (TREE_CODE (TYPE) == ARRAY_TYPE \
#define PCC_BITFIELD_TYPE_MATTERS 1
-#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
-
\f
/* Layout of Source Language Data Types. */
-#define INT_TYPE_SIZE 32
-
-#define MAX_INT_TYPE_SIZE 32
-
-#define SHORT_TYPE_SIZE 16
-
-#define LONG_TYPE_SIZE 32
-
-#define LONG_LONG_TYPE_SIZE 64
-
-#define CHAR_TYPE_SIZE BITS_PER_UNIT
-
-#define FLOAT_TYPE_SIZE 32
-
-#define DOUBLE_TYPE_SIZE 64
-
-#define LONG_DOUBLE_TYPE_SIZE 64
-
-#define DEFAULT_SIGNED_CHAR 1
-
-#define MAX_WCHAR_TYPE_SIZE MAX_INT_TYPE_SIZE
+#define INT_TYPE_SIZE 32
+#define SHORT_TYPE_SIZE 16
+#define LONG_TYPE_SIZE 32
+#define LONG_LONG_TYPE_SIZE 64
+#define CHAR_TYPE_SIZE BITS_PER_UNIT
+#define FLOAT_TYPE_SIZE 32
+#define DOUBLE_TYPE_SIZE 64
+#define LONG_DOUBLE_TYPE_SIZE 64
+#define DEFAULT_SIGNED_CHAR 1
\f
/* Register Basics. */
#define HARD_REGNO_NREGS(REGNO, MODE) \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
-#define HARD_REGNO_MODE_OK(REGNO, MODE) \
- ((REGNO_REG_CLASS (REGNO) == GR_REGS) \
- ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4 \
+#define HARD_REGNO_MODE_OK(REGNO, MODE) \
+ ((REGNO_REG_CLASS (REGNO) == GR_REGS) \
+ ? ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) <= 4 \
: ((REGNO) & 1) == 0 || GET_MODE_SIZE (MODE) == 4)
-#define MODES_TIEABLE_P(MODE1, MODE2) \
- ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \
- GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
- == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \
+#define MODES_TIEABLE_P(MODE1, MODE2) \
+ ((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \
+ GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
+ == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \
GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
#define AVOID_CCMODE_COPIES
enum reg_class
{
- NO_REGS, /* no registers in set */
- GR_REGS, /* integer registers */
- ALL_REGS, /* all registers */
- LIM_REG_CLASSES /* max value + 1 */
+ NO_REGS, /* No registers in set. */
+ GR_REGS, /* Integer registers. */
+ ALL_REGS, /* All registers. */
+ LIM_REG_CLASSES /* Max value + 1. */
};
#define GENERAL_REGS GR_REGS
#define N_REG_CLASSES (int) LIM_REG_CLASSES
-#define REG_CLASS_NAMES \
-{ \
- "NO_REGS", \
- "GR_REGS", \
- "ALL_REGS" \
+#define IRA_COVER_CLASSES \
+{ \
+ GR_REGS, LIM_REG_CLASSES \
}
-#define REG_CLASS_CONTENTS \
-{ \
- { 0x00000000, 0x00000000 }, /* no registers */ \
- { 0xffffffff, 0x00000000 }, /* integer registers */ \
- { 0xffffffff, 0x00000001 } /* all registers */ \
+#define REG_CLASS_NAMES \
+{ \
+ "NO_REGS", \
+ "GR_REGS", \
+ "ALL_REGS" \
+}
+
+#define REG_CLASS_CONTENTS \
+{ \
+ { 0x00000000, 0x00000000 }, /* No registers, */ \
+ { 0xffffffff, 0x00000000 }, /* Integer registers. */ \
+ { 0xffffffff, 0x00000001 } /* All registers. */ \
}
#define REGNO_REG_CLASS(REGNO) \
#define INDEX_REG_CLASS NO_REGS
#define REG_CLASS_FROM_LETTER(C) \
- ((C) == 'd' ? GR_REGS : \
- (C) == 'b' ? ALL_REGS : \
- (C) == 'y' ? GR_REGS : \
+ ((C) == 'd' ? GR_REGS : \
+ (C) == 'b' ? ALL_REGS : \
+ (C) == 'y' ? GR_REGS : \
NO_REGS)
#define REGNO_OK_FOR_INDEX_P(regno) 0
-#define PREFERRED_RELOAD_CLASS(X,CLASS) \
- ((CLASS) != ALL_REGS \
- ? (CLASS) \
- : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
- || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \
- ? (GR_REGS) \
- : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
- || GET_MODE (X) == VOIDmode) \
- ? (GR_REGS) \
+#define PREFERRED_RELOAD_CLASS(X,CLASS) \
+ ((CLASS) != ALL_REGS \
+ ? (CLASS) \
+ : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
+ || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \
+ ? (GR_REGS) \
+ : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
+ || GET_MODE (X) == VOIDmode) \
+ ? (GR_REGS) \
: (CLASS))))
-#define SMALL_REGISTER_CLASSES 0
-
#define CLASS_MAX_NREGS(CLASS, MODE) \
((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
/* For IQ2000:
`I' is used for the range of constants an arithmetic insn can
- actually contain (16 bits signed integers).
+ actually contain (16-bits signed integers).
- `J' is used for the range which is just zero (ie, $r0).
+ `J' is used for the range which is just zero (i.e., $r0).
`K' is used for the range of constants a logical insn can actually
- contain (16 bit zero-extended integers).
+ contain (16-bit zero-extended integers).
`L' is used for the range of constants that be loaded with lui
- (ie, the bottom 16 bits are zero).
+ (i.e., the bottom 16 bits are zero).
`M' is used for the range of constants that take two words to load
- (ie, not matched by `I', `K', and `L').
+ (i.e., not matched by `I', `K', and `L').
`N' is used for constants 0xffffnnnn or 0xnnnnffff
- `O' is a 5 bit zero-extended integer.
-*/
+ `O' is a 5-bit zero-extended integer. */
#define CONST_OK_FOR_LETTER_P(VALUE, C) \
((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000) \
#define STACK_GROWS_DOWNWARD
-/* #define FRAME_GROWS_DOWNWARD */
+#define FRAME_GROWS_DOWNWARD 0
#define STARTING_FRAME_OFFSET \
- (current_function_outgoing_args_size)
+ (crtl->outgoing_args_size)
/* Use the default value zero. */
/* #define STACK_POINTER_OFFSET 0 */
\f
/* Register That Address the Stack Frame. */
-#define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
-
-#define FRAME_POINTER_REGNUM (GP_REG_FIRST + 1)
-
-#define HARD_FRAME_POINTER_REGNUM \
- (GP_REG_FIRST + 27)
-
-#define ARG_POINTER_REGNUM GP_REG_FIRST
-
-#define RETURN_ADDRESS_POINTER_REGNUM RAP_REG_NUM
-
-#define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
+#define STACK_POINTER_REGNUM (GP_REG_FIRST + 29)
+#define FRAME_POINTER_REGNUM (GP_REG_FIRST + 1)
+#define HARD_FRAME_POINTER_REGNUM (GP_REG_FIRST + 27)
+#define ARG_POINTER_REGNUM GP_REG_FIRST
+#define RETURN_ADDRESS_POINTER_REGNUM RAP_REG_NUM
+#define STATIC_CHAIN_REGNUM (GP_REG_FIRST + 2)
\f
/* Eliminating the Frame Pointer and the Arg Pointer. */
-#define FRAME_POINTER_REQUIRED 0
-
#define ELIMINABLE_REGS \
{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
-
-/* We can always eliminate to the frame pointer. We can eliminate to the
- stack pointer unless a frame pointer is needed. */
-
-#define CAN_ELIMINATE(FROM, TO) \
- (((FROM) == RETURN_ADDRESS_POINTER_REGNUM && (! leaf_function_p () \
- || (TO == GP_REG_FIRST + 31 && leaf_function_p))) \
- || ((FROM) != RETURN_ADDRESS_POINTER_REGNUM \
- && ((TO) == HARD_FRAME_POINTER_REGNUM \
- || ((TO) == STACK_POINTER_REGNUM && ! frame_pointer_needed))))
-
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
(OFFSET) = iq2000_initial_elimination_offset ((FROM), (TO))
\f
/* Passing Function Arguments on the Stack. */
-#define PROMOTE_PROTOTYPES 1
-
/* #define PUSH_ROUNDING(BYTES) 0 */
#define ACCUMULATE_OUTGOING_ARGS 1
#define REG_PARM_STACK_SPACE(FNDECL) 0
-#define OUTGOING_REG_PARM_STACK_SPACE
-
-#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
+#define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
\f
/* Function Arguments in Registers. */
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
- function_arg( &CUM, MODE, TYPE, NAMED)
-
-#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
- function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
-
-#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
- function_arg_pass_by_reference (&CUM, MODE, TYPE, NAMED)
-
-#define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
- ((NAMED) && FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED))
+ function_arg (& CUM, MODE, TYPE, NAMED)
#define MAX_ARGS_IN_REGISTERS 8
-typedef struct iq2000_args {
- int gp_reg_found; /* whether a gp register was found yet */
- unsigned int arg_number; /* argument number */
- unsigned int arg_words; /* # total words the arguments take */
- unsigned int fp_arg_words; /* # words for FP args (IQ2000_EABI only) */
- int last_arg_fp; /* nonzero if last arg was FP (EABI only) */
- int fp_code; /* Mode of FP arguments */
- unsigned int num_adjusts; /* number of adjustments made */
+typedef struct iq2000_args
+{
+ int gp_reg_found; /* Whether a gp register was found yet. */
+ unsigned int arg_number; /* Argument number. */
+ unsigned int arg_words; /* # total words the arguments take. */
+ unsigned int fp_arg_words; /* # words for FP args (IQ2000_EABI only). */
+ int last_arg_fp; /* Nonzero if last arg was FP (EABI only). */
+ int fp_code; /* Mode of FP arguments. */
+ unsigned int num_adjusts; /* Number of adjustments made. */
/* Adjustments made to args pass in regs. */
- struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS*2];
+ struct rtx_def * adjust[MAX_ARGS_IN_REGISTERS * 2];
} CUMULATIVE_ARGS;
/* Initialize a variable CUM of type CUMULATIVE_ARGS
for a call to a function whose data type is FNTYPE.
For a library call, FNTYPE is 0. */
-#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
- init_cumulative_args (&CUM, FNTYPE, LIBNAME) \
+#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
+ init_cumulative_args (& CUM, FNTYPE, LIBNAME) \
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
- function_arg_advance (&CUM, MODE, TYPE, NAMED)
+ function_arg_advance (& CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG_PADDING(MODE, TYPE) \
(! BYTES_BIG_ENDIAN \
(((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST))
\f
-/* How Scalar Function Values are Returned. */
-
-#define FUNCTION_VALUE(VALTYPE, FUNC) iq2000_function_value (VALTYPE, FUNC)
-
-#define LIBCALL_VALUE(MODE) \
- gen_rtx (REG, \
- ((GET_MODE_CLASS (MODE) != MODE_INT \
- || GET_MODE_SIZE (MODE) >= 4) \
- ? (MODE) \
- : SImode), \
- GP_RETURN)
-
/* On the IQ2000, R2 and R3 are the only register thus used. */
-#define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN)
+#define FUNCTION_VALUE_REGNO_P(N) iq2000_function_value_regno_p (N)
\f
/* How Large Values are Returned. */
-#define RETURN_IN_MEMORY(TYPE) \
- (((int_size_in_bytes (TYPE) \
- > (2 * UNITS_PER_WORD)) \
- || (int_size_in_bytes (TYPE) == -1)))
-
#define DEFAULT_PCC_STRUCT_RETURN 0
-
-#define STRUCT_VALUE 0
-
\f
/* Function Entry and Exit. */
}
\f
-/* Implementing the Varargs Macros. */
-
-#define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
- iq2000_setup_incoming_varargs (CUM,MODE,TYPE,&PRETEND_SIZE,NO_RTL);
-
-#define STRICT_ARGUMENT_NAMING 1
-
-#define BUILD_VA_LIST_TYPE(VALIST) \
- (VALIST) = ptr_type_node
-
-#define EXPAND_BUILTIN_VA_START(valist, nextarg) \
- iq2000_va_start (valist, nextarg)
-
-/* Implement `va_arg'. */
-#define EXPAND_BUILTIN_VA_ARG(valist, type) \
- iq2000_va_arg (valist, type)
-
-\f
/* Trampolines for Nested Functions. */
-/* A C statement to output, on the stream FILE, assembler code for a
- block of data that contains the constant parts of a trampoline.
- This code should not include a label--the label is taken care of
- automatically. */
-
-#define TRAMPOLINE_TEMPLATE(STREAM) \
-{ \
- fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
- fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
- fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
- if (Pmode == DImode) \
- { \
- fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld $3,20($31)\n"); \
- fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld $2,28($31)\n"); \
- } \
- else \
- { \
- fprintf (STREAM, "\t.word\t0x8fe30014\t\t# lw $3,20($31)\n"); \
- fprintf (STREAM, "\t.word\t0x8fe20018\t\t# lw $2,24($31)\n"); \
- } \
- fprintf (STREAM, "\t.word\t0x0060c821\t\t# move $25,$3 (abicalls)\n"); \
- fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
- fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
- fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
- fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
-}
-
-#define TRAMPOLINE_SIZE (40)
-
-#define TRAMPOLINE_ALIGNMENT 32
-
-#define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
-{ \
- rtx addr = ADDR; \
- emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 32)), FUNC); \
- emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 36)), CHAIN);\
-}
+#define TRAMPOLINE_CODE_SIZE (8*4)
+#define TRAMPOLINE_SIZE (TRAMPOLINE_CODE_SIZE + 2*GET_MODE_SIZE (Pmode))
+#define TRAMPOLINE_ALIGNMENT GET_MODE_ALIGNMENT (Pmode)
\f
/* Addressing Modes. */
#define CONSTANT_ADDRESS_P(X) \
- ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
+ ( (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
|| GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \
|| (GET_CODE (X) == CONST)))
#define MAX_REGS_PER_ADDRESS 1
-#ifdef REG_OK_STRICT
-#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
-{ \
- if (iq2000_legitimate_address_p (MODE, X, 1)) \
- goto ADDR; \
-}
-#else
-#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
-{ \
- if (iq2000_legitimate_address_p (MODE, X, 0)) \
- goto ADDR; \
-}
-#endif
-
#define REG_OK_FOR_INDEX_P(X) 0
-
-/* For the IQ2000, transform:
-
- memory(X + <large int>)
- into:
- Y = <large int> & ~0x7fff;
- Z = X + Y
- memory (Z + (<large int> & 0x7fff));
-*/
-
-#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
-{ \
- register rtx xinsn = (X); \
- \
- if (TARGET_DEBUG_B_MODE) \
- { \
- GO_PRINTF ("\n========== LEGITIMIZE_ADDRESS\n"); \
- GO_DEBUG_RTX (xinsn); \
- } \
- \
- if (iq2000_check_split (X, MODE)) \
- { \
- X = gen_rtx_LO_SUM (Pmode, \
- copy_to_mode_reg (Pmode, \
- gen_rtx (HIGH, Pmode, X)), \
- X); \
- goto WIN; \
- } \
- \
- if (GET_CODE (xinsn) == PLUS) \
- { \
- register rtx xplus0 = XEXP (xinsn, 0); \
- register rtx xplus1 = XEXP (xinsn, 1); \
- register enum rtx_code code0 = GET_CODE (xplus0); \
- register enum rtx_code code1 = GET_CODE (xplus1); \
- \
- if (code0 != REG && code1 == REG) \
- { \
- xplus0 = XEXP (xinsn, 1); \
- xplus1 = XEXP (xinsn, 0); \
- code0 = GET_CODE (xplus0); \
- code1 = GET_CODE (xplus1); \
- } \
- \
- if (code0 == REG && REG_MODE_OK_FOR_BASE_P (xplus0, MODE) \
- && code1 == CONST_INT && !SMALL_INT (xplus1)) \
- { \
- rtx int_reg = gen_reg_rtx (Pmode); \
- rtx ptr_reg = gen_reg_rtx (Pmode); \
- \
- emit_move_insn (int_reg, \
- GEN_INT (INTVAL (xplus1) & ~ 0x7fff)); \
- \
- emit_insn (gen_rtx_SET (VOIDmode, \
- ptr_reg, \
- gen_rtx_PLUS (Pmode, xplus0, int_reg))); \
- \
- X = plus_constant (ptr_reg, INTVAL (xplus1) & 0x7fff); \
- goto WIN; \
- } \
- } \
- \
- if (TARGET_DEBUG_B_MODE) \
- GO_PRINTF ("LEGITIMIZE_ADDRESS could not fix.\n"); \
-}
-
-#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
-
#define LEGITIMATE_CONSTANT_P(X) (1)
\f
/* Describing Relative Costs of Operations. */
-#define CONST_COSTS(X,CODE,OUTER_CODE) \
- case CONST_INT: \
- return 0; \
- \
- case LABEL_REF: \
- return COSTS_N_INSNS (2); \
- \
- case CONST: \
- { \
- rtx offset = const0_rtx; \
- rtx symref = eliminate_constant_term (XEXP (X, 0), &offset); \
- \
- if (GET_CODE (symref) == LABEL_REF) \
- return COSTS_N_INSNS (2); \
- \
- if (GET_CODE (symref) != SYMBOL_REF) \
- return COSTS_N_INSNS (4); \
- \
- /* let's be paranoid.... */ \
- if (INTVAL (offset) < -32768 || INTVAL (offset) > 32767) \
- return COSTS_N_INSNS (2); \
- \
- return COSTS_N_INSNS (SYMBOL_REF_FLAG (symref) ? 1 : 2); \
- } \
- \
- case SYMBOL_REF: \
- return COSTS_N_INSNS (SYMBOL_REF_FLAG (X) ? 1 : 2); \
- \
- case CONST_DOUBLE: \
- { \
- rtx high, low; \
- split_double (X, &high, &low); \
- return COSTS_N_INSNS ((high == CONST0_RTX (GET_MODE (high)) \
- || low == CONST0_RTX (GET_MODE (low))) \
- ? 2 : 4); \
- }
-
-#define RTX_COSTS(X,CODE,OUTER_CODE) \
- case MEM: \
- { \
- int num_words = (GET_MODE_SIZE (GET_MODE (X)) > UNITS_PER_WORD) ? 2 : 1; \
- if (simple_memory_operand (X, GET_MODE (X))) \
- return COSTS_N_INSNS (num_words); \
- \
- return COSTS_N_INSNS (2*num_words); \
- } \
- \
- case FFS: \
- return COSTS_N_INSNS (6); \
- \
- case NOT: \
- return COSTS_N_INSNS (GET_MODE (X) == DImode && 2); \
- \
- case AND: \
- case IOR: \
- case XOR: \
- if (GET_MODE (X) == DImode) \
- return COSTS_N_INSNS (2); \
- \
- break; \
- \
- case ASHIFT: \
- case ASHIFTRT: \
- case LSHIFTRT: \
- if (GET_MODE (X) == DImode) \
- return COSTS_N_INSNS ((GET_CODE (XEXP (X, 1)) == CONST_INT) ? 4 : 12); \
- \
- break; \
- \
- case ABS: \
- { \
- enum machine_mode xmode = GET_MODE (X); \
- if (xmode == SFmode || xmode == DFmode) \
- return COSTS_N_INSNS (1); \
- \
- return COSTS_N_INSNS (4); \
- } \
- \
- case PLUS: \
- case MINUS: \
- { \
- enum machine_mode xmode = GET_MODE (X); \
- if (xmode == SFmode || xmode == DFmode) \
- { \
- return COSTS_N_INSNS (6); \
- } \
- \
- if (xmode == DImode) \
- return COSTS_N_INSNS (4); \
- \
- break; \
- } \
- \
- case NEG: \
- if (GET_MODE (X) == DImode) \
- return 4; \
- \
- break; \
- \
- case MULT: \
- { \
- enum machine_mode xmode = GET_MODE (X); \
- if (xmode == SFmode) \
- { \
- return COSTS_N_INSNS (7); \
- } \
- \
- if (xmode == DFmode) \
- { \
- return COSTS_N_INSNS (8); \
- } \
- \
- return COSTS_N_INSNS (10); \
- } \
- \
- case DIV: \
- case MOD: \
- { \
- enum machine_mode xmode = GET_MODE (X); \
- if (xmode == SFmode) \
- { \
- return COSTS_N_INSNS (23); \
- } \
- \
- if (xmode == DFmode) \
- { \
- return COSTS_N_INSNS (36); \
- } \
- } \
- /* fall through */ \
- \
- case UDIV: \
- case UMOD: \
- return COSTS_N_INSNS (69); \
- \
- case SIGN_EXTEND: \
- return COSTS_N_INSNS (2); \
- \
- case ZERO_EXTEND: \
- return COSTS_N_INSNS (1);
-
-#define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : iq2000_address_cost (ADDR))
-
#define REGISTER_MOVE_COST(MODE, FROM, TO) 2
#define MEMORY_MOVE_COST(MODE,CLASS,TO_P) \
(TO_P ? 2 : 16)
-#define BRANCH_COST 2
+#define BRANCH_COST(speed_p, predictable_p) 2
#define SLOW_BYTE_ACCESS 1
#define NO_FUNCTION_CSE 1
-#define NO_RECURSIVE_FUNCTION_CSE 1
-
#define ADJUST_COST(INSN,LINK,DEP_INSN,COST) \
if (REG_NOTE_KIND (LINK) != 0) \
(COST) = 0; /* Anti or output dependence. */
\f
/* Dividing the output into sections. */
-#define TEXT_SECTION_ASM_OP "\t.text" /* instructions */
+#define TEXT_SECTION_ASM_OP "\t.text" /* Instructions. */
-#define DATA_SECTION_ASM_OP "\t.data" /* large data */
+#define DATA_SECTION_ASM_OP "\t.data" /* Large data. */
\f
/* The Overall Framework of an Assembler File. */
\f
/* Output and Generation of Labels. */
-#undef ASM_OUTPUT_INTERNAL_LABEL
-#define ASM_OUTPUT_INTERNAL_LABEL(STREAM,PREFIX,NUM) \
- fprintf (STREAM, "%s%s%d:\n", LOCAL_LABEL_PREFIX, PREFIX, NUM)
-
#undef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
- sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long)(NUM))
+ sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long) (NUM))
#define GLOBAL_ASM_OP "\t.globl\t"
#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
final_prescan_insn (INSN, OPVEC, NOPERANDS)
-/* See iq2000.c for the IQ2000 specific codes. */
-#define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
-
-#define PRINT_OPERAND_PUNCT_VALID_P(CODE) iq2000_print_operand_punct[CODE]
-
-#define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
-
#define DBR_OUTPUT_SEQEND(STREAM) \
do \
{ \
- dslots_jump_filled++; \
fputs ("\n", STREAM); \
} \
while (0)
/* Output of dispatch tables. */
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
-do { \
- fprintf (STREAM, "\t%s\t%sL%d\n", \
- Pmode == DImode ? ".dword" : ".word", \
- LOCAL_LABEL_PREFIX, VALUE); \
-} while (0)
+ do \
+ { \
+ fprintf (STREAM, "\t%s\t%sL%d\n", \
+ Pmode == DImode ? ".dword" : ".word", \
+ LOCAL_LABEL_PREFIX, VALUE); \
+ } \
+ while (0)
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
fprintf (STREAM, "\t%s\t%sL%d\n", \
#undef ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(STREAM,SIZE) \
- fprintf (STREAM, "\t.space\t%u\n", (SIZE))
+ fprintf (STREAM, "\t.space\t" HOST_WIDE_INT_PRINT_UNSIGNED "\n", \
+ (unsigned HOST_WIDE_INT)(SIZE))
#define ASM_OUTPUT_ALIGN(STREAM,LOG) \
if ((LOG) != 0) \
\f
/* Miscellaneous Parameters. */
-#define PREDICATE_CODES \
- {"uns_arith_operand", { REG, CONST_INT, SUBREG }}, \
- {"arith_operand", { REG, CONST_INT, SUBREG }}, \
- {"small_int", { CONST_INT }}, \
- {"large_int", { CONST_INT }}, \
- {"reg_or_0_operand", { REG, CONST_INT, CONST_DOUBLE, SUBREG }}, \
- {"simple_memory_operand", { MEM, SUBREG }}, \
- {"equality_op", { EQ, NE }}, \
- {"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
- LTU, LEU }}, \
- {"pc_or_label_operand", { PC, LABEL_REF }}, \
- {"call_insn_operand", { CONST_INT, CONST, SYMBOL_REF, REG}}, \
- {"move_operand", { CONST_INT, CONST_DOUBLE, CONST, \
- SYMBOL_REF, LABEL_REF, SUBREG, \
- REG, MEM}}, \
- {"power_of_2_operand", { CONST_INT }},
-
#define CASE_VECTOR_MODE SImode
-#define CASE_VECTOR_PC_RELATIVE 0
-
#define WORD_REGISTER_OPERATIONS
#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
/* Comparison type. */
enum cmp_type
{
- CMP_SI, /* compare four byte integers */
- CMP_DI, /* compare eight byte integers */
- CMP_SF, /* compare single precision floats */
- CMP_DF, /* compare double precision floats */
- CMP_MAX /* max comparison type */
+ CMP_SI, /* Compare four byte integers. */
+ CMP_DI, /* Compare eight byte integers. */
+ CMP_SF, /* Compare single precision floats. */
+ CMP_DF, /* Compare double precision floats. */
+ CMP_MAX /* Max comparison type. */
};
/* Types of delay slot. */
enum delay_type
{
- DELAY_NONE, /* no delay slot */
- DELAY_LOAD, /* load from memory delay */
- DELAY_FCMP /* delay after doing c.<xx>.{d,s} */
+ DELAY_NONE, /* No delay slot. */
+ DELAY_LOAD, /* Load from memory delay. */
+ DELAY_FCMP /* Delay after doing c.<xx>.{d,s}. */
};
/* Which processor to schedule for. */
};
/* Recast the cpu class to be the cpu attribute. */
-#define iq2000_cpu_attr ((enum attr_cpu)iq2000_tune)
-
-extern char iq2000_print_operand_punct[]; /* print_operand punctuation chars */
-extern int num_source_filenames; /* current .file # */
-extern int iq2000_branch_likely; /* emit 'l' after br (branch likely) */
-extern struct rtx_def *branch_cmp[2]; /* operands for compare */
-extern enum cmp_type branch_type; /* what type of branch to use */
-extern enum processor_type iq2000_arch; /* which cpu to codegen for */
-extern enum processor_type iq2000_tune; /* which cpu to schedule for */
-extern int iq2000_isa; /* architectural level */
-extern const char *iq2000_cpu_string; /* for -mcpu=<xxx> */
-extern const char *iq2000_arch_string; /* for -march=<xxx> */
-extern int dslots_load_total; /* total # load related delay slots */
-extern int dslots_load_filled; /* # filled load delay slots */
-extern int dslots_jump_total; /* total # jump related delay slots */
-extern int dslots_jump_filled; /* # filled jump delay slots */
-extern int dslots_number_nops; /* # of nops needed by previous insn */
-extern int num_refs[3]; /* # 1/2/3 word references */
-extern struct rtx_def *iq2000_load_reg; /* register to check for load delay */
-extern struct rtx_def *iq2000_load_reg2; /* 2nd reg to check for load delay */
-extern struct rtx_def *iq2000_load_reg3; /* 3rd reg to check for load delay */
-extern struct rtx_def *iq2000_load_reg4; /* 4th reg to check for load delay */
-
-/* Functions to change what output section we are using. */
-extern void rdata_section (void);
-extern void sdata_section (void);
-extern void sbss_section (void);
-
-#define BITMASK_UPPER16 ((unsigned long)0xffff << 16) /* 0xffff0000 */
-#define BITMASK_LOWER16 ((unsigned long)0xffff) /* 0x0000ffff */
+#define iq2000_cpu_attr ((enum attr_cpu) iq2000_tune)
+
+#define BITMASK_UPPER16 ((unsigned long) 0xffff << 16) /* 0xffff0000 */
+#define BITMASK_LOWER16 ((unsigned long) 0xffff) /* 0x0000ffff */
\f
#define GENERATE_BRANCHLIKELY (ISA_HAS_BRANCHLIKELY)
\f
#undef ASM_SPEC
-#define ASM_SPEC "%{march=iq2000: -m2000} %{march=iq10: -m10} %{!march=*: -m2000}"
\f
-/* The mapping from gcc register number to DWARF 2 CFA column number.
- This mapping does not allow for tracking register 0, since
- register 0 is fixed. */
-#define DWARF_FRAME_REGNUM(REG) \
- (REG == GP_REG_FIRST + 31 ? DWARF_FRAME_RETURN_COLUMN : REG)
+/* The mapping from gcc register number to DWARF 2 CFA column number. */
+#define DWARF_FRAME_REGNUM(REG) (REG)
/* The DWARF 2 CFA column which tracks the return address. */
-#define DWARF_FRAME_RETURN_COLUMN ( GP_REG_FIRST + 26)
+#define DWARF_FRAME_RETURN_COLUMN (GP_REG_FIRST + 31)
/* Describe how we implement __builtin_eh_return. */
#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + GP_ARG_FIRST : INVALID_REGNUM)
#ifndef STACK_ARGS_ADJUST
#define STACK_ARGS_ADJUST(SIZE) \
-{ \
- if (SIZE.constant < 4 * UNITS_PER_WORD) \
- SIZE.constant = 4 * UNITS_PER_WORD; \
-}
+ { \
+ if (SIZE.constant < 4 * UNITS_PER_WORD) \
+ SIZE.constant = 4 * UNITS_PER_WORD; \
+ }
#endif
\f
/* Tell prologue and epilogue if register REGNO should be saved / restored. */
#define MUST_SAVE_REGISTER(regno) \
- ((regs_ever_live[regno] && !call_used_regs[regno]) \
+ ((df_regs_ever_live_p (regno) && !call_used_regs[regno]) \
|| (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed) \
- || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31]))
+ || (regno == (GP_REG_FIRST + 31) && df_regs_ever_live_p (GP_REG_FIRST + 31)))
/* ALIGN FRAMES on double word boundaries */
#ifndef IQ2000_STACK_ALIGN
#endif
#if 1
-#define GO_PRINTF(x) fprintf(stderr, (x))
-#define GO_PRINTF2(x,y) fprintf(stderr, (x), (y))
-#define GO_DEBUG_RTX(x) debug_rtx(x)
+#define GO_PRINTF(x) fprintf (stderr, (x))
+#define GO_PRINTF2(x,y) fprintf (stderr, (x), (y))
+#define GO_DEBUG_RTX(x) debug_rtx (x)
#else
#define GO_PRINTF(x)
#define GO_DEBUG_RTX(x)
#endif
-/* Specify the tree operation to be used to convert reals to integers. */
-#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
-
-/* This is the kind of divide that is easiest to do in the general case. */
-#define EASY_DIV_EXPR TRUNC_DIV_EXPR
-
-/* Define this if zero-extension is slow (more than one real instruction). */
-#define SLOW_ZERO_EXTEND
-
/* If defined, modifies the length assigned to instruction INSN as a
function of the context in which it is used. LENGTH is an lvalue
that contains the initially computed length of the insn and should
((LENGTH) = iq2000_adjust_insn_length ((INSN), (LENGTH)))
\f
-/* A list of predicates that do special things with modes, and so
- should not elicit warnings for VOIDmode match_operand. */
-
-#define SPECIAL_MODE_PREDICATES \
- "pc_or_label_operand",
-
-\f
/* How to tell the debugger about changes of source files. */
#ifndef SET_FILE_NUMBER
-#define SET_FILE_NUMBER() ++num_source_filenames
+#define SET_FILE_NUMBER() ++ num_source_filenames
#endif
/* This is how to output a note the debugger telling it the line number
#define LABEL_AFTER_LOC(STREAM)
#endif
-/* Handle certain cpp directives used in header files on sysV. */
-#define SCCS_DIRECTIVE
-
\f
/* Default to -G 8 */
#ifndef IQ2000_DEFAULT_GVALUE
#define IQ2000_DEFAULT_GVALUE 8
#endif
-#define SDATA_SECTION_ASM_OP "\t.sdata" /* small data */
+#define SDATA_SECTION_ASM_OP "\t.sdata" /* Small data. */
-/* Given a decl node or constant node, choose the section to output it in
- and select that section. */
-
-#undef TARGET_ASM_SELECT_SECTION
-#define TARGET_ASM_SELECT_SECTION iq2000_select_section
\f
-/* See iq2000_expand_prologue's use of loadgp for when this should be
- true. */
+/* The target cpu for optimization and scheduling. */
+extern enum processor_type iq2000_tune;
-#define DONT_ACCESS_GBLS_AFTER_EPILOGUE 0
-\f
+/* Which instruction set architecture to use. */
+extern int iq2000_isa;
enum iq2000_builtins
{
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