/* Definitions of target machine GNU compiler. IA-64 version.
- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
- Free Software Foundation, Inc.
+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
+ 2009, 2010 Free Software Foundation, Inc.
Contributed by James E. Wilson <wilson@cygnus.com> and
David Mosberger <davidm@hpl.hp.com>.
GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
+the Free Software Foundation; either version 3, or (at your option)
any later version.
GCC is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
-along with GCC; see the file COPYING. If not, write to
-the Free Software Foundation, 51 Franklin Street, Fifth Floor,
-Boston, MA 02110-1301, USA. */
+along with GCC; see the file COPYING3. If not see
+<http://www.gnu.org/licenses/>. */
/* ??? Look at ABI group documents for list of preprocessor macros and
other features required for ABI compliance. */
#define ASM_EXTRA_SPEC ""
+#define SWITCH_TAKES_ARG(CHAR) \
+ (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
+
/* Variables which are this size or smaller are put in the sdata/sbss
sections. */
extern unsigned int ia64_section_threshold;
#define TARGET_HPUX 0
#define TARGET_HPUX_LD 0
+#define TARGET_ABI_OPEN_VMS 0
+
#ifndef TARGET_ILP32
#define TARGET_ILP32 0
#endif
/* Default target_flags if no switches are specified */
#ifndef TARGET_DEFAULT
-#define TARGET_DEFAULT (MASK_DWARF2_ASM)
+#define TARGET_DEFAULT (MASK_DWARF2_ASM | MASK_FUSED_MADD)
#endif
#ifndef TARGET_CPU_DEFAULT
};
extern enum processor_type ia64_tune;
-
-/* Sometimes certain combinations of command options do not make sense on a
- particular target machine. You can define a macro `OVERRIDE_OPTIONS' to
- take account of this. This macro, if defined, is executed once just after
- all the command options have been parsed. */
-
-#define OVERRIDE_OPTIONS ia64_override_options ()
-
-/* Some machines may desire to change what optimizations are performed for
- various optimization levels. This macro, if defined, is executed once just
- after the optimization level is determined and before the remainder of the
- command options have been parsed. Values set in this macro are used as the
- default values for the other command line options. */
-
-/* #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) */
\f
/* Driver configuration */
#define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
-#if defined(__BIG_ENDIAN__)
-#define LIBGCC2_WORDS_BIG_ENDIAN 1
-#else
-#define LIBGCC2_WORDS_BIG_ENDIAN 0
-#endif
-
#define UNITS_PER_WORD 8
#define POINTER_SIZE (TARGET_ILP32 ? 32 : 64)
#define DOUBLE_TYPE_SIZE 64
-/* long double is XFmode normally, TFmode for HPUX. */
-#define LONG_DOUBLE_TYPE_SIZE (TARGET_HPUX ? 128 : 80)
+/* long double is XFmode normally, and TFmode for HPUX. It should be
+ TFmode for VMS as well but we only support up to DFmode now. */
+#define LONG_DOUBLE_TYPE_SIZE \
+ (TARGET_HPUX ? 128 \
+ : TARGET_ABI_OPEN_VMS ? 64 \
+ : 80)
-/* We always want the XFmode operations from libgcc2.c. */
-#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 80
+/* We always want the XFmode operations from libgcc2.c, except on VMS
+ where this yields references to unimplemented "insns". */
+#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE (TARGET_ABI_OPEN_VMS ? 64 : 80)
+
+
+/* On HP-UX, we use the l suffix for TFmode in libgcc2.c. */
+#define LIBGCC2_TF_CEXT l
#define DEFAULT_SIGNED_CHAR 1
/* Branch registers. */ \
0, 0, 0, 0, 0, 0, 0, 0, \
/*FP CCV UNAT PFS LC EC */ \
- 1, 1, 1, 1, 0, 1 \
+ 1, 1, 1, 1, 1, 1 \
}
/* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered
/* Branch registers. */ \
1, 0, 0, 0, 0, 0, 1, 1, \
/*FP CCV UNAT PFS LC EC */ \
- 1, 1, 1, 1, 0, 1 \
+ 1, 1, 1, 1, 1, 1 \
}
/* Like `CALL_USED_REGISTERS' but used to overcome a historical
#define HARD_REGNO_NREGS(REGNO, MODE) \
((REGNO) == PR_REG (0) && (MODE) == DImode ? 64 \
: PR_REGNO_P (REGNO) && (MODE) == BImode ? 2 \
- : PR_REGNO_P (REGNO) && (MODE) == CCImode ? 1 \
+ : (PR_REGNO_P (REGNO) || GR_REGNO_P (REGNO)) && (MODE) == CCImode ? 1\
: FR_REGNO_P (REGNO) && (MODE) == XFmode ? 1 \
+ : FR_REGNO_P (REGNO) && (MODE) == RFmode ? 1 \
: FR_REGNO_P (REGNO) && (MODE) == XCmode ? 2 \
: (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
: PR_REGNO_P (REGNO) ? \
(MODE) == BImode || GET_MODE_CLASS (MODE) == MODE_CC \
: GR_REGNO_P (REGNO) ? \
- (MODE) != CCImode && (MODE) != XFmode && (MODE) != XCmode \
+ (MODE) != XFmode && (MODE) != XCmode && (MODE) != RFmode \
: AR_REGNO_P (REGNO) ? (MODE) == DImode \
: BR_REGNO_P (REGNO) ? (MODE) == DImode \
: 0)
we can't tie it with any other modes. */
#define MODES_TIEABLE_P(MODE1, MODE2) \
(GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2) \
- && ((((MODE1) == XFmode) || ((MODE1) == XCmode)) \
- == (((MODE2) == XFmode) || ((MODE2) == XCmode))) \
+ && ((((MODE1) == XFmode) || ((MODE1) == XCmode) || ((MODE1) == RFmode)) \
+ == (((MODE2) == XFmode) || ((MODE2) == XCmode) || ((MODE2) == RFmode))) \
&& (((MODE1) == BImode) == ((MODE2) == BImode)))
/* Specify the modes required to caller save a given hard regno.
We need to ensure floating pt regs are not saved as DImode. */
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
- ((FR_REGNO_P (REGNO) && (NREGS) == 1) ? XFmode \
+ ((FR_REGNO_P (REGNO) && (NREGS) == 1) ? RFmode \
: choose_hard_reg_mode ((REGNO), (NREGS), false))
\f
/* Handling Leaf Functions */
0xFFFFFFFF, 0xFFFFFFFF, 0x3FFF }, \
}
+/* The following macro defines cover classes for Integrated Register
+ Allocator. Cover classes is a set of non-intersected register
+ classes covering all hard registers used for register allocation
+ purpose. Any move between two registers of a cover class should be
+ cheaper than load or store of the registers. The macro value is
+ array of register classes with LIM_REG_CLASSES used as the end
+ marker. */
+
+#define IRA_COVER_CLASSES \
+{ \
+ PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS, GR_REGS, FR_REGS, LIM_REG_CLASSES \
+}
+
/* A C expression whose value is a register class containing hard register
REGNO. In general there is more than one such class; choose a class which
is "minimal", meaning that no smaller class also contains the register. */
(as well as added to a displacement). This is needed for POST_MODIFY. */
#define INDEX_REG_CLASS GENERAL_REGS
-/* A C expression which defines the machine-dependent operand constraint
- letters for register classes. If CHAR is such a letter, the value should be
- the register class corresponding to it. Otherwise, the value should be
- `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS',
- will not be passed to this macro; you do not need to handle it. */
-
-#define REG_CLASS_FROM_LETTER(CHAR) \
-((CHAR) == 'f' ? FR_REGS \
- : (CHAR) == 'a' ? ADDL_REGS \
- : (CHAR) == 'b' ? BR_REGS \
- : (CHAR) == 'c' ? PR_REGS \
- : (CHAR) == 'd' ? AR_M_REGS \
- : (CHAR) == 'e' ? AR_I_REGS \
- : (CHAR) == 'x' ? FP_REGS \
- : NO_REGS)
-
/* A C expression which is nonzero if register number NUM is suitable for use
as a base register in operand addresses. It may be either a suitable hard
register or a pseudo register that has been allocated such a hard reg. */
This is needed for POST_MODIFY. */
#define REGNO_OK_FOR_INDEX_P(NUM) REGNO_OK_FOR_BASE_P (NUM)
-/* A C expression that places additional restrictions on the register class to
- use when it is necessary to copy value X into a register in class CLASS.
- The value is a register class; perhaps CLASS, or perhaps another, smaller
- class. */
-
-#define PREFERRED_RELOAD_CLASS(X, CLASS) \
- ia64_preferred_reload_class (X, CLASS)
-
/* You should define this macro to indicate to the reload phase that it may
need to allocate at least one register for a reload in addition to the
register to contain the data. Specifically, if copying X to a register
#define CLASS_MAX_NREGS(CLASS, MODE) \
((MODE) == BImode && (CLASS) == PR_REGS ? 2 \
: (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == XFmode) ? 1 \
+ : (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == RFmode) ? 1 \
: (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == XCmode) ? 2 \
: (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
-/* In FP regs, we can't change FP values to integer values and vice versa,
+/* In BR regs, we can't change the DImode at all.
+ In FP regs, we can't change FP values to integer values and vice versa,
but we can change e.g. DImode to SImode, and V2SFmode into DImode. */
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
- (SCALAR_FLOAT_MODE_P (FROM) != SCALAR_FLOAT_MODE_P (TO) \
- ? reg_classes_intersect_p (CLASS, FR_REGS) : 0)
-
-/* A C expression that defines the machine-dependent operand constraint
- letters (`I', `J', `K', .. 'P') that specify particular ranges of
- integer values. */
-
-/* 14-bit signed immediate for arithmetic instructions. */
-#define CONST_OK_FOR_I(VALUE) \
- ((unsigned HOST_WIDE_INT)(VALUE) + 0x2000 < 0x4000)
-/* 22-bit signed immediate for arith instructions with r0/r1/r2/r3 source. */
-#define CONST_OK_FOR_J(VALUE) \
- ((unsigned HOST_WIDE_INT)(VALUE) + 0x200000 < 0x400000)
-/* 8-bit signed immediate for logical instructions. */
-#define CONST_OK_FOR_K(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x80 < 0x100)
-/* 8-bit adjusted signed immediate for compare pseudo-ops. */
-#define CONST_OK_FOR_L(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x7F < 0x100)
-/* 6-bit unsigned immediate for shift counts. */
-#define CONST_OK_FOR_M(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) < 0x40)
-/* 9-bit signed immediate for load/store post-increments. */
-#define CONST_OK_FOR_N(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x100 < 0x200)
-/* 0 for r0. Used by Linux kernel, do not change. */
-#define CONST_OK_FOR_O(VALUE) ((VALUE) == 0)
-/* 0 or -1 for dep instruction. */
-#define CONST_OK_FOR_P(VALUE) ((VALUE) == 0 || (VALUE) == -1)
-
-#define CONST_OK_FOR_LETTER_P(VALUE, C) \
- ia64_const_ok_for_letter_p (VALUE, C)
-
-/* A C expression that defines the machine-dependent operand constraint letters
- (`G', `H') that specify particular ranges of `const_double' values. */
-
-/* 0.0 and 1.0 for fr0 and fr1. */
-#define CONST_DOUBLE_OK_FOR_G(VALUE) \
- ((VALUE) == CONST0_RTX (GET_MODE (VALUE)) \
- || (VALUE) == CONST1_RTX (GET_MODE (VALUE)))
-
-#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
- ia64_const_double_ok_for_letter_p (VALUE, C)
-
-/* A C expression that defines the optional machine-dependent constraint
- letters (`Q', `R', `S', `T', `U') that can be used to segregate specific
- types of operands, usually memory references, for the target machine. */
-
-#define EXTRA_CONSTRAINT(VALUE, C) \
- ia64_extra_constraint (VALUE, C)
-
-/* Document the constraints that can accept reloaded memory operands. This is
- needed by the extended asm support, and by reload. 'Q' accepts mem, but
- only non-volatile mem. Since we can't reload a volatile mem into a
- non-volatile mem, it can not be listed here. */
-
-#define EXTRA_MEMORY_CONSTRAINT(C, STR) ((C) == 'S')
+ (reg_classes_intersect_p (CLASS, BR_REGS) \
+ ? (FROM) != (TO) \
+ : (SCALAR_FLOAT_MODE_P (FROM) != SCALAR_FLOAT_MODE_P (TO) \
+ ? reg_classes_intersect_p (CLASS, FR_REGS) \
+ : 0))
\f
/* Basic Stack Layout */
unwind info for C++ EH. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, BR_REG (0))
-/* ??? This is not defined because of three problems.
- 1) dwarf2out.c assumes that DWARF_FRAME_RETURN_COLUMN fits in one byte.
- The default value is FIRST_PSEUDO_REGISTER which doesn't. This can be
- worked around by setting PC_REGNUM to FR_REG (0) which is an otherwise
- unused register number.
- 2) dwarf2out_frame_debug core dumps while processing prologue insns. We
- need to refine which insns have RTX_FRAME_RELATED_P set and which don't.
- 3) It isn't possible to turn off EH frame info by defining DWARF2_UNIND_INFO
- to zero, despite what the documentation implies, because it is tested in
- a few places with #ifdef instead of #if. */
-#undef INCOMING_RETURN_ADDR_RTX
-
/* A C expression whose value is an integer giving the offset, in bytes, from
the value of the stack pointer register to the top of the stack frame at the
beginning of any function, before the prologue. The top of the frame is
pointer is not 16-byte aligned like the stack pointer. */
#define INIT_EXPANDERS \
do { \
- if (cfun && cfun->emit->regno_pointer_align) \
+ ia64_init_expanders (); \
+ if (crtl->emit.regno_pointer_align) \
REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = 64; \
} while (0)
\f
/* Eliminating the Frame Pointer and the Arg Pointer */
-/* A C expression which is nonzero if a function must have and use a frame
- pointer. This expression is evaluated in the reload pass. If its value is
- nonzero the function will have a frame pointer. */
-#define FRAME_POINTER_REQUIRED 0
-
-/* Show we can debug even without a frame pointer. */
-#define CAN_DEBUG_WITHOUT_FP
-
/* If defined, this macro specifies a table of register pairs used to eliminate
unneeded registers that point into the stack frame. */
{FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
}
-/* A C expression that returns nonzero if the compiler is allowed to try to
- replace register number FROM with register number TO. The frame pointer
- is automatically handled. */
-
-#define CAN_ELIMINATE(FROM, TO) \
- (TO == BR_REG (0) ? current_function_is_leaf : 1)
-
/* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It
specifies the initial difference between the specified pair of
registers. This macro must be defined if `ELIMINABLE_REGS' is
/* If defined, the maximum amount of space required for outgoing arguments will
be computed and placed into the variable
- `current_function_outgoing_args_size'. */
+ `crtl->outgoing_args_size'. */
#define ACCUMULATE_OUTGOING_ARGS 1
-/* A C expression that should indicate the number of bytes of its own arguments
- that a function pops on returning, or 0 if the function pops no arguments
- and the caller must therefore pop them all after the function returns. */
-
-#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
-
\f
/* Function Arguments in Registers */
`FUNCTION_ARG' and other related values. For some target machines, the type
`int' suffices and can hold the number of bytes of argument so far. */
+enum ivms_arg_type {I64, FF, FD, FG, FS, FT};
+/* VMS floating point formats VAX F, VAX D, VAX G, IEEE S, IEEE T. */
+
typedef struct ia64_args
{
int words; /* # words of arguments so far */
int int_regs; /* # GR registers used so far */
int fp_regs; /* # FR registers used so far */
int prototype; /* whether function prototyped */
+ enum ivms_arg_type atypes[8]; /* which VMS float type or if not float */
} CUMULATIVE_ARGS;
/* A C statement (sans semicolon) for initializing the variable CUM for the
(CUM).int_regs = 0; \
(CUM).fp_regs = 0; \
(CUM).prototype = ((FNTYPE) && TYPE_ARG_TYPES (FNTYPE)) || (LIBNAME); \
+ (CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \
+ (CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; \
+ (CUM).atypes[6] = (CUM).atypes[7] = I64; \
} while (0)
/* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the
(CUM).int_regs = 0; \
(CUM).fp_regs = 0; \
(CUM).prototype = 1; \
+ (CUM).atypes[0] = (CUM).atypes[1] = (CUM).atypes[2] = I64; \
+ (CUM).atypes[3] = (CUM).atypes[4] = (CUM).atypes[5] = I64; \
+ (CUM).atypes[6] = (CUM).atypes[7] = I64; \
} while (0)
/* A C statement (sans semicolon) to update the summarizer variable CUM to
#define FUNCTION_ARG_REGNO_P(REGNO) \
(((REGNO) >= AR_ARG_FIRST && (REGNO) < (AR_ARG_FIRST + MAX_ARGUMENT_SLOTS)) \
|| ((REGNO) >= FR_ARG_FIRST && (REGNO) < (FR_ARG_FIRST + MAX_ARGUMENT_SLOTS)))
-\f
-/* How Scalar Function Values are Returned */
-
-/* A C expression to create an RTX representing the place where a function
- returns a value of data type VALTYPE. */
-
-#define FUNCTION_VALUE(VALTYPE, FUNC) \
- ia64_function_value (VALTYPE, FUNC)
-
-/* A C expression to create an RTX representing the place where a library
- function returns a value of mode MODE. */
-
-#define LIBCALL_VALUE(MODE) \
- gen_rtx_REG (MODE, \
- (((GET_MODE_CLASS (MODE) == MODE_FLOAT \
- || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) && \
- (MODE) != TFmode) \
- ? FR_RET_FIRST : GR_RET_FIRST))
-
-/* A C expression that is nonzero if REGNO is the number of a hard register in
- which the values of called function may come back. */
-
-#define FUNCTION_VALUE_REGNO_P(REGNO) \
- (((REGNO) >= GR_RET_FIRST && (REGNO) <= GR_RET_LAST) \
- || ((REGNO) >= FR_RET_FIRST && (REGNO) <= FR_RET_LAST))
\f
/* How Large Values are Returned */
#define STACK_SAVEAREA_MODE(LEVEL) \
((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)
-/* Output assembler code for a block containing the constant parts of
- a trampoline, leaving space for the variable parts.
-
- The trampoline should set the static chain pointer to value placed
- into the trampoline and should branch to the specified routine.
- To make the normal indirect-subroutine calling convention work,
- the trampoline must look like a function descriptor; the first
- word being the target address and the second being the target's
- global pointer.
-
- We abuse the concept of a global pointer by arranging for it
- to point to the data we need to load. The complete trampoline
- has the following form:
-
- +-------------------+ \
- TRAMP: | __ia64_trampoline | |
- +-------------------+ > fake function descriptor
- | TRAMP+16 | |
- +-------------------+ /
- | target descriptor |
- +-------------------+
- | static link |
- +-------------------+
-*/
-
/* A C expression for the size in bytes of the trampoline, as an integer. */
#define TRAMPOLINE_SIZE 32
/* Alignment required for trampolines, in bits. */
#define TRAMPOLINE_ALIGNMENT 64
-
-/* A C statement to initialize the variable parts of a trampoline. */
-
-#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \
- ia64_initialize_trampoline((ADDR), (FNADDR), (STATIC_CHAIN))
\f
/* Addressing Modes */
#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
-/* A C statement or compound statement with a conditional `goto LABEL;'
- executed if memory address X (an RTX) can have different meanings depending
- on the machine mode of the memory reference it is used for or if the address
- is valid for some modes but not others. */
-
-#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
-
/* A C expression that is nonzero if X is a legitimate constant for an
immediate operand on the target machine. */
\f
/* Describing Relative Costs of Operations */
-/* A C expression for the cost of moving data from a register in class FROM to
- one in class TO, using MODE. */
-
-#define REGISTER_MOVE_COST ia64_register_move_cost
-
-/* A C expression for the cost of moving data of mode M between a
- register and memory. */
-#define MEMORY_MOVE_COST(MODE,CLASS,IN) \
- ((CLASS) == GENERAL_REGS || (CLASS) == FR_REGS || (CLASS) == FP_REGS \
- || (CLASS) == GR_AND_FR_REGS ? 4 : 10)
-
/* A C expression for the cost of a branch instruction. A value of 1 is the
default; other values are interpreted relative to that. Used by the
if-conversion code as max instruction count. */
many additional insn groups we run into, vs how good the dynamic
branch predictor is. */
-#define BRANCH_COST 6
+#define BRANCH_COST(speed_p, predictable_p) 6
/* Define this macro as a C expression which is nonzero if accessing less than
a word of memory (i.e. a `char' or a `short') is no faster than accessing a
/* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' is
clobbered by calls. */
-#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
+#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
\f
/* The Overall Framework of an Assembler File. */
do { \
assemble_name (STREAM, NAME); \
fputs (" = ", STREAM); \
+ if (ISDIGIT (*VALUE)) \
+ ia64_asm_output_label = 1; \
assemble_name (STREAM, VALUE); \
fputc ('\n', STREAM); \
+ ia64_asm_output_label = 0; \
} while (0)
\f
#define DWARF2_DEBUGGING_INFO 1
-/* We do not want call-frame info to be output, since debuggers are
- supposed to use the target unwind info. Leave this undefined it
- TARGET_UNWIND_INFO might ever be false. */
-
-#define DWARF2_FRAME_INFO 0
-
#define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DWARF2_ASM)
/* Use tags for debug info labels, so that they don't break instruction
extern int ia64_final_schedule;
-#define TARGET_UNWIND_INFO 1
-
#define TARGET_UNWIND_TABLES_DEFAULT true
#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 15 : INVALID_REGNUM)
/* This function contains machine specific function data. */
-struct machine_function GTY(())
+struct GTY(()) machine_function
{
/* The new stack pointer when unwinding from EH. */
rtx ia64_eh_epilogue_sp;
/* Switch on code for querying unit reservations. */
#define CPU_UNITS_QUERY 1
-/* Define this to change the optimizations performed by default. */
-#define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \
- ia64_optimization_options ((LEVEL), (SIZE))
-
/* End of ia64.h */
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