OSDN Git Service

2006-09-07 H.J. Lu <hongjiu.lu@intel.com>
[pf3gnuchains/gcc-fork.git] / gcc / config / i386 / i386.md
index f9be68f..639f0b4 100644 (file)
    (set (match_operand:DI 0 "nonimmediate_operand" "=rm")
        (ashift:DI (match_dup 1) (match_dup 2)))]
   "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, DImode, operands)"
+   && ix86_binary_operator_ok (ASHIFT, DImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL
+       || (operands[2] == const1_rtx
+          && (TARGET_SHIFT1
+              || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))"
 {
   switch (get_attr_type (insn))
     {
          (const_int 0)))
    (clobber (match_scratch:DI 0 "=r"))]
   "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, DImode, operands)"
+   && ix86_binary_operator_ok (ASHIFT, DImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL
+       || (operands[2] == const1_rtx
+          && (TARGET_SHIFT1
+              || TARGET_DOUBLE_WITH_ADD)))"
 {
   switch (get_attr_type (insn))
     {
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
        (ashift:SI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, SImode, operands)"
+   && ix86_binary_operator_ok (ASHIFT, SImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL
+       || (operands[2] == const1_rtx
+          && (TARGET_SHIFT1
+              || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))"
 {
   switch (get_attr_type (insn))
     {
          (const_int 0)))
    (clobber (match_scratch:SI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, SImode, operands)"
+   && ix86_binary_operator_ok (ASHIFT, SImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL
+       || (operands[2] == const1_rtx
+          && (TARGET_SHIFT1
+              || TARGET_DOUBLE_WITH_ADD)))"
 {
   switch (get_attr_type (insn))
     {
    (set (match_operand:DI 0 "register_operand" "=r")
        (zero_extend:DI (ashift:SI (match_dup 1) (match_dup 2))))]
   "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, SImode, operands)"
+   && ix86_binary_operator_ok (ASHIFT, SImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL
+       || (operands[2] == const1_rtx
+          && (TARGET_SHIFT1
+              || TARGET_DOUBLE_WITH_ADD)))"
 {
   switch (get_attr_type (insn))
     {
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
        (ashift:HI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, HImode, operands)"
+   && ix86_binary_operator_ok (ASHIFT, HImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL
+       || (operands[2] == const1_rtx
+          && (TARGET_SHIFT1
+              || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))"
 {
   switch (get_attr_type (insn))
     {
          (const_int 0)))
    (clobber (match_scratch:HI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, HImode, operands)"
+   && ix86_binary_operator_ok (ASHIFT, HImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL
+       || (operands[2] == const1_rtx
+          && (TARGET_SHIFT1
+              || TARGET_DOUBLE_WITH_ADD)))"
 {
   switch (get_attr_type (insn))
     {
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
        (ashift:QI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, QImode, operands)"
+   && ix86_binary_operator_ok (ASHIFT, QImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL
+       || (operands[2] == const1_rtx
+          && (TARGET_SHIFT1
+              || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))"
 {
   switch (get_attr_type (insn))
     {
          (const_int 0)))
    (clobber (match_scratch:QI 0 "=q"))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, QImode, operands)"
+   && ix86_binary_operator_ok (ASHIFT, QImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL
+       || (operands[2] == const1_rtx
+          && (TARGET_SHIFT1
+              || TARGET_DOUBLE_WITH_ADD)))"
 {
   switch (get_attr_type (insn))
     {
    (set (match_operand:DI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:DI (match_dup 1) (match_dup 2)))]
   "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)"
+   && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "sar{q}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "DI")])
          (const_int 0)))
    (clobber (match_scratch:DI 0 "=r"))]
   "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)"
+   && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "sar{q}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "DI")])
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:SI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
+   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "sar{l}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "SI")])
          (const_int 0)))
    (clobber (match_scratch:SI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
+   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "sar{l}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "SI")])
    (set (match_operand:DI 0 "register_operand" "=r")
        (zero_extend:DI (ashiftrt:SI (match_dup 1) (match_dup 2))))]
   "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
+   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "sar{l}\t{%2, %k0|%k0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "SI")])
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:HI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
+   && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "sar{w}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "HI")])
          (const_int 0)))
    (clobber (match_scratch:HI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
+   && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "sar{w}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "HI")])
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
        (ashiftrt:QI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
+   && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "sar{b}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "QI")])
          (const_int 0)))
    (clobber (match_scratch:QI 0 "=q"))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
+   && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "sar{b}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "QI")])
    (set (match_operand:DI 0 "nonimmediate_operand" "=rm")
        (lshiftrt:DI (match_dup 1) (match_dup 2)))]
   "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "shr{q}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "DI")])
          (const_int 0)))
    (clobber (match_scratch:DI 0 "=r"))]
   "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "shr{q}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "DI")])
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
        (lshiftrt:SI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "shr{l}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "SI")])
         (const_int 0)))
    (clobber (match_scratch:SI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "shr{l}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "SI")])
    (set (match_operand:DI 0 "register_operand" "=r")
        (lshiftrt:DI (zero_extend:DI (match_dup 1)) (match_dup 2)))]
   "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "shr{l}\t{%2, %k0|%k0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "SI")])
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
        (lshiftrt:HI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "shr{w}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "HI")])
          (const_int 0)))
    (clobber (match_scratch:HI 0 "=r"))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "shr{w}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "HI")])
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
        (lshiftrt:QI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
+   && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "shr{b}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "QI")])
          (const_int 0)))
    (clobber (match_scratch:QI 0 "=q"))]
   "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
+   && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)
+   && (optimize_size
+       || !TARGET_PARTIAL_FLAG_REG_STALL)"
   "shr{b}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "QI")])