Pizza-lize :-)

[pf3gnuchains/gcc-fork.git] / gcc / config / i386 / driver-i386.c

diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index 64bae0d..1c005f8 100644 (file)
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -24,7 +24,7 @@ along with GCC; see the file COPYING3.  If not see
 
 const char *host_detect_local_cpu (int argc, const char **argv);
 
-#ifdef __GNUC__
+#if defined(__GNUC__) && (defined(__i386__) || defined(__x86_64__))
 #include "cpuid.h"
 
 struct cache_desc
@@ -469,27 +469,6 @@ const char *host_detect_local_cpu (int argc, const char **argv)
       has_fsgsbase = ebx & bit_FSGSBASE;
     }
 
-  /* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv.  */
-#define XCR_XFEATURE_ENABLED_MASK      0x0
-#define XSTATE_FP                      0x1
-#define XSTATE_SSE                     0x2
-#define XSTATE_YMM                     0x4
-  if (has_osxsave)
-    asm (".byte 0x0f; .byte 0x01; .byte 0xd0"
-        : "=a" (eax), "=d" (edx)
-        : "c" (XCR_XFEATURE_ENABLED_MASK));
-
-  /* Check if SSE and YMM states are supported.  */
-  if (!has_osxsave
-      || (eax & (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM))
-    {
-      has_avx = 0;
-      has_avx2 = 0;
-      has_fma = 0;
-      has_fma4 = 0;
-      has_xop = 0;
-    }
-
   /* Check cpuid level of extended features.  */
   __cpuid (0x80000000, ext_level, ebx, ecx, edx);
 
@@ -511,6 +490,28 @@ const char *host_detect_local_cpu (int argc, const char **argv)
       has_3dnow = edx & bit_3DNOW;
     }
 
+  /* Get XCR_XFEATURE_ENABLED_MASK register with xgetbv.  */
+#define XCR_XFEATURE_ENABLED_MASK      0x0
+#define XSTATE_FP                      0x1
+#define XSTATE_SSE                     0x2
+#define XSTATE_YMM                     0x4
+  if (has_osxsave)
+    asm (".byte 0x0f; .byte 0x01; .byte 0xd0"
+        : "=a" (eax), "=d" (edx)
+        : "c" (XCR_XFEATURE_ENABLED_MASK));
+
+  /* Check if SSE and YMM states are supported.  */
+  if (!has_osxsave
+      || (eax & (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM))
+    {
+      has_avx = 0;
+      has_avx2 = 0;
+      has_fma = 0;
+      has_fma4 = 0;
+      has_f16c = 0;
+      has_xop = 0;
+    }
+
   if (!arch)
     {
       if (vendor == SIG_AMD
@@ -630,13 +631,18 @@ const char *host_detect_local_cpu (int argc, const char **argv)
          /* Atom.  */
          cpu = "atom";
          break;
+       case 0x0f:
+         /* Merom.  */
+       case 0x17:
+       case 0x1d:
+         /* Penryn.  */
+         cpu = "core2";
+         break;
        case 0x1a:
        case 0x1e:
        case 0x1f:
        case 0x2e:
          /* Nehalem.  */
-         cpu = "corei7";
-         break;
        case 0x25:
        case 0x2c:
        case 0x2f:
@@ -648,14 +654,10 @@ const char *host_detect_local_cpu (int argc, const char **argv)
          /* Sandy Bridge.  */
          cpu = "corei7-avx";
          break;
-       case 0x17:
-       case 0x1d:
-         /* Penryn.  */
-         cpu = "core2";
-         break;
-       case 0x0f:
-         /* Merom.  */
-         cpu = "core2";
+       case 0x3a:
+       case 0x3e:
+         /* Ivy Bridge.  */
+         cpu = "core-avx-i";
          break;
        default:
          if (arch)