/* Target macros for the FRV port of GCC.
- Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
+ Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009
Free Software Foundation, Inc.
Contributed by Red Hat Inc.
GCC is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published
- by the Free Software Foundation; either version 2, or (at your
+ by the Free Software Foundation; either version 3, or (at your
option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT
License for more details.
You should have received a copy of the GNU General Public License
- along with GCC; see the file COPYING. If not, write to the Free
- Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA. */
+ along with GCC; see the file COPYING3. If not see
+ <http://www.gnu.org/licenses/>. */
#ifndef __FRV_H__
#define __FRV_H__
#undef LINK_SPEC
#define LINK_SPEC "\
%{h*} %{v:-V} \
-%{b} %{Wl,*:%*} \
+%{b} \
%{mfdpic:-melf32frvfd -z text} \
%{static:-dn -Bstatic} \
%{shared:-Bdynamic} \
#define CPU_TYPE FRV_CPU_FR500
#endif
-/* Allow us to easily change the default for -malloc-cc. */
-#ifndef DEFAULT_NO_ALLOC_CC
-#define MASK_DEFAULT_ALLOC_CC MASK_ALLOC_CC
-#else
-#define MASK_DEFAULT_ALLOC_CC 0
-#endif
-
/* Run-time target specifications */
#define TARGET_CPU_CPP_BUILTINS() \
while (0)
\f
-/* This declaration should be present. */
-extern int target_flags;
-
-/* This series of macros is to allow compiler command arguments to enable or
- disable the use of optional features of the target machine. For example,
- one machine description serves both the 68000 and the 68020; a command
- argument tells the compiler whether it should use 68020-only instructions or
- not. This command argument works by means of a macro `TARGET_68020' that
- tests a bit in `target_flags'.
-
- Define a macro `TARGET_FEATURENAME' for each such option. Its definition
- should test a bit in `target_flags'; for example:
-
- #define TARGET_68020 (target_flags & 1)
-
- One place where these macros are used is in the condition-expressions of
- instruction patterns. Note how `TARGET_68020' appears frequently in the
- 68000 machine description file, `m68k.md'. Another place they are used is
- in the definitions of the other macros in the `MACHINE.h' file. */
-
-#define MASK_GPR_32 0x00000001 /* Limit gprs to 32 registers */
-#define MASK_FPR_32 0x00000002 /* Limit fprs to 32 registers */
-#define MASK_SOFT_FLOAT 0x00000004 /* Use software floating point */
-#define MASK_ALLOC_CC 0x00000008 /* Dynamically allocate icc/fcc's */
-#define MASK_DWORD 0x00000010 /* Change ABi to allow dbl word insns*/
-#define MASK_DOUBLE 0x00000020 /* Use double precision instructions */
-#define MASK_MEDIA 0x00000040 /* Use media instructions */
-#define MASK_MULADD 0x00000080 /* Use multiply add/subtract insns */
-#define MASK_LIBPIC 0x00000100 /* -fpic that can be linked w/o pic */
-#define MASK_ACC_4 0x00000200 /* Only use four media accumulators */
-#define MASK_PACK 0x00000400 /* Set to enable packed output */
-#define MASK_LONG_CALLS 0x00000800 /* Use indirect calls */
-#define MASK_ALIGN_LABELS 0x00001000 /* Optimize label alignments */
-#define MASK_LINKED_FP 0x00002000 /* Follow ABI linkage requirements. */
-
- /* put debug masks up high */
-#define MASK_DEBUG_ARG 0x40000000 /* debug argument handling */
-#define MASK_DEBUG_ADDR 0x20000000 /* debug go_if_legitimate_address */
-#define MASK_DEBUG_STACK 0x10000000 /* debug stack frame */
-#define MASK_DEBUG 0x08000000 /* general debugging switch */
-#define MASK_DEBUG_LOC 0x04000000 /* optimize line # table */
-#define MASK_DEBUG_COND_EXEC 0x02000000 /* debug cond exec code */
-#define MASK_NO_COND_MOVE 0x01000000 /* disable conditional moves */
-#define MASK_NO_SCC 0x00800000 /* disable set conditional codes */
-#define MASK_NO_COND_EXEC 0x00400000 /* disable conditional execution */
-#define MASK_NO_VLIW_BRANCH 0x00200000 /* disable repacking branches */
-#define MASK_NO_MULTI_CE 0x00100000 /* disable multi-level cond exec */
-#define MASK_NO_NESTED_CE 0x00080000 /* disable nested cond exec */
-#define MASK_FDPIC 0x00040000 /* Follow the new uClinux ABI. */
-#define MASK_INLINE_PLT 0x00020000 /* Inline FDPIC PLTs. */
-#define MASK_GPREL_RO 0x00010000 /* Use GPREL for read-only data. */
-
-#define MASK_DEFAULT MASK_DEFAULT_ALLOC_CC
-
-#define TARGET_GPR_32 ((target_flags & MASK_GPR_32) != 0)
-#define TARGET_FPR_32 ((target_flags & MASK_FPR_32) != 0)
-#define TARGET_SOFT_FLOAT ((target_flags & MASK_SOFT_FLOAT) != 0)
-#define TARGET_ALLOC_CC ((target_flags & MASK_ALLOC_CC) != 0)
-#define TARGET_DWORD ((target_flags & MASK_DWORD) != 0)
-#define TARGET_DOUBLE ((target_flags & MASK_DOUBLE) != 0)
-#define TARGET_MEDIA ((target_flags & MASK_MEDIA) != 0)
-#define TARGET_MULADD ((target_flags & MASK_MULADD) != 0)
-#define TARGET_LIBPIC ((target_flags & MASK_LIBPIC) != 0)
-#define TARGET_ACC_4 ((target_flags & MASK_ACC_4) != 0)
-#define TARGET_DEBUG_ARG ((target_flags & MASK_DEBUG_ARG) != 0)
-#define TARGET_DEBUG_ADDR ((target_flags & MASK_DEBUG_ADDR) != 0)
-#define TARGET_DEBUG_STACK ((target_flags & MASK_DEBUG_STACK) != 0)
-#define TARGET_DEBUG ((target_flags & MASK_DEBUG) != 0)
-#define TARGET_DEBUG_LOC ((target_flags & MASK_DEBUG_LOC) != 0)
-#define TARGET_DEBUG_COND_EXEC ((target_flags & MASK_DEBUG_COND_EXEC) != 0)
-#define TARGET_NO_COND_MOVE ((target_flags & MASK_NO_COND_MOVE) != 0)
-#define TARGET_NO_SCC ((target_flags & MASK_NO_SCC) != 0)
-#define TARGET_NO_COND_EXEC ((target_flags & MASK_NO_COND_EXEC) != 0)
-#define TARGET_NO_VLIW_BRANCH ((target_flags & MASK_NO_VLIW_BRANCH) != 0)
-#define TARGET_NO_MULTI_CE ((target_flags & MASK_NO_MULTI_CE) != 0)
-#define TARGET_NO_NESTED_CE ((target_flags & MASK_NO_NESTED_CE) != 0)
-#define TARGET_FDPIC ((target_flags & MASK_FDPIC) != 0)
-#define TARGET_INLINE_PLT ((target_flags & MASK_INLINE_PLT) != 0)
-#define TARGET_GPREL_RO ((target_flags & MASK_GPREL_RO) != 0)
-#define TARGET_PACK ((target_flags & MASK_PACK) != 0)
-#define TARGET_LONG_CALLS ((target_flags & MASK_LONG_CALLS) != 0)
-#define TARGET_ALIGN_LABELS ((target_flags & MASK_ALIGN_LABELS) != 0)
-#define TARGET_LINKED_FP ((target_flags & MASK_LINKED_FP) != 0)
-
-#define TARGET_GPR_64 (! TARGET_GPR_32)
-#define TARGET_FPR_64 (! TARGET_FPR_32)
-#define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
-#define TARGET_FIXED_CC (! TARGET_ALLOC_CC)
-#define TARGET_COND_MOVE (! TARGET_NO_COND_MOVE)
-#define TARGET_SCC (! TARGET_NO_SCC)
-#define TARGET_COND_EXEC (! TARGET_NO_COND_EXEC)
-#define TARGET_VLIW_BRANCH (! TARGET_NO_VLIW_BRANCH)
-#define TARGET_MULTI_CE (! TARGET_NO_MULTI_CE)
-#define TARGET_NESTED_CE (! TARGET_NO_NESTED_CE)
-#define TARGET_ACC_8 (! TARGET_ACC_4)
-
#define TARGET_HAS_FPRS (TARGET_HARD_FLOAT || TARGET_MEDIA)
#define NUM_GPRS (TARGET_GPR_32? 32 : 64)
(frv_cpu_type == FRV_CPU_FR405 \
|| frv_cpu_type == FRV_CPU_FR450)
-/* This macro defines names of command options to set and clear bits in
- `target_flags'. Its definition is an initializer with a subgrouping for
- each command option.
-
- Each subgrouping contains a string constant, that defines the option name,
- a number, which contains the bits to set in `target_flags', and an optional
- second string which is the textual description that will be displayed when
- the user passes --help on the command line. If the number entry is negative
- then the specified bits will be cleared instead of being set. If the second
- string entry is present but empty, then no help information will be displayed
- for that option, but it will not count as an undocumented option. The actual
- option name, asseen on the command line is made by appending `-m' to the
- specified name.
-
- One of the subgroupings should have a null string. The number in this
- grouping is the default value for `target_flags'. Any target options act
- starting with that value.
-
- Here is an example which defines `-m68000' and `-m68020' with opposite
- meanings, and picks the latter as the default:
-
- #define TARGET_SWITCHES \
- { { "68020", 1, ""}, \
- { "68000", -1, "Compile for the m68000"}, \
- { "", 1, }}
-
- This declaration must be present. */
-
-#define TARGET_SWITCHES \
-{{ "gpr-32", MASK_GPR_32, "Only use 32 gprs"}, \
- { "gpr-64", -MASK_GPR_32, "Use 64 gprs"}, \
- { "fpr-32", MASK_FPR_32, "Only use 32 fprs"}, \
- { "fpr-64", -MASK_FPR_32, "Use 64 fprs"}, \
- { "hard-float", -MASK_SOFT_FLOAT, "Use hardware floating point" },\
- { "soft-float", MASK_SOFT_FLOAT, "Use software floating point" },\
- { "alloc-cc", MASK_ALLOC_CC, "Dynamically allocate cc's" }, \
- { "fixed-cc", -MASK_ALLOC_CC, "Just use icc0/fcc0" }, \
- { "dword", MASK_DWORD, "Change ABI to allow double word insns" }, \
- { "no-dword", -MASK_DWORD, "Do not use double word insns" }, \
- { "double", MASK_DOUBLE, "Use fp double instructions" }, \
- { "no-double", -MASK_DOUBLE, "Do not use fp double insns" }, \
- { "media", MASK_MEDIA, "Use media instructions" }, \
- { "no-media", -MASK_MEDIA, "Do not use media insns" }, \
- { "muladd", MASK_MULADD, "Use multiply add/subtract instructions" }, \
- { "no-muladd", -MASK_MULADD, "Do not use multiply add/subtract insns" }, \
- { "ultilib-library-pic", 0, "Link with the library-pic libraries" }, \
- { "library-pic", MASK_LIBPIC, "PIC support for building libraries" }, \
- { "acc-4", MASK_ACC_4, "Use 4 media accumulators" }, \
- { "acc-8", -MASK_ACC_4, "Use 8 media accumulators" }, \
- { "pack", MASK_PACK, "Pack VLIW instructions" }, \
- { "no-pack", -MASK_PACK, "Do not pack VLIW instructions" }, \
- { "no-eflags", 0, "Do not mark ABI switches in e_flags" }, \
- { "debug-arg", MASK_DEBUG_ARG, "Internal debug switch" }, \
- { "debug-addr", MASK_DEBUG_ADDR, "Internal debug switch" }, \
- { "debug-stack", MASK_DEBUG_STACK, "Internal debug switch" }, \
- { "debug", MASK_DEBUG, "Internal debug switch" }, \
- { "debug-cond-exec", MASK_DEBUG_COND_EXEC, "Internal debug switch" }, \
- { "debug-loc", MASK_DEBUG_LOC, "Internal debug switch" }, \
- { "align-labels", MASK_ALIGN_LABELS, "Enable label alignment optimizations" }, \
- { "no-align-labels", -MASK_ALIGN_LABELS, "Disable label alignment optimizations" }, \
- { "cond-move", -MASK_NO_COND_MOVE, "Enable conditional moves" }, \
- { "no-cond-move", MASK_NO_COND_MOVE, "Disable conditional moves" }, \
- { "scc", -MASK_NO_SCC, "Enable setting gprs to the result of comparisons" }, \
- { "no-scc", MASK_NO_SCC, "Disable setting gprs to the result of comparisons" }, \
- { "cond-exec", -MASK_NO_COND_EXEC, "Enable conditional execution other than moves/scc" }, \
- { "no-cond-exec", MASK_NO_COND_EXEC, "Disable conditional execution other than moves/scc" }, \
- { "vliw-branch", -MASK_NO_VLIW_BRANCH, "Run pass to pack branches into VLIW insns" }, \
- { "no-vliw-branch", MASK_NO_VLIW_BRANCH, "Do not run pass to pack branches into VLIW insns" }, \
- { "multi-cond-exec", -MASK_NO_MULTI_CE, "Disable optimizing &&/|| in conditional execution" }, \
- { "no-multi-cond-exec", MASK_NO_MULTI_CE, "Enable optimizing &&/|| in conditional execution" }, \
- { "nested-cond-exec", -MASK_NO_NESTED_CE, "Enable nested conditional execution optimizations" }, \
- { "no-nested-cond-exec" ,MASK_NO_NESTED_CE, "Disable nested conditional execution optimizations" }, \
- { "long-calls", MASK_LONG_CALLS, "Disallow direct calls to global functions" }, \
- { "no-long-calls", -MASK_LONG_CALLS, "Allow direct calls to global functions" }, \
- { "linked-fp", MASK_LINKED_FP, "Follow the EABI linkage requirements" }, \
- { "no-linked-fp", -MASK_LINKED_FP, "Don't follow the EABI linkage requirements" }, \
- { "fdpic", MASK_FDPIC, "Enable file descriptor PIC mode" }, \
- { "no-fdpic", -MASK_FDPIC, "Disable file descriptor PIC mode" }, \
- { "inline-plt", MASK_INLINE_PLT, "Enable inlining of PLT in function calls" }, \
- { "no-inline-plt", -MASK_INLINE_PLT, "Disable inlining of PLT in function calls" }, \
- { "gprel-ro", MASK_GPREL_RO, "Enable use of GPREL for read-only data in FDPIC" }, \
- { "no-gprel-ro", -MASK_GPREL_RO, "Disable use of GPREL for read-only data in FDPIC" }, \
- { "tomcat-stats", 0, "Cause gas to print tomcat statistics" }, \
- { "", MASK_DEFAULT, "" }} \
-
-/* This macro is similar to `TARGET_SWITCHES' but defines names of command
- options that have values. Its definition is an initializer with a
- subgrouping for each command option.
-
- Each subgrouping contains a string constant, that defines the fixed part of
- the option name, the address of a variable, and an optional description string.
- The variable, of type `char *', is set to the text following the fixed part of
- the option as it is specified on the command line. The actual option name is
- made by appending `-m' to the specified name.
-
- Here is an example which defines `-mshort-data-NUMBER'. If the given option
- is `-mshort-data-512', the variable `m88k_short_data' will be set to the
- string `"512"'.
-
- extern char *m88k_short_data;
- #define TARGET_OPTIONS \
- { { "short-data-", & m88k_short_data, \
- "Specify the size of the short data section" } }
-
- This declaration is optional. */
-#define TARGET_OPTIONS \
-{ \
- { "cpu=", &frv_cpu_string, "Set cpu type", 0}, \
- { "branch-cost=", &frv_branch_cost_string, "Internal debug switch", 0}, \
- { "cond-exec-insns=", &frv_condexec_insns_str, "Internal debug switch", 0}, \
- { "cond-exec-temps=", &frv_condexec_temps_str, "Internal debug switch", 0}, \
- { "sched-lookahead=", &frv_sched_lookahead_str,"Internal debug switch", 0}, \
-}
+#ifndef HAVE_AS_TLS
+#define HAVE_AS_TLS 0
+#endif
/* This macro is a C statement to print on `stderr' a string describing the
particular machine description choice. Every machine description should
You should not use this macro to change options that are not
machine-specific. These should uniformly selected by the same optimization
- level on all supported machines. Use this macro to enable machbine-specific
+ level on all supported machines. Use this macro to enable machine-specific
optimizations.
*Do not examine `write_symbols' in this macro!* The debugging options are
#define FDPIC_FPTR_REGNO (GPR_FIRST + 14) /* uClinux PIC function pointer register. */
#define FDPIC_REGNO (GPR_FIRST + 15) /* uClinux PIC register. */
+#define HARD_REGNO_RENAME_OK(from,to) (TARGET_FDPIC ? ((to) != FDPIC_REG) : 1)
+
#define OUR_FDPIC_REG get_hard_reg_initial_val (SImode, FDPIC_REGNO)
#define FPR_FIRST 64 /* First FP reg */
#define FPR_LAST 127 /* Last FP reg */
-#define DEFAULT_CONDEXEC_TEMPS 4 /* reserve 4 regs by default */
#define GPR_TEMP_NUM frv_condexec_temps /* # gprs to reserve for temps */
/* We reserve the last CR and CCR in each category to be used as a reload
1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \
/* Other registers */ \
1, /* 168, AP - fake arg ptr */ \
- 0, /* 169, LR - Link register*/ \
+ 1, /* 169, LR - Link register*/ \
0, /* 170, LCR - Loop count reg*/ \
1, 1 /* 171-172, iacc0 */ \
}
CR_REGS,
LCR_REG,
LR_REG,
+ GR8_REGS,
+ GR9_REGS,
+ GR89_REGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
FDPIC_CALL_REGS,
"CR_REGS", \
"LCR_REG", \
"LR_REG", \
+ "GR8_REGS", \
+ "GR9_REGS", \
+ "GR89_REGS", \
"FDPIC_REGS", \
"FDPIC_FPTR_REGS", \
"FDPIC_CALL_REGS", \
{ 0x00000000,0x00000000,0x00000000,0x00000000,0x0000ff00,0x0}, /* CR_REGS */\
{ 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x400}, /* LCR_REGS */\
{ 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x200}, /* LR_REGS */\
+ { 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR8_REGS */\
+ { 0x00000200,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR9_REGS */\
+ { 0x00000300,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR89_REGS */\
{ 0x00008000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_REGS */\
{ 0x00004000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_FPTR_REGS */\
{ 0x0000c000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_CALL_REGS */\
{ 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0x1fff}, /* ALL_REGS */\
}
+/* The following macro defines cover classes for Integrated Register
+ Allocator. Cover classes is a set of non-intersected register
+ classes covering all hard registers used for register allocation
+ purpose. Any move between two registers of a cover class should be
+ cheaper than load or store of the registers. The macro value is
+ array of register classes with LIM_REG_CLASSES used as the end
+ marker. */
+
+#define IRA_COVER_CLASSES \
+{ \
+ GPR_REGS, FPR_REGS, ACC_REGS, ICR_REGS, FCR_REGS, ICC_REGS, FCC_REGS, \
+ ACCG_REGS, SPR_REGS, \
+ LIM_REG_CLASSES \
+}
+
/* A C expression whose value is a register class containing hard register
REGNO. In general there is more than one such class; choose a class which
is "minimal", meaning that no smaller class also contains the register. */
#define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS
#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \
- frv_secondary_reload_class (CLASS, MODE, X, TRUE)
+ frv_secondary_reload_class (CLASS, MODE, X)
#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \
- frv_secondary_reload_class (CLASS, MODE, X, FALSE)
+ frv_secondary_reload_class (CLASS, MODE, X)
/* A C expression whose value is nonzero if pseudos that have been assigned to
registers of class CLASS would likely be spilled because registers of CLASS
#define ZERO_P(x) (x == CONST0_RTX (GET_MODE (x)))
-/* 6 bit signed immediate. */
+/* 6-bit signed immediate. */
#define CONST_OK_FOR_I(VALUE) IN_RANGE_P(VALUE, -32, 31)
-/* 10 bit signed immediate. */
+/* 10-bit signed immediate. */
#define CONST_OK_FOR_J(VALUE) IN_RANGE_P(VALUE, -512, 511)
/* Unused */
#define CONST_OK_FOR_K(VALUE) 0
-/* 16 bit signed immediate. */
+/* 16-bit signed immediate. */
#define CONST_OK_FOR_L(VALUE) IN_RANGE_P(VALUE, -32768, 32767)
-/* 16 bit unsigned immediate. */
+/* 16-bit unsigned immediate. */
#define CONST_OK_FOR_M(VALUE) IN_RANGE_P (VALUE, 0, 65535)
-/* 12 bit signed immediate that is negative. */
+/* 12-bit signed immediate that is negative. */
#define CONST_OK_FOR_N(VALUE) IN_RANGE_P(VALUE, -2048, -1)
/* Zero */
#define CONST_OK_FOR_O(VALUE) ((VALUE) == 0)
-/* 12 bit signed immediate that is negative. */
+/* 12-bit signed immediate that is negative. */
#define CONST_OK_FOR_P(VALUE) IN_RANGE_P(VALUE, 1, 2047)
/* A C expression that defines the machine-dependent operand constraint letters
: (C) == 'U' ? EXTRA_CONSTRAINT_FOR_U (VALUE) \
: 0)
+#define EXTRA_MEMORY_CONSTRAINT(C,STR) \
+ ((C) == 'U' || (C) == 'R' || (C) == 'T')
+
+#define CONSTRAINT_LEN(C, STR) \
+ ((C) == 'D' ? 3 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
+
+#define REG_CLASS_FROM_CONSTRAINT(C, STR) \
+ (((C) == 'D' && (STR)[1] == '8' && (STR)[2] == '9') ? GR89_REGS : \
+ ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '9') ? GR9_REGS : \
+ ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '8') ? GR8_REGS : \
+ ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '4') ? FDPIC_FPTR_REGS : \
+ ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '5') ? FDPIC_REGS : \
+ REG_CLASS_FROM_LETTER ((C)))
+
\f
/* Basic Stack Layout. */
to a smaller address. */
#define STACK_GROWS_DOWNWARD 1
-/* Define this macro if the addresses of local variable slots are at negative
- offsets from the frame pointer. */
-#define FRAME_GROWS_DOWNWARD
+/* Define this macro to nonzero if the addresses of local variable slots
+ are at negative offsets from the frame pointer. */
+#define FRAME_GROWS_DOWNWARD 1
/* Offset from the frame pointer to the first local variable slot to be
allocated.
address of other frames. */
#define RETURN_ADDR_RTX(COUNT, FRAMEADDR) frv_return_addr_rtx (COUNT, FRAMEADDR)
-/* This function contains machine specific function data. */
-struct machine_function GTY(())
-{
- /* True if we have created an rtx that relies on the stack frame. */
- int frame_needed;
-};
-
#define RETURN_POINTER_REGNUM LR_REGNO
/* A C expression whose value is RTL representing the location of the incoming
\f
/* Eliminating the Frame Pointer and the Arg Pointer. */
-/* A C expression which is nonzero if a function must have and use a frame
- pointer. This expression is evaluated in the reload pass. If its value is
- nonzero the function will have a frame pointer.
-
- The expression can in principle examine the current function and decide
- according to the facts, but on most machines the constant 0 or the constant
- 1 suffices. Use 0 when the machine allows code to be generated with no
- frame pointer, and doing so saves some time or space. Use 1 when there is
- no possible advantage to avoiding a frame pointer.
-
- In certain cases, the compiler does not know how to produce valid code
- without a frame pointer. The compiler recognizes those cases and
- automatically gives the function a frame pointer regardless of what
- `FRAME_POINTER_REQUIRED' says. You don't need to worry about them.
-
- In a function that does not require a frame pointer, the frame pointer
- register can be allocated for ordinary usage, unless you mark it as a fixed
- register. See `FIXED_REGISTERS' for more information. */
-#define FRAME_POINTER_REQUIRED frv_frame_pointer_required ()
-
/* If defined, this macro specifies a table of register pairs used to eliminate
unneeded registers that point into the stack frame. If it is not defined,
the only elimination attempted by the compiler is to replace references to
{FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
}
-/* A C expression that returns nonzero if the compiler is allowed to try to
- replace register number FROM with register number TO. This macro need only
- be defined if `ELIMINABLE_REGS' is defined, and will usually be the constant
- 1, since most of the cases preventing register elimination are things that
- the compiler already knows about. */
-
-#define CAN_ELIMINATE(FROM, TO) \
- ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
- ? ! frame_pointer_needed \
- : 1)
-
/* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It specifies the
initial difference between the specified pair of registers. This macro must
be defined if `ELIMINABLE_REGS' is defined. */
/* If defined, the maximum amount of space required for outgoing arguments will
be computed and placed into the variable
- `current_function_outgoing_args_size'. No space will be pushed onto the
+ `crtl->outgoing_args_size'. No space will be pushed onto the
stack for each call; instead, the function prologue should increase the
stack frame size by this amount.
#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
frv_function_arg (&CUM, MODE, TYPE, NAMED, TRUE)
-/* A C expression for the number of words, at the beginning of an argument,
- must be put in registers. The value must be zero for arguments that are
- passed entirely in registers or that are entirely pushed on the stack.
-
- On some machines, certain arguments must be passed partially in registers
- and partially in memory. On these machines, typically the first N words of
- arguments are passed in registers, and the rest on the stack. If a
- multi-word argument (a `double' or a structure) crosses that boundary, its
- first few words must be passed in registers and the rest must be pushed.
- This macro tells the compiler when this occurs, and how many of the words
- should go in registers.
-
- `FUNCTION_ARG' for these arguments should return the first register to be
- used by the caller for this argument; likewise `FUNCTION_INCOMING_ARG', for
- the called function. */
-#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
- frv_function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
-
-/* extern int frv_function_arg_partial_nregs (CUMULATIVE_ARGS, int, Tree, int); */
-
/* A C type for declaring a variable that is used as the first argument of
`FUNCTION_ARG' and other related values. For some target machines, the type
`int' suffices and can hold the number of bytes of argument so far.
function call. */
#define RETURN_VALUE_REGNUM (GPR_FIRST + 8)
-/* A C expression to create an RTX representing the place where a function
- returns a value of data type VALTYPE. VALTYPE is a tree node representing a
- data type. Write `TYPE_MODE (VALTYPE)' to get the machine mode used to
- represent that type. On many machines, only the mode is relevant.
- (Actually, on most machines, scalar values are returned in the same place
- regardless of mode).
-
- If `TARGET_PROMOTE_FUNCTION_RETURN' is defined to return true, you
- must apply the same promotion rules specified in `PROMOTE_MODE' if
- VALTYPE is a scalar type.
-
- If the precise function being called is known, FUNC is a tree node
- (`FUNCTION_DECL') for it; otherwise, FUNC is a null pointer. This makes it
- possible to use a different value-returning convention for specific
- functions when all their calls are known.
-
- `FUNCTION_VALUE' is not used for return vales with aggregate data types,
- because these are returned in another way. See
- `TARGET_STRUCT_VALUE_RTX' and related macros, below. */
-#define FUNCTION_VALUE(VALTYPE, FUNC) \
- gen_rtx_REG (TYPE_MODE (VALTYPE), RETURN_VALUE_REGNUM)
-
-/* A C expression to create an RTX representing the place where a library
- function returns a value of mode MODE.
-
- Note that "library function" in this context means a compiler support
- routine, used to perform arithmetic, whose name is known specially by the
- compiler and was not mentioned in the C code being compiled.
-
- The definition of `LIBRARY_VALUE' need not be concerned aggregate data
- types, because none of the library functions returns such types. */
-#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RETURN_VALUE_REGNUM)
-
-/* A C expression that is nonzero if REGNO is the number of a hard register in
- which the values of called function may come back.
-
- A register whose use for returning values is limited to serving as the
- second of a pair (for a value of type `double', say) need not be recognized
- by this macro. So for most machines, this definition suffices:
-
- #define FUNCTION_VALUE_REGNO_P(N) ((N) == RETURN)
-
- If the machine has register windows, so that the caller and the called
- function use different registers for the return value, this macro should
- recognize only the caller's register numbers. */
-#define FUNCTION_VALUE_REGNO_P(REGNO) ((REGNO) == RETURN_VALUE_REGNUM)
+#define FUNCTION_VALUE_REGNO_P(REGNO) frv_function_value_regno_p (REGNO)
\f
/* How Large Values are Returned. */
-/* The number of the register that is used to to pass the structure
+/* The number of the register that is used to pass the structure
value address. */
#define FRV_STRUCT_VALUE_REGNUM (GPR_FIRST + 3)
#define FUNCTION_PROFILER(FILE, LABELNO)
-\f
-/* Implementing the Varargs Macros. */
-
-/* Implement the stdarg/varargs va_start macro. STDARG_P is nonzero if this
- is stdarg.h instead of varargs.h. VALIST is the tree of the va_list
- variable to initialize. NEXTARG is the machine independent notion of the
- 'next' argument after the variable arguments. If not defined, a standard
- implementation will be defined that works for arguments passed on the stack. */
-
-#define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG) \
- (frv_expand_builtin_va_start(VALIST, NEXTARG))
-
-\f
/* Trampolines for Nested Functions. */
/* A C expression for the size in bytes of the trampoline, as an integer. */
aligning trampolines. */
#define TRAMPOLINE_ALIGNMENT (TARGET_FDPIC ? 64 : 32)
-/* A C statement to initialize the variable parts of a trampoline. ADDR is an
- RTX for the address of the trampoline; FNADDR is an RTX for the address of
- the nested function; STATIC_CHAIN is an RTX for the static chain value that
- should be passed to the function when it is called. */
-#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \
- frv_initialize_trampoline (ADDR, FNADDR, STATIC_CHAIN)
-
/* Define this macro if trampolines need a special subroutine to do their work.
The macro should expand to a series of `asm' statements which will be
compiled with GCC. They go in a library function named
\f
/* Addressing Modes. */
-/* A C expression that is 1 if the RTX X is a constant which is a valid
- address. On most machines, this can be defined as `CONSTANT_P (X)', but a
- few machines are more restrictive in which constant addresses are supported.
-
- `CONSTANT_P' accepts integer-values expressions whose values are not
- explicitly known, such as `symbol_ref', `label_ref', and `high' expressions
- and `const' arithmetic expressions, in addition to `const_int' and
- `const_double' expressions. */
-#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
-
/* A number, the maximum number of registers that can appear in a valid memory
address. Note that it is up to you to specify a value equal to the maximum
- number that `GO_IF_LEGITIMATE_ADDRESS' would ever accept. */
+ number that `TARGET_LEGITIMATE_ADDRESS_P' would ever accept. */
#define MAX_REGS_PER_ADDRESS 2
-/* A C compound statement with a conditional `goto LABEL;' executed if X (an
- RTX) is a legitimate memory address on the target machine for a memory
- operand of mode MODE.
-
- It usually pays to define several simpler macros to serve as subroutines for
- this one. Otherwise it may be too complicated to understand.
-
- This macro must exist in two variants: a strict variant and a non-strict
- one. The strict variant is used in the reload pass. It must be defined so
- that any pseudo-register that has not been allocated a hard register is
- considered a memory reference. In contexts where some kind of register is
- required, a pseudo-register with no hard register must be rejected.
-
- The non-strict variant is used in other passes. It must be defined to
- accept all pseudo-registers in every context where some kind of register is
- required.
-
- Compiler source files that want to use the strict variant of this macro
- define the macro `REG_OK_STRICT'. You should use an `#ifdef REG_OK_STRICT'
- conditional to define the strict variant in that case and the non-strict
- variant otherwise.
-
- Subroutines to check for acceptable registers for various purposes (one for
- base registers, one for index registers, and so on) are typically among the
- subroutines used to define `GO_IF_LEGITIMATE_ADDRESS'. Then only these
- subroutine macros need have two variants; the higher levels of macros may be
- the same whether strict or not.
-
- Normally, constant addresses which are the sum of a `symbol_ref' and an
- integer are stored inside a `const' RTX to mark them as constant.
- Therefore, there is no need to recognize such sums specifically as
- legitimate addresses. Normally you would simply recognize any `const' as
- legitimate.
-
- Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle constant sums that
- are not marked with `const'. It assumes that a naked `plus' indicates
- indexing. If so, then you *must* reject such naked constant sums as
- illegitimate addresses, so that none of them will be given to
- `PRINT_OPERAND_ADDRESS'.
-
- On some machines, whether a symbolic address is legitimate depends on the
- section that the address refers to. On these machines, define the macro
- `ENCODE_SECTION_INFO' to store the information into the `symbol_ref', and
- then check for it here. When you see a `const', you will have to look
- inside it to find the `symbol_ref' in order to determine the section.
-
- The best way to modify the name string is by adding text to the beginning,
- with suitable punctuation to prevent any ambiguity. Allocate the new name
- in `saveable_obstack'. You will have to modify `ASM_OUTPUT_LABELREF' to
- remove and decode the added text and output the name accordingly, and define
- `(* targetm.strip_name_encoding)' to access the original name string.
-
- You can check the information stored here into the `symbol_ref' in the
- definitions of the macros `GO_IF_LEGITIMATE_ADDRESS' and
- `PRINT_OPERAND_ADDRESS'. */
-
-#ifdef REG_OK_STRICT
-#define REG_OK_STRICT_P 1
-#else
-#define REG_OK_STRICT_P 0
-#endif
-
-#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
- do \
- { \
- if (frv_legitimate_address_p (MODE, X, REG_OK_STRICT_P, \
- FALSE, FALSE)) \
- goto LABEL; \
- } \
- while (0)
-
/* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
use as a base register. For hard registers, it should always accept those
which the hardware permits and reject the others. Whether the macro accepts
will reload one or both registers only if neither labeling works. */
#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X)
-#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
-do { \
- rtx new_x = frv_legitimize_address (X, OLDX, MODE); \
- if (new_x) \
- { \
- (X) = new_x; \
- goto WIN; \
- } \
-} while (0)
-
#define FIND_BASE_TERM frv_find_base_term
-/* A C statement or compound statement with a conditional `goto LABEL;'
- executed if memory address X (an RTX) can have different meanings depending
- on the machine mode of the memory reference it is used for or if the address
- is valid for some modes but not others.
-
- Autoincrement and autodecrement addresses typically have mode-dependent
- effects because the amount of the increment or decrement is the size of the
- operand being addressed. Some machines have other mode-dependent addresses.
- Many RISC machines have no mode-dependent addresses.
-
- You may assume that ADDR is a valid address for the machine. */
-#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
-
/* A C expression that is nonzero if X is a legitimate constant for an
immediate operand on the target machine. You can assume that X satisfies
`CONSTANT_P', so you need not check this. In fact, `1' is a suitable
#define HAVE_PRE_MODIFY_REG 1
\f
-/* Returns a mode from class `MODE_CC' to be used when comparison operation
- code OP is applied to rtx X and Y. For example, on the SPARC,
- `SELECT_CC_MODE' is defined as (see *note Jump Patterns::. for a
- description of the reason for this definition)
-
- #define SELECT_CC_MODE(OP,X,Y) \
- (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
- ? ((OP == EQ || OP == NE) ? CCFPmode : CCFPEmode) \
- : ((GET_CODE (X) == PLUS || GET_CODE (X) == MINUS \
- || GET_CODE (X) == NEG) \
- ? CC_NOOVmode : CCmode))
-
- You need not define this macro if `EXTRA_CC_MODES' is not defined. */
+/* We define extra CC modes in frv-modes.def so we need a selector. */
+
#define SELECT_CC_MODE frv_select_cc_mode
/* A C expression whose value is one if it is always safe to reverse a
/* A C expression for the cost of a branch instruction. A value of 1 is the
default; other values are interpreted relative to that. */
-
-/* Here are additional macros which do not specify precise relative costs, but
- only that certain actions are more expensive than GCC would ordinarily
- expect. */
-
-/* We used to default the branch cost to 2, but I changed it to 1, to avoid
- generating SCC instructions and or/and-ing them together, and then doing the
- branch on the result, which collectively generate much worse code. */
-#ifndef DEFAULT_BRANCH_COST
-#define DEFAULT_BRANCH_COST 1
-#endif
-
-#define BRANCH_COST frv_branch_cost_int
+#define BRANCH_COST(speed_p, predictable_p) frv_branch_cost_int
/* Define this macro as a C expression which is nonzero if accessing less than
a word of memory (i.e. a `char' or a `short') is no faster than accessing a
program so they can be changed program startup time if the program is loaded
at a different address than linked for. */
#define FIXUP_SECTION_ASM_OP "\t.section .rofixup,\"a\""
-
-/* A list of names for sections other than the standard two, which are
- `in_text' and `in_data'. You need not define this macro
- on a system with no other sections (that GCC needs to use). */
-#undef EXTRA_SECTIONS
-#define EXTRA_SECTIONS in_sdata, in_const, in_fixup
-
-/* One or more functions to be defined in "varasm.c". These
- functions should do jobs analogous to those of `text_section' and
- `data_section', for your additional sections. Do not define this
- macro if you do not define `EXTRA_SECTIONS'. */
-#undef EXTRA_SECTION_FUNCTIONS
-#define EXTRA_SECTION_FUNCTIONS \
- SDATA_SECTION_FUNCTION \
- FIXUP_SECTION_FUNCTION
-
-#define SDATA_SECTION_FUNCTION \
-void \
-sdata_section (void) \
-{ \
- if (in_section != in_sdata) \
- { \
- fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
- in_section = in_sdata; \
- } \
-}
-
-#define FIXUP_SECTION_FUNCTION \
-void \
-fixup_section (void) \
-{ \
- if (in_section != in_fixup) \
- { \
- fprintf (asm_out_file, "%s\n", FIXUP_SECTION_ASM_OP); \
- in_section = in_fixup; \
- } \
-}
\f
/* Position Independent Code. */
#define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \
do { \
if ((SIZE) > 0 && (SIZE) <= g_switch_value) \
- named_section (0, ".sbss", 0); \
+ switch_to_section (get_named_section (NULL, ".sbss", 0)); \
else \
- bss_section (); \
+ switch_to_section (bss_section); \
ASM_OUTPUT_ALIGN (STREAM, floor_log2 ((ALIGN) / BITS_PER_UNIT)); \
ASM_DECLARE_OBJECT_NAME (STREAM, NAME, DECL); \
ASM_OUTPUT_SKIP (STREAM, (SIZE) ? (SIZE) : 1); \
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
fprintf (STREAM, "\t.word .L%d\n", VALUE)
-/* Define this if the label before a jump-table needs to be output specially.
- The first three arguments are the same as for `(*targetm.asm_out.internal_label)';
- the fourth argument is the jump-table which follows (a `jump_insn'
- containing an `addr_vec' or `addr_diff_vec').
-
- This feature is used on system V to output a `swbeg' statement for the
- table.
-
- If this macro is not defined, these labels are output with
- `(*targetm.asm_out.internal_label)'.
-
- Defined in svr4.h. */
-/* When generating embedded PIC or mips16 code we want to put the jump
- table in the .text section. In all other cases, we want to put the
- jump table in the .rdata section. Unfortunately, we can't use
- JUMP_TABLES_IN_TEXT_SECTION, because it is not conditional.
- Instead, we use ASM_OUTPUT_CASE_LABEL to switch back to the .text
- section if appropriate. */
-
-#undef ASM_OUTPUT_CASE_LABEL
-#define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
-do { \
- if (flag_pic) \
- function_section (current_function_decl); \
- (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM); \
-} while (0)
-
+#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
\f
/* Assembler Commands for Exception Regions. */
\f
/* Miscellaneous Parameters. */
-/* Define this if you have defined special-purpose predicates in the file
- `MACHINE.c'. This macro is called within an initializer of an array of
- structures. The first field in the structure is the name of a predicate and
- the second field is an array of rtl codes. For each predicate, list all rtl
- codes that can be in expressions matched by the predicate. The list should
- have a trailing comma. Here is an example of two entries in the list for a
- typical RISC machine:
-
- #define PREDICATE_CODES \
- {"gen_reg_rtx_operand", {SUBREG, REG}}, \
- {"reg_or_short_cint_operand", {SUBREG, REG, CONST_INT}},
-
- Defining this macro does not affect the generated code (however, incorrect
- definitions that omit an rtl code that may be matched by the predicate can
- cause the compiler to malfunction). Instead, it allows the table built by
- `genrecog' to be more compact and efficient, thus speeding up the compiler.
- The most important predicates to include in the list specified by this macro
- are thoses used in the most insn patterns. */
-#define PREDICATE_CODES \
- { "integer_register_operand", { REG, SUBREG }}, \
- { "frv_load_operand", { REG, SUBREG, MEM }}, \
- { "gpr_no_subreg_operand", { REG }}, \
- { "gpr_or_fpr_operand", { REG, SUBREG }}, \
- { "gpr_or_int12_operand", { REG, SUBREG, CONST_INT }}, \
- { "gpr_fpr_or_int12_operand", { REG, SUBREG, CONST_INT }}, \
- { "gpr_or_int10_operand", { REG, SUBREG, CONST_INT }}, \
- { "gpr_or_int_operand", { REG, SUBREG, CONST_INT }}, \
- { "move_source_operand", { REG, SUBREG, CONST_INT, MEM, \
- CONST_DOUBLE, CONST, \
- SYMBOL_REF, LABEL_REF }}, \
- { "move_destination_operand", { REG, SUBREG, MEM }}, \
- { "condexec_source_operand", { REG, SUBREG, CONST_INT, MEM, \
- CONST_DOUBLE }}, \
- { "condexec_dest_operand", { REG, SUBREG, MEM }}, \
- { "reg_or_0_operand", { REG, SUBREG, CONST_INT }}, \
- { "lr_operand", { REG }}, \
- { "gpr_or_memory_operand", { REG, SUBREG, MEM }}, \
- { "fpr_or_memory_operand", { REG, SUBREG, MEM }}, \
- { "int12_operand", { CONST_INT }}, \
- { "int_2word_operand", { CONST_INT, CONST_DOUBLE, \
- SYMBOL_REF, LABEL_REF, CONST }}, \
- { "fdpic_operand", { REG }}, \
- { "fdpic_fptr_operand", { REG }}, \
- { "ldd_address_operand", { REG, SUBREG, PLUS }}, \
- { "got12_operand", { CONST }}, \
- { "const_unspec_operand", { CONST }}, \
- { "icc_operand", { REG }}, \
- { "fcc_operand", { REG }}, \
- { "cc_operand", { REG }}, \
- { "icr_operand", { REG }}, \
- { "fcr_operand", { REG }}, \
- { "cr_operand", { REG }}, \
- { "fpr_operand", { REG, SUBREG }}, \
- { "even_reg_operand", { REG, SUBREG }}, \
- { "odd_reg_operand", { REG, SUBREG }}, \
- { "even_gpr_operand", { REG, SUBREG }}, \
- { "odd_gpr_operand", { REG, SUBREG }}, \
- { "quad_fpr_operand", { REG, SUBREG }}, \
- { "even_fpr_operand", { REG, SUBREG }}, \
- { "odd_fpr_operand", { REG, SUBREG }}, \
- { "dbl_memory_one_insn_operand", { MEM }}, \
- { "dbl_memory_two_insn_operand", { MEM }}, \
- { "call_operand", { REG, SUBREG, CONST_INT, \
- CONST, SYMBOL_REF }}, \
- { "sibcall_operand", { REG, SUBREG, CONST_INT, \
- CONST }}, \
- { "upper_int16_operand", { CONST_INT }}, \
- { "uint16_operand", { CONST_INT }}, \
- { "relational_operator", { EQ, NE, LE, LT, GE, GT, \
- LEU, LTU, GEU, GTU }}, \
- { "integer_relational_operator", { EQ, NE, LE, LT, GE, GT, \
- LEU, LTU, GEU, GTU }}, \
- { "float_relational_operator", { EQ, NE, LE, LT, GE, GT }}, \
- { "ccr_eqne_operator", { EQ, NE }}, \
- { "minmax_operator", { SMIN, SMAX, UMIN, UMAX }}, \
- { "condexec_si_binary_operator", { PLUS, MINUS, AND, IOR, XOR, \
- ASHIFT, ASHIFTRT, LSHIFTRT }}, \
- { "condexec_si_media_operator", { AND, IOR, XOR }}, \
- { "condexec_si_divide_operator", { DIV, UDIV }}, \
- { "condexec_si_unary_operator", { NOT, NEG }}, \
- { "condexec_sf_add_operator", { PLUS, MINUS }}, \
- { "condexec_sf_conv_operator", { ABS, NEG }}, \
- { "intop_compare_operator", { PLUS, MINUS, AND, IOR, XOR, \
- ASHIFT, ASHIFTRT, LSHIFTRT }}, \
- { "fpr_or_int6_operand", { REG, SUBREG, CONST_INT }}, \
- { "int6_operand", { CONST_INT }}, \
- { "int5_operand", { CONST_INT }}, \
- { "uint5_operand", { CONST_INT }}, \
- { "uint4_operand", { CONST_INT }}, \
- { "uint1_operand", { CONST_INT }}, \
- { "acc_operand", { REG, SUBREG }}, \
- { "even_acc_operand", { REG, SUBREG }}, \
- { "quad_acc_operand", { REG, SUBREG }}, \
- { "accg_operand", { REG, SUBREG }},
-
/* An alias for a machine mode name. This is the machine mode that elements of
a jump-table should have. */
#define CASE_VECTOR_MODE SImode
cc0, and 1 if it does use cc0. */
#define MAX_CONDITIONAL_EXECUTE frv_condexec_insns
-/* Default value of MAX_CONDITIONAL_EXECUTE if no -mcond-exec-insns= */
-#define DEFAULT_CONDEXEC_INSNS 8
-
/* A C expression to modify the code described by the conditional if
information CE_INFO, possibly updating the tests in TRUE_EXPR, and
FALSE_EXPR for converting if-then and if-then-else code to conditional
FRV_BUILTIN_IACCreadl,
FRV_BUILTIN_IACCsetll,
FRV_BUILTIN_IACCsetl,
- FRV_BUILTIN_SCAN
+ FRV_BUILTIN_SCAN,
+ FRV_BUILTIN_READ8,
+ FRV_BUILTIN_READ16,
+ FRV_BUILTIN_READ32,
+ FRV_BUILTIN_READ64,
+ FRV_BUILTIN_WRITE8,
+ FRV_BUILTIN_WRITE16,
+ FRV_BUILTIN_WRITE32,
+ FRV_BUILTIN_WRITE64
};
#define FRV_BUILTIN_FIRST_NONMEDIA FRV_BUILTIN_SMUL
/* Enable prototypes on the call rtl functions. */
#define MD_CALL_PROTOTYPES 1
-extern GTY(()) rtx frv_compare_op0; /* operand save for */
-extern GTY(()) rtx frv_compare_op1; /* comparison generation */
-
#define CPU_UNITS_QUERY 1
#ifdef __FRV_FDPIC__
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