/* Definitions for the Blackfin port.
- Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
+ Copyright (C) 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
Contributed by Analog Devices.
This file is part of GCC.
#define BRT 1
#define BRF 0
+/* CPU type. */
+typedef enum bfin_cpu_type
+{
+ BFIN_CPU_UNKNOWN,
+ BFIN_CPU_BF512,
+ BFIN_CPU_BF514,
+ BFIN_CPU_BF516,
+ BFIN_CPU_BF518,
+ BFIN_CPU_BF522,
+ BFIN_CPU_BF523,
+ BFIN_CPU_BF524,
+ BFIN_CPU_BF525,
+ BFIN_CPU_BF526,
+ BFIN_CPU_BF527,
+ BFIN_CPU_BF531,
+ BFIN_CPU_BF532,
+ BFIN_CPU_BF533,
+ BFIN_CPU_BF534,
+ BFIN_CPU_BF536,
+ BFIN_CPU_BF537,
+ BFIN_CPU_BF538,
+ BFIN_CPU_BF539,
+ BFIN_CPU_BF542,
+ BFIN_CPU_BF542M,
+ BFIN_CPU_BF544,
+ BFIN_CPU_BF544M,
+ BFIN_CPU_BF547,
+ BFIN_CPU_BF547M,
+ BFIN_CPU_BF548,
+ BFIN_CPU_BF548M,
+ BFIN_CPU_BF549,
+ BFIN_CPU_BF549M,
+ BFIN_CPU_BF561
+} bfin_cpu_t;
+
+/* Value of -mcpu= */
+extern bfin_cpu_t bfin_cpu_type;
+
+/* Value of -msi-revision= */
+extern int bfin_si_revision;
+
+extern unsigned int bfin_workarounds;
+
/* Print subsidiary information on the compiler version in use. */
#define TARGET_VERSION fprintf (stderr, " (BlackFin bfin)")
extern int target_flags;
-#ifndef DEFAULT_CPU_TYPE
-#define DEFAULT_CPU_TYPE BFIN_CPU_BF532
-#endif
-
/* Predefinition in the preprocessor for this target machine */
#ifndef TARGET_CPU_CPP_BUILTINS
#define TARGET_CPU_CPP_BUILTINS() \
\
switch (bfin_cpu_type) \
{ \
+ case BFIN_CPU_BF512: \
+ builtin_define ("__ADSPBF512__"); \
+ builtin_define ("__ADSPBF51x__"); \
+ break; \
+ case BFIN_CPU_BF514: \
+ builtin_define ("__ADSPBF514__"); \
+ builtin_define ("__ADSPBF51x__"); \
+ break; \
+ case BFIN_CPU_BF516: \
+ builtin_define ("__ADSPBF516__"); \
+ builtin_define ("__ADSPBF51x__"); \
+ break; \
+ case BFIN_CPU_BF518: \
+ builtin_define ("__ADSPBF518__"); \
+ builtin_define ("__ADSPBF51x__"); \
+ break; \
case BFIN_CPU_BF522: \
builtin_define ("__ADSPBF522__"); \
builtin_define ("__ADSPBF52x__"); \
case BFIN_CPU_BF539: \
builtin_define ("__ADSPBF539__"); \
break; \
+ case BFIN_CPU_BF542M: \
+ builtin_define ("__ADSPBF542M__"); \
case BFIN_CPU_BF542: \
builtin_define ("__ADSPBF542__"); \
builtin_define ("__ADSPBF54x__"); \
break; \
+ case BFIN_CPU_BF544M: \
+ builtin_define ("__ADSPBF544M__"); \
case BFIN_CPU_BF544: \
builtin_define ("__ADSPBF544__"); \
builtin_define ("__ADSPBF54x__"); \
break; \
- case BFIN_CPU_BF548: \
- builtin_define ("__ADSPBF548__"); \
- builtin_define ("__ADSPBF54x__"); \
- break; \
+ case BFIN_CPU_BF547M: \
+ builtin_define ("__ADSPBF547M__"); \
case BFIN_CPU_BF547: \
builtin_define ("__ADSPBF547__"); \
builtin_define ("__ADSPBF54x__"); \
break; \
+ case BFIN_CPU_BF548M: \
+ builtin_define ("__ADSPBF548M__"); \
+ case BFIN_CPU_BF548: \
+ builtin_define ("__ADSPBF548__"); \
+ builtin_define ("__ADSPBF54x__"); \
+ break; \
+ case BFIN_CPU_BF549M: \
+ builtin_define ("__ADSPBF549M__"); \
case BFIN_CPU_BF549: \
builtin_define ("__ADSPBF549__"); \
builtin_define ("__ADSPBF54x__"); \
if (bfin_si_revision != -1) \
{ \
/* space of 0xnnnn and a NUL */ \
- char *buf = alloca (7); \
+ char *buf = XALLOCAVEC (char, 7); \
\
sprintf (buf, "0x%04x", bfin_si_revision); \
builtin_define_with_value ("__SILICON_REVISION__", buf, 0); \
builtin_define ("__WORKAROUND_SPECULATIVE_LOADS"); \
if (ENABLE_WA_SPECULATIVE_SYNCS) \
builtin_define ("__WORKAROUND_SPECULATIVE_SYNCS"); \
+ if (ENABLE_WA_INDIRECT_CALLS) \
+ builtin_define ("__WORKAROUND_INDIRECT_CALLS"); \
+ if (ENABLE_WA_RETS) \
+ builtin_define ("__WORKAROUND_RETS"); \
\
if (TARGET_FDPIC) \
{ \
builtin_define ("__ID_SHARED_LIB__"); \
if (flag_no_builtin) \
builtin_define ("__NO_BUILTIN"); \
+ if (TARGET_MULTICORE) \
+ builtin_define ("__BFIN_MULTICORE"); \
+ if (TARGET_COREA) \
+ builtin_define ("__BFIN_COREA"); \
+ if (TARGET_COREB) \
+ builtin_define ("__BFIN_COREB"); \
+ if (TARGET_SDRAM) \
+ builtin_define ("__BFIN_SDRAM"); \
} \
while (0)
#endif
#define DRIVER_SELF_SPECS SUBTARGET_DRIVER_SELF_SPECS "\
- %{!mcpu=*:-mcpu=bf532} \
%{mleaf-id-shared-library:%{!mid-shared-library:-mid-shared-library}} \
%{mfdpic:%{!fpic:%{!fpie:%{!fPIC:%{!fPIE:\
%{!fno-pic:%{!fno-pie:%{!fno-PIC:%{!fno-PIE:-fpie}}}}}}}}} \
found in the variable crtl->outgoing_args_size. */
#define ACCUMULATE_OUTGOING_ARGS 1
-/* Value should be nonzero if functions must have frame pointers.
- Zero means the frame pointer need not be set up (and parms
- may be accessed via the stack pointer) in functions that seem suitable.
- This is computed in `reload', in reload1.c.
-*/
-#define FRAME_POINTER_REQUIRED (bfin_frame_pointer_required ())
-
/*#define DATA_ALIGNMENT(TYPE, BASIC-ALIGN) for arrays.. */
/* If defined, a C expression to compute the alignment for a local
&& (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
#define TRAMPOLINE_SIZE (TARGET_FDPIC ? 30 : 18)
-#define TRAMPOLINE_TEMPLATE(FILE) \
- if (TARGET_FDPIC) \
- { \
- fprintf(FILE, "\t.dd\t0x00000000\n"); /* 0 */ \
- fprintf(FILE, "\t.dd\t0x00000000\n"); /* 0 */ \
- fprintf(FILE, "\t.dd\t0x0000e109\n"); /* p1.l = fn low */ \
- fprintf(FILE, "\t.dd\t0x0000e149\n"); /* p1.h = fn high */ \
- fprintf(FILE, "\t.dd\t0x0000e10a\n"); /* p2.l = sc low */ \
- fprintf(FILE, "\t.dd\t0x0000e14a\n"); /* p2.h = sc high */ \
- fprintf(FILE, "\t.dw\t0xac4b\n"); /* p3 = [p1 + 4] */ \
- fprintf(FILE, "\t.dw\t0x9149\n"); /* p1 = [p1] */ \
- fprintf(FILE, "\t.dw\t0x0051\n"); /* jump (p1)*/ \
- } \
- else \
- { \
- fprintf(FILE, "\t.dd\t0x0000e109\n"); /* p1.l = fn low */ \
- fprintf(FILE, "\t.dd\t0x0000e149\n"); /* p1.h = fn high */ \
- fprintf(FILE, "\t.dd\t0x0000e10a\n"); /* p2.l = sc low */ \
- fprintf(FILE, "\t.dd\t0x0000e14a\n"); /* p2.h = sc high */ \
- fprintf(FILE, "\t.dw\t0x0051\n"); /* jump (p1)*/ \
- }
-
-#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
- initialize_trampoline (TRAMP, FNADDR, CXT)
\f
/* Definitions for register eliminations.
{ ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} \
-/* Given FROM and TO register numbers, say whether this elimination is
- allowed. Frame pointer elimination is automatically handled.
-
- All other eliminations are valid. */
-
-#define CAN_ELIMINATE(FROM, TO) \
- ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)
-
/* Define the offset between two registers, one to be eliminated, and the other
its replacement, at the start of a routine. */
: (REGNO) >= REG_RETS ? PROLOGUE_REGS \
: NO_REGS)
+/* The following macro defines cover classes for Integrated Register
+ Allocator. Cover classes is a set of non-intersected register
+ classes covering all hard registers used for register allocation
+ purpose. Any move between two registers of a cover class should be
+ cheaper than load or store of the registers. The macro value is
+ array of register classes with LIM_REG_CLASSES used as the end
+ marker. */
+
+#define IRA_COVER_CLASSES \
+{ \
+ MOST_REGS, AREGS, CCREGS, LIM_REG_CLASSES \
+}
+
/* When defined, the compiler allows registers explicitly used in the
rtl to be used as spill registers but prevents the compiler from
extending the lifetime of these registers. */
typedef enum {
SUBROUTINE, INTERRUPT_HANDLER, EXCPT_HANDLER, NMI_HANDLER
} e_funkind;
+#define FUNCTION_RETURN_REGISTERS { REG_RETS, REG_RETI, REG_RETX, REG_RETN }
#define FUNCTION_ARG_REGISTERS { REG_R0, REG_R1, REG_R2, -1 }
#define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_R0)
#define DEFAULT_PCC_STRUCT_RETURN 0
-#define TARGET_RETURN_IN_MEMORY bfin_return_in_memory
/* Before the prologue, the return address is in the RETS register. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, REG_RETS)
/* Addressing Modes */
-/* Recognize any constant value that is a valid address. */
-#define CONSTANT_ADDRESS_P(X) (CONSTANT_P (X))
-
/* Nonzero if the constant value X is a legitimate general operand.
symbol_ref are not legitimate and will be put into constant pool.
See force_const_mem().
/* A number, the maximum number of registers that can appear in a
valid memory address. Note that it is up to you to specify a
- value equal to the maximum number that `GO_IF_LEGITIMATE_ADDRESS'
+ value equal to the maximum number that `TARGET_LEGITIMATE_ADDRESS_P'
would ever accept. */
#define MAX_REGS_PER_ADDRESS 1
-/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
- that is a valid memory address for an instruction.
- The MODE argument is the machine mode for the MEM expression
- that wants to use this address.
-
- Blackfin addressing modes are as follows:
-
- [preg]
- [preg + imm16]
-
- B [ Preg + uimm15 ]
- W [ Preg + uimm16m2 ]
- [ Preg + uimm17m4 ]
-
- [preg++]
- [preg--]
- [--sp]
-*/
-
#define LEGITIMATE_MODE_FOR_AUTOINC_P(MODE) \
(GET_MODE_SIZE (MODE) <= 4 || (MODE) == PDImode)
-#ifdef REG_OK_STRICT
-#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
- do { \
- if (bfin_legitimate_address_p (MODE, X, 1)) \
- goto WIN; \
- } while (0);
-#else
-#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
- do { \
- if (bfin_legitimate_address_p (MODE, X, 0)) \
- goto WIN; \
- } while (0);
-#endif
-
-/* Try machine-dependent ways of modifying an illegitimate address
- to be legitimate. If we find one, return the new, valid address.
- This macro is used in only one place: `memory_address' in explow.c.
-
- OLDX is the address as it was before break_out_memory_refs was called.
- In some cases it is useful to look at this to decide what needs to be done.
-
- MODE and WIN are passed so that this macro can use
- GO_IF_LEGITIMATE_ADDRESS.
-
- It is always safe for this macro to do nothing. It exists to recognize
- opportunities to optimize the output.
- */
-#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
-do { \
- rtx _q = legitimize_address(X, OLDX, MODE); \
- if (_q) { X = _q; goto WIN; } \
-} while (0)
-
#define HAVE_POST_INCREMENT 1
#define HAVE_POST_DECREMENT 1
#define HAVE_PRE_DECREMENT 1
|| GET_CODE (X) == LABEL_REF \
|| (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
-/*
- A C statement or compound statement with a conditional `goto
- LABEL;' executed if memory address X (an RTX) can have different
- meanings depending on the machine mode of the memory reference it
- is used for or if the address is valid for some modes but not
- others.
-
- Autoincrement and autodecrement addresses typically have
- mode-dependent effects because the amount of the increment or
- decrement is the size of the operand being addressed. Some
- machines have other mode-dependent addresses. Many RISC machines
- have no mode-dependent addresses.
-
- You may assume that ADDR is a valid address for the machine.
-*/
-#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
-
#define NOTICE_UPDATE_CC(EXPR, INSN) 0
/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
/* If a memory-to-memory move would take MOVE_RATIO or more simple
move-instruction pairs, we will do a movmem or libcall instead. */
-#define MOVE_RATIO 5
+#define MOVE_RATIO(speed) 5
/* STORAGE LAYOUT: target machine storage layout
Define this macro as a C expression which is nonzero if accessing
#define ASM_OUTPUT_REG_PUSH(FILE, REGNO) fprintf (FILE, "[SP--] = %s;\n", reg_names[REGNO])
#define ASM_OUTPUT_REG_POP(FILE, REGNO) fprintf (FILE, "%s = [SP++];\n", reg_names[REGNO])
-extern struct rtx_def *bfin_compare_op0, *bfin_compare_op1;
extern struct rtx_def *bfin_cc_rtx, *bfin_rets_rtx;
/* This works for GAS and some other assemblers. */
#define SIZE_ASM_OP "\t.size\t"
-extern int splitting_for_sched;
+extern int splitting_for_sched, splitting_loops;
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) ((CHAR) == '!')
+#ifndef TARGET_SUPPORTS_SYNC_CALLS
+#define TARGET_SUPPORTS_SYNC_CALLS 0
+#endif
+
#endif /* _BFIN_CONFIG */