PR target/40603

[pf3gnuchains/gcc-fork.git] / gcc / config / arm / predicates.md

diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md
index d351f44..a60da9a 100644 (file)
--- a/gcc/config/arm/predicates.md
+++ b/gcc/config/arm/predicates.md
@@ -94,6 +94,10 @@
   (and (match_code "const_int")
        (match_test "const_ok_for_arm (~INTVAL (op))")))
 
+(define_predicate "const0_operand"
+  (and (match_code "const_int")
+       (match_test "INTVAL (op) == 0")))
+
 ;; Something valid on the RHS of an ARM data-processing instruction
 (define_predicate "arm_rhs_operand"
   (ior (match_operand 0 "s_register_operand")
@@ -203,6 +207,9 @@
                         && (TARGET_FPA || TARGET_VFP)")
             (match_code "unordered,ordered,unlt,unle,unge,ungt"))))
 
+(define_special_predicate "lt_ge_comparison_operator"
+  (match_code "lt,ge"))
+
 (define_special_predicate "minmax_operator"
   (and (match_code "smin,smax,umin,umax")
        (match_test "mode == GET_MODE (op)")))