/* Definitions of target machine for GNU compiler, for DEC Alpha.
Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000 Free Software Foundation, Inc.
+ 2000, 2001 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
This file is part of GNU CC.
Boston, MA 02111-1307, USA. */
+/* For C++ we need to ensure that __LANGUAGE_C_PLUS_PLUS is defined independent
+ of the source file extension. */
+#define CPLUSPLUS_CPP_SPEC "\
+-D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus \
+%(cpp) \
+"
+
/* Write out the correct language type definition for the header files.
Unless we have assembler language, write out the symbols for C. */
#define CPP_SPEC "\
%{!undef:\
%{.S:-D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY }}\
-%{.cc|.cxx|.C:-D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus }\
%{.m:-D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C }\
-%{!.S:%{!.cc:%{!.cxx:%{!.C:%{!.m:-D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C }}}}}}\
+%{!.S:%{!.cc:%{!.cxx:%{!.cpp:%{!.cp:%{!.c++:%{!.C:%{!.m:-D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C }}}}}}}}}\
%{mieee:-D_IEEE_FP }\
%{mieee-with-inexact:-D_IEEE_FP -D_IEEE_FP_INEXACT }}\
%(cpp_cpu) %(cpp_subtarget)"
#ifndef TARGET_PROFILING_NEEDS_GP
#define TARGET_PROFILING_NEEDS_GP 0
#endif
+#ifndef TARGET_LD_BUGGY_LDGP
+#define TARGET_LD_BUGGY_LDGP 0
+#endif
/* Macro to define tables used to set the flags.
This is a list in braces of pairs in braces,
/* Attempt to describe CPU characteristics to the preprocessor. */
/* Corresponding to amask... */
-#define CPP_AM_BWX_SPEC "-D__alpha_bwx__ -Acpu(bwx)"
-#define CPP_AM_MAX_SPEC "-D__alpha_max__ -Acpu(max)"
-#define CPP_AM_FIX_SPEC "-D__alpha_fix__ -Acpu(fix)"
-#define CPP_AM_CIX_SPEC "-D__alpha_cix__ -Acpu(cix)"
+#define CPP_AM_BWX_SPEC "-D__alpha_bwx__ -Acpu=bwx"
+#define CPP_AM_MAX_SPEC "-D__alpha_max__ -Acpu=max"
+#define CPP_AM_FIX_SPEC "-D__alpha_fix__ -Acpu=fix"
+#define CPP_AM_CIX_SPEC "-D__alpha_cix__ -Acpu=cix"
/* Corresponding to implver... */
-#define CPP_IM_EV4_SPEC "-D__alpha_ev4__ -Acpu(ev4)"
-#define CPP_IM_EV5_SPEC "-D__alpha_ev5__ -Acpu(ev5)"
-#define CPP_IM_EV6_SPEC "-D__alpha_ev6__ -Acpu(ev6)"
+#define CPP_IM_EV4_SPEC "-D__alpha_ev4__ -Acpu=ev4"
+#define CPP_IM_EV5_SPEC "-D__alpha_ev5__ -Acpu=ev5"
+#define CPP_IM_EV6_SPEC "-D__alpha_ev6__ -Acpu=ev6"
/* Common combinations. */
#define CPP_CPU_EV4_SPEC "%(cpp_im_ev4)"
#ifndef CPP_CPU_SPEC
#define CPP_CPU_SPEC "\
-%{!undef:-Acpu(alpha) -Amachine(alpha) -D__alpha -D__alpha__ \
+%{!undef:-Acpu=alpha -Amachine=alpha -D__alpha -D__alpha__ \
%{mcpu=ev4|mcpu=21064:%(cpp_cpu_ev4) }\
%{mcpu=ev5|mcpu=21164:%(cpp_cpu_ev5) }\
%{mcpu=ev56|mcpu=21164a:%(cpp_cpu_ev56) }\
/* Define to enable software floating point emulation. */
#define REAL_ARITHMETIC
-/* The following #defines are used when compiling the routines in
- libgcc1.c. Since the Alpha calling conventions require single
- precision floats to be passed in the floating-point registers
- (rather than in the general registers) we have to build the
- libgcc1.c routines in such a way that they know the actual types
- of their formal arguments and the actual types of their return
- values. Otherwise, gcc will generate calls to the libgcc1.c
- routines, passing arguments in the floating-point registers,
- but the libgcc1.c routines will expect their arguments on the
- stack (where the Alpha calling conventions require structs &
- unions to be passed). */
-
-#define FLOAT_VALUE_TYPE double
-#define INTIFY(FLOATVAL) (FLOATVAL)
-#define FLOATIFY(INTVAL) (INTVAL)
-#define FLOAT_ARG_TYPE double
-
/* Define the size of `int'. The default is the same as the word size. */
#define INT_TYPE_SIZE 32
#define STACK_BOUNDARY 64
/* Allocation boundary (in *bits*) for the code of a function. */
-#define FUNCTION_BOUNDARY 128
+#define FUNCTION_BOUNDARY 32
/* Alignment of field after `int : 0' in a structure. */
#define EMPTY_FIELD_BOUNDARY 64
/* A bitfield declared as `int' forces `int' alignment for the struct. */
#define PCC_BITFIELD_TYPE_MATTERS 1
-/* Align loop starts for optimal branching.
-
- ??? Kludge this and the next macro for the moment by not doing anything if
- we don't optimize and also if we are writing ECOFF symbols to work around
- a bug in DEC's assembler. */
-
-#define LOOP_ALIGN(LABEL) \
- (optimize > 0 && write_symbols != SDB_DEBUG ? 4 : 0)
-
-/* This is how to align an instruction for optimal branching. On
- Alpha we'll get better performance by aligning on an octaword
- boundary. */
-
-#define LABEL_ALIGN_AFTER_BARRIER(FILE) \
- (optimize > 0 && write_symbols != SDB_DEBUG ? 4 : 0)
-
/* No data type wants to be aligned rounder than this. */
#define BIGGEST_ALIGNMENT 128
For any two classes, it is very desirable that there be another
class that represents their union. */
-enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
+enum reg_class { NO_REGS, PV_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
LIM_REG_CLASSES };
#define N_REG_CLASSES (int) LIM_REG_CLASSES
/* Give names of register classes as strings for dump file. */
#define REG_CLASS_NAMES \
- {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
+ {"NO_REGS", "PV_REG", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
/* Define which registers fit in which classes.
This is an initializer for a vector of HARD_REG_SET
of length N_REG_CLASSES. */
#define REG_CLASS_CONTENTS \
- { {0, 0}, {~0, 0x80000000}, {0, 0x7fffffff}, {~0, ~0} }
+ { {0, 0}, {0x08000000, 0}, {~0, 0x80000000}, {0, 0x7fffffff}, {~0, ~0} }
/* The same information, inverted:
Return the class number of the smallest class containing
reg number REGNO. This could be a conditional expression
or could index an array. */
-#define REGNO_REG_CLASS(REGNO) \
- ((REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS : GENERAL_REGS)
+#define REGNO_REG_CLASS(REGNO) \
+ ((REGNO) == 27 ? PV_REG \
+ : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
+ : GENERAL_REGS)
/* The class value for index registers, and the one for base regs. */
#define INDEX_REG_CLASS NO_REGS
/* Get reg_class from a letter such as appears in the machine description. */
#define REG_CLASS_FROM_LETTER(C) \
- ((C) == 'f' ? FLOAT_REGS : NO_REGS)
+ ((C) == 'c' ? PV_REG : (C) == 'f' ? FLOAT_REGS : NO_REGS)
/* Define this macro to change register usage conditional on target flags. */
/* #define CONDITIONAL_REGISTER_USAGE */
reduce the impact of not being able to allocate a pseudo to a
hard register. */
-#define REGISTER_MOVE_COST(CLASS1, CLASS2) \
+#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
(((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) \
? 2 \
: TARGET_FIX ? 3 : 4+2*alpha_memory_latency)
#define FUNCTION_OK_FOR_SIBCALL(DECL) \
(DECL \
&& ((TREE_ASM_WRITTEN (DECL) && !flag_pic) \
- || ! TREE_PUBLIC (DECL) \
- || (0 && TREE_THIS_VOLATILE (DECL))))
+ || ! TREE_PUBLIC (DECL)))
/* Try to output insns to set TARGET equal to the constant C if it can be
done in less than N insns. Do all computations in MODE. Returns the place
struct machine_function
{
- /* An offset to apply to the stack pointer when unwinding from EH. */
- struct rtx_def *eh_epilogue_sp_ofs;
-
/* If non-null, this rtx holds the return address for the function. */
struct rtx_def *ra_rtx;
+
+ /* If non-null, this rtx holds a saved copy of the GP for the function. */
+ struct rtx_def *gp_save_rtx;
};
/* Make (or fake) .linkage entry for function call.
/* Before the prologue, RA lives in $26. */
#define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
#define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
+
+/* Describe how we implement __builtin_eh_return. */
+#define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
+#define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28)
+#define EH_RETURN_HANDLER_RTX \
+ gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
+ current_function_outgoing_args_size))
\f
/* Addressing modes, and classification of registers for them. */
&& GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
&& GET_CODE (XEXP (X, 1)) == CONST_INT) \
{ \
- push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL_PTR, \
+ push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \
BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0, \
OPNUM, TYPE); \
goto WIN; \
GEN_INT (high)), \
GEN_INT (low)); \
\
- push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL_PTR, \
+ push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \
BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0, \
OPNUM, TYPE); \
goto WIN; \
\f
/* Control the assembler format that we output. */
-/* We don't emit these labels, so as to avoid getting linker errors about
- missing exception handling info. If we emit a gcc_compiled. label into
- text, and the file has no code, then the DEC assembler gives us a zero
- sized text section with no associated exception handling info. The
- DEC linker sees this text section, and gives a warning saying that
- the exception handling info is missing. */
-#define ASM_IDENTIFY_GCC(x)
-#define ASM_IDENTIFY_LANGUAGE(x)
-
/* Output to assembler file text saying following lines
may contain character constants, extra white space, comments, etc. */
/* Output code to add DELTA to the first argument, and then jump to FUNCTION.
Used for C++ multiple inheritance. */
-
+/* ??? This is only used with the v2 ABI, and alpha.c makes assumptions
+ about current_function_is_thunk that are not valid with the v3 ABI. */
+#if 0
#define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
do { \
const char *fn_name = XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0); \
int reg; \
\
+ if (! TARGET_OPEN_VMS && ! TARGET_WINDOWS_NT) \
+ fprintf (FILE, "\tldgp $29,0($27)\n"); \
+ \
/* Mark end of prologue. */ \
output_end_prologue (FILE); \
\
} \
fprintf (FILE, "\t.set noat\n"); \
} while (0)
+#endif
\f
/* Define results of standard character escape sequences. */
#define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
-/* The linker will stick __main into the .init section. */
-#define HAS_INIT_SECTION
-#define LD_INIT_SWITCH "-init"
-#define LD_FINI_SWITCH "-fini"
-
/* The system headers under Alpha systems are generally C++-aware. */
#define NO_IMPLICIT_EXTERN_C
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