+2007-07-04 Daniel Berlin <dberlin@dberlin.org>
+
+ PR tree-optimization/32604
+ PR tree-optimization/32606
+
+ * tree-ssa-pre.c (bb_bitmap_sets): Removed antic_safe_loads.
+ (compute_antic_safe): Removed.
+ (ANTIC_SAFE_LOADS): Ditto.
+ (compute_antic_aux): Don't print ANTIC_SAFE_LOADS.
+ (execute_pre): Don't call compute_antic_safe.
+ (vuse_equiv): New function.
+ (make_values_for_stmt): Use it
+ * tree-ssa-sccvn.c (set_ssa_val_to): Remove assert, since it is
+ not always true.
+
+2007-07-04 Anatoly Sokolov <aesok@post.ru>
+
+ PR target/31331
+ * config/avr/avr.c (avr_naked_function_p): Handle receiving a type
+ rather than a decl.
+ (avr_attribute_table): Make "naked" attribute apply to function types
+ rather than to decls.
+ (avr_handle_fntype_attribute): New function.
+
+2007-07-04 Joseph Myers <joseph@codesourcery.com>
+
+ * target-def.h (TARGET_INITIALIZER): Remove trailing whitespace
+ after \.
+
+2007-07-04 David Ung <davidu@mips.com>
+ Joseph Myers <joseph@codesourcery.com>
+
+ * config/mips/mips.md (type): Add logical, signext and move.
+ (one_cmpl<mode>2, *and<mode>3, *and<mode>3_mips16, *ior<mode>3,
+ *ior<mode>3_mips16, two unnamed insns after *ior<mode>3_mips16,
+ *nor<mode>3, "Combiner patterns to optimize truncate/zero_extend
+ combinations", *zero_extend<SHORT:mode><GPR:mode>2,
+ *zero_extendqihi2, *extend<SHORT:mode><GPR:mode>2_mips16e,
+ *extend<SHORT:mode><GPR:mode>2_se<SHORT:size>, *movdi_64bit,
+ *movdi_64bit_mips16, *movsi_internal, *movsi_mips16, movcc,
+ *movhi_internal, *movhi_mips16, *movqi_internal, *movqi_mips16,
+ *movsf_hardfloat, *movsf_softfloat, *movsf_mips16,
+ *movdf_hardfloat_64bit, *movdf_hardfloat_32bit,
+ movv2sf_hardfloat_64bit): Use the new types.
+ (*movdi_32bit, *movdi_gp32_fp64, *movdi_32bit_mips16,
+ *movdf_softfloat, *movdf_mips16): Use "multi".
+ (extendqihi2): Replace with a define_expand.
+ (*extendqihi2_mips16e, *extendqihi2, *extendqihi2_seb): New.
+ Based on extend<SHORT:mode><GPR:mode>2 patterns.
+ * config/mips/74k.md (r74k_int_logical): New reservation and
+ bypasses.
+ (r74k_int_arith): Remove "slt".
+ * config/mips/24k.md, config/mips/4130.md, config/mips/4k.md,
+ config/mips/5400.md, config/mips/5500.md, config/mips/5k.md,
+ config/mips/7000.md, config/mips/9000.md, config/mips/generic.md,
+ config/mips/sb1.md, config/mips/sr71k.md: Add new types to
+ reservations for "arith".
+
+2007-07-04 Richard Guenther <rguenther@suse.de>
+
+ * tree-ssa.c (useless_type_conversion_p): Add handling for
+ scalar float and vector types. Only call the types_compatible_p
+ langhook for aggregate types as last resort. Follow the
+ rules.
+
+2007-07-04 Richard Guenther <rguenther@suse.de>
+
+ * tree-inline.c (estimate_num_insns_1): Treat CONVERT_EXPR
+ the same as NOP_EXPR.
+
+2007-07-04 Nick Clifton <nickc@redhat.com>
+
+ * target.h (struct gcc_target): Add target_help field.
+ * target-def.h (TARGET_HELP): New.
+ (TARGET_INITIALIZER): Use TARGET_HELP.
+ * opts.c (command_handle_option): Invoke target_help function, if
+ defined, when the user has specified --target-help on the command
+ line.
+ * doc/invoke.texi: Mention that --target-help might print
+ additional information.
+ * doc/tm.texi: Document TARGET_HELP hook.
+
+ * arm.c (TARGET_HELP): Override default definition.
+ (arm_target_help): New - display a wrapped list of cores and
+ architectures supported.
+
+2007-07-04 Rask Ingemann Lambertsen <rask@sygehus.dk>
+
+ * config/gcc/v850/v850.c (expand_prologue): Make sure
+ GEN_INT() argument is sign extended rather than zero extended.
+ (expand_epilogue): Likewise.
+ (output_move_double): Delete.
+ * config/gcc/v850/v850-protos.h (output_move_double): Delete.
+ * config/gcc/v850/v850.md (movdi): Delete.
+ (*movdi_internal): Delete.
+ (movdf): Delete.
+ (*movdf_internal): Delete.
+
+2007-07-04 Richard Sandiford <richard@codesourcery.com>
+
+ * config/sh/vxworks.h (SUBTARGET_OVERRIDE_OPTIONS): Reject -mrelax
+ unless compiling RTP PIC.
+
+2007-07-04 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/32482
+ * tree-ssa-ifcombine.c (recognize_single_bit_test): Use the
+ original ssa name if we didn't find a shift expression.
+ Fix shift constant for bit zero test.
+
+2007-07-04 Richard Sandiford <richard@codesourcery.com>
+
+ * config/sh/lib1funcs.asm (ic_invalidate): Align constant pool.
+
+2007-07-04 Richard Sandiford <richard@codesourcery.com>
+
+ * config.gcc (arm-wrs-vxworks): Don't include svr4.h.
+ * config/vxworks.h (PTRDIFF_TYPE, SIZE_TYPE, TARGET_POSIX_IO): Define.
+ * config/arm/vxworks.h (ASM_SPEC): Delete.
+ (SUBTARGET_EXTRA_ASM_SPEC): Define.
+
+2007-07-04 Sebastian Pop <sebpop@gmail.com>
+
+ * tree-data-ref.h (data_dependence_relation): New flag reversed_p.
+ (DDR_REVERSED_P): New.
+ * tree-data-ref.c (initialize_data_dependence_relation,
+ build_classic_dist_vector): Set DDR_REVERSED_P.
+
+2007-07-04 Sebastian Pop <sebpop@gmail.com>
+
+ PR middle-end/32457
+ * tree-data-ref.c (analyze_siv_subscript_cst_affine,
+ compute_overlap_steps_for_affine_1_2, analyze_subscript_affine_affine,
+ init_omega_for_ddr_1): Use non conservative number of iterations
+ estimations.
+ (analyze_subscript_affine_affine): Use HOST_WIDE_INT instead of int.
+ (analyze_siv_subscript): Remove FIXME and reinitialization of
+ last_conflicts to chrec_dont_know.
+ * testsuite/gfortran.dg/vect/pr32457.f90: New.
+
+2007-07-04 Douglas Gregor <doug.gregor@gmail.com>
+
+ * tree.c (maybe_canonicalize_argtypes): Improve description.
+
+2007-07-04 Douglas Gregor <doug.gregor@gmail.com>
+
+ * tree.c (maybe_canonicalize_argtypes): New.
+ (build_function_type): Set canonical type.
+ (build_method_type_directly): Ditto.
+ (reconstruct_complex_type): Rebuild the METHOD_TYPE node
+ properly.
+
+2007-07-03 Andrew Pinski <andrew_pinski@playstation.sony.com>
+
+ * tree-ssa-loop-ivopts.c (strip_offset_1): Treat POINTER_PLUS_EXPR
+ like PLUS_EXPR.
+ (rewrite_use_nonlinear_expr): Likewise.
+
+2007-07-03 Seongbae Park <seongbae.park@gmail.com>
+
+ * rtl.def (UNSPEC, USE, CLOBBER): More comments.
+
+2007-07-04 Ben Elliston <bje@au.ibm.com>
+
+ * dwarf2out.c: Move DWARF2 abbreviation glossary closer to the top
+ of this file.
+
+ * c-objc-common.c (c_types_compatible_p): Fix indentation.
+
+ * doc/tm.texi (Run-time Target): Capitalise "CPU".
+ (Exception Handling): Likewise.
+
+2007-07-03 Jan Hubicka <jh@suse.cz>
+
+ * ifcvt.c (find_cond_trap): Avoid invalid RTL sharing.
+
+2007-07-03 Eric Christopher <echristo@apple.com>
+
+ * doc/cppopts.texi: Add conflicting option note to -dM.
+ * doc/invoke.texi: Add note about possible conflicts with
+ -E for -dCHARS and note that -dM will not produce
+ any results if there is no machine dependent reorg.
+
+2007-07-03 Geoffrey Keating <geoffk@apple.com>
+
+ * tree.h (DECL_ALIGN): Back out previous change.
+
+2007-07-03 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac: Test for .dtprelword support on MIPS.
+ * configure, config.in: Regenerate.
+ * config/mips/mips.c (mips_output_dwarf_dtprel): New.
+ (TARGET_ASM_OUTPUT_DWARF_DTPREL): Define.
+
+2007-07-03 Julian Brown <julian@codesourcery.com>
+
+ * config.gcc (with_fpu): Allow --with-fpu=vfp3.
+ * config/arm/aout.h (REGISTER_NAMES): Add D16-D31.
+ * config/arm/aof.h (REGISTER_NAMES): Add D16-D31.
+ * config/arm/arm.c (FL_VFPV3): New flag for VFPv3 processor
+ capability.
+ (all_fpus): Add FPUTYPE_VFP3.
+ (fp_model_for_fpu): Add VFPv3 field.
+ (arm_rtx_costs_1): Give cost to VFPv3 constants.
+ (vfp3_const_double_index): New function. Return integer index of
+ VFPv3 constant suitable for fconst[sd] insns, or -1 if constant
+ isn't suitable.
+ (vfp3_const_double_rtx): New function. True if VFPv3 is enabled
+ and argument represents a valid RTX for a VFPv3 constant.
+ (vfp_output_fldmd): Split fldmd with > 16 registers in the list into
+ two instructions.
+ (vfp_emit_fstmd): Similar, for fstmd.
+ (arm_print_operand): Implement new code 'G' for VFPv3 floating-point
+ constants, represented as integer indices.
+ (arm_hard_regno_mode_ok): Use VFP_REGNO_OK_FOR_SINGLE,
+ VFP_REGNO_OK_FOR_DOUBLE macros.
+ (arm_regno_class): Handle VFPv3 d0-d7, low, high register split.
+ (arm_file_start): Set float-abi attribute for VFPv3, and output
+ correct ".fpu" assembler directive.
+ (arm_dbx_register_numbering): Add FIXME.
+ * config/arm/arm.h (TARGET_VFP3): New macro. Target supports VFPv3.
+ (fputype): Add FPUTYPE_VFP3.
+ (FIXED_REGISTERS): Add 32 registers for D16-D31.
+ (CALL_USED_REGISTERS): Likewise.
+ (CONDITIONAL_REGISTER_USAGE): Add note about conditional definition
+ of LAST_VFP_REGNUM. Make D16-D31 caller-saved, if present.
+ (LAST_VFP_REGNUM): Extend available VFP registers for VFPv3.
+ (D7_VFP_REGNUM): New.
+ (LAST_LO_VFP_REGNUM, FIRST_HI_VFP_REGNUM, LAST_HI_VFP_REGNUM)
+ (VFP_REGNO_OK_FOR_SINGLE, VFP_REGNO_OK_FOR_SINGLE)
+ (VFP_REGNO_OK_FOR_DOUBLE): Define new macros.
+ (FIRST_PSEUDO_REGISTER): Shift up to 128 to accommodate VFPv3.
+ (REG_ALLOC_ORDER): Adjust for VFPv3.
+ (reg_class): Add VFP_D0_D7_REGS, VFP_LO_REGS, VFP_HI_REGS.
+ (REG_CLASS_NAMES): Add entries corresponding to VFP_D0_D7_REGS,
+ VFP_LO_REGS, VFP_HI_REGS.
+ (REG_CLASS_CONTENTS): Likewise. Extend contents for VFP_REGS.
+ (IS_VFP_CLASS): Define macro.
+ (SECONDARY_OUTPUT_RELOAD_CLASS, SECONDARY_INPUT_RELOAD_CLASS): Use
+ IS_VFP_CLASS.
+ (REGISTER_MOVE_COST): Likewise.
+ * config/arm/arm-protos.h (vfp3_const_double_rtx): Add prototype.
+ * config/arm/vfp.md (VFPCC_REGNUM): Redefine as 127.
+ (*arm_movsi_vfp, *thumb2_movsi_vfp, *movsfcc_vfp)
+ (*thumb2_movsfcc_vfp, *abssf2_vfp, *negsf2_vfp, *addsf3_vfp)
+ (*subsf3_vfp, *divsf_vfp, *mulsf_vfp, *mulsf3negsf_vfp)
+ (*mulsf3addsf_vfp, *mulsf3subsf_vfp, *mulsf3negsfaddsf_vfp)
+ (*extendsfdf2_vfp, *truncdfsf2_vfp, *truncsisf2_vfp)
+ (*truncsidf2_vfp, fixuns_truncsfsi2, fixuns_truncdfsi2)
+ (*floatsisf2_vfp, *floatsidf2_vfp, floatunssisf2)
+ (floatunssidf2, *sqrtsf2_vfp, *cmpsf_split_vfp)
+ (*cmpsf_trap_split_vfp, *cmpsf_vfp, *cmpsf_trap_vfp): Use 't'
+ where appropriate for single-word registers.
+ (*movsf_vfp, *thumb2_movsf_vfp, *movdf_vfp, *thumb2_movdf_vfp):
+ As above. Fix type attributes.
+ * config/arm/constraints.md (register_contraint "t"): Define.
+ (register_constraint "w"): Change to D0-D15, or D0-D31 for
+ VFPv3/NEON.
+ (register_constraint "x"): Define.
+ (constraint "Dv"): Define.
+
+2007-07-03 Geoffrey Keating <geoffk@apple.com>
+
+ * tree.h (DECL_ALIGN): Prevent use on a FUNCTION_DECL.
+
+2007-07-03 Tom Tromey <tromey@redhat.com>
+
+ * c-parser.c (objc_pq_context): Removed.
+ (objc_need_raw_identifier): Likewise.
+ (c_parser) <objc_pq_context>: New field.
+ <objc_need_raw_identifier>: Likewise.
+ (OBJC_NEED_RAW_IDENTIFIER): Removed.
+ (c_lex_one_token): Update.
+ (c_parser_objc_protocol_definition): Update.
+ (c_parser_objc_method_definition): Update.
+ (c_parser_objc_methodproto): Update.
+ (c_parser_declspecs): Update.
+
+2007-07-03 David Ung <davidu@mips.com>
+
+ * config/mips/mips.c (mips_issue_rate): Return 4 for 74K processors.
+
+2007-07-03 David Ung <davidu@mips.com>
+ Richard Sandiford <richard@codesourcery.com>
+
+ * doc/invoke.texi: Document -march=74kf3_2.
+ * config/mips/mips.h (PROCESSOR_74KF3_2): New processor_type.
+ (TUNE_74K): Check for it.
+ * config/mips/mips.c (mips_cpu_info): Add 74kf3_2.
+ (mips_rtx_cost_data): Add an entry for PROCESSOR_74KF3_2.
+ * config/mips/mips.md (cpu): Add 74kf3_2.
+ * config/mips/74k.md (r74k_int_logical, r74k_int_arith, r74k_int_nop)
+ (r74k_int_cmove, r74k_int_mult, r74k_int_mul3, r74k_int_mfhilo)
+ (r74k_int_mthilo, r74k_int_div, r74k_int_call, r74k_int_jump)
+ (r74k_int_load, r74k_int_store, r74k_unknown, r74k_multi): Add
+ 74kf3_2 to the CPU list.
+ (r74kf3_2_fadd, r74kf3_2_fmove, r74kf3_2_fload, r74kf3_2_fstore)
+ (r74kf3_2_fmul_sf, r74kf3_2_fmul_df, r74kf3_2_fdiv_sf)
+ (r74kf3_2_fdiv_df, r74kf3_2_frsqrt_sf, r74kf3_2_frsqrt_df)
+ (r74kf3_2_fcmp, r74kf3_2_fcvt, r74kf3_2_fxfer_to_c1)
+ (r74kf3_2_fxfer_from_c1): New insn reservations.
+
+2007-07-03 Richard Sandiford <richard@codesourcery.com>
+ David Ung <davidu@mips.com>
+
+ * doc/invoke.texi: Replace -march=24kf with -march=24kf2_1 and
+ -march=24kx with -march=24kf1_1. Likewise 24ke[fx], 34k[fx]
+ and 74k[fx]. Document aliases for the new options.
+ * config/mips/mips.h (PROCESSOR_24KF): Rename to...
+ (PROCESSOR_24KF2_1): ...this.
+ (PROCESSOR_24KX): Rename to...
+ (PROCESSOR_24KF1_1): ...this.
+ (PROCESSOR_74KF): Rename to...
+ (PROCESSOR_74KF2_1): ...this.
+ (PROCESSOR_74KX): Rename to...
+ (PROCESSOR_74KF1_1): ...this.
+ (TUNE_74K): Update PROCESSOR_* names.
+ * config/mips/mips.c (mips_cpu_info): Add 24kf2_1 as a synonym
+ for 24kf. Add 24kf1_1 and 24kfx as synonyms for 24kx. Likewise
+ the 24ke*, 34k* and 74k* processors. Update PROCESSOR_* names.
+ (mips_rtx_cost_data): Update processor names in comments.
+ (mips_issue_rate): Update PROCESSOR_* names.
+ * config/mips/mips.md (cpu): Rename 24kf to 24kf2_1, 24kx to
+ 24kf1_1, 74kf to 74kf2_1 and 74kx to 74kf1_1.
+ * config/mips/24k.md: Rename FPU-related r24k_* insn reservations
+ to r24kf2_1_*. Rename r24kx_* insn reservations to r24kf1_1_*.
+ Update cpu attribute names.
+ (r24k_fpu_iss): Rename this reservation to...
+ (r24kf2_1_fpu_iss): ...this and update all uses.
+ (r24kx_fpu_iss): Rename this reservation to...
+ (r24kf1_1_fpu_iss): ...this and update all uses.
+ * config/mips/74k.md: Rename FPU-related r74kf_* insn reservations
+ to r74kf2_1_*. Rename r74kx_* insn reservations to r74kf1_1_*.
+ Update cpu attribute names.
+
+2007-07-01 Kaz Kojima <kkojima@gcc.gnu.org>
+
+ * config/m32r/constraints.md: New file.
+ * config/m32r/m32r.c: Include tm-constrs.h.
+ (small_data_operand): Use satisfies_constraint_* instead of macro.
+ (addr24_operand, gen_compare): Likewise.
+ * config/m32r/m32r.h (REG_CLASS_FROM_LETTER): Remove.
+ (INT8_P, UPPER16_P, UINT32_P, UINT5_P, INVERTED_SIGNED_8BIT,
+ CONST_OK_FOR_LETTER_P, CONST_DOUBLE_OK_FOR_LETTER_P,
+ EXTRA_CONSTRAINT): Likewise.
+ * config/m32r/m32r.md: Include constraints.md.
+ (*movsi_insn): Use satisfies_constraint_* instead of macro.
+ (andsi3, iorsi3, xorsi3, seq_insn+1, sne): Likewise.
+ * config/m32r/predicates.md (conditional_move_operand): Likewise.
+ (two_insn_const_operand, int8_operand, uint16_operand,
+ reg_or_int16_operand, reg_or_uint16_operand,
+ reg_or_cmp_int16_operand, cmp_int16_operand,
+ seth_add3_operand): Likewise.
+
+2007-07-03 Eric Christopher <echristo@gmail.com>
+
+ * libgcc2.h: Conditionally declare __bswapsi2 and
+ __bswapdi2.
+
+2007-07-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * ddg.c (check_sccs): Define only if ENABLE_CHECKING is
+ defined.
+
+2007-07-03 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
+
+ PR target/28307
+ * gthr-posix.h [SUPPORTS_WEAK && GTHREAD_USE_WEAK]
+ (__gthrw_pragma): Provide default definition.
+ (__gthrw2): Use it.
+ * gthr-posix.c (__gthrw_pragma): Define.
+
+2007-07-03 Daniel Berlin <dberlin@dberlin.org>
+
+ * tree-ssa-sccvn.c (set_ssa_val_to): Check for operand_equal_p
+ before declaring inequality.
+
+2007-07-03 Rask Ingemann Lambertsen <rask@sygehus.dk>
+
+ * combine.c (recog_for_combine): Log the success or failure of
+ matching new insn patterns against the machine description in
+ detailed dumps.
+
+2007-07-03 Revital Eres <eres@il.ibm.com>
+
+ * ddg.c (print_sccs): New function.
+ (check_sccs): New function.
+ (create_ddg_all_sccs): Use it.
+ * ddg.h (print_sccs): Declare.
+ * modulo-sched.c (sms_order_nodes): Call print_sccs.
+
+2007-07-03 Uros Bizjak <ubizjak@gmail.com>
+
+ * targhooks.h (default_mode_for_suffix): New function declaration.
+ * targhooks.c (default_mode_for_suffix): New default target hook.
+ * target.h (struct c): New structure in the targetm struct.
+ (mode_for_suffix): New target hook as part of struct c.
+ target-def.h (TARGET_C_MODE_FOR_SUFFIX): Define as
+ default_mode_for_suffix.
+ (TARGET_C): New define.
+ * c-lex.c: Include "target.h".
+ (interpret_float): Use targetm.c.mode_for_suffix to determine
+ the mode for a given non-standard suffix.
+ Makefile.in (c-lex.o): Depend on $(TARGET_H).
+
+ * config/i386/i386.c (ix86_c_mode_for_suffix): New static function.
+ (TARGET_C_MODE_FOR_SUFFIX): Define to ix86_c_mode_for_suffix.
+
+ * doc/extend.texi (Floating Types): New node. Document __float80 and
+ __float128 types. Document 'w', 'W', 'q' and 'Q' suffixes.
+
+2007-07-03 Kaz Kojima <kkojima@gcc.gnu.org>
+
+ PR target/32506
+ * config/sh/sh.md (udivsi3_i1_media): Use target_reg_operand
+ predicate instead of target_operand.
+ (divsi3_i1_media, divsi3_media_2): Likewise.
+
+2007-07-02 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree.h (alias_sets_might_conflict_p): Rename into
+ alias_sets_must_conflict_p.
+ * alias.c (alias_sets_might_conflict_p): Likewise.
+ (alias_sets_conflict_p): Use it.
+ (objects_must_conflict_p): Likewise.
+ * c-common.c (strict_aliasing_warning): Adjust.
+
+2007-07-02 Andrew Pinski <andrew_pinski@playstation.sony.com>
+
+ * rtlhooks.c (gen_lowpart_if_possible): Check for
+ invalid subreg before calling gen_lowpart_SUBREG.
+
+2007-07-02 Geoffrey Keating <geoffk@apple.com>
+
+ * config/darwin9.h: Add copyright notice.
+ (LINK_COMMAND_SPEC): Add comment.
+ (DARWIN_LIBSYSTEM_HAS_UNWIND): Define.
+ * config/rs6000/darwin.h (MD_UNWIND_SUPPORT): Conditionalise on
+ DARWIN_LIBSYSTEM_HAS_UNWIND.
+
+2007-07-02 Jakub Jelinek <jakub@redhat.com>
+
+ PR libgomp/32468
+ * omp-low.c (check_combined_parallel): New function.
+ (lower_omp_parallel): Call it via walk_stmts, set
+ OMP_PARALLEL_COMBINED if appropriate.
+ (determine_parallel_type): If OMP_FOR resp. OMP_SECTIONS
+ isn't the only statement in WS_ENTRY_BB or OMP_RETURN
+ the only one in PAR_EXIT_BB and not OMP_PARALLEL_COMBINED,
+ don't consider it as combined parallel.
+
+2007-07-02 Richard Sandiford <richard@codesourcery.com>
+
+ * configure.ac (gcc_gxx_include_dir): Use $(libsubdir_to_prefix).
+ (gcc_tooldir): Likewise.
+ * configure: Regenerate.
+ * Makefile.in (libsubdir_to_prefix): New variable, based on the
+ old configure.ac gcc_tooldir setting.
+ (prefix_to_exec_prefix): New variable.
+ (DRIVER_DEFINES): Use $(libsubdir_to_prefix)$(prefix_to_exec_prefix)
+ rather than $(unlibsubdir)/../ to derive TOOLDIR_BASE_PREFIX.
+
+2007-07-02 Daniel Berlin <dberlin@dberlin.org>
+
+ Fix PR tree-optimization/32583
+ Fix PR tree-optimization/32584
+ * tree-ssa-pre.c (phi_translate): Always pass seen bitmap.
+ (phi_translate_set): Use phi_translate directly now.
+ (make_values_for_stmt): Don't value number RHS if we already know
+ it is constant.
+
+2007-07-02 Steve Ellcey <sje@cup.hp.com>
+ Jim Wilson <wilson@specifix.com>
+
+ PR target/31684
+ * haifa-sched.c (add_to_speculative_block): Change copy_rtx to
+ copy_insn.
+
+2007-07-02 Sandra Loosemore <sandra@codesourcery.com>
+ Richard Sandiford <richard@codesourcery.com>
+ Nigel Stephens <nigel@mips.com>
+
+ * config/mips/mips-protos.h (mips16e_save_restore_info): New struct.
+ (mips16e_output_save_restore): Declare.
+ (mips16e_save_restore_pattern_p): Likewise.
+ * config/mips/mips.h (GENERATE_MIPS16E_SAVE_RESTORE): New macro.
+ * config/mips/mips.c (MIPS_MAX_FIRST_STACK_STEP): Return 0x7f8
+ for GENERATE_MIPS16E_SAVE_RESTORE. Return 0x400 for TARGET_MIPS16
+ && !GENERATE_MIPS16E_SAVE_RESTORE && !TARGET_64BIT.
+ (BITSET_P): New global macro, extracted from...
+ (mips_for_each_saved_reg): ...here.
+ (mips16e_save_restore_info): New struct.
+ (mips16e_s2_s8_regs, mips16e_a0_a3_regs): New variables.
+ (mips16e_save_restore_regs): New variable.
+ (mips_split_plus, mips16e_find_first_register): New functions.
+ (mips16e_mask_registers): New function.
+ (compute_frame_size): Expand the commentary before the function.
+ Enforce the MIPS16e save and restore register range restrictions.
+ Pad the general register save area at the low end.
+ (mips16e_save_restore_reg, mips16e_build_save_restore)
+ (mips16e_save_restore_pattern_p, mips16e_add_register_range)
+ (mips16e_output_save_restore, mips16e_collect_propagate_value)
+ (mips16e_collect_argument_save, mips16e_collect_argument_saves):
+ New functions.
+ (mips_expand_prologue, mips_expand_epilogue): Handle
+ GENERATE_MIPS16E_SAVE_RESTORE.
+ * config/mips/mips.md (*mips16e_save_restore): New pattern.
+
+2007-07-02 Uros Bizjak <ubizjak@gmail.com>
+
+ PR tree-optimization/31966
+ PR tree-optimization/32533
+ * tree-if-conv.c (add_to_dst_predicate_list): Use "edge", not
+ "basic_block" description as its third argument. Update function
+ calls to get destination bb from "edge" argument. Save "cond" into
+ aux field of the edge. Update prototype for changed arguments.
+ (if_convertible_loop_p): Clear aux field of incoming edges if bb
+ contains phi node.
+ (find_phi_replacement_condition): Operate on incoming edges, not
+ on predecessor blocks. If there is a condition saved in the
+ incoming edge aux field, AND it with incoming bb predicate.
+ Return source bb of the first edge.
+ (clean_predicate_lists): Clean aux field of outgoing node edges.
+ (tree_if_conversion): Do not initialize cond variable. Move
+ variable declaration into the loop.
+ (replace_phi_with_cond_gimple_modify_stmt): Remove unneded
+ initializations of new_stmt, arg0 and arg1 variables.
+
+2007-07-02 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-nrv.c (dest_safe_for_nrv_p): Grok any handled_component_p,
+ SSA_NAMEs, RESULT_DECLs and PARM_DECLs.
+
+2007-07-02 Richard Guenther <rguenther@suse.de>
+
+ * tree-ssa.c (useless_type_conversion_p): Document
+ future intent as defining the middle-end type system.
+ Re-structure to call langhook last, group by type class,
+ mark questionable parts.
+
+2007-07-02 Richard Guenther <rguenther@suse.de>
+
+ * tree-flow.h (types_compatible_p): Declare.
+ * tree-ssa.c (types_compatible_p): New function.
+ * ipa-type-escape.c (discover_unique_type): Use
+ types_compatible_p instead of lang_hooks.types_compatible_p.
+ * tree-ssa-copyrename.c (copy_rename_partition_coalesce): Likewise.
+ * tree-vn.c (expressions_equal_p): Likewise.
+ * tree.c (fields_compatible_p): Likewise.
+ * tree-ssa-dom.c (avail_expr_eq): Likewise.
+ (cprop_operand): Use useless_type_conversion_p instead of
+ lang_hooks.types_compatible_p.
+ * tree-inline.c (setup_one_parameter): Likewise.
+ (declare_return_variable): Likewise.
+ * tree-nrv.c (tree_nrv): Likewise.
+ * tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise.
+ (maybe_fold_offset_to_component_ref): Likewise.
+ (maybe_fold_offset_to_reference): Likewise.
+ * tree-ssa-copy.c (may_propagate_copy): Likewise.
+ (merge_alias_info): Likewise.
+ * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
+ * tree-ssa-phiopt.c (conditional_replacement): Likewise.
+ * tree-ssa-reassoc.c (optimize_ops_list): Likewise.
+ * tree-tailcall.c (find_tail_calls): Likewise.
+ * tree-vect-generic.c (expand_vector_operations_1): Likewise.
+ * gimplify.c (canonicalize_addr_expr): Likewise.
+ (fold_indirect_ref_rhs): Likewise.
+ (gimplify_addr_expr): Likewise. Swap parameters to cpt_same_type.
+ (cpt_same_type): Likewise.
+ (check_pointer_types_r): Swap parameters to cpt_same_type
+ where appropriate.
+ * fold-const.c (fold_convert): Revert fix for PR15988.
+ * tree-inline.c (setup_one_parameter): Instead fix it here by
+ using fold_build1 instead of fold_convert and checking for
+ error_mark_node. Convert only if the conversion is necessary.
+
+2007-07-02 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac: Check for .gnu_attribute on Power.
+ * configure: Regenerate.
+ * config/rs6000/rs6000.c (rs6000_file_start): If supported, output
+ attribute for floating-point ABI.
+
+2007-07-02 Ira Rosen <irar@il.ibm.com>
+
+ PR tree-optimization/32230
+ PR tree-optimization/32477
+ * tree-vect-analyze.c (vect_analyze_data_refs): Fail if base
+ address is a constant.
+
+2007-07-02 Richard Sandiford <richard@codesourcery.com>
+
+ * config.gcc (mipsisa32-*-elf*, mipsisa32el-*-elf*)
+ (mipsisa32r2-*-elf*, mipsisa32r2el-*-elf*)
+ (mipsisa64-*-elf*, mipsisa64el-*-elf*): Combine top-level
+ stanzas. Use the first part of the triplet to set MIPS_ISA_DEFAULT.
+ Remove redundant setting of MASK_FLOAT64 and MASK_64BIT for the
+ 64-bit targets. Add support for *-elfoabi*.
+ * config/mips/t-isa3264 (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Use
+ different settings if $(tm_defines) does not select the EABI.
+ (MULTILIB_EXCLUSIONS): Define in those circumstances.
+ * config/mips/mips.h (MIPS_ISA_LEVEL_OPTION_SPEC): New macro.
+ (MIPS_ARCH_OPTION_SPEC): Likewise.
+ (MIPS_ISA_LEVEL_SPEC): Likewise.
+ (OPTION_DEFAULT_SPECS): Use MIPS_ARCH_OPTION_SPEC.
+ * config/mips/elfoabi.h: New file.
+
+2007-07-02 Richard Guenther <rguenther@suse.de>
+
+ * tree-flow.h (tree_ssa_useless_type_conversion_1): Rename to ...
+ (useless_type_conversion_p): ... this.
+ * tree-ssa.c (tree_ssa_useless_type_conversion_1): Rename to ...
+ (useless_type_conversion_p): ... this.
+ * builtins.c (fold_builtin_memory_op): Rename
+ tree_ssa_useless_type_conversion_1 to useless_type_conversion_p.
+ * tree-cfg.c (verify_expr): Likewise.
+ * tree-ssa-address.c (tree_ssa_useless_type_conversion_1): Likewise.
+ * tree-ssa-ccp.c (ccp_fold): Likewise.
+ * tree-ssa-copy.c (may_propagate_copy): Likewise.
+ * tree-ssa-dom.c (eliminate_redundant_computations): Likewise.
+ * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
+ * tree-ssa-loop-niter.c (refine_bounds_using_guard): Likewise.
+ * tree-ssa-pre.c (eliminate): Likewise.
+ * tree-ssa.c (delete_tree_ssa): Likewise.
+ (tree_ssa_useless_type_conversion): Likewise.
+ * tree.c (build2_stat): Likewise.
+
+2007-07-01 Daniel Berlin <dberlin@dberlin.org>
+
+ Fix PR tree-optimization/32571
+ * tree-ssa-sccvn.c (visit_use): Shortcut copies to avoid
+ simplifying them.
+
+2007-07-01 Daniel Berlin <dberlin@dberlin.org>
+
+ * tree-ssa-sccvn.c (copy_reference_ops_from_ref): Handle constants
+ and other expected operations explicitly, change default to
+ gcc_unreachable.
+
+2007-07-01 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * config/arm/arm.c (arm_cannot_copy_insn_p): Do not expect a
+ PARALLEL.
+ * config/arm/arm.md (pic_add_dot_plus_four, pic_add_dot_plus_eight)
+ (tls_load_dot_plus_eight): Move the label number into the unspec.
+ * config/arm/thumb2.md (pic_load_dot_plus_four): Likewise.
+
+2007-07-01 Andreas Schwab <schwab@suse.de>
+
+ * dwarf2out.c (initial_return_save): Define only if used.
+
+2007-07-01 Kenneth Zadeck <zadeck@naturalbridge.com>
+
+ Unreverting Richard's Revert of:
+
+ 2007-06-27 Richard Sandiford <richard@codesourcery.com>
+
+ * dce.c (deletable_insn_p_1): New function, split out from...
+ (deletable_insn_p): ...here. Only treat bare USEs and CLOBBERs
+ specially, not those inside PARALLELs. Remove BODY argument
+ and adjust recursive call accordingly.
+ (prescan_insns_for_dce): Update call to delete_insn_p.
+
+2007-07-01 Vladimir Yanovsky <yanov@il.ibm.com>
+ Revital Eres <eres@il.ibm.com>
+
+ * ddg.c (create_ddg_all_sccs): Fix missed
+ initialization of scc_nodes.
+
+2007-07-01 Uros Bizjak <ubizjak@gmail.com>
+
+ PR middle-end/32559
+ * fold-const.c (fold-binary) [PLUS_EXPR]: Convert ~X + X to 1 or
+ X + ~X to 1 only for INTEGRAL_TYPE_P type.
+
+2007-06-30 Joseph Myers <joseph@codesourcery.com>
+
+ * configure.ac: Check for .gnu_attribute on MIPS.
+ * configure, config.in: Regenerate.
+ * config/mips/mips.c (mips_file_start): If supported, output
+ attribute for floating-point ABI.
+
+2007-06-30 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/32433
+ * config/i386/i386.md (ffssi2): Expand as ffs_cmove for TARGET_CMOVE.
+ (ffs_cmove): New expander to expand using ctz pattern.
+ (*ffs_cmove): Remove pattern.
+ (*ffs_no_cmove): Enable only for !TARGET_CMOVE.
+ (ffsdi2): Expand using ctz pattern.
+ (*ffs_rex64): Remove pattern.
+
2007-06-30 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR rtl-optimization/32296
* pa.c (hppa_can_use_return_insn_p): Delete function. Include "df.h".
2007-06-30 Daniel Berlin <dberlin@dberlin.org>
+
+ * tree-ssa-pre.c (is_exception_related): New function
+ (can_value_number_operation): Use it.
+
+2007-06-30 Daniel Berlin <dberlin@dberlin.org>
Fix PR tree-optimization/32540
Fix PR tree-optimization/31651
2006-06-30 Jan Hubicka <jh@suse.cz>
- * loop-unroll.c (unroll_loop_runtime_iterations): Unshare newly emit
+ * loop-unroll.c (unroll_loop_runtime_iterations): Unshare newly emit
code.
2006-06-30 Thomas Neumann <tneumann@users.sourceforge.net>
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