+2011-11-01 Ian Lance Taylor <iant@google.com>
+
+ * godump.c (struct macro_hash_value): Define.
+ (macro_hash_hashval): New static function.
+ (macro_hash_eq, macro_hash_del): New static functions.
+ (go_define): Use macro_hash_value to store values in macro_hash.
+ Replace an old value on a redefinition. Don't print anything to
+ go_dump_file.
+ (go_undef): Delete the entry from the hash table.
+ (go_output_typedef): For an enum, use macro_hash_value, and don't
+ print anything to go_dump_file.
+ (go_print_macro): New static function.
+ (go_finish): Traverse macro_hash with go_print_macro.
+ (dump_go_spec_init): Update macro_hash creation for
+ macro_hash_value.
+
+2011-11-02 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/rs6000.c (rs6000_code_end): Declare ATTRIBUTE_UNUSED.
+
+2011-11-01 Paolo Carlini <paolo.carlini@oracle.com>
+
+ PR c++/44277
+ * doc/invoke.texi: Document -Wzero-as-null-pointer-constant.
+
+2011-11-01 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/arm/bpabi.h (BE8_LINK_SPEC): Recognize generic-armv7 tuning.
+
+2011-11-01 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (splitters for int-float conversion): Use
+ SUBREG_REG on SUBREGs in splitter constraints.
+
+2011-11-01 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/i386-protos.h (ix86_expand_adjust_ufix_to_sfix_si): New
+ prototype.
+ * config/i386/i386.c (ix86_expand_adjust_ufix_to_sfix_si): New
+ function.
+ * config/i386/sse.md (fixuns_trunc<mode><sseintvecmodelower>2): Use it.
+ (ssepackfltmode): New mode attr.
+ (vec_pack_ufix_trunc_<mode>): New expander.
+
+2011-11-01 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/50940
+ * config/i386/i386.md (floatsi<mode>2_vector_sse_with_temp splitter):
+ Compare <ssevecmode>mode with V4SFmode, not V4SImode.
+
+2011-11-01 Peter Bergner <bergner@vnet.ibm.com>
+
+ * config.gcc (powerpc*-*-linux*): Add powerpc*-*-linux*ppc476* variant.
+ * config/rs6000/476.h: New file.
+ * config/rs6000/476.opt: Likewise.
+ * config/rs6000/rs6000.h (TARGET_LINK_STACK): New define.
+ (SET_TARGET_LINK_STACK): Likewise.
+ (TARGET_ASM_CODE_END): Define.
+ * config/rs6000/rs6000.c (rs6000_option_override_internal): Enable
+ TARGET_LINK_STACK for -mtune=476 and -mtune=476fp.
+ (rs6000_legitimize_tls_address): Emit the link stack preserving GOT
+ code if TARGET_LINK_STACK.
+ (rs6000_emit_load_toc_table): Likewise.
+ (output_function_profiler): Likewise
+ (macho_branch_islands): Likewise
+ (machopic_output_stub): Likewise
+ (get_ppc476_thunk_name): New function.
+ (rs6000_code_end): Likewise.
+ * config/rs6000/rs6000.md (load_toc_v4_PIC_1, load_toc_v4_PIC_1b):
+ Convert to a define_expand.
+ (load_toc_v4_PIC_1_normal): New define_insn.
+ (load_toc_v4_PIC_1_476): Likewise.
+ (load_toc_v4_PIC_1b_normal): Likewise.
+ (load_toc_v4_PIC_1b_476): Likewise.
+
+2011-11-01 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50910
+ * config/avr/avr.opt (-mbranch-cost=): New option.
+ * config/avr/avr.h (BRANCH_COST): Define to avr_branch_cost.
+ * config/avr/avr.c (avr_rtx_costs_1): Adjust [U]DIV/[U]MOD costs.
+ * config/avr/avr.md (*addqi3.lt0, *addhi3.lt0, *addsi3.lt0): New insns.
+ (*addhi3_zero_extend1): Remove % in constraint of operand 1.
+ (*addhi3.sign_extend1, *subhi3.sign_extend2): New insns.
+
+2011-11-01 Tom de Vries <tom@codesourcery.com>
+
+ PR tree-optimization/50908
+ * tree-ssa-tail-merge.c (update_vuses): Now that edges are removed
+ before update_vuses, test for 1 predecessor rather than two.
+ (delete_block_update_dominator_info): New function, part of it factored
+ out of ...
+ (replace_block_by): Use delete_block_update_dominator_info. Call
+ update_vuses after deleting bb1 and updating dominator info, instead of
+ before.
+
+2011-11-01 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.c (vector_init_faligndata): New function.
+ (sparc_expand_vector_init): Use it for V4HImode on VIS1.
+
+ * config/sparc/sparc.c (sparc_expand_vcond): New function.
+ * config/sparc/sparc-protos.h (sparc_expand_vcond): Declare it.
+ * config/sparc/sparc.md (vcond<mode><mode>): New VIS3 expander.
+ (vconduv8qiv8qi): Likewise.
+
+2011-11-01 Alexandre Oliva <aoliva@redhat.com>
+
+ PR debug/50869
+ * cselib.c (cfa_base_preserved_regno): Initialize.
+ (cselib_expand_value_rtx_1): Don't expand it.
+ * var-tracking.c (vt_expand_var_loc_chain): Initialize depth.
+ Check it's only zero if result is NULL.
+
+2011-11-01 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/sse.md (fixuns_trunc<mode><sseintvecmodelower>2): New
+ expander.
+
+ * config/i386/sse.md (sseintvecmode): Remove duplicate modes.
+ (sseintvecmodelower): New mode iterator.
+ (floatv8siv8sf2, floatunsv4siv4sf2): Macroize into...
+ (float<sseintvecmodelower><mode>2): ... this using VF1 iterator.
+ (floatunsv4siv4sf2): Macroize into...
+ (floatuns<sseintvecmodelower><mode>2): ... this using VF1 iterator.
+
+2011-10-31 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.md (cmask patterns): Allow zero operand.
+
+ * dwarf2out.c (cached_next_real_insn): New.
+ (dwarf2out_end_epilogue): Set it to NULL_RTX.
+ (dwarf2out_var_location): Remove cached_next_real_insn local static.
+
+2011-10-31 Richard Henderson <rth@redhat.com>
+
+ * config/i386/sse.md (floatv8siv8sf2): Rename from avx_cvtdq2ps256.
+ (floatv4siv4sf2): Rename from sse2_cvtdq2ps.
+ (floatunsv4siv4sf2): Rename from sse2_cvtudq2ps.
+ (fix_truncv8sfv8si2): Rename from avx_cvttps2dq256.
+ (fix_truncv4sfv4si2): Rename from sse2_cvttps2dq.
+ (floatv4siv4df2): Rename from avx_cvtdq2pd256.
+ (fix_truncv4dfv4si2): Rename from avx_cvttpd2dq256.
+ (vec_unpacku_float_hi_v8si): Update for insn pattern name changes.
+ * config/i386/i386.md (splitters for int-float conversion): Likewise.
+ * config/i386/i386.c (ix86_split_convert_uns_si_sse): Likewise.
+ (bdesc_args): Likewise.
+ (enum ix86_builtins) [IX86_BUILTIN_CVTUDQ2PS]: Remove.
+ (ix86_vectorize_builtin_conversion): Remove.
+ (TARGET_VECTORIZE_BUILTIN_CONVERSION): Remove.
+
+2011-10-31 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-prop.c (mark_modified): Moved up in the file.
+ (is_parm_modified_before_call): Renamed to
+ is_parm_modified_before_stmt, moved up in the file.
+ (load_from_unmodified_param): New function.
+ (compute_complex_assign_jump_func): Also attempt to create pass
+ through jump functions for values loaded from (addressable)
+ parameters.
+
+2011-10-31 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-vect-stmts.c (vectorizable_shift): If op1 is vect_external_def
+ in a loop and has different type from op0, cast it to op0's type
+ before the loop first. For slp give up. Don't crash if op1_vectype
+ is NULL.
+
+2011-10-31 Paul Brook <paul@codesourcery.com>
+
+ * cgraphunit.c: Don't mark clones as static constructors.
+
+2011-10-31 David Edelsohn <dje.gcc@gmail.com>
+
+ * gcc-ar: Do not include stdio.h.
+
+2011-10-31 Diego Novillo <dnovillo@google.com>
+
+ * tree-streamer-out.c (pack_ts_base_value_fields): Emit
+ TYPE_ADDR_SPACE.
+ * tree-streamer-in.c (unpack_ts_base_value_fields): Read
+ TYPE_ADDR_SPACE.
+
+2011-10-30 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.c (vector_init_bshuffle): New function.
+ (vector_init_fpmerge): New function.
+ (sparc_expand_vector_init): Use them to improve non-const cases.
+
+ * dwarf2out.c (dwarf2out_var_location): When processing several
+ consecutive location notes, cache the result of next_real_insn().
+
+2011-10-30 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (avx2_vec_dup<mode>): Macroize insn from
+ avx2_vec_dup{v8sf,v4sf} using VF1 mode iterator.
+ (vec_dupv4sf): Remove expander.
+ (vec_dupv4sf): Merge from *vec_dupv4sf and *vec_dupv4sf_avx.
+ (vec_dupv2df): Remove expander.
+ (vec_dupv2df): Merge from *vec_dupv2df and *vec_dupv2df_sse3.
+ (*vec_concatv2df): Merge *vec_concatv2df_sse3.
+ (*vec_dupv4si): Merge *vec_dupv4si_avx.
+ (*vec_dupv2di): Merge *vec_dupv2di_sse3.
+
+2011-10-30 Dmitry Plotnikov <dplotnikov@ispras.ru>
+
+ * tree-cfg.c (verify_gimple_assign_unary): Allow vector conversions.
+ * optabs.c (supportable_convert_operation): New function.
+ * optabs.h (supportable_convert_operation): New prototype.
+ * tree-vect-stmts.c (vectorizable_conversion): Change condition and
+ behavior for NONE modifier case.
+ * tree.h (VECTOR_INTEGER_TYPE_P): New macro.
+
+2011-10-30 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-vectorizer.h (NUM_PATTERNS): Bump to 9.
+ * tree-vect-patterns.c (vect_recog_vector_vector_shift_pattern): New
+ function.
+ (vect_vect_recog_func_ptrs): Add it.
+
+2011-10-30 David S. Miller <davem@davemloft.net>
+
+ * reorg.c (label_before_next_insn): New function.
+ (relax_delay_slots): Use it instead of prev_label.
+ * rtl.h (prev_label): Delete declaration.
+ * emit-rtl.c (prev_label): Remove.
+
+2011-10-30 Revital Eres <revital.eres@linaro.org>
+
+ * modulo-sched.c (generate_prolog_epilog): Mark prolog and epilog
+ as BB_DISABLE_SCHEDULE.
+ (mark_loop_unsched): New function.
+ (sms_schedule): Call it.
+
+2011-10-29 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
+
+ PR target/50617
+ * config/pa/protos.h (attr_length_save_restore_dltp): Delete.
+ (cmpib_comparison_operator): Likewise.
+ (following_cal, output_and, output_ior, output_move_double,
+ output_fp_move_double, output_block_move, output_block_clear,
+ output_cbranch, output_lbranch, output_bb, output_bvb, output_dbra,
+ output_movb, output_parallel_movb, output_parallel_addb, output_call,
+ output_indirect_call, output_millicode_call, output_mul_insn,
+ output_div_insn, output_mod_insn, singlemove_string,
+ output_arg_descriptor, output_global_address, print_operand,
+ legitimize_pic_address, hppa_encode_label, symbolic_expression_p,
+ fmpyaddoperands, fmpysuboperands, emit_bcond_fp, emit_move_sequence,
+ emit_hpdiv_const, is_function_label_plus_const, jump_in_call_delay,
+ hppa_fpstore_bypass_p, attr_length_millicode_call, attr_length_call,
+ attr_length_indirect_call, return_addr_rtx, function_arg_padding,
+ insn_refs_are_delayed, get_deferred_plabel, ldil_cint_p, zdepi_cint_p,
+ output_ascii, compute_frame_size, and_mask_p, cint_ok_for_move,
+ hppa_expand_prologue, hppa_expand_epilogue, ior_mask_p,
+ compute_zdepdi_operands, output_64bit_and, output_64bit_ior,
+ reloc_needed, magic_milli, shadd_constant_p): Consistently prefix
+ exported functions and variables with "pa_".
+ * config/pa/predicates.md: Likewise.
+ * config/pa/pa64-hpux.h: likewise.
+ * config/pa/som.h: Likewise.
+ * config/pa/elf.h: Likewise.
+ * config/pa/pa64-linux.h: Likewise.
+ * config/pa/pa.md: Likewise.
+ * config/pa/pa.c: Likewise.
+ * config/pa/pa-linux.h: Likewise.
+ * config/pa/pa.h: Likewise.
+ * config/pa/constraints.md: Likewise.
+
+2011-10-29 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (xop_sha<mode>3): Rename from xop_ashl<mode>3.
+ Update all uses.
+ (xop_shl<mode>3): Rename from xop_lshl<mode>3. Update all uses.
+ * config/i386/i386.c: Update all uses.
+
+2011-10-29 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (lshlv16qi3): Remove expander.
+ (lshrv16qi3): New expander.
+ (<shift_insn>v16qi3): Macroize expander from ashrv16qi3 and lshrv16qi3
+ using any_shiftrt code iterator. Cleanup.
+ (ashlv16qi3): Cleanup.
+ (ashrv2di3): Ditto.
+
+2011-10-29 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
+
+ PR target/50691
+ * config/pa/pa.c (emit_move_sequence): Legitimize TLS symbol
+ references.
+ (pa_legitimate_constant_p): Return false for TLS_MODEL_GLOBAL_DYNAMIC
+ and TLS_MODEL_LOCAL_DYNAMIC symbol references.
+
+2011-10-29 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50887
+ * config/avr/avr.opt (-maccumulate-args): New option.
+ * config/avr/avr.h (STARTING_FRAME_OFFSET): Redefine to
+ avr_starting_frame_offset.
+ (ACCUMULATE_OUTGOING_ARGS): Define to avr_accumulate_outgoing_args.
+ * config/avr/avr.md (UNSPECV_WRITE_SP_IRQ_ON): Remove.
+ (UNSPECV_WRITE_SP_IRQ_OFF): Remove.
+ (UNSPECV_WRITE_SP): New constant.
+ (*addhi3_sp_R): Rewrite to...
+ (*addhi3_sp): ...this new insn.
+ (movhi_sp_r_irq_off, movhi_sp_r_irq_on): Combine to...
+ (movhi_sp_r): ...this new insn.
+ * config/avr/avr-protos.h (avr_accumulate_outgoing_args): New.
+ (avr_starting_frame_offset): New.
+ * config/avr/avr.c (avr_accumulate_outgoing_args): New function.
+ (avr_starting_frame_offset): New function.
+ (avr_outgoing_args_size): New static function.
+ (avr_initial_elimination_offset): Use it.
+ (avr_simple_epilogue): Use it.
+ (avr_asm_function_end_prologue): Use it.
+ (expand_epilogue): Use it.
+ (expand_prologue): Use it. Break out code to...
+ (avr_prologue_setup_frame): ...this new static function.
+ (avr_can_eliminate): Allow eliminating to frame pointer if there
+ is one.
+ (avr_frame_pointer_required_p): Use frame pointer if target has a
+ nonlocal label.
+ * config/avr/constraints.md (R): Remove.
+ (Csp): New constraint.
+ * config/avr/predicates.md (avr_sp_immediate_operand): Use it.
+
+2011-10-29 Andi Kleen <ak@linux.intel.com>
+
+ * gcc-ar.c (target_machine): Add.
+
+2011-10-29 Anatoly Sokolov <aesok@post.ru>
+
+ * config/cris/cris.c (reg_ok_for_base_p, reg_ok_for_index_p,
+ cris_constant_index_p, cris_base_p, cris_index_p,
+ cris_base_or_autoincr_p, cris_bdap_index_p, cris_biap_index_p,
+ cris_legitimate_address_p): New functions.
+ (TARGET_LEGITIMATE_ADDRESS_P): Define.
+ (cris_pic_symbol_type, cris_valid_pic_const): Change arguments type
+ from rtx to const_rtx.
+ (cris_print_operand_address, cris_address_cost,
+ cris_side_effect_mode_ok): Use
+ cris_constant_index_p, cris_base_p, cris_base_or_autoincr_p,
+ cris_biap_index_p and cris_bdap_index_p.
+ * config/cris/cris.h (CONSTANT_INDEX_P, BASE_P, BASE_OR_AUTOINCR_P,
+ BDAP_INDEX_P, BIAP_INDEX_P, GO_IF_LEGITIMATE_ADDRESS,
+ REG_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P): Remove.
+ (EXTRA_CONSTRAINT_Q, EXTRA_CONSTRAINT_R, EXTRA_CONSTRAINT_T): Use
+ cris_constant_index_p, cris_base_p, cris_base_or_autoincr_p,
+ cris_biap_index_p and cris_bdap_index_p.
+ * config/cris/cris.md (moversideqi movemsideqi peephole2): Use
+ cris_base_p.
+ * config/cris/cris-protos.h (cris_constant_index_p, cris_base_p,
+ cris_base_or_autoincr_p, cris_bdap_index_p, cris_biap_index_p): New
+ prototype.
+ (cris_pic_symbol_type, cris_valid_pic_const): Update prototype.
+
+2011-10-21 Andi Kleen <ak@linux.intel.com>
+
+ * ggc-page (PAGE_ALIGN): Add.
+ (alloc_page, ggc_pch_total_size, ggc_pch_this_base, ggc_pch_read):
+ Replace ROUND_UP with PAGE_ALIGN.
+
+2011-10-20 Andi Kleen <ak@linux.intel.com>
+
+ * ggc-page (alloc_anon): Add check argument.
+ (alloc_page): Add fallback to 1 page allocation.
+ Adjust alloc_anon calls to new argument.
+
+2011-10-18 Andi Kleen <ak@linux.intel.com>
+
+ * ggc-page (release_pages): First free large continuous
+ chunks in the madvise path.
+
+2011-10-18 Andi Kleen <ak@linux.intel.com>
+
+ * ggc-page.c (alloc_pages): Always round up entry_size.
+
+2011-10-19 Andi Kleen <ak@linux.intel.com>
+
+ * Makefile.in (MOSTLYCLEANFILES): Add gcc-ar/nm/ranlib.
+ (native): Add gcc-ar, gcc-nm, gcc-ranlib.
+ (AR_LIBS, gcc-ar, gcc-ar.o, gcc-ranlib, gcc-ranlib.o,
+ gcc-nm, gcc-nm.o, gcc-ranlib.c, gcc-nm.c): Add.
+ (install): Depend on install-gcc-ar.
+ (install-gcc-ar): Add.
+ (uninstall): Uninstall gcc-ar, gcc-nm, gcc-ranlib.
+ * gcc-ar.c: Add new file.
+
+2011-10-28 Pat Haugen <pthaugen@us.ibm.com>
+
+ * config/rs6000/rs6000.md (define_attr "type"): Add vecdouble.
+ * config/rs6000/vsx.md (VStype_simple, VStype_mul): Use vecdouble
+ type for V2DF.
+ (VStype_div): Use vector types for V2DF/V4SF.
+ (VStype_sqrt): Use *sqrt types.
+ (VS_spdp_type): Change type to vecdouble.
+ (*vsx_fmav2df4, *vsx_nfmsv2df4, vsx_xvcvdpsxws, vsx_xvcvdpuxws,
+ vsx_xvcvuxdsp, vsx_xvcvsxwdp, vsx_xvcvuxwdp, vsx_xvcvspsxds,
+ vsx_xvcvspuxds): Likewise.
+ (*vsx_fms<mode>4): Set type via <VStype_mul>.
+ (*vsx_eq_<mode>_p, *vsx_gt_<mode>_p, *vsx_ge_<mode>_p): Set type via
+ <VStype_simple>.
+ * config/rs6000/power7.md (power7-vecstore): Correct VSU pipe.
+ (power7-fpcompare, power7-sdiv, power7-ddiv, power7-sqrt,
+ power7-dsqrt): Correct insn latency.
+ (power7-vecsimple): Add veccmp type and correct dispatch/VSU values.
+ (power7-veccmp): Delete.
+ (power7-vecfloat): Correct latency/dispatch/VSU values.
+ (define_bypass "power7-vecfloat"): Correct latency and types.
+ (power7-veccomplex, power7-vecperm): Correct dispatch/VSU values.
+ (power7-vecdouble, power7-vecfdiv, power7-vecdiv): New.
+
+2011-10-28 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (shift_insn): Rename code attribute from
+ shiftrt_insn. Also handle ashift RTX.
+ (shift): Rename code attribute from shiftrt. Also handle ashift RTX.
+ (vshift): New code attribute.
+ (<shift_insn>*): Rename from <shiftrt_insn>*. Update asm templates.
+ (any_lshift): Move and rename code iterator from ...
+ * config/i386/sse.md (lshift): ... here.
+ (lshift_insn): Remove code attribute.
+ (lshift): Remove code attribute.
+ (vlshr<mode>3): Use lshiftrt RTX.
+ (vashr<mode>3, ashrv16qi3, ashrv2di3): Use ashiftrt RTX.
+ (vashl<mode>3, ashlv16qi3): Use ashift RTX.
+ (avx2_<lshift>v<mode>): Rename from avx2_<shift_insn>v<mode>. Use
+ any_lshift code iterator. Update asm template.
+ (<shift_insn><mode>3): Macroize insn from lshr<mode>3 and ashl<mode>3
+ usign any_lshift code iterator.
+ * config/i386/mmx.md (mmx_<shift_insn><mode>3): Macroize insn from
+ mmx_lshr<mode>3 and mmx_ashl<mode>3 usign any_lshift code iterator.
+ * config/i386/i386.c (bdesc_args) <__builtin_ia32_psll>: Update.
+
+2011-10-28 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/49313
+ * config/avr/avr.md (parityhi2): Expand allowing pseudos.
+ (*parityhi2): New pre-reload insn-and-split to map 16-bit parity
+ to the libgcc insn.
+ (*parityqihi2): Same for 8-bit parity.
+
+2011-10-28 Julian Brown <julian@codesourcery.com>
+
+ PR rtl-optimization/47918
+ * reload1.c (set_initial_label_offsets): Use initial offsets
+ for labels on the nonlocal_goto_handler_labels chain.
+
+2011-10-28 Iain Sandoe <iains@gcc.gnu.org>
+
+ * config/rs6000/t-darwin (LIB2FUNCS_STATIC_EXTRA):
+ Move darwin-fpsave.asm from here to ... LIB2FUNCS_EXTRA.
+ (LIB2FUNCS_EXTRA): Add darwin-gpsave.asm.
+ (TARGET_LIBGCC2_CFLAGS): Ensure that fPIC and -pipe are inherited from
+ config/t-darwin.
+ * config/rs6000/darwin.h (FP_SAVE_INLINE): Adjust to enable.
+ (GP_SAVE_INLINE): Likewise.
+ (SAVE_FP_PREFIX, SAVE_FP_SUFFIX, RESTORE_FP_PREFIX,
+ RESTORE_FP_SUFFIX): Set to empty strings.
+ * config/rs6000/rs6000.c (rs6000_savres_strategy): Implement for Darwin.
+ (debug_stack_info): Print savres_strategy.
+ (rs6000_savres_routine_name): Implement for Darwin.
+ (rs6000_make_savres_rtx): Adjust used register for Darwin.
+ (rs6000_emit_prologue): Implement out-of-line saves for Darwin.
+ (rs6000_output_function_prologue): Don't emit .extern for Mach-O.
+ (rs6000_emit_epilogue): Implement out-of-line saves for Darwin.
+ * config/rs6000/darwin-gpsave.asm: New file.
+
+2011-10-28 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/sse.md (VI4SD_AVX2): Removed.
+ (VI48_AVX2, VI128_128, VI48_128, VI48_256): New mode iterators.
+ (vashl<mode>3): Use VI12_128 iterator instead of VI124_128.
+ Add another expander using VI48_128 iterator for
+ TARGET_AVX2 || TARGET_XOP and another using VI48_256 iterator
+ for TARGET_AVX2.
+ (vlshr<mode>3): Likewise. Change register_operand predicate to
+ nonimmediate_operand on last operand in the VI12_128 expander.
+ (vashr<mode>3): Use VI128_128 iterator instead of VI124_128.
+ (vashrv4si3, vashrv8si3): New expanders.
+ (avx2_ashrvv8si, avx2_ashrvv4si, avx2_<lshift>vv8si,
+ avx2_<lshift>vv2di): Removed.
+ (avx2_ashrv<mode>): New insn with VI4_AVX2 iterator.
+ (avx2_<lshift>v<mode>): Macroize using VI48_AVX2
+ iterator. Simplify pattern.
+
+2010-10-28 Richard Guenther <rguenther@suse.de>
+
+ PR driver/50876
+ * lto-wrapper.c (get_options_from_collect_gcc_options):
+ Properly count arguments.
+ (run_gcc): Use an obstack to collect argv, properly separate
+ switches and their arguments.
+
+2011-10-28 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-vect-stmts.c (vectorizable_shift): Give up if op1 has different
+ vector mode from vectype's mode.
+
+2011-10-28 Chung-Lin Tang <cltang@codesourcery.com>
+
+ PR rtl-optimization/49720
+ * simplify-rtx.c (simplify_relational_operation_1): Detect
+ infinite recursion condition in "(eq/ne (plus x cst1) cst2)
+ simplifies to (eq/ne x (cst2 - cst1))" case.
+
+2011-10-27 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.md (snedi_special): Only match when not VIS3.
+ (*snedi_zero): Likewise.
+ (*snedi_zero_trunc): Likewise.
+ (snedi_special_vis3): New expander.
+ (*snedi_zero_vis3): New insn.
+ (*snedi_zero_trunc_vis3): Likewise.
+ (*sltu_insn_vis3): Likewise.
+ (*sltu_insn_vis3_trunc): Likewise.
+ (addxc): Likewise.
+ (*addxc_trunc_sp64_vis3): Likewise.
+ * config/sparc/sparc.c (emit_scc_insn): When VIS3 use the
+ gen_snedi_special_vis3 expander, and try GTU/LTU addx based
+ sequences on DImode values.
+
+ * config/sparc/sparc.md (64-bit vector moves): Use 'e' not 'f'
+ constraint.
+
+ * regcprop.c (copyprop_hardreg_forward_1): Reject the
+ transformation when we narrow the mode on big endian.
+
+2011-10-27 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/sse.md (avx_cvtpd2dq256_2, avx_cvttpd2dq256_2,
+ vec_pack_sfix_trunc_v4df, vec_pack_sfix_v4df): New expanders.
+ (*avx_cvtpd2dq256_2, *avx_cvttpd2dq256_2): New insns.
+
+ * config/i386/i386.c (ix86_print_operand): Handle 'q' and 'x'
+ overrides for -masm=intel memory.
+ * config/i386/sse.md (sse2_cvtdq2pd, sse2_cvtps2pd,
+ sse4_1_<code>v8qiv8hi2, avx2_<code>v8qiv8si2,
+ sse4_1_<code>v4hiv4si2, avx2_<code>v4hiv4di2,
+ sse4_1_<code>v2siv2di2): Use %q1 instead of %1 for -masm=intel.
+ (sse4_1_<code>v4qiv4si2, avx2_<code>v4qiv4di2,
+ sse4_1_<code>v2hiv2di2): Use %k1 instead of %1 for -masm=intel.
+ (sse4_1_<code>v2qiv2di2): Use %w1 instead of %1 for -masm=intel.
+
+2011-10-27 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-prop.c (compute_pass_through_member_ptrs): Rename parm_info
+ to parm_ainfo.
+ (ipa_compute_jump_functions_for_edge): Likewise.
+ (ipa_compute_jump_functions): Likewise.
+ (ipa_analyze_indirect_call_uses): Likewise.
+ (ipa_analyze_call_uses): Likewise.
+ (ipa_analyze_params_uses): Likewise.
+ (ipa_analyze_node): Likewise.
+
+2011-10-27 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/50875
+ * config/i386/sse.md (*avx_unpcklpd256): Remove extra insn
+ constraints. Change alternative 1 to "x,m,1".
+
+2011-10-27 Jakub Jelinek <jakub@redhat.com>
+
+ * Makefile.in (build/gencheck.o): Depend on tree.def and
+ c-family/c-common.def.
+
+ * tree-ssa-strlen.c: Include expr.h.
+ (get_stridx): Don't use c_strlen, instead use string_constant
+ and compute string length from it.
+ * Makefile.in (tree-ssa-strlen.o): Depend on $(EXPR_H).
+
+2011-10-27 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR rtl-optimization/46603
+ PR bootstrap/50879
+ * reload.c (push_reload): In the out case, restore previous behavior
+ for subregs that don't have word mode.
+
+2011-10-27 Ian Lance Taylor <iant@google.com>
+
+ * cppdefault.c: Undef NATIVE_SYSTEM_HEADER_DIR if
+ CROSS_DIRECTORY_STRUCTURE is defined and TARGET_SYSTEM_ROOT is not.
+ (cpp_include_defaults): Only use NATIVE_SYSTEM_HEADER_DIR if it is
+ defined.
+
+2011-10-27 Richard Henderson <rth@redhat.com>
+
+ * optabs.c (expand_vec_perm): Use the correct mode for scaling the
+ selector. Save the qimode constant selector for later use by the
+ qimode vec_perm pattern.
+
+2011-10-27 Bernd Schmidt <bernds@codesourcery.com>
+
+ * config/c6x/c6x.c (unit_req_imbalance, res_mii): Cast the first arg
+ to unit_req_factor to the right enum type.
+ (get_unit_operand_masks, reshuffle_units, try_rename_operands,
+ hwloop_optimize): Remove unused variables.
+
+2010-10-27 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/50731
+ * tree-vect-generic.c (do_binop): Handle scalar operands.
+
+2011-08-27 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/37191
+ * config/i386/sse.md (*vec_extract_v4sf_mem): Avoid combining registers
+ from different units in a single alternative.
+
+2011-10-26 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.c (emit_scc_insn): Force attempt of v9 sequences
+ if we're comparing DImode and comparison is other than EQ or NE.
+
+ * config/sparc/sparc.c (emit_scc_insn): Do not try v9 sequences until
+ LEU/LTU/GEU/GTU is attempted.
+ * config/sparc/sparc.md (*neg_snesi_sign_extend): New 64-bit insn
+ and split.
+ (*neg_seqsi_sign_extend): Likewise.
+ (*sltu_extend_sp64, *neg_sltu_extend_sp64, *sgeu_extend_sp64,
+ *neg_sgeu_extend_sp64): New insns.
+
+ * config/sparc/sparc-protos.h (sparc_expand_conditional_move): Declare.
+ * config/sparc/sparc.md (mov<I:mode>cc, mov<F:mode>cc): Call it.
+ (*mov<I:mode>_cc_v9): Normalize to expect operand 0 always in operand 4.
+ (*mov<I:mode>_cc_reg_sp64): Likewise.
+ (*movsf_cc_v9): Likewise.
+ (*movsf_cc_reg_sp64): Likewise.
+ (*movdf_cc_v9): Likewise.
+ (*movdf_cc_reg_sp64): Likewise.
+ (*movtf_cc_hq_v9): Likewise.
+ (*movtf_cc_reg_hq_sp64): Likewise.
+ (*movtf_cc_v9): Likewise.
+ (*movtf_cc_reg_sp64): Likewise.
+ * config/sparc/sparc.c (sparc_expand_conditional_move): New function.
+ (sparc_print_operand): Delete 'c' and 'd' handling, no longer used.
+
+2011-10-26 Eric Botcazou <ebotcazou@adacore.com>
+
+ * reload.c (reload_inner_reg_of_subreg): Change type of return value
+ and type of OUTPUT parameter to bool and adjust. Document MODE and
+ OUTPUT parameters. Use HARD_REGISTER_P. Reorder final condition
+ and improve associated comment.
+ (push_reload): Clarify and update comments about reloading of subregs.
+ Adjust calls to reload_inner_reg_of_subreg. Compute the class upfront
+ for the reloading of subregs in the out case as well.
+
+2011-10-26 Alexandre Oliva <aoliva@redhat.com>
+
+ PR debug/50826
+ * var-tracking.c (rtx_debug_expr_p): New.
+ (use_type): Don't use debug exprs to track non-VTA variables.
+
+2011-10-26 Jeff Law <law@redhat.com>
+
+ * doc/invoke.texi (sink-frequency-threshold): Document.
+ * tree-ssa-sink.c: Include params.h.
+ (select_best_block): New function.
+ (statement_sink_location): Use it.
+ * params.def (SINK_FREQUENCY_THRESHOLD): New PARAM.
+
+2011-10-26 Iain Sandoe <iains@gcc.gnu.org>
+
+ PR target/48108
+ * config/darwin.c (top level): Amend comments concerning LTO output.
+ (lto_section_num): New variable. (darwin_lto_section_e): New GTY.
+ (LTO_SECTS_SECTION, LTO_INDEX_SECTION): New.
+ (LTO_NAMES_SECTION): Rename.
+ (darwin_asm_named_section): Record LTO section counts and switches
+ in a vec of darwin_lto_section_e.
+ (darwin_file_start): Remove unused code.
+ (darwin_file_end): Put an LTO section termination label. Handle
+ output of the wrapped LTO sections, index and names table.
+
+2011-10-26 Alan Modra <amodra@gmail.com>
+
+ * config/rs6000/rs6000.c (rs6000_make_savres_rtx): Delete unneeded
+ declaration.
+ (rs6000_emit_stack_reset): Only return insn emitted when it adjusts sp.
+ (rs6000_make_savres_rtx): Rename to rs6000_emit_savres_rtx. Use
+ simple_return in pattern, emit instruction, and set jump_label.
+ (rs6000_emit_prologue): Update for rs6000_emit_savres_rtx. Use
+ simple_return rather than return.
+ (emit_cfa_restores): New function.
+ (rs6000_emit_epilogue): Emit cfa_restores when flag_shrink_wrap.
+ Add missing cfa_restores for SAVE_WORLD. Add missing LR cfa_restore
+ when using out-of-line gpr restore. Add missing LR and FP regs
+ cfa_restores for out-of-line fpr restore. Consolidate code setting
+ up cfa_restores. Formatting. Use LR_REGNO define.
+ (rs6000_output_mi_thunk): Use simple_return rather than return.
+ * config/rs6000/rs6000.md (sibcall*, sibcall_value*): Likewise.
+ (return_internal*): Likewise.
+ (any_return, return_pred, return_str): New iterators.
+ (return, conditional return insns): Provide both return and
+ simple_return variants.
+ * config/rs6000/rs6000.h (EARLY_R12, LATE_R12): Define.
+ (REG_ALLOC_ORDER): Move r12 before call-saved regs when FIXED_R13.
+ Move r11 and r0 later to suit shrink-wrapping.
+
+2011-10-26 Richard Guenther <rguenther@suse.de>
+
+ * lto-wrapper.c (run_gcc): Properly init/free obstack.
+
+2011-10-26 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/i386.md (UNSPEC_VSIBADDR): New.
+ * config/i386/predicates.md (vsib_address_operand,
+ vsib_mem_operator): New predicates.
+ * config/i386/i386.c (ix86_print_operand_address): Handle
+ UNSPEC_VSIBADDR addresses.
+ * config/i386/sse.md (avx2_gathersi<mode>, avx2_gatherdi<mode>,
+ avx2_gatherdi<mode>256): Adjust expanders to use MEM with
+ UNSPEC_VSIBADDR address.
+ (*avx2_gathersi<mode>, *avx2_gatherdi<mode>, *avx2_gatherdi<mode>256):
+ Adjust insns to use MEM with UNSPEC_VSIBADDR address.
+
+2011-10-26 Tom de Vries <tom@codesourcery.com>
+
+ PR tree-optimization/50763
+ * tree-ssa-tail-merge.c (replace_block_by): Update vops if phi_vuse1 or
+ phi_vuse2 is NULL_TREE only if bb1 dominates or is dominated by bb2.
+
+2011-10-26 Richard Guenther <rguenther@suse.de>
+
+ PR lto/41844
+ * Makefile.in (lto-wrapper): Depend on and link against opts-common.o.
+ (lto-wrapper.o): Depend on $(OPTS_H) and $(OPTIONS_H).
+ * lto-wrapper.c (get_options_from_collect_gcc_options): New function.
+ (run_gcc): Use it. Filter out language specific options.
+
+2011-10-26 Andreas Tobler <andreast@fgznet.ch>
+
+ * config/i386/freebsd64.h (LINK_SPEC): Emit the same warning as the
+ 32-bit target does.
+
2011-10-25 Paolo Carlini <paolo.carlini@oracle.com>
PR driver/46617
2011-10-25 Dodji Seketeli <dodji@redhat.com>
- * input.c (expand_location): Rewrite using
- linemap_resolve_location and linemap_expand_location. Add a
- comment.
+ * input.c (expand_location): Rewrite using linemap_resolve_location
+ and linemap_expand_location. Add a comment.
2011-10-25 Jakub Jelinek <jakub@redhat.com>
to MASK_LITTLE_ENDIAN.
* config/sparc/sparc.opt (Mask(LITTLE_ENDIAN)): Delete.
- * config/sparc/sparc.md: Only use F, G, and C constraints in FP
- insns. Only use D, Y, and Z constraints in vector insns.
+ * config/sparc/sparc.md: Only use F, G, and C constraints in FP insns.
+ Only use D, Y, and Z constraints in vector insns.
* config/sparc/sparc.md (cpu_feature, enabled): New attributes.
(*movsi_insn_novis3, *movsi_insn_vis3): Consolidate into one pattern
2011-10-24 Julian Brown <julian@codesourcery.com>
* config/m68k/m68k.c (notice_update_cc): Tighten condition for
- setting CC_REVERSED for FP comparisons.
+ setting CC_REVERSED for FP comparisons.
2011-10-24 Richard Guenther <rguenther@suse.de>
float and integer regs.
(sparc_register_move_cost): Adjust to account for VIS3 moves.
(sparc_preferred_reload_class): On 32-bit with VIS3 when moving an
- integer reg to a class containing EXTRA_FP_REGS, constrain to
- FP_REGS.
+ integer reg to a class containing EXTRA_FP_REGS, constrain to FP_REGS.
(sparc_secondary_reload): On 32-bit with VIS3 when moving between
float and integer regs we sometimes need a FP_REGS class
intermediate move to satisfy the reload. When this happens
specify an extra cost of 2.
- (*movsi_insn): Rename to have "_novis3" suffix and add !VIS3
- guard.
+ (*movsi_insn): Rename to have "_novis3" suffix and add !VIS3 guard.
(*movdi_insn_sp32_v9): Likewise.
(*movdi_insn_sp64): Likewise.
(*movsf_insn): Likewise.
(*mov<VM32:mode>_insn_vis3): New insn.
(*mov<VM64:mode>_insn_sp64_vis3): New insn.
(*mov<VM64:mode>_insn_sp32_vis3): New insn.
- (VM64 reg<-->reg split): New spliiter for 32-bit.
+ (VM64 reg<-->reg split): New splitter for 32-bit.
- * config/sparc/sparc.c (sparc_split_regreg_legitimate): New
- function.
+ * config/sparc/sparc.c (sparc_split_regreg_legitimate): New function.
* config/sparc/sparc-protos.h (sparc_split_regreg_legitimate):
Declare it.
* config/sparc/sparc.md (DImode reg/reg split): Use it.
2011-10-23 Tom de Vries <tom@codesourcery.com>
PR tree-optimization/50763
- * tree-ssa-tail-merge.c (same_succ_flush_bb): New function, factored out
- of ...
+ * tree-ssa-tail-merge.c (same_succ_flush_bb): New function, factored
+ out of ...
(same_succ_flush_bbs): Use same_succ_flush_bb.
(purge_bbs): Remove argument. Remove calls to same_succ_flush_bbs,
release_last_vdef and delete_basic_block.
(unlink_virtual_phi): New function.
(update_vuses): Add and use vuse1_phi_args argument. Set var to
- SSA_NAME_VAR of vuse1 or vuse2, and use var. Handle case that def_stmt2
- is NULL. Use phi result as phi arg in case vuse1 or vuse2 is NULL_TREE.
- Replace uses of vuse1 if vuse2 is NULL_TREE. Fix code to limit
- replacement of uses. Propagate phi argument for phis with a single
- argument.
+ SSA_NAME_VAR of vuse1 or vuse2, and use var. Handle case that
+ def_stmt2 is NULL. Use phi result as phi arg in case vuse1 or vuse2
+ is NULL_TREE. Replace uses of vuse1 if vuse2 is NULL_TREE. Fix code
+ to limit replacement of uses. Propagate phi argument for phis with a
+ single argument.
(replace_block_by): Update vops if phi_vuse1 or phi_vuse2 is NULL_TREE.
- Set vuse1_phi_args if vuse1 is a phi defined in bb1. Add vuse1_phi_args
- as argument to call to update_vuses. Call release_last_vdef,
- same_succ_flush_bb, delete_basic_block. Update CDI_DOMINATORS info.
+ Set vuse1_phi_args if vuse1 is a phi defined in bb1. Add
+ vuse1_phi_args as argument to call to update_vuses. Call
+ release_last_vdef, same_succ_flush_bb, delete_basic_block. Update
+ CDI_DOMINATORS info.
(tail_merge_optimize): Remove argument in call to purge_bbs. Remove
call to free_dominance_info. Only call calculate_dominance_info once.
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