+Mon Oct 20 14:16:38 1997 Geoffrey KEATING <geoffk@ozemail.com.au>
+
+ * rs6000/t-ppccomm: Use -msdata=none for crtstuff.
+
+Mon Oct 20 12:28:17 1997 Doug Evans <devans@canuck.cygnus.com>
+
+ * sparc/sparc.h (SPARC_V9,SPARC_ARCH64): Delete.
+ (DEFAULT_ARCH32_P): New macro.
+ (TARGET_ARCH{32,64}): Allow compile time or runtime selection.
+ (enum cmodel): Declare.
+ (sparc_cmodel_string,sparc_cmodel): Declare.
+ (SPARC_DEFAULT_CMODEL): Provide default.
+ (TARGET_{MEDLOW,MEDANY}): Renamed to TARGET_CM_{MEDLOW,MEDANY}.
+ (TARGET_FULLANY): Deleted.
+ (TARGET_CM_MEDMID): New macro.
+ (CPP_CPU_DEFAULT_SPEC): Renamed from CPP_DEFAULT_SPEC.
+ (ASM_CPU_DEFAULT_SPEC): Renamed from ASM_DEFAULT_SPEC.
+ (CPP_PREDEFINES): Take out stuff now handled by %(cpp_arch).
+ (CPP_SPEC): Rewrite.
+ (CPP_ARCH{,32,64,_DEFAULT}_SPEC): New macros.
+ (CPP_{ENDIAN,SUBTARGET}_SPEC): New macros.
+ (ASM_ARCH{,32,64,_DEFAULT}_SPEC): New macros.
+ (ASM_SPEC): Add %(asm_arch).
+ (EXTRA_SPECS): Rename cpp_default to cpp_cpu_default.
+ Rename asm_default to asm_cpu_default.
+ Add cpp_arch32, cpp_arch64, cpp_arch_default, cpp_arch, cpp_endian,
+ cpp_subtarget, asm_arch32, asm_arch64, asm_arch_default, asm_arch.
+ (NO_BUILTIN_{PTRDIFF,SIZE}_TYPE): Define ifdef SPARC_BI_ARCH.
+ ({PTRDIFF,SIZE}_TYPE): Provide 32 and 64 bit values.
+ (MASK_INT64,MASK_LONG64): Delete.
+ (MASK_ARCH64): Renamed to MASK_64BIT.
+ (MASK_{MEDLOW,MEDANY,FULLANY,CODE_MODEL}): Delete.
+ (EMBMEDANY_BASE_REG): Renamed from MEDANY_BASE_REG.
+ (TARGET_SWITCHES): Always provide 64 bit options.
+ (ARCH64_SWITCHES): Delete.
+ (TARGET_OPTIONS): New option -mcmodel=.
+ (INT_TYPE_SIZE): Always 32.
+ (MAX_LONG_TYPE_SIZE): Define ifdef SPARC_BI_ARCH.
+ (INIT_EXPANDERS): sparc64_init_expanders renamed to sparc_init_....
+ (FUNCTION_{,BLOCK_}PROFILER): Delete TARGET_EMBMEDANY support.
+ (PRINT_OPERAND_PUNCT_VALID_P): Add '_'.
+ * sparc/linux-aout.h (CPP_PREDEFINES): Take out stuff handled by
+ CPP_SPEC.
+ (CPP_SUBTARGET_SPEC): Renamed from CPP_SPEC.
+ * sparc/linux.h: Likewise.
+ * sparc/linux64.h (SPARC_V9,SPARC_ARCH64): Delete.
+ (ASM_CPU_DEFAULT_SPEC): Renamed from ASM_DEFAULT_SPEC.
+ (TARGET_DEFAULT): Delete MASK_LONG64, MASK_MEDANY, add MASK_64BIT.
+ (SPARC_DEFAULT_CMODEL): Define.
+ (CPP_PREDEFINES): Take out stuff handled by CPP_SPEC.
+ (CPP_SUBTARGET_SPEC): Renamed from CPP_SPEC.
+ (LONG_DOUBLE_TYPE_SIZE): Define.
+ (ASM_SPEC): Add %(asm_arch).
+ * sparc/sol2.h (CPP_PREDEFINES): Take out stuff handled by CPP_SPEC.
+ (CPP_SUBTARGET_SPEC): Renamed from CPP_SPEC.
+ (TARGET_CPU_DEFAULT): Add ultrasparc case.
+ * sparc/sp64-aout.h (SPARC_V9,SPARC_ARCH64): Delete.
+ (TARGET_DEFAULT): MASK_ARCH64 renamed to MASK_64BIT.
+ (SPARC_DEFAULT_CMODEL): Define.
+ * sparc/sp64-elf.h (SPARC_V9,SPARC_ARCH64): Delete.
+ (TARGET_DEFAULT): MASK_ARCH64 renamed to MASK_64BIT. Delete
+ MASK_LONG64, MASK_MEDANY.
+ (SPARC_DEFAULT_CMODEL): Define.
+ (CPP_PREDEFINES): Delete.
+ (CPP_SUBTARGET_SPEC): Renamed from CPP_SPEC.
+ (ASM_SPEC): Add %(asm_arch).
+ (LONG_DOUBLE_TYPE_SIZE): Define.
+ (DWARF2_DEBUGGING_INFO): Define.
+ * sparc/splet.h (CPP_SPEC): Delete.
+ * sparc/sysv4.h (CPP_PREDEFINES): Take out stuff handled by CPP_SPEC.
+ (FUNCTION_BLOCK_PROFILER): Delete TARGET_EMBMEDANY support.
+ (BLOCK_PROFILER): Likewise.
+ * sparc/sparc.c (sparc_cmodel_string,sparc_cmodel): New globals.
+ (sparc_override_options): Handle code model selection.
+ (sparc_init_expanders): Renamed from sparc64_init_expanders.
+ * sparc/sparc.md: TARGET_<code_model> renamed to TARGET_CM_....
+ TARGET_MEDANY renamed to TARGET_CM_EMBMEDANY.
+ (sethi_di_embmedany_{data,text}): Renamed from sethi_di_medany_....
+ (sethi_di_fullany): Delete.
+
+Mon Oct 20 02:00:18 1997 Klaus Kaempf <kkaempf@progis.de>
+ Jeff Law <law@cygnus.com>
+ Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
+
+ * alpha/vms.h (DIVSI3_LIBCALL): OTS$ functions are upper case.
+ (DIVDI3_LIBCALL, UDIVSI3_LIBCALL, UDIVDI3_LIBVALL): Likewise.
+ (MODSI3_LIBCALL, MODDI3_LIBCALL): Likewise.
+ (UMODSI3_LIBCALL, UMODDI3_LIBCALL): Likewise.
+ * alpha/alpha.md (arg_home): Likewise.
+
+ * alpha/alpha.c (vmskrunch): Delete
+ * alpha/vms.h (ENCODE_SECTION_INFO, ASM_DECLARE_FUNCTION_NAME): Delete.
+ * alpha.c (output_prolog, VMS): Use alloca for entry_label and don't
+ truncate to 64 characters.
+
+ * make-l2.com: Support openVMS/Alpha.
+
+ * vmsconfig.com: Fix to work on openVMS/Alpha and openVMS/VAX.
+
+Sun Oct 19 19:00:35 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * longlong.h (count_leading_zeros): Add missing casts to USItype.
+
+Sun Oct 19 18:44:06 1997 Jeffrey A Law (law@cygnus.com)
+
+ * i386/bsd386.h (ASM_COMMENT_START): Define.
+
+Sat Oct 18 13:47:15 1997 Jason Merrill <jason@yorick.cygnus.com>
+
+ * tree.c (restore_tree_status): Also free up temporary storage
+ when we finish a toplevel function.
+ (dump_tree_statistics): Print stats for backend obstacks.
+
+Sat Oct 18 12:47:31 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * expr.c (use_group_regs): Don't call use_reg for MEMs.
+
+Sat Oct 18 09:49:46 1997 Jason Merrill <jason@yorick.cygnus.com>
+
+ * libgcc2.c (__throw): Don't copy the return address.
+ * dwarf2out.c (expand_builtin_dwarf_reg_size): Ignore return address.
+
+ * except.c (exceptions_via_longjmp): Initialize to 2 (uninitialized).
+ * toplev.c (main): Initialize exceptions_via_longjmp.
+
+ * tree.c: Add extra_inline_obstacks.
+ (save_tree_status): Use it.
+ (restore_tree_status): If this is a toplevel inline obstack and we
+ didn't want to save anything on it, recycle it.
+ (print_inline_obstack_statistics): New fn.
+ * function.c (pop_function_context_from): Pass context to
+ restore_tree_status.
+ * obstack.h (obstack_empty_p): New macro.
+
+Sat Oct 18 00:43:59 1997 Jeffrey A Law (law@cygnus.com)
+
+ * i386/freebsd.h (ASM_COMMENT_START): Fix.
+
+Fri Oct 17 23:48:52 1997 Jim Wilson (wilson@cygnus.com)
+
+ * v850.c (ep_memory_offset): New function.
+ (ep_memory_operand, substitute_ep_register, v850_reorg): Call it.
+
+ * v850.h (CONST_OK_FOR_*): Add and correct comments.
+ (CONSTANT_ADDRESS_P): Add comment.
+ (EXTRA_CONSTRAINT): Define 'U'.
+ * v850.md: Add comments on bit field instructions.
+ (addsi3): Delete &r/r/r alternative. Add r/r/U alternative.
+ (lshrsi3): Use N not J constraint.
+
+ * v850.md (v850_tst1+1): New define_split for tst1 instruction.
+
+ * v850.c (reg_or_0_operand): Call register_operand.
+ (reg_or_int5_operand): Likewise.
+ * v850.h (MASK_BIG_SWITCH, TARGET_BIG_SWITCH): New macros.
+ (TARGET_SWITCHES): Add "big-switch".
+ (ASM_OUTPUT_ADDR_VEC_ELT, ASM_OUTPUT_ADDR_DIFF_ELT, CASE_VECTOR_MODE,
+ ASM_OUTPUT_BEFORE_BASE_LABEL): Add support for TARGET_BIG_SWITCH.
+ (CASE_DROPS_THROUGH): Comment out.
+ (CASE_VECTOR_PC_RELATIVE, JUMP_TABLES_IN_TEXT_SECTION): Define.
+ * v850.md (cmpsi): Delete compare mode.
+ (casesi): New pattern.
+
+ * v850.h (CONST_OK_FOR_N): Delete redundant compare against zero.
+ * v850.md (ashlsi3): Use SImode not QImode for shift count.
+ (lshrsi3): Likewise.
+
+ * v850.c (print_operand): Add 'c', 'C', and 'z' support. Delete
+ unreachable switch statement after 'b' support. Remove "b" from
+ strings for 'b' support.
+ * v850.md (branch_normal, branch_invert): Change %b to b%b.
+
+Fri Oct 17 23:33:20 1997 Jeffrey A Law (law@cygnus.com)
+
+ * Makefile.in (LIBGCC2_CFLAGS): Avoid a backslash then an
+ empty line if @inhibit_libc@ is empty.
+
+Fri Oct 17 23:24:40 1997 Robert Lipe (robertl@dgii.com)
+
+ * i386/sco5.h: Let ELF use dwarf2 unwinding. COFF uses sjlj.
+ (EH_FRAME_SECTION_ASM_OP, EH_FRAME_SECTION_ASM_OP_ELF): Defined.
+ (EH_FRAME_SECTION_ASM_OP_COFF): Likewise.
+ (DWARF2_UNWIND_INFO): Let this track object file format.
+ (EXTRA_SECTIONS): Add in_eh.
+ (EH_FRAME_SECTION_ASM_OP, EH_FRAME_SECTION_ASM_OP_ELF): Define.
+ (EH_FRAME_SECTION_ASM_OP_COFF): Likewise.
+
+Fri Oct 17 17:13:42 1997 David S. Miller <davem@tanya.rutgers.edu>
+
+ * sparc/linux64.h (LINK_SPEC): Dynamic linker is ld-linux64.so.2.
+ * sparc/sparc.h (FUNCTION_PROFILER): Fix format string when
+ TARGET_MEDANY.
+ * sparc/sparc.c (dwarf2out_cfi_label): Extern no longer needed.
+ (output_double_int): Output DI mode values correctly when
+ HOST_BITS_PER_WIDE_INT is 64.
+ (output_fp_move_quad): If TARGET_V9 and not TARGET_HARD_QUAD, use
+ fmovd so it works if a quad float ends up in one of the upper 32
+ float regs.
+ * sparc/sparc.md (pic_{lo_sum,sethi}_di): New patterns
+ necessary for PIC support on sparc64.
+
+Fri Oct 17 13:39:56 1997 Doug Evans <dje@canuck.cygnus.com>
+
+ * sparc/sp64-elf.h (TARGET_DEFAULT): Delete MASK_STACK_BIAS.
+ * sparc/sparc.h (PROMOTE_MODE): Promote small ints if arch64.
+ (PROMOTE_FUNCTION_ARGS,PROMOTE_FUNCTION_RETURN): Define.
+ (SPARC_FIRST_FP_REG, SPARC_FP_REG_P): New macros.
+ (SPARC_{OUTGOING,INCOMING}_INT_ARG_FIRST): New macros.
+ (SPARC_FP_ARG_FIRST): New macro.
+ (CONDITIONAL_REGISTER_USAGE): All v9 fp regs are volatile now.
+ (REG_ALLOC_ORDER,REG_LEAF_ALLOC_ORDER): Reorganize fp regs.
+ (NPARM_REGS): There are 32 fp argument registers now.
+ (FUNCTION_ARG_REGNO_P): Likewise.
+ (FIRST_PARM_OFFSET): Update to new v9 abi.
+ (REG_PARM_STACK_SPACE): Define for arch64.
+ (enum sparc_arg_class): Delete.
+ (sparc_arg_count,sparc_n_named_args): Delete.
+ (struct sparc_args): Redefine and use for arch32 as well as arch64.
+ (GET_SPARC_ARG_CLASS,ROUND_REG,ROUND_ADVANCE): Delete.
+ (FUNCTION_ARG_ADVANCE): Rewrite.
+ (FUNCTION_ARG,FUNCTION_INCOMING_ARG): Rewrite.
+ (FUNCTION_ARG_{PARTIAL_NREGS,PASS_BY_REFERENCE}): Rewrite.
+ (FUNCTION_ARG_CALLEE_COPIES): Delete.
+ (FUNCTION_ARG_{PADDING,BOUNDARY}): Define.
+ (STRICT_ARGUMENT_NAMING): Define.
+ (doublemove_string): Declare.
+ * sparc/sparc.c (sparc_arg_count,sparc_n_named_args): Delete.
+ (single_move_string): Use GEN_INT, and HOST_WIDE_INT.
+ (doublemove_string): New function.
+ (output_move_quad): Clean up some of the arch64 support.
+ (compute_frame_size): Add REG_PARM_STACK_SPACE if arch64.
+ Don't add 8 bytes of reserved space if arch64.
+ (sparc_builtin_saveregs): Combine arch32/arch64 versions.
+ (init_cumulative_args): New function.
+ (function_arg_slotno): New static function.
+ (function_arg,function_arg_partial_nregs): New functions.
+ (function_arg_{pass_by_reference,advance}): New functions.
+ (function_arg_padding): New function.
+ * ginclude/va-sparc.h: Rewrite v9 support.
+
+Fri Oct 17 12:29:48 1997 Christian Iseli <Christian.Iseli@lslsun.epfl.ch>
+
+ * regclass.c (record_address_regs): Look at REG_OK_FOR_{BASE,INDEX}_P
+ for hard regs to determine base and index registers.
+
+ * reload.c (debug_reload_to_stream): New function. Specify stream
+ into which to write debug info.
+ (debug_reload): Modify to call debug_reload_to_stream with stderr.
+
+Thu Oct 16 15:07:51 1997 Richard Henderson <rth@cygnus.com>
+
+ * combine.c (can_combine_p): Don't combine with an asm whose
+ output is a hard register.
+
+Thu Oct 16 15:43:26 1997 Mike Stump (mrs@wrs.com)
+
+ * c-decl.c (start_struct): Ensure that structs with forward
+ declarations are in fact packed when -fpack-struct is given.
+
+ * stor-layout.c (layout_record): Ignore STRUCTURE_SIZE_BOUNDARY if
+ we are packing a structure. This allows a structure with only
+ bytes to be aligned on a byte boundary and have no padding on a
+ m68k.
+
+Thu Oct 16 15:17:54 1997 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
+
+ * rs6000.h (ROUND_TYPE_ALIGN): Don't blow up if no fields in record.
+
+Thu Oct 16 11:20:30 1997 Richard Henderson <rth@cygnus.com>
+
+ * alpha.c (alpha_return_addr_rtx): New variable.
+ (alpha_save_machine_status): New; save it.
+ (alpha_restore_machine_status): New; restore it.
+ (alpha_init_expanders): New; clear it.
+ (alpha_return_addr): New; set it.
+ (alpha_ra_ever_killed): New; if alpha_return_addr_rtx, regs_ever_live
+ is overly conservative, so search the insns explicitly.
+ (alpha_sa_mask [VMS]): Check alpha_ra_ever_killed.
+ (alpha_sa_size [VMS && !VMS]): Likewise.
+ * alpha.h (RETURN_ADDR_RTX): Call alpha_return_addr.
+ (INIT_EXPANDERS): New definition.
+
+ * alpha.c: Move REG_PV, REG_RA somewhere more visible in the file.
+ (output_prolog [!VMS]): Use them.
+
+ * alpha.c (output_prolog [!VMS]): Move gp detection to ...
+ (alpha_does_function_need_gp): ... a new function. Refine the
+ CALL_INSN test to just TYPE_JSR.
+ * alpha.md (most call insns): Fix some jsr/ibr type transpositions.
+
+Thu Oct 16 09:36:47 1997 Jeffrey A Law (law@cygnus.com)
+
+ * version.c: Bump for snapshot.
+
+Wed Oct 15 21:38:18 1997 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
+
+ * pa.c (move_operand): Respect -mdisable-indexing.
+ * pa.h (GO_IF_LEGITIMATE_ADDRESS): Likewise.
+
+Wed Oct 15 21:34:45 1997 David Edelsohn <edelsohn@mhpcc.edu>
+
+ * rs6000.md (udivsi3, divsi3): Split into MQ and non-MQ cases for
+ PPC601.
+ (umulsidi3,umulsi3_highpart): Ditto.
+ (smulsi3_highpart_no_mq): Add !TARGET_POWER.
+
+Wed Oct 15 18:21:46 1997 Richard Henderson <rth@cygnus.com>
+
+ * alpha.c (final_prescan_insn): Gut, remove and transform to ...
+ (alpha_handle_trap_shadows): ... a new function. Handle the entire
+ function in one go. Emit RTL for trapb, instead of printf directly.
+ (alpha_reorg): New function. Call alpha_handle_trap_shadows.
+ (trap_pending): Kill global variable.
+ (output_epilog): Don't call final_prescan_insn.
+ (struct shadow_summary): Elide $31 and $f31; now it fits in a word.
+ * alpha.h (FINAL_PRESCAN_INSN): Remove.
+ (MACHINE_DEPENENT_REORG): Define.
+ * alpha.md (jsr patterns with trapb): Stupid and useless. Kill.
+ (trapb): New insn.
+
+Wed Oct 15 18:16:05 1997 Richard Henderson <rth@cygnus.com>
+
+ Tune Haifa scheduler for Alpha:
+ * alpha.h (ISSUE_RATE): Define.
+ * alpha.c (alpha_adjust_cost): Handle EV5 mult delay; don't apply
+ EV4 adjustments to EV5.
+ * alpha.md: Remove all scaling from function unit delays. Rework
+ EV5 function units to match the CPU.
+ (umuldi3_highpart): EV5 added the IMULH insn class.
+
Wed Oct 15 17:42:41 1997 Jeffrey A Law (law@cygnus.com)
* pa.c (following_call): Fail if the CALL_INSN is an indirect
OSDN Git Service
