+2007-09-12 Bernd Schmidt <bernd.schmidt@analog.com>
+
+ * config/bfin/bfin.h (enum reg_class, REG_CLASS_CONTENTS,
+ REG_CLASS_NAMES): Add P0REGS.
+ (REGNO_REG_CLASS): Return it where appropriate.
+ (REG_CLASS_FROM_CONSTRAINT): Add 'qA'.
+ (CLASS_LIKELY_SPILLED_P): P0REGS is likely_spilled.
+ * doc/md.texi (Blackfin family): Document 'q' constraints.
+
+2007-09-11 Steve Kenton <skenton@ou.edu
+
+ * pa/linux-unwind.h: Guard with inhibit_libc.
+ * pa/hpux-unwind.h: Likewise.
+
+2007-09-11 David Daney <ddaney@avtrex.com>
+
+ * doc/invoke.texi: Document new MIPS -mllsc and -mno-llsc options.
+ * doc/install.texi: Document new --with-llsc and --without-llsc
+ options.
+ * config.gcc: Handle --with-llsc and --without-llsc configure options.
+ * config/mips/mips.md (sync, memory_barrier): Wrap sync instrunction
+ in %| and %- operand codes. Depend on GENERATE_SYNC instead of
+ ISA_HAS_SYNC.
+ (sync_compare_and_swap<mode>, sync_add<mode>, sync_sub<mode>,
+ sync_old_add<mode>, sync_old_sub<mode>, sync_new_add<mode>,
+ sync_new_sub<mode>, sync_<optab><mode>, sync_old_<optab><mode>,
+ sync_new_<optab><mode>, sync_nand<mode>, sync_old_nand<mode>,
+ sync_new_nand<mode>, sync_lock_test_and_set<mode>): Depend on
+ GENERATE_LL_SC instead of ISA_HAS_LL_SC.
+ * config/mips/mips.opt (mllsc): New option.
+ * config/mips/mips.c (mips_llsc): Define variable.
+ (mips_handle_option): Handle mllsc option.
+ (override_options): Set mips_print_operand_punct for '|' and '-'.
+ (print_operand): Add new %| and %- operand codes.
+ * config/mips/mips.h (mips_llsc_setting): New enum type.
+ (mips_llsc): Declare.
+ (OPTION_DEFAULT_SPECS): Add llsc handling.
+ (GENERATE_SYNC): New macro.
+ (GENERATE_LL_SC): New macro.
+ (MIPS_COMPARE_AND_SWAP, MIPS_SYNC_OP, MIPS_SYNC_OLD_OP,
+ MIPS_SYNC_NEW_OP, MIPS_SYNC_NAND, MIPS_SYNC_OLD_NAND,
+ MIPS_SYNC_NEW_NAND, MIPS_SYNC_EXCHANGE): Wrap instructions
+ in %| and %- operand codes.
+
+2007-09-11 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree-ssa-structalias.c (push_fields_onto_fieldstack): Deal with
+ TYPE_NONALIASED_COMPONENT like with DECL_NONADDRESSABLE_P.
+
+2007-09-11 Jason Merrill <jason@redhat.com>
+
+ PR middle-end/27945
+ * stor-layout.c (layout_decl): Do pack variable size fields.
+
+2007-09-11 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ * config/m68k/predicates.md (movsi_const0_operand,
+ non_symbolic_call_operand): New predicates.
+
+ * config/m68k/constraints.md: (Cs, Ci, C0, Cj, CQ, CW, CZ, CS, Ap, Ac):
+ New constraints.
+ * doc/md.texi (Constraints for Particular Machines: Motorola 680x0):
+ Document constraints N, O, P, R, S, T, Q, U, W, Cs, Ci, C0, Cj, CQ,
+ CW, CZ, CS, Ap and Ac.
+
+ * config/m68k/m68k.md (UNSPEC_IB): New constant.
+ (constraints.md): New include.
+ (cpu, type, type1, opx, opy, opx_type, opy_type, size, opx_access,
+ opx_mem, opy_mem, op_mem, guess, split): New attributes.
+ (movdf_internal): Name pattern. Fix to use alternatives. Add split.
+ Specify attributes.
+ (pushdi): Add split.
+ (tstsi_internal): Name pattern. Fix to use alternatives. Specify
+ attributes. Split tstsi_internal_68020_cf from it.
+ (tstsi_internal_68020_cf): New pattern.
+ (tsthi_internal, tstqi_internal): Name pattern. Specify attributes.
+ (tst<mode>_cf): Specify attributea.
+ (cmpsi_cf): Name pattern. Specify attributes.
+ (cmp<mode>_68881, cmp<mode>_cf): Specify type attribute.
+ (pushexthisi_const): Fix to use alternatives. Specify
+ attributes.
+ (movsi_const0): Split movsi_const0_68000_10 and movsi_const0_68040_60
+ from it. Fix to use alternatives. Specify attributes.
+ (movsi_const0_68040_10, movsi_const0_68040_60): New patterns.
+ (movsi_cf, movstrictqi_cf): Fix to use alternatives. Specify
+ attributes.
+ (movsf_cf_soft): Specify attributes.
+ (movdf_cf_soft): Add split.
+ (pushasi, zero_extendhisi2_cf, zero_extendqisi2_cfv4,
+ cfv4_extendhisi2, 68k_extendhisi2, extendqihi2, cfv4_extendqisi2,
+ 68k_extendqisi2, truncdfsf2_cf): Specify attributes.
+ (truncdfsf2_68881): Name pattern. Specify attributes.
+ (floatsi<mode>2_cf, floathi<mode>2_68881, floathi<mode>2_cf,
+ floatqi<mode>2_68881, floatqi<mode>2_cf, ftrunc<mode>2_cf,
+ fix<mode>qi2_cf, fix<mode>hi2_cf, fix<mode>si2_cf, adddi_dishl32):
+ Specify attributes.
+ (addsi3_5200): Fix to use alternatives. Specify attributes.
+ Add splits.
+ (add<mode>3_cf, subdi_dishl32): Specify attributes.
+ (subsi3): Add alternative for subq.l. Specify attributes.
+ (sub<mode>3_cf, mulhi3, mulhisi3): Specify attributes.
+ (mulhisisi3_s, mulsi3_68020, mulsi3_cf): Name pattern. Specify
+ attributes.
+ (umulhisi3): Specify attributes.
+ (mulhisisi3_z): Name pattern. Specify attributes.
+ (fmul<mode>3_cf, div<mode>3_cf, negsi2_internal, negsi2_5200,
+ sqrt<mode>2_68881, clzsi2, one_cmplsi2_5200, subreghi1ashrdi_const32,
+ subregsi1ashrdi_const32, ashrsi3, subreg1lshrdi_const32, lshrsi3,
+ bsetmemqi): Specify attributes.
+ (bsetmemqi_ext): Name pattern. Specify attributes.
+ (bclrmemqi): Specify attributes.
+ (bclrmemqi_ext, scc, sls): Name pattern. Specify attributes.
+ (beq, bne, bgt, bgtu, blt, bltu, bge, bgeu, ble, bleu): Specify
+ attributes.
+ (beq2, bne2, bgt2, bgtu2, blt2, bltu2, bge2, bgeu2, ble2, bleu2): Name
+ pattern. Specify attributes.
+ (jump): Specify attributes.
+ (tablejump_internal): Name pattern. Specify attributes.
+ (call_value): Split into non_symbolic_call_value,
+ symbolic_call_value_jsr, symbolic_call_value_bsr. Fix to use
+ alternatives. Specify attributes.
+ (non_symbolic_call_value, symbolic_call_value_jsr,
+ symbolic_call_value_bsr): New patterns.
+ (nop, return, unlink, indirect_jump): Specify attributes.
+ (trap): Fix condition. Specify attributes.
+ (ib): New pattern.
+
+ * config/m68k/m68k.c (m68k_symbolic_call_var): New variable.
+ (override_options): Initialize it. Initialize m68k_sched_cpu.
+ (CONST_METHOD): Rename to M68K_CONST_METHOD, move to m68k.h.
+ (const_method): Make global, rename to m68k_const_method.
+ (const_int_cost, output_move_const_into_data_reg): Update.
+ (output_move_double): Parametrize to emit rtl code, rename to
+ handle_move_double.
+ (output_reg_adjust, emit_reg_adjust, output_compadr, output_movsi,
+ emit_movsi): New static functions.
+ (output_move_double): New function with semantics of old
+ output_move_double.
+ (m68k_emit_move_double): New function.
+ (m68k_sched_cpu): New variable.
+ (attr_op_type): New enum.
+ (sched_guess_p): New variable.
+ (sched_address_type, sched_operand_type, sched_attr_op_type):
+ New static functions.
+ (m68k_sched_attr_opx_type, m68k_sched_attr_opy_type,
+ m68k_sched_attr_size, m68k_sched_attr_op_mem): New functions.
+ (sched_branch_type): New static variable.
+ (m68k_sched_branch_type): New function.
+ * config/m68k/m68k.h (M68K_SYMBOLIC_CALL): New enum.
+ (m68k_symbolic_call_var): Declare.
+ (M68K_CONST_METHOD): Rename from CONST_METHOD. Move here from m68k.c.
+ (m68k_const_method, m68k_emit_move_double, m68k_sched_cpu,
+ m68k_sched_attr_opx_type, m68k_sched_attr_opy_type,
+ m68k_sched_attr_size, m68k_sched_attr_op_mem, m68k_sched_branch_type):
+ Declare.
+
+2007-09-11 Jakub Jelinek <jakub@redhat.com>
+
+ * builtins.def (BUILT_IN_VA_ARG_PACK_LEN): New builtin.
+ * builtins.c (expand_builtin) <case BUILT_IN_VA_ARG_PACK_LEN>: Issue
+ error if __builtin_va_arg_pack_len () wasn't optimized out during
+ inlining.
+ * tree-inline.c (copy_bb): Replace __builtin_va_arg_pack_len ()
+ with the number of inline's anonymous arguments.
+ * doc/extend.texi: Document __builtin_va_arg_pack_len ().
+
+2007-09-11 Zdenek Dvorak <ook@ucw.cz>
+
+ * fold-const.c (extract_muldiv_1): Do not simplify
+ var * c * c to var.
+
+2007-09-11 Jan Hubicka <jh@suse.cz>
+
+ * i386.h (ix86_tune_indices): Add X86_TUNE_INTER_UNIT_CONVERSIONS.
+ (TARGET_INTER_UNIT_CONVERSIONS): New.
+ * i386.md (floatsi expanders): Remove redundant check for SImode
+ source; offload to memory when asked for.
+ (floatsisf2_mixed, floatsisf2_sse, floatsidf2_mixed, floatsidf2_sse
+ floatdisf2_mixed, floatsisf2_sse, floatsidf2_mixed, floatsidf2_sse):
+ Update conditions;
+ (floatsisf2_mixed_memory, floatsisf2_sse_memory,
+ floatsidf2_mixed_memory, floatsidf2_sse_memory
+ floatdisf2_mixed_memory, floatsisf2_sse_memory,
+ floatsidf2_mixed_memory, floatsidf2_sse_memory): New.
+
+2007-09-11 Jan Hubicka <jh@suse.cz>
+
+ * toplev.c (process_options): all frontends now do unit-at-a-time.
+ * cgraphunit.c: update comments.
+ (cgraph_expand_function): call passmanager dirrectly; emit thunks.
+ * c-decl.c (finish_function): use cgraph_add_new_function.
+ * function.c (expand_function_end): We are always unit-at-a-time.
+
+2007-09-11 Richard Sandiford <richard@codesourcery.com>
+
+ * config/mips/mips.c (mips_set_mips16_mode): Use separate anchor
+ settings for MIPS16.
+ (mips_use_anchors_for_symbol_p): Use default_use_anchors_for_symbol_p.
+
+2007-09-11 Richard Sandiford <richard@codesourcery.com>
+
+ * config/mips/mips.c (mips_symbol_insns_1): Allow LEAs of
+ SYMBOL_FORCE_TO_MEM constants.
+ (mips_rtx_costs): Give a cost of 1 to force_to_mem_operands.
+ (mips16_rewrite_pool_refs_info): New structure.
+ (mips16_rewrite_pool_constant): New function, split out from...
+ (mips16_rewrite_pool_refs): ...here. Take a pointer to a
+ mips16_rewrite_pool_refs_info structure rather than a pointer
+ to a constant pool. Force force_to_mem_operands into memory.
+ (mips16_lay_out_constants): Update call to mips16_rewrite_pool_refs.
+ * config/mips/predicates.md (force_to_mem_operand): New predicate.
+ * config/mips/constraints.md (kf): New constraint.
+ * config/mips/mips.md (*movdi_64bit_mips16): Add a d <- kf alternative.
+ (*movsi_mips16): Likewise.
+
+2007-09-11 Richard Sandiford <richard@codesourcery.com>
+ Nigel Stephens <nigel@mips.com>
+ David Ung <davidu@mips.com>
+
+ * config/mips/mips.h (CONSTANT_POOL_COST): Move to...
+ * config/mips/mips.c: ...here and set to 4 for TARGET_MIPS16.
+ (mips16_constant_cost, mips_immediate_operand_p, mips_binary_cost)
+ (mips_fp_mult_cost, mips_fp_div_cost, mips_sign_extend_cost)
+ (mips_zero_extend_cost): New functions.
+ (mips_rtx_costs): Treat COMPARE constants as having zero cost.
+ Use the new functions. Tweak many cost estimates, both here
+ and in the new subroutines. Return false when the cost of the
+ operands has not been calculated. Check for *clear_upper32.
+ Check for floating-point multiply-add, reciprocal and rsqrt
+ patterns. Handle comparison and rotation codes.
+
+2007-09-11 Danny Smith <dannysmith@users.sourceforge.net>
+
+ * config/i386/cygming.h (TARGET_STRIP_NAME_ENCODING): Don't
+ override default.
+ * config/i386/i386.c (get_dllimport_decl): Don't strip
+ FASTCALL_PREFIX.
+
+2007-09-10 Janis Johnson <janis187@us.ibm.com>
+
+ PR c/30013
+ * config/dfp-bit.c: Don't skip TFmode conversions; move strto*
+ declarations to top.
+ (DFP_TO_BFP): Use for either XFmode or TFmode.
+ (BFP_TO_DFP): Use for either XFmode or TFmode; always use cast
+ of BFP_VIA_TYPE.
+ * config/dfp-bit.h: Include float.h.
+ (LONG_DOUBLE_HAS_XF_MODE, LONG_DOUBLE_HAS_TF_MODE): Define if long
+ double is one of these modes, rather than using LIBGCC_HAS_*F_MODE
+ which doesn't mean the same thing.
+ (BFP_KIND): Use 4 to mean TFmode.
+ (BFP_FMT): Specify the number of decimal digits based on the
+ number of mantissa digits.
+ (BFP_VIA_TYPE): Binary float type to use as cast for sprintf.
+ (BFP_TO_DFP, DFP_TO_BFP): Define names for TFmode variants.
+ (STR_TO_BFP): Use strtold for XFmode or TFmode.
+ (TFtype): Define if TFmode is supported.
+ * doc/libgcc.texi (Decimal float library routines): Document
+ TF conversion functions.
+
+2007-09-10 Chao-ying Fu <fu@mips.com>
+
+ * config/mips/mips.c (mips_scalar_mode_supported_p): Declare.
+ (TARGET_SCALAR_MODE_SUPPORTED_P): Define.
+ (mips_emit_compare): Process fixed-point modes.
+ (mips_pad_arg_upward): Support fixed-point types.
+ (override_options): Allow fixed-point modes in accumulators.
+ (mips_pass_by_reference): Pass DQ, UDQ, DA, and UDA modes in registers.
+ (mips_vector_mode_supported_p): Support V2HQmode, V2UHQmode, V2HAmode,
+ V2UHAmode, V4QQmode, and V4UQQmode when TARGET_DSP.
+ (mips_scalar_mode_supported_p): New function to accept fixed-point
+ modes if the width is not greater than two BITS_PER_WORD.
+ * config/mips/mips.h (SHORT_FRACT_TYPE_SIZE, FRACT_TYPE_SIZE,
+ LONG_FRACT_TYPE_SIZE, LONG_LONG_FRACT_TYPE_SIZE,
+ SHORT_ACCUM_TYPE_SIZE, ACCUM_TYPE_SIZE, LONG_ACCUM_TYPE_SIZE,
+ LONG_LONG_ACCUM_TYPE_SIZE): Define.
+ * config/mips/mips.md ("d"): Update mode attribute for fixed-point
+ modes.
+ ("IMODE"): New mode attribute.
+ (mips-fixed.md): Include.
+ * config/mips/mips-modes.def: Create VECTOR_MODES for FRACT, UFRACT,
+ ACCUM, UACCUM.
+ * config/mips/mips-fixed.md: New file.
+
+2007-09-11 Ben Elliston <bje@au.ibm.com>
+
+ * config/spu/spu.md: Formatting fixes.
+
+2007-09-10 Janis Johnson <janis187@us.ibm.com>
+
+ * config/dfp-bit.c (dfp_unary_func): Delete.
+ (dfp_unary_op): Delete.
+ (dfp_binary_op): Use decFloat functions instead of decNumber
+ functions for binary operations.
+ (d32_binary_op): Convert 32-bit operands to 64 bits for evaluation.
+ (dnn_binary_op): Call dfp_binary_op with decFloat rather than
+ DFP_C_TYPE.
+ (dfp_compare_op): Use decFloat functions insteadof decNumber
+ functions for comparisons.
+ (d32_compare_op): Convert 32-bit operands to 64 bits for evaluation.
+ (dnn_binary_op): Call dfp_compare_op with decFloat rather than
+ DFP_C_TYPE.
+ (DFP_ADD, DFP_SUB, DFP_MULTIPLE, DFP_DIVIDE): Use macros for
+ call to dxx_binary_op and decFloat function.
+ (DFP_EQ, DFP_NE, DFP_LT, DFP_GT, DFP_LE, DFP_GE): Use macros for
+ calls to dxx_binary_op and decFloat function.
+ * config/dfp-bit.h: Include decFloat header files.
+ (decFloat, DFP_BINARY_OP, DFP_COMPARE_OP, DEC_FLOAT_ADD,
+ DEC_FLOAT_SUBTRACT, DEC_FLOAT_MULTIPLY, DEC_FLOAT_DIVIDE,
+ DEC_FLOAT_COMPARE, DEC_FLOAT_IS_ZERO, DEC_FLOAT_IS_NAN,
+ DEC_FLOAT_IS_SIGNED: Define for each of 3 operand widths.
+
+2007-09-10 Harsha Jagasia <harsha.jagasia@amd.com>
+ Jan Sjodin <jan.sjodin@amd.com>
+
+ * tree-vect-analyze.c (vect_analyze_operations): Change
+ comparison of loop iterations with threshold to less than
+ or equal to instead of less than. Reduce
+ min_scalar_loop_bound by one.
+ * tree-vect-transform.c (vect_estimate_min_profitable_iters):
+ Change prologue and epilogue iterations estimate to vf/2,
+ when unknown at compile-time. Change versioning guard
+ cost to taken_branch_cost. If peeling for alignment is
+ unknown at compile-time, change peel guard costs to one
+ taken branch and one not-taken branch per peeled loop.
+ If peeling for alignment is known but number of scalar loop
+ iterations is unknown at compile-time, change peel guard
+ costs to one taken branch per peeled loop. Change the cost
+ model equation to consider vector iterations as the loop
+ iterations less the prologue and epilogue iterations.
+ Change outside vector cost check to less than or equal to
+ zero instead of equal to zero.
+ (vect_do_peeling_for_loop_bound): Reduce
+ min_scalar_loop_bound by one.
+ * tree-vectorizer.h: Add TARG_COND_TAKEN_BRANCH_COST and
+ TARG_COND_NOT_TAKEN_BRANCH_COST.
+ * config/i386/i386.h (processor_costs): Add
+ scalar_stmt_cost, scalar_load_cost, scalar_store_cost,
+ vec_stmt_cost, vec_to_scalar_cost, scalar_to_vec_cost,
+ vec_align_load_cost, vect_unalign_load_cost,
+ vec_store_cost, cond_taken_branch_cost,
+ cond_not_taken_branch_cost.
+ Define macros for x86 costs.
+ * config/i386/i386.c:
+ (size_cost): Set scalar_stmt_cost, scalar_load_cost,
+ scalar_store_cost, vec_stmt_cost, vec_to_scalar_cost,
+ scalar_to_vec_cost, vec_align_load_cost,
+ vect_unalign_load_cost, vec_store_cost,
+ cond_taken_branch_cost, cond_not_taken_branch_cost to one.
+ (i386_cost, i486_cost, pentium_cost, pentiumpro_cost,
+ geode_cost, k6_cost, athlon_cost, pentium4_cost, nocona_cost,
+ core2_cost, generic64_cost, generic32_cost): Set to default
+ untuned costs.
+ (k8_cost, amdfam10_cost): Costs for vectorization tuned.
+ (x86_builtin_vectorization_cost): New.
+
+2007-09-10 Janis Johnson <janis187@us.ibm.com>
+ Ben Elliston <bje@au.ibm.com>
+
+ * dfp.c: Include decimal128Local.h;
+ (dfp_byte_swap): Remove.
+ (encode_decimal32, decode_decimal32): Don't handle endianness.
+ (encode_decimal64, decode_decimal64): Ditto.
+ (encode_decimal128, decode_decimal128): Ditto.
+ * config/dfp-bit.c (host_to_ieee32, ieee_to_host_32): Ditto.
+ (__swap64): Remove.
+ (host_to_ieee_64, ieee_to_host_64): Don't handle endianness.
+ (__swap128): Remove
+ (host_to_ieee_128, ieee_to_host_128): Don't handle endianness.
+ * Makefile.in (DECNUM_H): Add decimal128Local.h.
+
+2007-09-10 David Daney <ddaney@avtrex.com>
+
+ * config/mips/mips.md (UNSPEC_MEMORY_BARRIER): New entry in
+ define_constants.
+ (memory_barrier): Rewrote as an insn that clobbers memory.
+
+2007-09-10 Richard Sandiford <richard@codesourcery.com>
+
+ * config/mips/mips.c (mips_global_pointer): Check
+ call_really_used_regs instead of call_used_regs.
+ (mips_save_reg_p): Likewise. Save all call-saved registers
+ if current_function_saves_all_registers. Fix indentation.
+ No longer treat $18 as a special case.
+ (compute_frame_size): Guard FPR loop with TARGET_HARD_FLOAT.
+
+2007-09-10 Richard Sandiford <richard@codesourcery.com>
+
+ * config/mips/mips.h (MIPS_ARCH_FLOAT_SPEC): New macro.
+ * config/mips/mips.c (mips_cpu_info_table): Mention it in the
+ the introductory comment.
+ (MIPS_MARCH_CONTROLS_SOFT_FLOAT): Delete.
+ (override_options): Don't test for it.
+ * config/mips/sde.h (MIPS_MARCH_CONTROLS_SOFT_FLOAT): Delete.
+ (DRIVER_SELF_SPECS): Add MIPS_ARCH_FLOAT_SPEC.
+ * config/mips/vr.h: As for config/mips/sde.h.
+
+2007-09-10 Trevor Smigiel <trevor_smigiel@playstation.sony.com>
+ Revital Eres <eres@il.ibm.com>
+
+ * target.h (struct gcc_target.sched): New field: sms_res_mii.
+ (struct ddg): Define.
+ * target-def.h (TARGET_SCHED_SMS_RES_MII): Define.
+ (TARGET_SCHED): Add TARGET_SCHED_SMS_RES_MII.
+ * config/spu/spu.c: Include ddg.h.
+ (TARGET_SCHED_SMS_RES_MII): Define.
+ (spu_sms_res_mii): New function to calculate mii.
+ * modulo-sched (res_MII): Use it.
+ * doc/tm.texi: Document TARGET_SCHED_SMS_RES_MII.
+
+2007-09-10 Andreas Krebbel <krebbel1@de.ibm.com>
+
+ * config/s390/s390.c (s390_dump_pool): Create copy of constant
+ pool entries since they might hold values that must not be shared.
+
+2007-09-10 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/33369
+ * gcc/config/i386/sse.md (ashr<mode>3): Change op2 mode to SImode.
+ Use 'N' operand constraint for op2.
+ (lshr<mode>3): Ditto.
+ (ashl<mode>3): Ditto.
+ (vec_shl_<mode>): Use const_0_to_255_mul_8_operand predicate for op2.
+ (vec_shr_<mode>): Use const_0_to_255_mul_8_operand predicate for op2.
+
+ * gcc/config/i386/i386.c (ix86_expand_builtin) [IX86_BUILTIN_PSLL?128,
+ IX86_BUILTIN_PSRA*?128, IX86_BUILTIN_PSRL?128]: Convert op1 to SImode.
+
+2007-09-10 Andreas Krebbel <krebbel1@de.ibm.com>
+
+ * config/s390/s390.md ("fixuns_trunc<BFP:mode><GPR:mode>2"):
+ Change mode macro in the last real_2expN parameter to uppercase.
+
+2007-09-10 Michael Matz <matz@suse.de>
+
+ * tree-pass.h (pass_cselim): Declare new pass.
+ * passes.c (init_optimization_passes): Link in pass_cselim.
+ * tree-ssa-phiopt.c (tree_ssa_phiopt_worker): Renamed from
+ tree_ssa_phiopt; add do_store_elim parameter, handle it by calling
+ cond_store_replacement.
+ (condstoretemp): New static variable.
+ (cond_store_replacement): New function.
+ (tree_ssa_phiopt, tree_ssa_cs_elim): New wrappers around
+ tree_ssa_phiopt_worker.
+ (struct name_to_bb): New.
+ (get_non_trapping, name_to_bb_hash, name_to_bb_eq, add_or_mark_expr,
+ nt_init_block, nt_fini_block): New static functions.
+ (seen_ssa_names, nontrap_set): New static variables.
+ (gate_cselim, pass_cselim): Define new pass.
+ * common.opt (ftree-cselim): New flag.
+ * toplev.c (process_options): Set flag_tree_cselim if required.
+
+2007-09-10 Hans-Peter Nilsson <hp@axis.com>
+
+ * simplify-rtx.c (simplify_relational_operation_1): For recent
+ canonicalization, don't recurse if op1 equals both PLUS arguments.
+
+2007-09-09 David Daney <ddaney@avtrex.com>
+
+ * optabs.c (expand_sync_operation): Use plus insn if minus
+ CONST_INT_P(val).
+ (expand_sync_fetch_operation): Ditto.
+
+2007-09-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * i386.md (*floatsisf2_mixed_vector): Use cvtdq2ps instead
+ of cvtpq2ps.
+ (*floatsisf2_sse_vector): Likewise.
+
+2007-09-09 Krister Walfridsson <cato@df.lth.se>
+
+ * config/netbsd.h (HANDLE_PRAGMA_PACK_PUSH_POP): Define to 1.
+
+2007-09-09 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/i386/i386.h (ix86_tune_indices): Rename
+ X86_USE_VECTOR_CONVERTS to X86_TUNE_USE_VECTOR_CONVERTS.
+ (TARGET_USE_VECTOR_CONVERTS): Updated.
+ * config/i386/i386.c: Likewise.
+
+2007-09-09 Sandra Loosemore <sandra@codesourcery.com>
+ Nigel Stephens <nigel@mips.com>
+
+ * doc/invoke.texi (Overall Options): Add .sx file extension
+ as a synonym for .S.
+ * cppspec.c (known_suffixes): Likewise.
+ * gcc.c (default_compilers): Likewise.
+
+2007-09-09 Rask Ingemann Lambertsen <rask@sygehus.dk>
+
+ PR target/30315
+ * config/i386/i386.h (CANONICALIZE_COMPARISON): Delete.
+ * simplify-rtx.c (simplify_relational_operation_1): Add the
+ canonicalization from i386.h.
+ * doc/md.texi (Canonicalization of Instructions): Document it.
+
+2007-09-09 Jan Hubicka <jh@suse.cz>
+ Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
+
+ * i386.h (ix86_tune_indices): Add X86_USE_VECTOR_CONVERTS.
+ (TARGET_USE_VECTOR_CONVERTS): New.
+ * i386.md: New post-reload splitters for converting SF to DF and DF to
+ SF.
+ (floatsi* expander): Special case vector conversions.
+ (floatsisf2_mixed_vector, floatsisf2_sse_vector_nointernunit,
+ floatsisf2_sse_vector_internunit, floatsisf2_sse_vector,
+ floatsidf2_mixed_vector, floatsidf2_sse_vector): New.
+ (floatsisf2_mixed, floatsisf2_sse, floatsidf2_mixed, floatsidf2_sse):
+ Disable when doing vector converts.
+ (floatsi<mode>2_i387): Disable when
+ * sse.md (vec_dupv2df): Export.
+ * i386.c (ix86_tune_features): Enable SSE conversions.
+
+2007-09-09 Richard Guenther <rguenther@suse.de>
+
+ * tree-ssa-operands.c (add_virtual_operand): Only mark
+ stores as has_volatile_ops if alias information is not available.
+
+2007-09-09 Revital Eres <eres@il.ibm.com>
+
+ * doc/contrib.texi: Add myself.
+
+2007-09-09 Ira Rosen <irar@il.ibm.com>
+
+ * tree-vectorizer.h (stmt_vinfo_set_inside_of_loop_cost,
+ stmt_vinfo_set_outside_of_loop_cost): New functions.
+ * tree-vect-transform.c (vect_get_cost_fields): Remove.
+ (vect_model_simple_cost): Call
+ stmt_vinfo_set_inside/outside_of_loop_cost to set the relevant cost
+ field instead of calling vect_get_cost_fields.
+ (vect_model_store_cost, vect_model_load_cost): Likewise.
+
+2007-09-09 Revital Eres <eres@il.ibm.com>
+
+ * config/rs6000/rs6000.c (paired_init_builtins): Add const
+ declaration to bdesc_paired_preds variable.
+ (paired_expand_builtin): Likewise.
+
+2007-09-09 Revital Eres <eres@il.ibm.com>
+
+ * dbgcnt.def (sms_sched_loop): New counter.
+ * modulo-sched.c: Use sms_sched_loop instead of
+ MAX_SMS_LOOP_NUMBER to determine the maximum number of loops to
+ perform swing modulo scheduling on. Include dbgcnt.h.
+ * Makefile.in: Add DBGCNT_H to modulo-sched.o.
+ * params.def: Remove PARAM_MAX_SMS_LOOP_NUMBER.
+
+2007-09-09 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (X87MODEF12, SSEMODEF): Remove mode iterators.
+ Substitute all uses with ...
+ (MODEF): New mode iterator.
+
+ (fix_trunc<mode>_fisttp_i387_1): Remove operand constraints
+ from pre-regalloc define_insn_and_split splitter pattern.
+ (*fix_trunc<mode>_i387_1): Ditto.
+ (*fistdi2_1): Ditto.
+ (*fist<mode>2_1): Ditto.
+ (frndintxf2_floor): Ditto.
+ (*fist<mode>2_floor_1): Ditto.
+ (frndintxf2_ceil): Ditto.
+ (*fist<mode>2_ceil_1): Ditto.
+ (frndintxf2_trunc): Ditto.
+ (frndintxf2_mask_pm): Ditto.
+
+ (prologue): Use (const_int 0) as never generated filler insn.
+ (epilogue): Ditto.
+ (sibcall_epilogue): Ditto.
+ (eh_return_si): Ditto.
+ (eh_return_di): Ditto.
+
+ (add<mode>3): Rename from adddf3 and addsf3. Macroize expander
+ using MODEF mode iterator.
+ (sub<mode>3): Rename from subdf3 and subsf3. Macroize expander
+ using MODEF mode iterator.
+ (mul<mode>3): Rename from muldf3 and mulsf3. Macroize expander
+ using MODEF mode iterator.
+ (nearbyint<mode>2): Rename from nearbyintdf2 and nearbyintsf2.
+ Macroize expander using MODEF mode iterator.
+
+ (zero_extendsidi2): Remove operand constraints from expander.
+ (smuldi3_highpart): Ditto.
+ (indirect_jump): Ditto.
+ (tablejump): Ditto.
+ (rsqrtsf2): Ditto.
+ * config/i386/sse.md (storentv4sf): Ditto.
+ (storentv2df): Ditto.
+ (storentv2di): Ditto.
+ (storentsi): Ditto.
+ (sse2_cvtpd2ps): Ditto.
+ (vec_interleave_highv16qi): Ditto.
+ (vec_interleave_lowv16qi): Ditto.
+ (vec_interleave_highv8hi): Ditto.
+ (vec_interleave_lowv8hi): Ditto.
+ (vec_interleave_highv4si): Ditto.
+ (vec_interleave_lowv4si): Ditto.
+ (vec_interleave_highv2di): Ditto.
+ (vec_interleave_lowv2di): Ditto.
+ (sse2_maskmovdqu): Ditto.
+ * config/i386/mmx.md (mmx_maskmovq): Ditto.
+
2007-09-09 Ira Rosen <irar@il.ibm.com>
* tree-vectorizer.h (enum vect_def_type): Start enumeration from 1.
vectorizable_assignment): Likewise.
(vect_model_simple_cost, vect_model_store_cost, vect_model_load_cost):
Declare (make extern).
- * tree-vectorizer.c (new_stmt_vec_info): Initiliaze the new field.
+ * tree-vectorizer.c (new_stmt_vec_info): Initialize the new field.
(new_loop_vec_info): Likewise.
(destroy_loop_vec_info): Free memory allocated for SLP structures.
* tree-vect-analyze.c: Include recog.h.
2007-09-08 Uros Bizjak <ubizjak@gmail.com>
PR target/33329
- PR target/26449
+ PR rtl-optimization/26449
* config/i386/sse.md (mulv4si3): Do not expand sse2 sequence.
(*sse2_mulv4si3): New define_insn_and_split pattern. Split insn in
split1 pass.
(mulv16qi3): Implement as define_insn_and_split pattern instead of
- define_expand, to split insn in split1 pass.
+ define_expand. Split insn in split1 pass.
(mulv2di3): Ditto.
2007-09-08 Dorit Nuzman <dorit@il.ibm.com>
2007-09-07 Dorit Nuzman <dorit@il.ibm.com>
PR tree-optimization/33299
- * tree-vect-transform.c (vect_create_epilog_for_reduction): Update uses
- for all relevant loop-exit phis, not just the first.
+ * tree-vect-transform.c (vect_create_epilog_for_reduction): Update
+ uses for all relevant loop-exit phis, not just the first.
2007-09-07 Richard Guenther <rguenther@suse.de>
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