+2009-12-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+
+ PR other/40302
+ * configure.ac (HAVE_mpc): Don't define.
+ * config.in, configure: Regenerate.
+
+ PR other/40302
+ * builtins.c: Remove HAVE_mpc* checks throughout.
+ * fold-const.c: Likewise.
+ * real.h: Likewise.
+ * toplev.c: Likewise.
+
+2009-12-07 Edmar Wienskoski <edmar@freescale.com>
+
+ * config.gcc (cpu_is_64bit): Add new core e500mc64.
+ (powerpc*-*-*): Add new core e500mc64.
+ * config/rs6000/e500mc64.md: New file.
+ * config/rs6000/rs6000.c (processor_costs): Add new costs for
+ e500mc64.
+ (rs6000_override_options): Add e500mc64 case to
+ processor_target_table. Altivec and Spe options not allowed with
+ e500mc64. Disable string instructions for e500mc64. Enable branch
+ targets alignment for both e500mc and e500mc64. Initialize
+ rs6000_cost for e500mc64.
+ (rs6000_emit_sISEL): New function.
+ (rs6000_emit_sCOND): Call rs6000_emit_sISEL for isel targets.
+ (rs6000_emit_int_cmove): Fix mode of 64 bit isel pattern
+ generation.
+ (rs6000_issue_rate): Set issue rate for e500mc64.
+ (rs6000_rtx_costs): Set more accurate cost for mfcr instruction
+ on architectures with isel.
+ * config/rs6000/rs6000-protos.h (rs6000_emit_sISEL): Declare.
+ * config/rs6000/rs6000.h (processor_type): Add
+ PROCESSOR_PPCE500MC64.
+ (ASM_CPU_SPEC): Add e500mc64.
+ * config/rs6000/rs6000.md (define_attr "cpu"): Add ppce500mc64.
+ Include e500mc64.md.
+ (abssi2_isel): Expand pattern to handle DImode.
+ (nabs<mode>2_isel): New pattern.
+ (absdi2): Change pattern to handle 64 bit isel targets.
+ (absdi2_internal): Exclude ISEL targets.
+ (nabsdi2): Exclude ISEL targets.
+ * doc/invoke.texi: Add e500mc64 to list of cpus.
+
+2009-12-07 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (any_or): New code iterator.
+ (any_logic): Rename from plogic code iterator.
+ (logicprefix): Rename from plogicprefix code attribute.
+ (<code><mode>3): Macroize expander from {ior,xor}<mode>3 using
+ any_or code iterator.
+ (*<code><mode>_1): Macroize insn from *{ior,xor}<mode>_1 using
+ any_or code iterator.
+ (*<code><mode>_2): Ditto from *{ior,xor}<mode>_2.
+ (*<code><mode>_3): Ditto from *{ior,xor}<mode>_3.
+ (ior and xor splitters): Ditto.
+ * config/i386/mmx.md: Updated for rename.
+ * config/i386/sse.md: Ditto.
+
+2009-12-07 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (float<SSEMODEI24:mode><X87MODEF:mode>2):
+ Remove quotes around condition logic code.
+
2009-12-06 Richard Henderson <rth@redhat.com>
PR debug/42234
2009-12-06 Uros Bizjak <ubizjak@gmail.com>
- * config/i386/i386-md (g): Add HImode and QImode.
+ * config/i386/i386.md (g): Add HImode and QImode.
(general_szext_operand): New mode attribute.
(*test<mode>_1): Macroize insn from *test{qi,hi,si}_1 using
SWI124 mode iterator.
John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR target/40134
- * config.gcc (hppa*-*-linux*): Use config/t-slibgcc-libgcc.
+ * config.gcc (hppa*-*-linux*): Use config/t-slibgcc-libgcc.
* config/pa/pa-linux.h (LIB_SPEC): Remove.
2009-12-03 Sebastian Pop <sebastian.pop@amd.com>
2009-12-02 Richard Guenther <rguenther@suse.de>
PR middle-end/42229
- * cfgloopmanip.c (remove_path): Avoid cancelling loops
- twice.
+ * cfgloopmanip.c (remove_path): Avoid cancelling loops twice.
2009-12-02 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
to save the accumulator.
(rx_expand_prologue): Create a stack frame for fast interrupt
handlers, if necessary.
- (rx_expand_builtin_mvfc): Handle the case where there is no
- target.
+ (rx_expand_builtin_mvfc): Handle the case where there is no target.
2009-12-01 Sebastian Pop <sebastian.pop@amd.com>
(sh_function_value, sh_libcall_value, sh_function_value_regno_p): New
functions.
(TARGET_FUNCTION_VALUE, TARGET_LIBCALL_VALUE): Declare.
- * config/sh/sh.h: (FUNCTION_VALUE_REGNO_P): Redefine, use
+ * config/sh/sh.h (FUNCTION_VALUE_REGNO_P): Redefine, use
sh_function_value_regno_p.
(FUNCTION_VALUE, LIBCALL_VALUE): Remove.
* config/sh/sh-protos.h (sh_function_value_regno_p): Declare.