+2008-03-09 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/35496
+ * config/i386/i386.c (ix86_constant_algnment): Compute alignment using
+ ALIGN_MODE_128 for VECTOR_CST and INTEGER_CST in addition to REAL_CST.
+
+2008-03-09 Ira Rosen <irar@il.ibm.com>
+
+ * config/rs6000/rs6000.c (builtin_description): Rename vector
+ left shift operations.
+ * config/rs6000/altivec.md (UNSPEC_VSL): Remove.
+ (altivec_vsl<VI_char>): Rename to ...
+ (ashl<mode>3): ... new name.
+ (mulv4sf3, mulv4si3, negv4sf2): Replace gen_altivec_vslw with
+ gen_ashlv4si3.
+ (absv4sf2): Convert to use ashift:V4SI instead of UNSPEC_VSL.
+
+2008-03-08 Richard Guenther <rguenther@suse.de>
+
+ * coverage.h (tree_coverage_counter_addr): Declare.
+ * coverage.c (tree_coverage_counter_addr): New function.
+ * tree-profile.c (tree_gen_edge_profiler): Unshare counter
+ before using again.
+ (tree_gen_pow2_profiler): Use tree_coverage_counter_addr.
+ (tree_gen_one_value_profiler): Likewise.
+ (tree_gen_ic_profiler): Likewise.
+ (tree_gen_average_profiler): Likewise.
+ (tree_gen_ior_profiler): Likewise.
+
+2008-03-08 Richard Guenther <rguenther@suse.de>
+
+ * tree-ssa-sccvn.h (vn_binary_op_lookup): Remove.
+ (vn_binary_op_insert): Likewise.
+ (vn_unary_op_lookup): Likewise.
+ (vn_unary_op_insert): Likewise.
+ (vn_nary_op_lookup): Declare.
+ (vn_nary_op_insert): Likewise.
+ * tree-ssa-sccvn.c (struct vn_tables_s): Merge unary
+ and binary hashes, use a single obstack for unary_op_pool
+ and binary_op_pool.
+ (struct vn_binary_op_s, struct vn_unary_op_s): Replace with
+ a single struct vn_nary_op_s. Store tree code length and
+ a variable number of operands.
+ (struct vn_reference_op_struct): Remove unused op2.
+ (vn_reference_op_eq): Do not compare op2.
+ (vn_reference_op_compute_hash): Do not compute hash of op2.
+ (vn_unary_op_hash, vn_binary_op_hash): Replace with vn_nary_op_hash.
+ (vn_unary_op_compute_hash, vn_binary_op_compute_hash): Replace
+ with vn_nary_op_compute_hash.
+ (vn_unary_op_eq, vn_binary_op_eq): Replace with vn_nary_op_eq.
+ (vn_unary_op_lookup, vn_binary_op_lookup): Replace with
+ vn_nary_op_lookup.
+ (vn_unary_op_insert, vn_binary_op_insert): Replace with
+ vn_nary_op_insert.
+ (visit_unary_op): Call nary functions.
+ (visit_binary_op): Likewise.
+ (process_scc): Adjust for struct vn_tables_s changes.
+ (allocate_vn_table): Likewise.
+ (free_vn_table): Likewise.
+ * tree-vn.c (vn_add): Call nary functions.
+ (vn_lookup): Likewise.
+
+2008-03-08 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/35498
+ * config/rs6000/rs6000.c (rs6000_expand_compare_and_swapqhi): Shift
+ wdst back after sync_compare_and_swapqhi_internal.
+
+2008-03-08 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/22152
+ * config/i386/i386-modes.def (V1DI): New vector mode.
+ * config/i386/i386.h (VALID_MMX_REG_MODE): Add V1DImode.
+ * config/i386/mmx.md (MMXMODEI8): New mode iterator.
+ (MMXMODE248): Ditto.
+ (MMXMODE): Add V1DI mode.
+ (mmxvecsize): Change DI mode to V1DI mode.
+ ("mov<mode>): Use MMXMODEI8 mode iterator.
+ ("*mov<mode>_internal_rex64"): Ditto.
+ ("*mov<mode>_internal"): Ditto.
+ ("mmx_add<mode>3"): Ditto. Handle V1DImode for TARGET_SSE2.
+ ("mmx_sub<mode>3"): Ditto.
+ ("mmx_adddi3"): Remove insn pattern.
+ ("mmx_subdi3"): Ditto.
+ ("mmx_ashr<mode>3"): Use SImode and "yN" constraint for operand 2.
+ ("mmx_lshr<mode>3"): Ditto. Use MMXMODE248 mode iterator.
+ ("mmx_ashl<mode>3"): Ditto.
+ ("mmx_lshrdi3"): Remove insn pattern.
+ ("mmx_ashldi3"): Ditto.
+ * config/i386/i386.c (classify_argument): Handle V1DImode.
+ (function_arg_advance_32): Ditto.
+ (function_arg_32): Ditto.
+ (struct builtin_description) [IX86_BUILTIN_PADDQ]: Use
+ mmx_addv1di3 insn pattern.
+ [IX86_BUILTIN_PSUBQ]: Use mmx_subv1di3 insn pattern.
+ [IX86_BUILTIN_PSLL?, IX86_BUILTIN_PSRL?, IX86_BUILTIN_PSRA?,
+ IX86_BUILTIN_PSLL?I, IX86_BUILTIN_PSRL?I, IX86_BUILTIN_PSRA?I,
+ IX86_BUILTIN_PSLL?I128, IX86_BUILTIN_PSRL?I128, IX86_BUILTIN_PSRA?I128]:
+ Remove definitions of built-in functions.
+ (V1DI_type_node): New node.
+ (v1di_ftype_v1di_int): Ditto.
+ (v1di_ftype_v1di_v1di): Ditto.
+ (v2si_ftype_v2si_si): Ditto.
+ (v4hi_ftype_v4hi_di): Remove node.
+ (v2si_ftype_v2si_di): Ditto.
+ (ix86_init_mmx_sse_builtins): Handle V1DImode.
+ (__builtin_ia32_psll?, __builtin_ia32_psrl?, __builtin_ia32_psra?):
+ Redefine builtins using def_builtin_const with *_ftype_*_int node.
+ (__builtin_ia32_psll?i, __builtin_ia32_psrl?i, __builtin_ia32_psra?i):
+ Add new builtins using def_builtin_const.
+ (ix86_expand_builtin) [IX86_BUILTIN_PSLL?, IX86_BUILTIN_PSRL?,
+ IX86_BUILTIN_PSRA?, IX86_BUILTIN_PSLL?I, IX86_BUILTIN_PSRL?I,
+ IX86_BUILTIN_PSRA?I]: Handle builtin definitions.
+ * config/i386/mmintrin.h (__v1di): New typedef.
+ (_mm_add_si64): Cast arguments to __v1di type.
+ (_mm_sub_si64): Ditto.
+ (_mm_sll_pi16): Cast __count to __v4hi type.
+ (_mm_sll_pi32): Cast __count to __v2si type.
+ (_mm_sll_si64): Cast arguments to __v1di type.
+ (_mm_srl_pi16): Cast __count to __v4hi type.
+ (_mm_srl_pi32): Cast __count to __v2si type.
+ (_mm_srl_si64): Cast arguments to __v1di type.
+ (_mm_sra_pi16): Cast __count to __v4hi type.
+ (_mm_sra_pi32): Cast __count to __v2si type.
+ (_mm_slli_pi16): Use __builtin_ia32_psllwi.
+ (_mm_slli_pi32): Use __builtin_ia32_pslldi.
+ (_mm_slli_si64): Use __builtin_ia32_psllqi. Cast __m to __v1di type.
+ (_mm_srli_pi16): Use __builtin_ia32_psrlwi.
+ (_mm_srli_pi32): Use __builtin_ia32_psrldi.
+ (_mm_srli_si64): Use __builtin_ia32_psrlqi. Cast __m to __v1di type.
+ (_mm_srai_pi16): Use __builtin_ia32_psrawi.
+ (_mm_srai_pi32): Use __builtin_ia32_psradi.
+ * config/i386/i386.md (UNSPEC_NOP): Remove unspec definition.
+ * doc/extend.texi (X86 Built-in Functions) [__builtin_ia32_psll?,
+ __builtin_ia32_psrl?, __builtin_ia32_psra?, __builtin_ia32_psll?i,
+ __builtin_ia32_psrl?i, __builtin_ia32_psra?i]: Add new builtins.
+
+2008-03-07 Joseph Myers <joseph@codesourcery.com>
+
+ * doc/include/texinfo.tex: Update to version 2008-03-07.10.
+
+2008-03-07 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR target/35373
+ * config/rs6000/rs6000.c (rs6000_legitimize_address): Don't generate
+ reg+const addressing for Altivec modes. Don't generate reg+reg
+ addressing for TFmode or TDmode quantities.
+
+2008-03-07 Paolo Bonzini <bonzini@gnu.org>
+
+ * c-common.c (vector_types_convertible_p): Call langhook
+ instead of comptypes.
+
+2008-03-06 Andrew Pinski <andrew_pinski@playstation.sony.com>
+
+ PR tree-opt/35402
+ * tree-ssa-ccp.c (get_symbol_constant_value): Handle
+ integral and scalar float variables which have a
+ NULL DECL_INITIAL.
+
+2008-03-06 Nathan Froyd <froydnj@codesourcery.com>
+
+ * dwarf2out.c (dwarf2out_frame_debug_expr): Consult the
+ dwarf_register_span hook when emitting unwind information for
+ register-to-memory saves.
+ * config/rs6000/rs6000.c (spe_synthesize_frame): Delete.
+ (rs6000_frame_related): Remove call to spe_synthesize_frame.
+
+2008-03-06 Jakub Jelinek <jakub@redhat.com>
+
+ * gimplify.c (goa_lhs_expr_p): Allow different ADDR_EXPR nodes
+ for the same VAR_DECL.
+
+2008-03-06 Tom Tromey <tromey@redhat.com>
+
+ * treelang: Delete.
+ * doc/standards.texi (Standards): Don't mention treelang.
+ * doc/invoke.texi (Overall Options): Don't mention treelang.
+ * doc/install.texi (Prerequisites): Don't mention bison or
+ treelang.
+ (Configuration): Don't mention treelang.
+ (Building): Likewise.
+ * doc/frontends.texi (G++ and GCC): Don't mention treelang.
+
+2008-03-06 Paolo Bonzini <bonzini@gnu.org>
+
+ * simplify-rtx.c (simplify_subreg): Remove useless shifts from
+ word-extractions out of a multi-word object.
+
+2008-03-06 Richard Guenther <rguenther@suse.de>
+
+ * tree.def (BIT_FIELD_REF): Constrain result type and its precision.
+ * tree-cfg.c (verify_expr): Verify BIT_FIELD_REF constraints on
+ result type and precision.
+ * expr.c (get_inner_reference): Set unsignedp based on the result
+ type of BIT_FIELD_REF.
+ * tree.h (BIT_FIELD_REF_UNSIGNED): Remove.
+ * tree-sra.c (instantiate_element): Do not set BIT_FIELD_REF_UNSIGNED.
+ (try_instantiate_multiple_fields): Likewise. Use the correct type
+ for BIT_FIELD_REF.
+ (sra_build_assignment): Likewise.
+ (sra_build_elt_assignment): Likewise.
+ (sra_explode_bitfield_assignment): Likewise.
+ * print-tree.c (print_node): Do not check BIT_FIELD_REF_UNSIGNED.
+ * tree-vect-transform.c (vect_create_epilog_for_reduction): Do not
+ set BIT_FIELD_REF_UNSIGNED.
+ (vectorizable_load): Likewise.
+
+2008-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
+
+ * cse.c (cse_extended_basic_block): Invalidate artificial defs
+ at bb start.
+
+2008-03-06 Richard Guenther <rguenther@suse.de>
+
+ * alias.c (struct alias_set_entry): Move has_zero_child field
+ to pack with alias_set.
+
+2008-03-05 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/i386/i386-modes.def: Use 4 byte alignment on DI for
+ 32bit host.
+
2008-03-05 Ian Lance Taylor <iant@google.com>
* alias.h (alias_set_type): Change from HOST_WIDE_INT to int.