+2010-08-06 Alan Modra <amodra@gmail.com>
+
+ * doc/invoke.texi (RS/6000 and PowerPC Options): Rewrite -mrelocatable
+ and -mrelocatable-lib description.
+
+2010-08-05 Bernd Schmidt <bernds@codesourcery.com>
+
+ From Martin Thuresson <martint@google.com>
+ * postreload.c (reload_cse_simplify_operands): Use
+ SET_REGNO_RAW instead of SET_REGNO.
+ * caller-save.c (reg_save_code): Use SET_REGNO_RAW instead of
+ SET_REGNO.
+ * ira.c (setup_prohibited_mode_move_regs): Use SET_REGNO_RAW
+ instead of SET_REGNO.
+ * rtl.h (SET_REGNO_RAW): New macro.
+
+2010-08-05 Eric Botcazou <ebotcazou@adacore.com>
+
+ * rtlanal.c (nonzero_bits1): Use unsigned HOST_WIDE_INT in all mask
+ computations. Fix formatting issues.
+ (num_sign_bit_copies1): Likewise.
+ (canonicalize_condition): Likewise.
+
+2010-08-05 Richard Henderson <rth@redhat.com>
+
+ * toplev.h (ctz_hwi, clz_hwi, ffs_hwi): New.
+ (floor_log2): Use clz_hwi.
+ (exact_log2): Use ctz_hwi.
+ * toplev.c (ctz_hwi, clz_hwi, ffs_hwi): New.
+ * builtins.c (fold_builtin_bitop): Use them.
+ * simplify-rtx.c (simplify_const_unary_operation): Likewise.
+ * combine.c (get_pos_from_mask): Use ctz_hwi.
+ * double-int.c (double_int_ctz): Likewise.
+ * explow.c (force_reg): Likewise.
+ * tree.h (SET_DECL_OFFSET_ALIGN): Use ffs_hwi.
+
+2010-08-05 Richard Henderson <rth@redhat.com>
+
+ PR target/45189
+ * config/i386/i386.c (ix86_emit_save_reg_using_mov): Make sure
+ the alignment constant is properly sign-extended.
+
+2010-08-05 Richard Guenther <rguenther@suse.de>
+
+ * expr.c (store_expr): Use emit_block_move only if both
+ source and target are MEMs. Use store_bit_field if only
+ the target is a MEM.
+
+2010-08-05 Richard Henderson <rth@redhat.com>
+
+ PR debug/45188
+ * dwarf2out.c (DWARF2_UNWIND_INFO): Provide default definition.
+ (INCOMING_RETURN_ADDR_RTX): Likewise.
+ (dwarf2out_do_frame): Remove conditional compilation.
+ (dwarf2out_frame_init): Likewise.
+
+2010-08-05 Nicolas Setton <setton@adacore.com>
+
+ * gcov.c (flag_display_progress): New static variable.
+ (main): Display progress info on standard output if requested.
+ (options): Add -d/--display-progress.
+ (print_usage): Print them.
+ (process_args): Handle them.
+ * doc/gcov.texi: Document them.
+
+2010-08-05 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-cp.c (ipcp_discover_new_direct_edges): New function.
+ (ipcp_insert_stage): Redirect only edges not flagged with
+ indirect_inlining_edge. Call ipcp_discover_new_direct_edges for all
+ discovered constants.
+
+2010-08-05 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-prop.h (enum ipa_lattice_type): Changed comments.
+ (struct ipa_param_descriptor): New fields types and
+ cannot_devirtualize.
+ (ipa_param_cannot_devirtualize_p): New function.
+ (ipa_param_types_vec_empty): Likewise.
+ (ipa_make_edge_direct_to_target): Declare.
+ * ipa-cp.c: Fixed first stage driver name in initial comment,
+ described devirtualization there too.
+ (ipcp_analyze_node): Call ipa_analyze_params_uses.
+ (ipcp_print_all_lattices): Print devirtualization info.
+ (ipa_set_param_cannot_devirtualize): New function.
+ (ipcp_initialize_node_lattices): Set cannot_devirtualize when setting
+ lattice to BOTTOM.
+ (ipcp_init_stage): Merged into...
+ (ipcp_generate_summary): ...its caller.
+ (ipcp_change_tops_to_bottom): Also process type lists.
+ (ipcp_add_param_type): New function.
+ (ipcp_copy_types): Likewise.
+ (ipcp_propagate_types): Likewise.
+ (ipcp_propagate_stage): Also propagate types.
+ (ipcp_need_redirect_p): Variable jump_func moved to its scope block.
+ Also return true if propagated types require it.
+ (ipcp_update_callgraph): Dump redirection info.
+ (ipcp_process_devirtualization_opportunities): New function.
+ (ipcp_const_param_count): Include known type information.
+ (ipcp_insert_stage): Call ipcp_process_devirtualization_opportunities
+ on new node. Fixed formatting.
+ * ipa-prop.c (make_edge_direct_to_target): Renamed to
+ ipa_make_edge_direct_to_target and changed all callers. Made
+ externally visible.
+ (ipa_node_duplication_hook): Duplicate types vector.
+ * cgraphunit.c (cgraph_redirect_edge_call_stmt_to_callee): Also try to
+ redirect outgoing calls for which we can't get a decl from the
+ statement. Check that we can get a decl from the call statement.
+ * ipa-inline.c (inline_indirect_intraprocedural_analysis): Call
+ ipa_analyze_params_uses only when ipa-cp is disabled.
+ * tree-inline.c (get_indirect_callee_fndecl): Removed.
+ (expand_call_inline): Do not call get_indirect_callee_fndecl.
+ * params.def (PARAM_DEVIRT_TYPE_LIST_SIZE): New parameter.
+ * Makefile.in (ipa-cp.o): Add gimple.h to dependencies.
+
+2010-08-05 Uros Bizjak <ubizjak@gmail.com>
+
+ * expmed.c (expand_mult_const) <case alg_shift>: Expand shift into
+ temporary. Emit move from temporary to accum, so REG_EQUAL note will
+ be attached to this insn in correct mode.
+
+2010-08-05 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (ix86_decompose_address): Check for SI_REG
+ using REGNO of base_reg directly.
+
+2010-08-05 Jie Zhang <jie@codesourcery.com>
+
+ PR tree-optimization/45144
+ * tree-sra.c (type_consists_of_records_p): Return false
+ if the record contains bit-field.
+
+2010-08-04 Richard Henderson <rth@redhat.com>
+
+ * config/i386/i386.c (struct ix86_frame): Remove padding and
+ to_allocate members.
+ (ix86_compute_frame_layout): Don't store them.
+ (ix86_can_use_return_insn_p): Use a more direct and more obviously
+ correct condition for the position of the stack pointer.
+ (ix86_expand_prologue): Compute remaining stack allocation based
+ on the ultimate stack pointer offset.
+ (ix86_expand_epilogue): Use more obvious expressions testing for
+ the stack pointer already pointing to the saved registers.
+
+ * config/i386/i386.c (ix86_expand_epilogue): Eliminate code
+ duplication deconstructing the frame pointer. Simplify
+ deallocation of the local stack frame.
+
+ * reg-notes.def (CFA_EXPRESSION): New.
+ * dwarf2out.c (dwarf2out_frame_debug): Handle it.
+ (dwarf2out_frame_debug_cfa_expression): New.
+ (dwarf2out_frame_debug_def_cfa): Handle simple MEMs.
+
+ * config/i386/i386.h (struct machine_frame_state): Add realigned flag.
+ * config/i386/i386.c (ix86_expand_prologue): Set it.
+ (ix86_expand_epilogue): Clear it.
+ (ix86_emit_save_reg_using_mov): For registers saved in a realigned
+ context, add REG_CFA_EXPRESSION notes.
+
+ * config/i386/i386.h (struct machine_frame_state): Rename from
+ machine_cfa_state. Add members tracking SP and FP regardless
+ of the current CFA register.
+ (ix86_cfa_state): Remove.
+ * config/i386/i386.c (struct ix86_frame): Add reg_save_offset
+ and sse_reg_save_offset members.
+ (ix86_compute_frame_layout): Set them.
+ (gen_push): Increment sp_offset too.
+ (choose_baseaddr_len, choose_baseaddr): New.
+ (ix86_emit_save_reg_using_mov): New.
+ (ix86_emit_save_regs_using_mov): Use it.
+ (ix86_emit_save_sse_regs_using_mov): Likewise.
+ (ix86_add_cfa_restore_note): Take cfa_offset not red_offset argument;
+ compare vs the saved red_zone_offset.
+ (pro_epilogue_adjust_stack): Adjust sp_offset.
+ (ix86_adjust_stack_and_probe): Likewise.
+ (ix86_expand_prologue): Set up, use, and validate the new
+ frame_state_info members. Use gen_frame_mem.
+ (ix86_emit_restore_regs_using_pop): Remove red_offset parameter.
+ (ix86_emit_restore_reg_using_pop): Likewise. Use and update the
+ new frame_state_info members.
+ (ix86_emit_leave): Likewise.
+ (ix86_emit_restore_regs_using_mov): Likewise. Don't check for
+ out-of-range stack pointer offsets here.
+ (ix86_emit_restore_sse_regs_using_mov): Likewise.
+ (ix86_expand_epilogue): Use and validate the new frame_state_info
+ members. Break up and simplify the logic selecting the
+ restore_regs_via_mov code path. Ensure that there will be no
+ out-of-range stack pointer offsets.
+
+ * config/i386/cygming.h (TARGET_64BIT_MS_ABI): Remove.
+
+ * config/i386/i386.c (ix86_function_ms_hook_prologue): Fix
+ argument name to reflect the expected tree; fix indentation.
+ (ix86_asm_output_function_label): Output the entire 32-bit
+ ms_hook here as bytes ...
+ (ix86_expand_prologue): ... not here as insns. Attach the
+ unwind info for the ms_hook to a blockage insn.
+ (ix86_handle_fndecl_attribute): Don't check HAVE_AS_IX86_SWAP.
+ (ix86_ms_bitfield_layout_p): Fix indentation.
+ * config/i386/i386.md (UNSPECV_VSWAPMOV, vswapmov): Remove.
+
+ * config/i386/i386.c (ix86_using_red_zone): New.
+ (ix86_compute_frame_layout, ix86_add_cfa_restore_note,
+ ix86_expand_prologue, ix86_force_to_memory): Use it.
+
+ * config/i386/i386.c (ix86_expand_prologue): Simplify logic
+ saving the int registers.
+
+ * dwarf2out.c: Remove most of the DWARF2_DEBUGGING_INFO
+ and DWARF2_UNWIND_INFO conditional compilation.
+
+2010-08-04 Richard Henderson <rth@redhat.com>
+
+ PR debug/45171
+ * dwarf2out.c (gen_typedef_die): Don't re-generate the die of
+ an is_naming_typedef_decl.
+
+2010-08-04 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR rtl-optimization/45162
+ * df-problems.c (df_word_lr_bb_local_compute): Ignore DEBUG_INSNs.
+ * dce.c (word_dce_process_block): Likewise.
+
+2010-08-04 Steve Ellcey <sje@cup.hp.com>
+
+ PR target/44583
+ * config/ia64/constraints.md (Z): New.
+ * config/ia64/predicates.md (fr_reg_or_signed_fp01_operand): New.
+ (xfreg_or_signed_fp01_operand): New.
+ * config/ia64/ia64.md (addsf3): Replace fr_reg_or_fp01_operand
+ with fr_reg_or_signed_fp01_operand and constraint G with Z.
+ (subsf3): Ditto.
+ (*maddsf4): Ditto.
+ (*msubsf4): Ditto.
+ (adddf3): Ditto.
+ (adddf3_trunc): Ditto.
+ (subdf3): Ditto.
+ (*subdf3_trunc): Ditto.
+ (*madddf4): Ditto.
+ (*madddf4_trunc): Ditto.
+ (*msubdf4): Ditto.
+ (*msubdf4_trunc): Ditto.
+ (addxf3): Replace xfreg_or_fp01_operand with
+ xfreg_or_signed_fp01_operand and constraint G with Z.
+ (*addxf3_truncsf): Ditto.
+ (*addxf3_truncdf): Ditto.
+ (subxf3): Ditto.
+ (*subxf3_truncsf): Ditto.
+ (*subxf3_truncdf): Ditto.
+ (*maddxf4): Ditto.
+ (*maddxf4_truncsf): Ditto.
+ (*maddxf4_truncdf): Ditto.
+ (*msubxf4): Ditto.
+ (*msubxf4_truncsf): Ditto.
+ (*msubxf4_truncdf): Ditto.
+
+2010-08-04 Richard Guenther <rguenther@suse.de>
+
+ * alias.c (rtx_refs_may_alias_p): Do not resort to TBAA
+ if either alias-set is zero.
+
+2010-08-04 Richard Guenther <rguenther@suse.de>
+
+ * tree-ssa-propagate.h (struct prop_value_d, prop_value_t): Move ...
+ * tree-ssa-ccp.c: ... here.
+ * tree-ssa-copy.c: ... and here.
+ * tree-ssa-propagate.h (enum value_range_type, struct value_range_d,
+ value_range_t): Move ...
+ * tree-vrp.c: ... here.
+ * tree-ssa-propagate.h (ssa_prop_get_value_fn): New typedef.
+ (substitute_and_fold): Adjust prototype.
+ * tree-ssa-propagate.c (replace_uses_in): Adjust.
+ (replace_phi_args_in): Likewise.
+ (substitute_and_fold): Take callback to query lattice instead
+ of pointer to lattice. Replace SSA name defs with lattice
+ values first.
+ * tree-ssa-ccp.c (ccp_finalize): Adjust.
+ * tree-ssa-copy.c (copy_prop_visit_phi_node): Adjust.
+ (get_value): New function.
+ (fini_copy_prop): Adjust.
+ * tree-vrp.c (vrp_finalize): Adjust.
+
+2010-08-04 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/45176
+ * expr.c (expand_expr_real_1): Also preserve TARGET_MEM_REF
+ points-to set for original MEM_REF.
+
+2010-08-04 Richard Guenther <rguenther@suse.de>
+
+ * tree-ssa-ccp.c (get_constant_value): New function.
+ (get_rhs_assign_op_for_ccp): Remove.
+ (valueize_op): New function.
+ (ccp_fold): Use get_constant_value and valueize_op.
+ (fold_const_aggregate_ref): Likewise.
+ (ccp_fold_stmt): Likewise.
+ (visit_assignment): Simplify.
+
+2010-08-04 Richard Guenther <rguenther@suse.de>
+
+ * Makefile.in (double-int.o): Add $(TOPLEV_H) dependency.
+ * double-int.h (double_int_ctz): Declare.
+ * double-int.c (double_int_ctz): New function.
+
+2010-08-04 Hariharan Sandanagobalane <hariharan@picochip.com>
+
+ * config/picochip/picochip.c (TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE):
+ Define.
+ picochip_expand_movmemhi : Expand movmem pattern.
+ * config/picochip/picochip-protos.h (picochip_expand_movmemhi) :
+ Declare.
+ * config/picochip/picochip.md (movmemhi) : New pattern.
+
+2010-08-03 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/unix.h (GLOBAL_ASM_OPS): Add tabs around .globl.
+
+2010-08-03 Bernd Schmidt <bernds@codesourcery.com>
+
+ * simplify-rtx.c (simplify_binary_operation_1): Try to simplify away
+ NEG as operand of a MULT by merging it with the other operand.
+ * combine.c (make_compound_operation): Use trunc_int_for_mode when
+ generating a MULT with constant. Canonicalize PLUS and MINUS involving
+ MULT.
+ * config/arm/constraints.md (M): Examine only 32 bits of a
+ HOST_WIDE_INT.
+ * config/arm/predicates.md (power_of_two_operand): Likewise.
+
+2010-08-03 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
+
+ * config/spu/spu.c (spu_emit_branch_hint): Do not access NOTE_KIND of
+ non-NOTE insns.
+
+2010-08-03 Jan Hubicka <jh@suse.cz>
+
+ * ipa-split.c (struct split_point): Add split_part_set_retval.
+ (find_retval): Forward declare.
+ (test_nonssa_use, mark_nonssa_use): Special case return by reference.
+ (consider_split): Compute current->split_part_set_retval.
+ (visit_bb): Do not look into return value.
+ (split_function): Handle !split_part_set_retval
+
+2010-08-03 Martin Jambor <mjambor@suse.cz>
+
+ * tree-sra.c (completely_scalarize_record): New parameter REF, create
+ its own access->expr intead of using build_ref_for_offset.
+
+2010-08-03 Joseph Myers <joseph@codesourcery.com>
+
+ * config/alpha/alpha.h (SWITCH_TAKES_ARG): Define.
+ * config/alpha/osf5.h (LIB_SPEC): Don't handle -a.
+ * config/bfin/bfin.h (ASM_SPEC, LINK_SPEC): Don't pass -G* options.
+ * config/darwin.h (WORD_SWITCH_TAKES_ARG): Handle -iframework.
+ * config/ia64/ia64.h (SWITCH_TAKES_ARG): Define.
+ * config/iq2000/iq2000.h (SWITCH_TAKES_ARG): Remove.
+ * config/rs6000/sysv4.h (SWITCH_TAKES_ARG): Define using
+ DEFAULT_SWITCH_TAKES_ARG.
+ * config/rx/rx.opt (-patch=): Remove option.
+ * config/rx/rx.c (rx_handle_option): Don't handle OPT_patch_.
+ * defaults.h (DEFAULT_WORD_SWITCH_TAKES_ARG): Handle -imultilib.
+ * doc/invoke.texi (RX Options): Remove -patch=.
+ * gcc.c (cc1_options): Pass -aux-info* instead of -a* options.
+ (option_map): Remove --profile-blocks, --quiet and --silent.
+
+2010-08-03 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.h (ix86_compare_op0, ix86_compare_op1): Remove.
+ * config/i386/i386.c (ix86_compare_op0, ix86_compare_op1): Remove.
+ (ix86_expand_branch): Add op0 and op1 arguments. Do not access
+ ix86_compare_op0 and ix86_compare_op1, use op0 and op1 instead.
+ Update calls to ix86_expand_compare and ix86_expand_branch.
+ (ix86_expand_setcc): Add op0 and op1 arguments. Update calls to
+ ix86_expand_compare.
+ (ix86_expand_compare): Add op0 and op1 arguments. Do not access
+ ix86_compare_op0 and ix86_compare_op1, use op0 and op1 instead.
+ Make static.
+ (ix86_expand_carry_flag_compare): Do not set ix86_compare_op0
+ and ix86_compare_op1. Update calls to ix86_expand_compare.
+ (ix86_expand_int_movcc): Ditto.
+ (ix86_expand_fp_movcc): Ditto. Update calls to ix86_expand_setcc.
+ * config/i386/i386-protos.h (ix86_expand_branch): Update prototype.
+ (ix86_expand_setcc): Ditto.
+ (ix86_expand_compare): Remove prototype.
+ * config/i386/i386.md (cbranch<SDWIM:mode>4): Do not set
+ ix86_compare_op0 and ix86_compare_op1. Update calls
+ to ix86_expand_branch to directly pass operands[1] and operands[2].
+ (cbranchxf4): Ditto.
+ (cbranch<MODEF:mode>4): Ditto.
+ (cbranchcc4): Ditto.
+ (cstore<SWIM:mode>4): Do not set ix86_compare_op0 and ix86_compare_op1.
+ Update calls to ix86_expand_setcc to directly pass operands[2] and
+ operands[3].
+ (cstorexf4): Ditto.
+ (cstore<MODEF:mode>4): Ditto.
+ (cstorecc4): Ditto.
+
+2010-08-02 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR target/45063
+ * caller-save.c (save_call_clobbered_regs): Remove regs from
+ hard_regs_saved when they are set.
+
+2010-08-02 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/41089
+ * config/alpha/alpha.c (alpha_build_builtin_va_list): Mark __offset
+ as volatile.
+
+2010-08-02 Sebastian Pop <sebastian.pop@amd.com>
+
+ * common.opt (ftree-loop-distribute-patterns): New.
+ * invoke.texi (-ftree-loop-distribute-patterns): Documented.
+ * opts.c (decode_options): Enable flag_tree_loop_distribute_patterns
+ at -O3.
+ * tree-data-ref.c (stores_zero_from_loop): New.
+ * tree-data-ref.h (stores_zero_from_loop): Declared.
+ * tree-loop-distribution.c (tree_loop_distribution): Call
+ stores_zero_from_loop.
+ (tree_loop_distribution): Check flag_tree_loop_distribute_patterns.
+
+2010-08-02 Bernd Schmidt <bernds@codesourcery.com>
+
+ * postreload.c (reload_cse_simplify_operands): Take attribute enabled
+ into account.
+
+ * final.c (final_scan_insn): Call CC_STATUS_INIT unconditionally.
+ * config/arm/arm.c (thumb1_code): New variable.
+ (arm_override_options): Set it.
+ (thumb1_final_prescan_insn): Keep track of condition code status.
+ (arm_adjust_cost): For Thumb, try to keep cc-setting insns next to
+ jumps that depend on them.
+ * config/arm/arm.h (thumb1_code): Declare variable.
+ (struct machine_function): Guard with #ifndef GENERATOR_FILE. Add
+ members thumb1_cc_insn, thumb1_cc_op0, thumb1_cc_op1 and
+ thumb1_cc_mode.
+ (CC_STATUS_INIT): New macro.
+ * config/arm/constraints.md (Pd): New constraint.
+ * config/arm/predicates.md (noov_comparison_operator): New predicate.
+ * config/arm/arm.md (is_thumb1): New define_attr.
+ (conds): Set default to "clob" when generating Thumb1 code.
+ (thumb1_bicsi3): Renamed from bicsi3. All uses changed. Condition
+ code are set. Use two-operand assembly syntax.
+ (thumb1_subsi3_insn): Condition codes are set. Now a properly named
+ pattern.
+ (thumb1_andsi3_insn, thumb1_iorsi3_insn, thumb1_xorsi3_insn): Condition
+ codes are set. Use two-operand assembly syntax.
+ (zero_extendhisi splitter): Remove constraints.
+ (thumb1_movsi_insn, thumb1_movhi_insn, thumb1_movqi_insn, thumb1_movhf,
+ thumb1_movsf_insn): Set conds attribute as appropriate.
+ (cbranchsi4_insn): Use condition code status from struct
+ machine_function to determine whether the comparison can be eliminated.
+ Discourage the alternative using high registers.
+ (movsi_cbranchsi4, andsi3_cbranch, orrsi3_cbranch_scratch,
+ orrsi3_cbranch, xorsi3_cbranch_scratch, xorsi3_cbranch,
+ bicsi3_cbranch_scratch, bicsi3_cbranch, subsi3_cbranch_scratch,
+ subsi3_cbranch): Delete.
+ (movsi_cbranchsi4 peepholes): Rewrite to generate a sequence of
+ one subtract and one cbranch insn.
+
+ * config/arm/thumb2.md (thumb2_movdi, thumb2_movsf_soft_insn,
+ thumb2_movdf_soft_insn): Delete patterns.
+ * config/arm/arm.md (arm_pool_range, thumb2_pool_range,
+ arm_neg_pool_range, thumb2_neg_pool_range): New attributes.
+ (pool_range, neg_pool_range): Use them to define defaults.
+ (movdi, arm_movsf_soft_insn, arm_movdf_soft_insn): Define them
+ and allow for TARGET_32BIT.
+
+ PR target/40457
+ * config/arm/arm.h (arm_regs_in_sequence): Declare.
+ * config/arm/arm-protos.h (emit_ldm_seq, emit_stm_seq,
+ load_multiple_sequence, store_multiple_sequence): Delete
+ declarations.
+ (arm_gen_load_multiple, arm_gen_store_multiple): Adjust
+ declarations.
+ * config/arm/ldmstm.md: New file.
+ * config/arm/arm.c (arm_regs_in_sequence): New array.
+ (load_multiple_sequence): Now static. New args SAVED_ORDER,
+ CHECK_REGS. All callers changed.
+ If SAVED_ORDER is nonnull, copy the computed order into it.
+ If CHECK_REGS is false, don't sort REGS. Handle Thumb mode.
+ (store_multiple_sequence): Now static. New args NOPS_TOTAL,
+ SAVED_ORDER, REG_RTXS and CHECK_REGS. All callers changed.
+ If SAVED_ORDER is nonnull, copy the computed order into it.
+ If CHECK_REGS is false, don't sort REGS. Set up REG_RTXS just
+ like REGS. Handle Thumb mode.
+ (arm_gen_load_multiple_1): New function, broken out of
+ arm_gen_load_multiple.
+ (arm_gen_store_multiple_1): New function, broken out of
+ arm_gen_store_multiple.
+ (arm_gen_multiple_op): New function, with code from
+ arm_gen_load_multiple and arm_gen_store_multiple moved here.
+ (arm_gen_load_multiple, arm_gen_store_multiple): Now just
+ wrappers around arm_gen_multiple_op. Remove argument UP, all callers
+ changed.
+ (gen_ldm_seq, gen_stm_seq, gen_const_stm_seq): New functions.
+ * config/arm/predicates.md (commutative_binary_operator): New.
+ (load_multiple_operation, store_multiple_operation): Handle more
+ variants of these patterns with different starting offsets. Handle
+ Thumb-1.
+ * config/arm/arm.md: Include "ldmstm.md".
+ (ldmsi_postinc4, ldmsi_postinc4_thumb1, ldmsi_postinc3, ldmsi_postinc2,
+ ldmsi4, ldmsi3, ldmsi2, stmsi_postinc4, stmsi_postinc4_thumb1,
+ stmsi_postinc3, stmsi_postinc2, stmsi4, stmsi3, stmsi2 and related
+ peepholes): Delete.
+ * config/arm/ldmstm.md: New file.
+ * config/arm/arm-ldmstm.ml: New file.
+
+ * config/arm/arm.c (arm_rtx_costs_1): Remove second clause from the
+ if statement which adds extra costs to frame-related expressions.
+
+2010-08-02 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ * config/arm/arm.c (COSTS_N_INSNS): Remove definition.
+
+2010-08-01 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/45142
+ * config/i386/sse.md (vec_set<mode>_0): Do not set mode attribute for
+ alternative 2.
+ (vec_set<moode>_0 splitter): Use SSEMODE4S mode iterator to also
+ split V4SI operands.
+
+2010-08-01 Anatoly Sokolov <aesok@post.ru>
+
+ * config/mmix/mmix.h (ASM_OUTPUT_SOURCE_FILENAME): Remove macro.
+ * config/mmix/mmix-protos.h (mmix_asm_output_source_filename): Remove.
+ * config/mmix/mmix.c (mmix_asm_output_source_filename): Make static.
+ (TARGET_ASM_OUTPUT_SOURCE_FILENAME): Define.
+
+2010-07-31 Kai Tietz <kai.tietz@onevision.com>
+
+ * cppdefault.c (cpp_include_defaults): Move GCC_INCLUDE_DIR before
+ LOCAL_INCLUDE_DIR.
+
+2010-07-31 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * tree-ssa-math-opts.c (convert_plusminus_to_widen): Fix type
+ used in the call to optab_for_tree_code. Fix the second
+ is_widening_mult_p call. Check that both unwidened operands
+ have the same sign.
+
+2010-07-31 John Tytgat <John.Tytgat@aaug.net>
+
+ * config/arm/arm.c (arm_function_arg): Remove superfluous test.
+
+2010-07-31 Anatoly Sokolov <aesok@post.ru>
+
+ * config/spu/spu.h (ASM_OUTPUT_SOURCE_FILENAME): Remove macro.
+
+2010-07-30 DJ Delorie <dj@redhat.com>
+
+ * config/rx/predicates.md (rx_constshift_operand): New.
+ * config/rx/rx.md (zs_cond): New.
+ (cbranchsi4): Remove mode.
+ (*cbranchsi4_<code>): Likewise.
+ (*tstbranchsi4_<code>): New.
+ (*tstbranchsi4r_<code>): New.
+ (*tstbranchsi4m_eq): New.
+ (*tstbranchsi4m_ne): New.
+ (cbranchsf4): Remove mode.
+ (*cbranchsf4_<code>): Likewise.
+
+2010-07-30 Bernd Schmidt <bernds@codesourcery.com>
+
+ * rtlanal.c (simplify_subreg_regno): Don't treat
+ HARD_FRAME_POINTER_REGNUM specially.
+
+2010-07-30 Joseph Myers <joseph@codesourcery.com>
+
+ * common.opt (-G): Don't define option here.
+ * config/g.opt: New.
+ * config.gcc: Use g.opt for alpha, frv, ia64, lm32, m32r, mips,
+ rs6000/powerpc and score targets.
+ * opts.c (common_handle_option): Don't handle -G here.
+ * config/alpha/alpha.c (alpha_handle_option): Handle -G.
+ * config/frv/frv.c (frv_handle_option): Handle -G.
+ * config/ia64/ia64.c (ia64_handle_option): Handle -G.
+ * config/lm32/lm32.c (lm32_handle_option, TARGET_HANDLE_OPTION): New.
+ * config/m32r/m32r.c (m32r_handle_option): Handle -G.
+ * config/mips/mips.c (mips_handle_option): Handle -G.
+ * config/rs6000/rs6000.c (rs6000_handle_option) Handle -G.
+ * config/score/score.c (score_handle_option): Handle -G.
+
+2010-07-30 Anatoly Sokolov <aesok@post.ru>
+
+ * config/mmix/mmix.c: Include basic-block.h.
+
+2010-07-30 Jakub Jelinek <jakub@redhat.com>
+
+ PR debug/45055
+ PR rtl-optimization/45137
+ * rtl.h (prev_nonnote_nondebug_insn, next_nonnote_nondebug_insn): New
+ prototypes.
+ * emit-rtl.c (prev_nonnote_nondebug_insn, next_nonnote_nondebug_insn):
+ New functions.
+ * combine.c (next_nonnote_nondebug_insn): Removed.
+ * ifcvt.c (noce_process_if_block): Use prev_nonnote_nondebug_insn.
+ * haifa-sched.c (queue_to_ready): Use next_nonnote_nondebug_insn.
+ * sched-deps.c (sched_analyze_insn): Likewise.
+ (fixup_sched_groups, deps_start_bb): Use prev_nonnote_nondebug_insn.
+ * rtlanal.c (canonicalize_condition): Likewise.
+ * postreload.c (reload_combine_recognize_pattern): Likewise.
+ (reload_cse_move2add): Use next_nonnote_nondebug_insn.
+
+2010-07-29 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (int_cond): Remove code iterator.
+ (fp_cond): Ditto.
+ (cbranch<mode>4): Use ordered_comparison_operator predicate
+ for operator0.
+ (cstore<mode>4): Ditto for operator1.
+ (mov<SWIM:mode>cc and corresponding splitter): Ditto.
+ (add<mode>cc): ditto.
+
+2010-07-30 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/45141
+ * expr.c (expand_expr_real_1): Check for not handled base address.
+
+2010-07-30 Richard Guenther <rguenther@suse.de>
+
+ * ipa-prop.c (ipa_modify_formal_parameters): Use
+ build_distinct_type_copy.
+
+2010-07-30 Anthony Green <green@moxielogic.com>
+
+ * config/moxie/rtems.h: New file.
+ * config.gcc: Add moxie-rtems support.
+
+2010-07-29 Bernd Schmidt <bernds@codesourcery.com>
+
+ * dce.c (run_word_dce): Take flag_dce into account. Clear and restore
+ df flags as in run_fast_df_dce.
+
+2010-07-29 Jakub Jelinek <jakub@redhat.com>
+
+ Revert:
+ 2010-07-27 Bernd Schmidt <bernds@codesourcery.com>
+
+ * rtl.def (NOTE): Swap operands 4 and 5.
+ * rtl.h (NOTE_DATA, NOTE_DELETED_LABEL_NAME, NOTE_BLOCK,
+ NOTE_EH_HANDLER, NOTE_BASIC_BLOCK, NOTE_VAR_LOCATION, NOTE_KIND):
+ Adjust accordingly.
+ * gengtype.c (adjust_field_rtx_def): Swap operands 4 and 5 of NOTEs.
+
+2010-07-29 Jakub Jelinek <jakub@redhat.com>
+
+ PR debug/45110
+ * dwarf2out.c (dwarf_attr_name): Handle DW_AT_object_pointer.
+ (gen_formal_types_die): Add DW_AT_object_pointer in methods.
+ (gen_subprogram_die): Likewise. Remove it when removing declaration's
+ formal parameters.
+ (gen_decl_die): Change return type to dw_die_ref, return what
+ gen_formal_parameter_die returned.
+
+2010-07-29 Martin Jambor <mjambor@suse.cz>
+
+ * dbgcnt.def (eipa_sra): New counter.
+ * tree-sra.c (ipa_early_sra_gate): Also check eipa_sra debug counter.
+
+2010-07-29 Xinliang David Li <davidxl@google.com>
+
+ PR bootstrap/45119
+ * tree-ssa-loop-ivopts.c (get_address_cost): Revert change
+ in revision 162652.
+
+2010-07-29 Richard Guenther <rguenther@suse.de>
+
+ * timevar.def (TV_TREE_STORE_COPY_PROP): Remove.
+ (TV_TREE_STORE_CCP): Likewise.
+ (TV_TREE_REDPHI): Likewise.
+
+2010-07-29 Richard Guenther <rguenther@suse.de>
+
+ * double-int.h (double_int_and_not): New function.
+ * combine.c (try_combine): Use it.
+ * tree-vrp.c (simplify_bit_ops_using_ranges): Likewise.
+
+2010-07-29 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR rtl-optimization/42575
+ * dce.c (word_dce_process_block): Renamed from byte_dce_process_block.
+ Argument AU removed. All callers changed. Ignore artificial refs.
+ Use return value of df_word_lr_simulate_defs to decide whether an insn
+ is necessary.
+ (fast_dce): Rename arg to WORD_LEVEL.
+ (run_word_dce): Renamed from rest_of_handle_fast_byte_dce. No longer
+ static.
+ (pass_fast_rtl_byte_dce): Delete.
+ * dce.h (run_word_dce): Declare.
+ * df-core.c (df_print_word_regset): Renamed from df_print_byteregset.
+ All callers changed. Simplify code to only deal with two-word regs.
+ * df.h (DF_WORD_LR): Renamed from DF_BYTE_LR.
+ (DF_WORD_LR_BB_INFO): Renamed from DF_BYTE_LR_BB_INFO.
+ (DF_WORD_LR_IN): Renamed from DF_BYTE_LR_IN.
+ (DF_WORD_LR_OUT): Renamed from DF_BYTE_LR_OUT.
+ (struct df_word_lr_bb_info): Renamed from df_byte_lr_bb_info.
+ (df_word_lr_mark_ref): Declare.
+ (df_word_lr_add_problem, df_word_lr_mark_ref, df_word_lr_simulate_defs,
+ df_word_lr_simulate_uses): Declare or rename from byte variants.
+ (df_byte_lr_simulate_artificial_refs_at_top,
+ df_byte_lr_simulate_artificial_refs_at_end, df_byte_lr_get_regno_start,
+ df_byte_lr_get_regno_len, df_compute_accessed_bytes): Delete
+ declarations.
+ (df_word_lr_get_bb_info): Rename from df_byte_lr_get_bb_info.
+ (enum df_mm): Delete.
+ * df-byte-scan.c: Delete file.
+ * df-problems.c (df_word_lr_problem_data): Renamed from
+ df_byte_lr_problem_data, all members deleted except for
+ WORD_LR_BITMAPS, which is renamed from BYTE_LR_BITMAPS. Uses changed.
+ (df_word_lr_expand_bitmap, df_byte_lr_simulate_artificial_refs_at_top,
+ df_byte_lr_simulate_artificial_refs_at_end, df_byte_lr_get_regno_start,
+ df_byte_lr_get_regno_len, df_byte_lr_check_regs,
+ df_byte_lr_confluence_0): Delete functions.
+ (df_word_lr_free_bb_info): Renamed from df_byte_lr_free_bb_info; all
+ callers changed.
+ (df_word_lr_alloc): Renamed from df_byte_lr_alloc; all callers changed.
+ Don't initialize members that were deleted, don't try to discover data
+ about registers. Ignore hard regs.
+ (df_word_lr_reset): Renamed from df_byte_lr_reset; all callers changed.
+ (df_word_lr_mark_ref): New function.
+ (df_word_lr_bb_local_compute): Renamed from
+ df_byte_bb_lr_local_compute; all callers changed. Use
+ df_word_lr_mark_ref. Assert that artificial refs don't include
+ pseudos. Ignore hard registers.
+ (df_word_lr_local_compute): Renamed from df_byte_lr_local_compute.
+ Assert that exit block uses don't contain pseudos.
+ (df_word_lr_init): Renamed from df_byte_lr_init; all callers changed.
+ (df_word_lr_confluence_n): Renamed from df_byte_lr_confluence_n; all
+ callers changed. Ignore hard regs.
+ (df_word_lr_transfer_function): Renamed from
+ df_byte_lr_transfer_function; all callers changed.
+ (df_word_lr_free): Renamed from df_byte_lr_free; all callers changed.
+ (df_word_lr_top_dump): Renamed from df_byte_lr_top_dump; all callers
+ changed.
+ (df_word_lr_bottom_dump): Renamed from df_byte_lr_bottom_dump; all
+ callers changed.
+ (problem_WORD_LR): Renamed from problem_BYTE_LR; uses changed;
+ confluence operator 0 set to NULL.
+ (df_word_lr_add_problem): Renamed from df_byte_lr_add_problem; all
+ callers changed.
+ (df_word_lr_simulate_defs): Renamed from df_byte_lr_simulate_defs.
+ Return bool, true if bitmap changed or insn otherwise necessary.
+ All callers changed. Simplify using df_word_lr_mark_ref.
+ (df_word_lr_simulate_uses): Renamed from df_byte_lr_simulate_uses;
+ all callers changed. Simplify using df_word_lr_mark_ref.
+ * lower-subreg.c: Include "dce.h"
+ (decompose_multiword_subregs): Call run_word_dce if df available.
+ * Makefile.in (lower-subreg.o): Adjust dependencies.
+ (df-byte-scan.o): Delete.
+ * timevar.def (TV_DF_WORD_LR): Renamed from TV_DF_BYTE_LR.
+
+2010-07-29 Richard Guenther <rguenther@suse.de>
+
+ * tree.c (build_vector): Assert that the vector constant
+ has enough elements.
+ (build_vector_from_ctor): Pad with trailing zeros.
+
+2010-07-29 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/45120
+ * tree-ssa-structalias.c (get_constraint_for_component_ref):
+ Handle offset in DEREFs properly.
+ (get_constraint_for_1): Handle MEM_REF offset properly.
+
+2010-07-29 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/45034
+ * convert.c (convert_to_integer): Always use an unsigned
+ type for narrowed negate and bitwise not.
+
+2010-07-29 Ira Rosen <irar@il.ibm.com>
+
+ * tree-vect-loop.c (vect_create_epilog_for_reduction): Switch
+ to outer loop when creating reduction epilogue for double reduction,
+ and switch back to the inner loop when updating the phi nodes.
+ Update uses of outer loop exit phi nodes in double reduction (instead
+ of uses of reduction).
+
+2010-07-28 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_rtx_costs): Update costs for
+ popcount on power7 and parity on power6 systems.
+ (rs6000_emit_popcount): Rename gen_popcntwsi2 to gen_popcntddi2.
+ (rs6000_emit_parity): Add support for power6 prtyd/prtyw
+ instructions.
+
+ * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): New unspec.
+ (UNSPEC_PARITY): Ditto.
+ (SFDF): New iterator for SF/DF.
+ (rreg2): New mode attribute for floating register constraint.
+ (TARGET_FLOAT): New mode attribute for whether single/double float
+ is supported.
+ (popcntd<mode>2): Combine popcntwsi2 and popcntddi2 into one
+ pattern.
+ (parity<mode>2_cmpb): New insn for parity on power6 and newer
+ machines.
+ (copysign<mode>3): Combine copysignsf3, copysigndf3 into one
+ pattern. Add support for fcpsgn instruction added in power6.
+ (copysignsf3): Delete.
+ (copysigndf3): Delete.
+ (copysign<mode>3_fcpsgn): New insn to generate fcpsgn. Use UNSPEC
+ instead of if_then_else in RTL to avoid problems with -0.
+
+ * config/rs6000/vsx.md (vsx_copysign<mode>3): Use UNSPEC instead
+ of if_then_else to mirror scalar code.
+ (vsx_copysignsf3): Delete, use copysign<mode>3_fcpsgn in
+ rs6000.md.
+
+ * config/rs6000/vector.md (vector_copysign<mode>3): Use UNSPEC
+ instead of if_then_else.
+
+2010-07-28 Xinliang David Li <davidxl@google.com>
+
+ * tree-ssa-loop-ivopts.c (avg_loop_niter): New function.
+ (dump_cand): Dump var_before/after.
+ (htab_inv_expr_eq): New function.
+ (htab_inv_expr_hash): New function.
+ (tree_ssa_iv_optimize_init): Support pseudo invariants.
+ (add_candidate_1): consider base type precision.
+ (set_use_iv_cost): New parameter.
+ (adjust_setup_cost): Use profile information.
+ (get_address_cost): Do not hard code width in computing address
+ offset limits.
+ (compare_aff_trees): New function.
+ (get_loop_invariant_expr_id): New function.
+ (get_computation_cost_at): New parameter and use profile information.
+ (get_computation_cost): New parameter.
+ (determine_use_iv_cost_generic): Pass new parameter.
+ (determine_use_iv_cost_address): Ditto.
+ (determine_use_iv_cost_condition): Ditto.
+ (autoinc_possible_for_pair): Ditto.
+ (determine_use_iv_costs): More dumps.
+ (iv_ca_get_num_inv_exprs): New function.
+ (iv_ca_recount_cost): Consider loop invariants in register pressure
+ cost.
+ (iv_ca_add_use): New parameter.
+ (iv_ca_dump): Better dumping.
+ (iv_ca_extend): New parameter.
+ (try_add_cand_for): Attempt to get better partial solution.
+ (try_improve_iv_set): Pass new parameter to iv_ca_extend.
+ (create_new-ivs): More dumps.
+ (rewrite_use_compare): Ditto.
+ (free_loop_data): More cleanup.
+ (treee_ssa_iv_optimize_finalize): Ditto.
+
+2010-07-28 Kai Tietz <kai.tietz@onevision.com>
+
+ * config/i386/i386.h (MCOUNT_NAME_BEFORE_PROLOGUE): New.
+ * config/i386/i386.c (ix86_profile_before_prologue): New.
+ (override_options): Add special handling for -mfentry.
+ (ix86_function_regparm): Likewise.
+ (ix86_function_sseregparm): Likewise.
+ (ix86_frame_pointer_required): Likewise.
+ (ix86_expand_prologue): Check for ms_hook_prologue.
+ (x86_function_profiler): Adjust mcount output.
+ (TARGET_PROFILE_BEFORE_PROLOGUE): Define hook.
+ * config/i386/i386.opt (mfentry): New.
+ * doc/invoke.texi (mfentry): Add documentation.
+ * doc/tm.texi: Regenerated..
+ * doc/tm.texi.in (TARGET_PROFILE_BEFORE_PROLOGUE): New.
+ * final.c (final_start_function): Replace macro
+ PROFILE_BEFORE_PROLOGUE by target hook.
+ * function.c (thread_prologue_and_epilogue_insns): Likewise.
+ * target.def (profile_before_prologue): New hook.
+ * targhooks.c (default_profile_before_prologue): New.
+ * targhooks.h (default_profile_before_prologue): New.
+
+2010-07-28 Jakub Jelinek <jakub@redhat.com>
+
+ PR debug/45105
+ * gcse.c (hoist_code): Use FOR_BB_INSNS macro.
+
+ PR debug/45103
+ * dwarf2out.c (dwarf2out_var_location): Always consider
+ NOTE_DURING_CALL_P notes, even when not followed by real instructions.
+
+2010-07-28 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ PR rtl-optimization/45107
+ * gcse.c (hash_scan_set): Use max_distance for gcse-las.
+
+2010-07-28 Richard Guenther <rguenther@suse.de>
+
+ * tree-ssa-ccp.c: Remove comment regarding STORE-CCP.
+ (set_lattice_value): Do not query an old default value.
+ (get_value_for_expr): New function. Properly canonicalize
+ float values.
+ (ccp_visit_phi_node): Use it.
+
+2010-07-28 Chung-Lin Tang <cltang@codesourcery.com>
+
+ * config/arm/arm.c (arm_pcs_default): Remove static.
+ * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_PCS or
+ __ARM_PCS_VFP to indicate soft/hard-float calling convention.
+ (arm_pcs_default): Declare.
+
+2010-07-28 Iain Sandoe <iains@gcc.gnu.org>
+
+ * config/rs6000/rs6000.c (rs6000_override_options):
+ Use TARGET_MACHO inline, move darwin_one_byte_bool from here...
+ ... to darwin_rs6000_override_options.
+ (rs6000_return_in_memory): Update preceding comment for darwin
+ 64 bit ABI. Use TARGET_MACHO inline.
+ (rs6000_darwin64_struct_check_p): New.
+ (function_arg_advance): Use rs6000_darwin64_struct_check_p.
+ (function_arg): Likewise.
+ (rs6000_arg_partial_bytes): Likewise.
+ (rs6000_function_value): Likewise.
+
+2010-07-28 Andi Kleen <ak@linux.intel.com>
+
+ * lto-opts.c (lto_file_read_options): Add loop over all inputs.
+
+2010-07-28 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/44903
+ * builtins.c (fold_builtin_memory_op): On STRICT_ALIGNMENT
+ targets try harder to not generate unaligned accesses.
+
+2010-07-28 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ PR rtl-optimization/45101
+ * gcse.c (hash_scan_set): Fix argument ordering of insert_expr_in_table
+ for gcse-las.
+
+2010-07-28 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR tree-optimization/44885
+ * tree-sra.c (find_param_candidates): Skip pointer types to arrays
+ with non-aliased component.
+
+2010-07-28 Joseph Myers <joseph@codesourcery.com>
+
+ * config/darwin-driver.c (SWITCH_TAKES_ARG,
+ WORD_SWITCH_TAKES_ARG): Remove.
+ * cppspec.c (SWITCH_TAKES_ARG, WORD_SWITCH_TAKES_ARG): Remove.
+ * defaults.h (DEFAULT_SWITCH_TAKES_ARG,
+ DEFAULT_WORD_SWITCH_TAKES_ARG): Move from gcc.h.
+ (SWITCH_TAKES_ARG, WORD_SWITCH_TAKES_ARG): Move default
+ definitions from gcc.c.
+ * gcc.c (SWITCH_TAKES_ARG, WORD_SWITCH_TAKES_ARG): Move to
+ defaults.h.
+ * gcc.h (DEFAULT_SWITCH_TAKES_ARG, DEFAULT_WORD_SWITCH_TAKES_ARG):
+ Move to defaults.h.
+ * opts-common.c: Include tm.h.
+ (decode_cmdline_option): Use SWITCH_TAKES_ARG and
+ WORD_SWITCH_TAKES_ARG to count arguments to unknown options.
+ Handle more than one argument. Set canonical_option_num_elements.
+ (decode_cmdline_options_to_array): Set
+ canonical_option_num_elements and trailing elements of
+ canonical_option.
+ * opts.h (struct cl_decoded_option): Allow four elements in
+ canonical_option. Add field canonical_option_num_elements.
+ * Makefile.in (opts-common.o): Update dependencies.
+
+2010-07-28 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR middle-end/44790
+ PR middle-end/44993
+ * expr.c (expand_expr_real_1) <MEM_REF>: Revert latest change. Make
+ sure the base has address_mode before adding the offset.
+
+2010-07-27 Xinliang David Li <davidxl@google.com>
+
+ * tree-flow.h (create_mem_ref): Add one new parameter.
+ * tree-ssa-address.c (create_mem_ref): New parameter.
+ (addr_to_parts): Ditto.
+ (move_variant_to_index): New function.
+ * tree-ssa-loop-ivopts.c (rewrite_use_address): Pass new argument.
+
+2010-07-27 Bernd Schmidt <bernds@codesourcery.com>
+
+ * rtl.def (DEBUG_INSN, INSN, JUMP_INSN, CALL_INSN, NOTE): Swap operands
+ 4 and 5.
+ * rtl.h (PATTERN, INSN_LOCATOR, NOTE_DATA, NOTE_DELETED_LABEL_NAME,
+ NOTE_BLOCK, NOTE_EH_HANDLER, NOTE_BASIC_BLOCK, NOTE_VAR_LOCATION,
+ NOTE_KIND, LABEL_NUSES, LABEL_REFS): Adjust accordingly.
+ * gengtype.c (adjust_field_rtx_def): Swap operands 4 and 5 of
+ CODE_LABELs and NOTEs.
+ * caller-save.c (init_caller_save): Fix up gen_rtx_INSN call.
+ * combine.c (try_combine): Likewise.
+ * ira.c (setup_prohibited_mode_move_regs): Likewise.
+ * print-rtl.c (print_rtx): Start REG_NOTES on a new line.
+
2010-07-27 Joseph Myers <joseph@codesourcery.com>
* coretypes.h (struct cl_option_handlers): Declare.
2010-07-27 Jie Zhang <jie@codesourcery.com>
PR target/44290
- Revert
+ Revert:
2010-07-23 Jie Zhang <jie@codesourcery.com>
+
* tree-sra.c (ipa_sra_preliminary_function_checks): Return
false if ! tree_versionable_function_p.
* hooks.c (hook_bool_constcharptr_size_t_false): Remove.
* hooks.h (hook_bool_constcharptr_size_t_false): Remove.
* langhooks-def.h (LANG_HOOKS_MISSING_ARGUMENT): Remove.
- (LANG_HOOKS_INITIALIZER): Remove missing_argument hook
- initializer.
+ (LANG_HOOKS_INITIALIZER): Remove missing_argument hook initializer.
* langhooks.h (struct lang_hooks): Remove missing_argument.
* optc-gen.awk: Handle MissingArgError and output new structure
field initializers.
PR tree-optimization/44152
* tree-vect-slp.c (vect_build_slp_tree): Collect nodes with
complex numbers for further check.
- (vect_supported_load_permutation_p): Check nodes with
+ (vect_supported_load_permutation_p): Check nodes with
complex numbers.
2010-07-27 Joseph Myers <joseph@codesourcery.com>
OSDN Git Service
