+2003-10-20 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
+
+ * config/mips/linux.h (TARGET_OS_CPP_BUILTINS): Define _ABIO32.
+ Use it in _MIPS_SIM definition.
+ * config/mips/mips.h (CRT_CALL_STATIC_FUNCTION): Likewise.
+
+2003-10-20 Zack Weinberg <zack@codesourcery.com>
+
+ * config/i386/i386.c (print_reg): Abort if REGNO (x) is a
+ virtual register, but only if file == asm_out_file.
+ * config/i386/i386.h (HI_REGISTER_NAMES): Use "argp", not "",
+ for ARG_POINTER_REGNUM.
+
+2003-10-20 Zack Weinberg <zack@codesourcery.com>
+
+ * c-common.c (registered_builtin_types): New static.
+ (c_common_type_for_mode): Consult registered_builtin_types.
+ (c_register_builtin_type): Add type to registered_builtin_types.
+ * optabs.c (init_floating_libfuncs): Initialize libfuncs for
+ all MODE_FLOAT modes, not just the ones corresponding to
+ float_type_node, double_type_node, and long_double_type_node.
+
+2003-10-20 Richard Henderson <rth@redhat.com>
+
+ * config/alpha/alpha.h (PREDICATE_CODES): Add normal_memory_operand.
+ * config/alpha/alpha-protos.h: Remove PREDICATE_CODES prototypes.
+
+2003-10-20 Dorit Naishlos <dorit@il.ibm.com>
+
+ * config/rs6000/rs6000.h: (rs6000_sched_insert_nops):
+ support new flag -minsert-sched-nops.
+ (DEFAULT_SCHED_FINISH_NOP_INSERTION_SCHEME): Define.
+ * config/rs6000/rs6000.c: (rs6000_sched_insert_nops):
+ support new flag -minsert-sched-nops.
+ (is_cracked_insn, is_microcoded_insn): New functions.
+ (rs6000_sched_finish): New function.
+ (rs6000_issue_rate): Return 5 for power4.
+ (get_next_active_insn, insn_terminates_group_p): New
+ functions.
+ (is_costly_group, force_new_group): New functions.
+ (redefine_groups, pad_groups): New functions.
+ (rs6000_variable_issue): Use new functions.
+ * doc/invoke.texi (-minsert-sched-nops): Document new
+ option.
+
+2003-10-20 David S. Miller <davem@redhat.com>
+
+ * config/sparc/sparc.md (type attribute): Add new insn types
+ fpa, fpm_pack, fgm_mul, fgm_pdist, and fgm_cmp for VIS.
+ (patterns emitting VIS insns): Use them.
+ * config/sparc/ultra1_2.md: Add VIS scheduling rules.
+ * config/sparc/ultra3.md: Likewise.
+
+2003-10-20 Falk Hueffner <falk@debian.org>
+
+ PR target/12654
+ * config/alpha/alpha.c (alpha_emit_conditional_branch): Don't do
+ comparison against constant by adjusting the argument except for
+ EQ and NE.
+
+2003-10-19 Mark Mitchell <mark@codesourcery.com>
+
+ * config.gcc: Add support for arm926ejs, arm1026ejs, arm1136js,
+ arm1136jfs, and armv6j.
+ * config/arm/arm.c (FL_ARCH6J): New macro.
+ (FL_VFPV2): Likewise.
+ (all_cores): Add entries for arm926ejs, arm1026ejs, arm1136js,
+ and arm1136jfs.
+ (all_architectures): Add entry for armv6j.
+ (arm_override_options): Add entries for arm926ejs, arm1026ejs,
+ arm1136js, and arm1136jfs.
+ * config/arm/arm.h (TARGET_CPU_arm926ej_s): New macro.
+ (TARGET_CPU_arm1026ej_s): Likewise.
+ (TARGET_CPU_arm1136j_s): Likewise.
+ (TARGET_CPU_arm1136jf_s): Likewise.
+ * doc/invoke.texi: Document new ARM cores and architecture
+ variants.
+
+2003-10-19 Zdenek Dvorak <rakdver@atrey.karlin.mff.cuni.cz>
+
+ * Makefile.in (toplev.o): Add value-prof.h dependency.
+ (value-prof.o): Add REGS_H dependency.
+ * common.opt (fprofile-values, fvpt): New.
+ * flags.h (flag_value_profile_transformations): Declare.
+ * opts.c (common_handle_option): Handle -fprofile_values and
+ -fvpt.
+ * profile.c (branch_prob): Don't remove death notes here.
+ * timevar.def (TV_VPT): New.
+ * value-prof.c: Include regs.h.
+ (insn_divmod_values_to_profile, gen_divmod_fixed_value, gen_mod_pow2,
+ gen_mod_subtract, divmod_fixed_value_transform,mod_pow2_value_transform,
+ mod_subtract_transform, value_profile_transformations): New.
+ (insn_values_to_profile): Call insn_divmod_values_to_profile.
+ (find_values_to_profile): Add dumps.
+ * value-prof.h (value_profile_transformations): Declare.
+ * toplev.c: Include value-prof.h.
+ (rest_of_handle_value_profile_transformations): New.
+ (enum dump_file_index): Add DFI_vpt.
+ (dump_file): Add vpt dump.
+ (flag_value_profile_transformations): New.
+ (lang_independent_options): Add flag_profile_values and
+ flag_value_profile_transformations.
+ (rest_of_compilation): Call
+ rest_of_handle_value_profile_transformations.
+ (process_options): Let -fvpt imply -fprofile-values.
+ * doc/invoke.texi (-fvpt): Document.
+
+2003-10-19 Jan Hubicka <jh@suse.cz>
+
+ * i386.c (print_reg): Do not abort on certain registers.
+
+ PR optimization/12612
+ * reg-stack.c (subst_stack_regs_pat): Use st(1) for clobbers.
+ * i386.md (fpatan, fyl2x, fscale patterns and expanders): Use
+ match_scratch; avoid bogus paralles.
+
+ PR target/12674
+ * i386.c (ix86_function_regparm): Disable implicit register passing
+ conventions when profiling.
+
+2003-10-19 Eric Botcazou <ebotcazou@libertysurf.fr>
+ Richard Henderson <rth@redhat.com>
+
+ PR optimization/8178
+ * config/i386/i386.md (*movsi_zero): Delete.
+ (*ffs_no_cmove): Use ix86_expand_clear to zero the third operand.
+
+2003-10-19 Richard Henderson <rth@redhat.com>
+
+ * config/alpha/alpha.c (fix_operator): New.
+ (divmod_operator): Tidy.
+ (alpha_emit_xfloating_cvt): Handle UNSIGNED_FIX.
+ * config/alpha/alpha.h (FIXUNS_TRUNC_LIKE_FIX_TRUNC): Remove.
+ (PREDICATE_CODES): Update.
+ * config/alpha/alpha.md (fix_truncdfsi_ieee): Use match_operator.
+ (fix_truncdfsi_internal, fix_truncdfdi_ieee): Likewise.
+ (fix_truncsfsi_ieee, fix_truncsfsi_internal): Likewise.
+ (fix_truncsfdi_ieee): Likewise.
+ (fix_truncdfdi2, fix_truncsfdi2): Turn into define_expand.
+ (fixuns_truncdfdi2, fixuns_truncsfdi2, fixuns_trunctfdi2): New.
+ * config/alpha/alpha-protos.h: Update.
+
+2003-10-19 Richard Sandiford <rsandifo@redhat.com>
+
+ * config/mips/mips.h (INITIALIZE_TRAMPOLINE): Simplify.
+ * config/mips/mips.c (mips_load_got): Assume Pmode == ptr_mode.
+ * config/mips/mips.md (extendsidi2, *extendsidi2): Merge. Don't accept
+ constant operands.
+
+2003-10-18 Kazu Hirata <kazu@cs.umass.edu>
+
+ * doc/extend.texi: Fix typos.
+ * doc/invoke.texi: Likewise.
+
+2003-10-18 Nicolas Pitre <nico@cam.org>
+
+ * config/arm/arm.c (arm_override_options): Use arm_tune_xscale for
+ XScale optimizations not arm_arch_xscale.
+ * config/arm/arm.h (CONSTANT_ALIGNMENT_FACTOR, MOVE_RATIO): Likewise.
+
+2003-10-18 Ulrich Weigand <uweigand@de.ibm.com>
+
+ * config/s390/s390-protos.h (shift_count_operand): Add prototype.
+ * config/s390/s390.c (shift_count_operand): New function.
+ (s390_extra_constraint): Use it to implement 'Y' constraint.
+ (print_shift_count_operand): New function.
+ (print_operand): Use it to implement '%Y'.
+ * config/s390/s390.h (EXTRA_ADDRESS_CONSTRAINT): Add 'Y' constraint.
+ (PREDICATE_CODES): Add shift_count_operand.
+ * config/s390/s390.md ("rotldi3"): Merge alternatives,
+ using "shift_count_operand" predicate and "Y" constraint,
+ and "%Y" to output the combined shift count.
+ ("rotlsi3"): Likewise.
+ ("ashldi3", "*ashldi3_31", "*ashldi3_64"): Likewise.
+ ("ashrdi3", "*ashrdi3_31", "*ashrdi3_64", "*ashrdi3_cc_31",
+ "*ashrdi3_cc_64", "*ashrdi3_cconly_31", "*ashrdi3_cconly_64"): Likewise.
+ ("ashlsi3", "ashrsi3", "*ashrsi3_cc", "*ashrsi3_cconly"): Likewise.
+ ("lshrdi3", "*lshrdi3_31", "*lshrdi3_64"): Likewise.
+ ("lshrsi3"): Likewise.
+
+2003-10-18 Gunther Nikl <gni@gecko.de>
+
+ * config/m68k/m68k.c (m68k_output_function_epilogue): Add missing
+ argument to asm_fprintf statement.
+
+2003-10-18 Fariborz Jahanian <fjahanian@apple.com>
+
+ * rs6000.md: Separate TARGET_POWERPC64 patterns for TARGET_64BIT or TARGET_32BIT.
+ (ashrdisi3_noppc64) Generate more efficient code for 32-bit right-shift of
+ a "long long" argument.
+
+2003-10-18 Alexandre Oliva <aoliva@redhat.com>
+
+ * final.c (final_scan_insn): Run FINAL_PRESCAN_INSNS on asm insns
+ as well.
+
+2003-10-18 Richard Sandiford <rsandifo@redhat.com>
+
+ * rtl.h (rtl_size): Declare.
+ (rtunion): Remove rtwint.
+ (rtx_def): Replace 'fld' with a union of an rtunion or a HOST_WIDE_INT.
+ (RTX_HDR_SIZE, RTX_SIZE): New macros.
+ (RTL_CHECK1): Adjust for new rtx_def layout.
+ (RTL_CHECK2, RTL_CHECKC1, RTL_CHECKC2): Likewise.
+ (XWINT, XCWINT): Likewise. Access the rtx structure directly.
+ (X0WINT): Remove.
+ (X0ANY): New macro.
+ * rtl.def: Adjust comments for new rtx_def layout.
+ * ggc.h (ggc_alloc_rtx): Take the rtx code as argument, not the
+ number of slots.
+ * rtl.c (rtx_size): New array.
+ (rtx_alloc): Adjust call to ggc_alloc_rtx. Use RTX_HDR_SIZE.
+ (copy_rtx): Use RTX_HDR_SIZE. Adjust for new rtx_def layout.
+ (shallow_copy_rtx): Adjust call to ggc_alloc_rtx. Use RTX_SIZE.
+ * integrate.c (copy_rtx_and_substitute): Use X0ANY to copy '0' fields.
+ * emit-rtl.c (copy_most_rtx): Likewise.
+ (copy_rtx_if_shared): Use RTX_SIZE.
+ (copy_insn_1): Use RTX_HDR_SIZE. Adjust for new rtx_def layout.
+ * gengenrtl.c (gendef): Adjust ggc_alloc_rtx call. Use RTX_HDR_SIZE.
+ * gengtype.c (write_rtx_next): Use RTX_HDR_SIZE.
+ (adjust_field_rtx_def): Expect "rtx_def" to be a union rather than
+ an array. Adjust output for new rtx_def layout.
+ * ggc-page.c (RTL_SIZE): Use RTX_HDR_SIZE.
+ * reload1.c (eliminate_regs): Use RTX_SIZE.
+ * rtlanal.c (loc_mentioned_in_p): Adjust for new rtx_def layout.
+ * gdbinit.in (pi): Likewise.
+
+2003-10-18 Jan Hubicka <jh@suse.cz>
+
+ * integrate.c (copy_decl_for_inlining): Revert previous patch.
+
+2003-10-18 Jan Hubicka <jh@suse.cz>
+
+ * integrate.c (copy_decl_for_inlining): Fix copying of copies.
+
+2003-10-18 Roger Sayle <roger@eyesopen.com>
+
+ * libgcc.texi: Group multi-word types, such as "long double" and
+ "unsigned int", using braces in @deftypefn and @deftypefnx nodes.
+ Document __unord?f2 as returning a non-zero value, not just one.
+
+2003-10-18 Hans-Peter Nilsson <hp@bitrange.com>
+
+ * config/mmix/t-mmix (CRTSTUFF_T_CFLAGS): Define.
+ ($(T)crti.o, $(T)crtn.o): Pass CRTSTUFF_T_CFLAGS here too.
+
+2003-10-18 Eric Botcazou <ebotcazou@libertysurf.fr>
+
+ * config/i386/k6.md (k6_alux): Use the 'mode' attribute instead of
+ match_operand.
+
+2003-10-18 Eric Botcazou <ebotcazou@libertysurf.fr>
+
+ * config/sparc/sparc.c (function_arg_record_value_1): New fourth
+ parameter packed_p. Search for a DECL_PACKED field only if
+ packed_p is false. Pass packed_p recursively.
+ (function_arg_record_value_2): Likewise.
+ (function_arg_record_value): Update calls to
+ function_arg_record_value_1 and function_arg_record_value_2.
+
+2003-10-18 Eric Botcazou <ebotcazou@libertysurf.fr>
+
+ * cse.c (cse_insn) [src_folded]: Check that the tentative replacement
+ was successfully forced to memory before using the result.
+
+2003-10-18 Eric Botcazou <ebotcazou@libertysurf.fr>
+
+ PR optimization/8178
+ * config/i386/i386.md (*movsi_zero): New insn to set
+ a register to zero on TARGET_USE_MOV0 targets.
+
2003-10-18 Kelley Cook <kcook@gcc.gnu.org>
* Makefile.in (Makefile): Depend on the all Make-lang.in fragments.
zsh not working. Change gcc to GCC.
PR bootstrap/12546
- * doc/install.texi: Document that zsh does not work when
+ * doc/install.texi: Document that zsh does not work when
configuring gcc.
-
2003-10-17 Nathanael Nerode <neroden@gcc.gnu.org>
* config/ptx4.h: Switch to DWARF 2; update comments.
Define as 0.
* config/mips/iris6.h (FUNCTION_NAME_ALREADY_DECLARED): Define
- depending on mips_abi.
+ depending on mips_abi.
* config/mips/linux.h (FUNCTION_NAME_ALREADY_DECLARED): Define as 1.
* config/mips/mips.c (mips_output_function_prologue): Test
FUNCTION_NAME_ALREADY_DECLARED at runtime.
(build_mips16_call_stub): Likewise.
* config/mips/mips.h (FUNCTION_NAME_ALREADY_DECLARED): Provide
default.
-
+
* config/mips/iris6.h (DWARF2_UNWIND_INFO): Don't define for native
IRIX 6 O32 assembler.
(SUBTARGET_CC1_SPEC): Enforce mips2 ISA with O32 ABI.
(MUST_USE_SJLJ_EXCEPTIONS): Define.
[_MIPS_SIM == _ABIO32 && !GAS] (CTORS_SECTION_ASM_OP,
DTORS_SECTION_ASM_OP): Dummy definitions.
- (TARGET_ASM_NAMED_SECTION): Undef statically.
+ (TARGET_ASM_NAMED_SECTION): Undef statically.
(EH_FRAME_SECTION_NAME): Likewise.
(ASM_OUTPUT_FILENAME): Integrate mips.h version.
(LINK_SPEC): Only use default options -call_shared -no_unresolved
* arm-modes.def (CC_Nmode): New condition code mode.
* arm.c (thumb_condition_code): Delete.
(arm_select_cc_mode): Handle single-bit test for Thumb.
- (arm_print_operand, cases 'd' and 'D'): Don't special case the
+ (arm_print_operand, cases 'd' and 'D'): Don't special case the
condition code logic for Thumb.
(get_arm_condition_code): Handle CC_Nmode.
(thumb_cbrch_target_operand): New function.
(subsi3_cbranch, subsi3_cbranch_scratch): New Thumb patterns.
(cbranchne_decr1): Re-work to use CC_Nmode.
- * arm.c (thumb_expand_epilogue): Add clobbers of registers restored
+ * arm.c (thumb_expand_epilogue): Add clobbers of registers restored
by the return instruction. Add a use of the link register if it
wasn't stored.
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