+2011-09-28 Kai Tietz <ktietz@redhat.com>
+
+ * configure.ac: Add test for new section attribute
+ specifier "e" via define HAVE_GAS_SECTION_EXCLUDE.
+ * config.in: Regenerated.
+ * configure: Regenerated.
+ * config/i386/winnt.c (i386_pe_asm_named_section): Emit
+ new section flag "e" for excluded sections, if supported.
+ Otherwise we mark section withc SECTION_EXCLUDE flag
+ as never-load.
+
+2011-09-28 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/m32r/m32r.md: Use match_test rather than eq/ne symbol_ref
+ throughout file.
+
+2011-09-28 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/iq2000/iq2000.md: Use match_test rather than eq/ne symbol_ref
+ throughout file.
+
+2011-09-27 Sriraman Tallam <tmsriram@google.com>
+
+ * output.h (SECTION_EXCLUDE): New macro.
+ * varasm.c (default_elf_asm_named_section): Check for
+ SECTION_EXCLUDE.
+
+2011-09-27 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * fwprop.c (forward_propagate_and_simplify): After checking
+ reg/subreg combinations, check whether the modes are the same.
+
+2011-09-27 Bernd Schmidt <bernds@codesourcery.com>
+ Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/mips/mips.c (mips_add_cfa_restore): New function.
+ (mips16e_save_restore_reg): Use it.
+ (mips_restore_reg): Likewise. Split double FPRs for
+ REG_CFA_RESTORE notes.
+
+2011-09-27 Richard Sandiford <rdsandiford@googlemail.com>
+
+ PR middle-end/50386
+ PR middle-end/50326
+ * tree-sra.c (build_ref_for_model): Use the type of the field as
+ the type of the COMPONENT_REF.
+
+2011-09-27 Jeff Law <law@redhat.com>
+
+ * ifcvt.c (cheap_bb_rtx_cost_p): Add SCALE argument. Scale
+ non-jumping insns by REG_BR_PROB_BASE and the maximum cost
+ by SCALE.
+ (find_if_case_1): Use the probability of the THEN clause when
+ determining if speculation is profitable.
+ (find_if_case_2): Similarly for the ELSE clause.
+
+2011-09-27 Jakub Jelinek <jakub@redhat.com>
+
+ * common.opt: Add -foptimize-strlen option.
+ * Makefile.in (OBJS): Add tree-ssa-strlen.o.
+ (tree-sssa-strlen.o): Add dependencies.
+ * opts.c (default_options_table): Enable -foptimize-strlen
+ by default at -O2 if not -Os.
+ * passes.c (init_optimization_passes): Add pass_strlen
+ after pass_object_sizes.
+ * timevar.def (TV_TREE_STRLEN): New timevar.
+ * params.def (PARAM_MAX_TRACKED_STRLENS): New parameter.
+ * tree-pass.h (pass_strlen): Declare.
+ * tree-ssa-strlen.c: New file.
+ * c-decl.c (merge_decls): If compatible stpcpy prototype
+ is seen, set implicit_built_in_decls[BUILT_IN_STPCPY].
+
+2011-09-27 Tom de Vries <tom@codesourcery.com>
+
+ PR middle-end/43864
+ * tree-ssa-tail-merge.c: New file.
+ (struct same_succ_def): Define.
+ (same_succ, const_same_succ): New typedef.
+ (struct bb_cluster_def): Define.
+ (bb_cluster, const_bb_cluster): New typedef.
+ (struct aux_bb_info): Define.
+ (BB_SIZE, BB_SAME_SUCC, BB_CLUSTER, BB_VOP_AT_EXIT): Define.
+ (gvn_uses_equal): New function.
+ (same_succ_print, same_succ_print_traverse, update_dep_bb)
+ (stmt_update_dep_bb, local_def, same_succ_hash)
+ (inverse_flags, same_succ_equal, same_succ_alloc, same_succ_delete)
+ (same_succ_reset): New function.
+ (same_succ_htab, same_succ_edge_flags)
+ (deleted_bbs, deleted_bb_preds): New var.
+ (debug_same_succ): New function.
+ (worklist): New var.
+ (print_worklist, add_to_worklist, find_same_succ_bb, find_same_succ)
+ (init_worklist, delete_worklist, delete_basic_block_same_succ)
+ (same_succ_flush_bbs, purge_bbs, update_worklist): New function.
+ (print_cluster, debug_cluster, update_rep_bb)
+ (add_bb_to_cluster, new_cluster, delete_cluster): New function.
+ (all_clusters): New var.
+ (alloc_cluster_vectors, reset_cluster_vectors, delete_cluster_vectors)
+ (merge_clusters, set_cluster): New function.
+ (gimple_equal_p, gsi_advance_bw_nondebug_nonlocal, find_duplicate)
+ (same_phi_alternatives_1, same_phi_alternatives, bb_has_non_vop_phi)
+ (deps_ok_for_redirect_from_bb_to_bb, deps_ok_for_redirect)
+ (find_clusters_1, find_clusters): New function.
+ (update_vuses, vop_phi, vop_at_entry, replace_block_by): New function.
+ (update_bbs): New var.
+ (apply_clusters): New function.
+ (update_debug_stmt, update_debug_stmts): New function.
+ (tail_merge_optimize): New function.
+ tree-pass.h (tail_merge_optimize): Declare.
+ * tree-ssa-pre.c (execute_pre): Use tail_merge_optimize.
+ * Makefile.in (OBJS-common): Add tree-ssa-tail-merge.o.
+ (tree-ssa-tail-merge.o): New rule.
+ * opts.c (default_options_table): Set OPT_ftree_tail_merge by default at
+ OPT_LEVELS_2_PLUS.
+ * tree-ssa-sccvn.c (vn_valueize): Move to ...
+ * tree-ssa-sccvn.h (vn_valueize): Here.
+ * timevar.def (TV_TREE_TAIL_MERGE): New timevar.
+ * common.opt (ftree-tail-merge): New switch.
+ * params.def (PARAM_MAX_TAIL_MERGE_COMPARISONS)
+ (PARAM_MAX_TAIL_MERGE_ITERATIONS): New parameter.
+ * doc/invoke.texi (Optimization Options, -O2): Add -ftree-tail-merge.
+ (-ftree-tail-merge, max-tail-merge-comparisons)
+ (max-tail-merge-iterations): New item.
+
+2011-09-27 Jan Hubicka <jh@suse.cz>
+
+ * ipa-inline-analysis.c (MAX_TIME): Reduce to avoid overflows.
+
+2011-09-27 Jan Hubicka <jh@suse.cz>
+
+ * ipa-inline-analysis.c (eliminated_by_inlining_prob): Handle parameters
+ passed by reference; handle loads from non-SSA scalars and update comments.
+
+2011-09-27 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR rtl-optimization/50249
+ * reload1.c (reload_reg_reaches_end_p): Accept a reloadnum argument
+ instead of opnum and type. All callers changed. Remove useless
+ declaration.
+ Search forward for other reloads of the same type for the same operand
+ using the same register; if any are found, return false.
+ (reload_regs_reach_end_p): Same argument changes; all callers changed.
+
+2011-09-27 Andi Kleen <ak@linux.intel.com>
+ Jan Hubicka <jh@suse.cz>
+
+ * doc/invoke.texi (ffat-lto-objects): Document.
+ * toplev.c (compile_file): Do not output assembly when doing slim lto;
+ Output __gnu_slim_lto when doing slim lto.
+ * cgraphunit.c (ipa_passes): Do only analysis when producing slim lto.
+ (cgraph_optimize): Return early when doing slim lto.
+ * opts.c (finish_options): Complain about lack of linker plugin
+ when doing slim lto.
+ * common.opt (ffat-lto-objects): New.
+
+2011-09-27 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * ipa-inline-analysis.c (predicate_probability): Avoid comparison
+ between signed and unsigned.
+
+2011-09-27 Ira Rosen <ira.rosen@linaro.org>
+
+ * tree-vect-stmts.c (vectorizable_type_demotion): Handle basic block
+ vectorization.
+ (vectorizable_type_promotion): Likewise.
+ (vect_analyze_stmt): Call vectorizable_type_demotion and
+ vectorizable_type_promotion for basic blocks.
+ (supportable_widening_operation): Don't assume loop vectorization.
+ * tree-vect-slp.c (vect_build_slp_tree): Allow multiple types for
+ basic blocks. Update vectorization factor for basic block
+ vectorization.
+ (vect_analyze_slp_instance): Allow multiple types for basic block
+ vectorization. Recheck unrolling factor after construction of SLP
+ instance.
+
+2011-09-27 Richard Guenther <rguenther@suse.de>
+
+ * tree-object-size.c (compute_object_sizes): Fix dumping of
+ folded statement.
+
+2011-09-27 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/50363
+ * tree-ssa-pre.c (create_expression_by_pieces): Handle
+ pointer conversions in POINTER_PLUS_EXPRs properly.
+
+2011-09-27 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * config/arm/neon.md (neon_vget_highv16qi, neon_vget_highv8hi)
+ (neon_vget_highv4si, neon_vget_highv4sf, neon_vget_highv2di)
+ (neon_vget_lowv16qi, neon_vget_lowv8hi, neon_vget_lowv4si)
+ (neon_vget_lowv4sf, neon_vget_lowv2di): Turn into define_expands
+ that produce subreg moves. Define using VQX iterators.
+
+2011-09-27 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.md (ashrqi3): Split alternative "n"
+ into its remaining parts C03, C04, C05, C06, C07 and describe
+ impact in CC by attribute "cc" appropriately.
+ * config/avr/avr.c (notice_update_cc): Clean-up: Don't patch CC0
+ by digging RTX.
+
+2011-09-27 Jakub Jelinek <jakub@redhat.com>
+
+ * rtl.h (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
+ from 3 x MAX_MACHINE_MODE.
+ (CONSTM1_RTX): Define.
+ * emit-rtl.c (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
+ from 3 x MAX_MACHINE_MODE.
+ (gen_rtx_CONST_VECTOR): Use CONSTM1_RTX if all inner constants are
+ CONSTM1_RTX.
+ (init_emit_once): Initialize CONSTM1_RTX for MODE_INT and
+ MODE_VECTOR_INT modes.
+ * simplify-rtx.c (simplify_binary_operation_1) <case IOR, XOR, AND>:
+ Optimize if one operand is CONSTM1_RTX.
+ * config/i386/i386.c (ix86_expand_sse_movcc): Optimize mask ? -1 : x
+ into mask | x.
+
+2011-09-26 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.md (edge{8,16,32}{,l}): Return Pmode.
+ (fcmp{le,ne,gt,eq}{16,32}): Likewise.
+ * config/sparc/visintrin.h: Update edge and pixel-compare
+ intrinsics to return 'long' instead of 'int'.
+ * doc/extend.texi: Update documentation to match.
+ * config/sparc/sparc.c (eligible_for_return_delay): When leaf or
+ flat, allow any instruction. Otherwise, when V9 allow parallels
+ which consist only of sets to registers outside of %o0 to %o5.
+ (sparc_vis_init_builtins): Update VIS builtin types for edge
+ and pixel-compare.
+
+ * config/sparc/sparc.c (sparc_conditional_register_usage): When VIS
+ is enabled, mark %gsr as global.
+ * config/sparc/sparc.md (UNSPEC_WRGSR): Delete.
+ (wrgsr_vis, *wrgsr_sp64, wrgsr_v8plus): Don't wrap in an unspec.
+
+ * config/sparc/sparc-c.c: New file implementing sparc_target_macros,
+ which will now define __VIS and __VIS__ when -mvis is enabled.
+ * config/sparc/t-sparc: Likewise.
+ * config.gcc: Add sparc-c.o to c_target_objs and cxx_target_objs,
+ and add t-sparc to tmake_file for all sparc targets.
+ * config/sparc/sparc-protos.h (sparc_target_macros): Declare.
+ * config/sparc/sparc.h (TARGE_CPU_CPP_BUILTINS): Call it.
+
+ * config/sparc/sparc.c (sparc_vis_init_builtins): Add explicit
+ builtins for VIS vector addition and subtraction.
+ * config/sparc/visintrin.h (__vis_fpadd16, __vis_fpadd16s,
+ __vis_fpadd32, __vis_fpadd32s, __vis_fpsub16, __vis_fpsub16s,
+ __vis_fpsub32, __vis_fpsub32s): New.
+ * doc/extend.texi: Document new VIS intrinsics.
+
+2011-09-26 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.md (peephole casesi+2): Use -1 instead of 65536.
+ * config/avr/avr.c (avr_out_compare): Print shorter sequence for
+ EQ/NE comparisons against +/-1 in the case of unused-after,
+ non-ld-regs target.
+
+2011-09-26 Jakub Jelinek <jakub@redhat.com>
+
+ * gimple-fold.c (gimplify_and_update_call_from_tree): Set
+ gctx.into_ssa after push_gimplify_context.
+
+ * gimple.c (gimple_build_call_valist): New function.
+ * gimple.h (gimple_build_call_valist): New prototype.
+ * tree-ssa-propagate.c (finish_update_gimple_call): New function.
+ (update_gimple_call): Likewise.
+ (update_call_from_tree): Use finish_update_gimple_call.
+ * tree-ssa-propagate.h (update_gimple_call): New prototype.
+
+2011-09-26 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/50472
+ * gimple-fold.c (fold_const_aggregate_ref_1): Do not fold
+ volatile references.
+
+2011-09-26 Bingfeng Mei <bmei@broadcom.com>
+
+ * doc/tm.texi: Correct documentation for TARGET_ADDR_SPACE_SUBSET_P.
+ * target.def: (addr_space_subset_p): Likewise.
+
+2011-09-26 Tom de Vries <tom@codesourcery.com>
+
+ * tree-ssa-alias.h (pt_solution_singleton_p): Declare.
+ * tree-ssa-structalias.c (pt_solution_singleton_p): New function.
+ * tree-ssa-ccp.c (fold_builtin_alloca_for_var): Set points-to solution
+ of new var.
+
+2011-09-26 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50465
+ * config/avr/avr-protos.h (output_reload_insisf): Don't pass insn.
+ * config/avr/avr.md (*reload_insi, *reload_insf): Change call to
+ output_reload_insisf.
+ (adjust_len): Set default to "no".
+ Remove alternative "yes". Add alternatives: "mov8", "mov16",
+ "mov32", "ashlqi", "ashrqi", "lshrqi", "ashlhi", "ashrhi",
+ "lshrhi", "ashlsi, "ashrsi", "lshrsi".
+ (*movqi, *movhi, *movsi, *ashlqi3, ashlhi3, ashlsi3,
+ *ashlhi3_const, *ashlsi3_const, ashrqi3, ashrhi3, ashrsi3,
+ *ashrhi3_const, *ashrsi3_const, *lshrqi3, lshrhi3, *lshrhi3_const,
+ *lshrsi3_const): Set attribute "adjust_len".
+ * config/avr/avr.c (output_reload_insisf): Remove parameter "insn".
+ (output_movsisf): Don't pass insn to output_reload_insisf.
+ (adjust_insn_length): Handle new alternatives to adjust_len.
+ Remove handling of ADJUST_LEN_YES. Clean-up code.
+
+2011-09-26 Eric Botcazou <ebotcazou@adacore.com>
+
+ * ifcvt.c (noce_try_cmove_arith): Use may_trap_or_fault_p in lieu of
+ may_trap_p to detect loads that may trap of fault.
+
+2011-09-26 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr-protos.h (output_reload_inhi): Change prototype.
+ * config/avr/avr.md (adjust_len): Add "reload_in16" alternative.
+ (*reload_inhi): Use it. Adapt call to output_reload_inhi to new
+ prototype.
+ (*movhi): Split constraint alternative "r,rL" into "r,r" and "r,L".
+ * config/avr/avr.c: Rename output_reload_insisf_1 to
+ output_reload_in_const.
+ (avr_popcount_each_byte): Handle SFmode, too.
+ (output_reload_in_const): Change so it can handle HI loads, too.
+ Use avr_popcount_each_byte to work out if scratch register must be
+ created on the fly.
+ (output_reload_inhi): Rewrite using output_reload_in_const and...
+ (output_movhi): ...use it to print constants' loads.
+ (adjust_insn_length): New case ADJUST_LEN_RELOAD_IN16. Cleanup code.
+
+2011-09-25 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/constraints.md (C, P, Z): New constraints for
+ const_doube, const_int, and const_vector "all ones" values.
+ Make unused constraint letters comment match reality.
+ * config/sparc/predicates.md (const_all_ones_operand,
+ register_or_zero_or_all_ones_operand): New predicates.
+ * config/sparc/sparc.c (sparc_expand_move): Allow all ones
+ as well as zero constants when VIS.
+ (sparc_legitimate_constant_p): Likewise.
+ * config/sparc/sparc.md (movsi_insn): Add fones alternative.
+ (movsf_insn): Likewise
+ (movdi_insn_sp64): Add fone alternative.
+ (movdf_insn_sp32_v9): Likewise.
+ (movdf_insn_sp64): Likewise.
+
+ * configure.ac: Add feature check to make sure the assembler
+ supports the FMAF, HPC, and VIS 3.0 instructions found on
+ Niagara-3 and later cpus.
+ * configure: Rebuild.
+ * config.in: Likewise.
+ * config/sparc/sparc.opt: New option '-mfmaf'.
+ * config/sparc/sparc.md: Add float fused multiply-add patterns.
+ * config/sparc/sparc.h (AS_NIAGARA3_FLAG): New macro.
+ (ASM_CPU64_DEFAULT_SPEC, ASM_CPU_SPEC): Use it, as needed.
+ * config/sparc/sol2.h (ASM_CPU32_DEFAULT_SPEC,
+ ASM_CPU64_DEFAULT_SPEC, ASM_CPU_SPEC): Likewise.
+ * config/sparc/sparc.c (sparc_option_override): Turn MASK_FMAF on
+ by default for Niagara-3 and later. Turn it off if TARGET_FPU is
+ disabled.
+ (sparc_rtx_costs): Handle 'FMA'.
+ * doc/invoke.texi: Document -mfmaf.
+
+2011-09-25 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-ssa-structalias.c (intra_create_variable_infos): Treat
+ TYPE_RESTRICT REFERENCE_TYPE parameters like restricted
+ DECL_BY_REFERENCE parameters.
+
+2011-09-25 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree-eh.c (cleanup_empty_eh): Allow a call to __builtin_stack_restore
+ if there is no outgoing edge.
+
+ * tree-scalar-evolution.c (simple_iv): Accept all kinds of pointer and
+ integral types.
+
+2011-09-25 Ira Rosen <ira.rosen@linaro.org>
+
+ * tree-vect-slp.c (vect_slp_analyze_bb_1): Split out core part
+ of vect_analyze_bb here.
+ (vect_analyze_bb): Loop over vector sizes calling vect_analyze_bb_1.
+
+2011-09-25 Ira Rosen <ira.rosen@linaro.org>
+
+ * tree-data-ref.c (dr_analyze_innermost): Add new argument.
+ Allow not simple iv if analyzing basic block.
+ (create_data_ref): Update call to dr_analyze_innermost.
+ (stmt_with_adjacent_zero_store_dr_p, ref_base_address): Likewise.
+ * tree-loop-distribution.c (generate_memset_zero): Likewise.
+ * tree-predcom.c (find_looparound_phi): Likewise.
+ * tree-data-ref.h (dr_analyze_innermost): Add new argument.
+
+2011-09-24 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.h (FIRST_PSEUDO_REGISTER): Bump to 103.
+ (SPARC_GSR_REG): Define.
+ (FIXED_REGISTERS): Mark GSR as fixed.
+ (CALL_USED_REGISTERS): Mark GSR as call used.
+ (HARD_REGNO_NREGS): GSR is always 1 register.
+ (REG_CLASS_CONTENTS): Add GSR to ALL_REGS.
+ (REG_ALLOC_ORDER, REG_LEAF_ALLOC_ORDER): Add GSR to the end.
+ (REGISTER_NAMES): Add "%gsr".
+ * config/sparc/sparc.md (UNSPEC_ALIGNADDR, UNSPEC_ALIGNADDRL):
+ Delete.
+ (UNSPEC_WRGSR): New unspec.
+ (GSR_REG): New constant.
+ (type): Add new insn type 'gsr'.
+ (fpack16_vis, fpackfix_vis, fpack32_vis,
+ faligndata<V64I:MODE>_vis)): Add use of GSR_REG.
+ (wrgsr_vis, *wrgsr_sp64, wrgsr_v8plus, rdgsr_vis, *rdgsr_sp64,
+ rdgsr_v8plus): New expanders and insns.
+ (alignaddr<P:mode>_vis, alignaddrl<P:mode>_vis): Reimplement
+ using patterns which show that this is a plus in addition to a
+ modification of GSR_REG, instead of an unspec.
+ * config/sparc/ultra1_2.md: Handle 'gsr'.
+ * config/sparc/ultra3.md: Likewise.
+ * config/sparc/niagara.md: Likewise.
+ * config/sparc/niagara2.md: Likewise.
+ * config/sparc/sparc.c (leaf_reg_remap, sparc_leaf_regs): Fill out
+ end of table.
+ (sparc_option_override): Make -mvis imply -mv8plus.
+ (hard_32bit_mode_classes, hard_64bit_mode_classes): Add entries
+ for %gsr.
+ (sparc_vis_init_builtins): Build __builtin_vis_write_gsr and
+ __builtin_vis_read_gsr.
+ (sparc_expand_buildin): Handle builtins that take one argument and
+ return void.
+ (sparc_fold_builtin): Never fold writes to %gsr.
+ * config/sparc/visintrin.h (__vis_write_gsr, __vis_read_gsr): New.
+ * doc/extend.texi: Document new VIS intrinsics.
+
+2011-09-23 Jan Hubicka <jh@suse.cz>
+
+ * ipa-inline-transform.c (inline_call): Add comment.
+ * ipa-inline.h (inline_param_summary): New structure and vector.
+ (struct inline_edge_summary): Add param field.
+ * ipa-inline-analysis.c (CHANGED): New constant.
+ (add_clause): Handle CHANGED and NOT_CONSTANT.
+ (predicate_probability): New function.
+ (dump_condition): Dump CHANGED predicate.
+ (evaluate_conditions_for_known_args): Handle ERROR_MARK as marker
+ of unknown function wide invariant.
+ (evaluate_conditions_for_edge): Handle change probabilities.
+ (inline_edge_duplication_hook): Copy param summaries.
+ (inline_edge_removal_hook): Free param summaries.
+ (dump_inline_edge_summary): Fix dumping of indirect edges and callee sizes;
+ dump param summaries.
+ (will_be_nonconstant_predicate): Use CHANGED predicate.
+ (record_modified_bb_info): New structure.
+ (record_modified): New function.
+ (param_change_prob): New function.
+ (estimate_function_body_sizes): Compute param summaries.
+ (estimate_edge_size_and_time): Add probability argument.
+ (estimate_node_size_and_time): Add inline_param_summary argument;
+ handle predicate probabilities.
+ (remap_predicate): Fix formating.
+ (remap_edge_change_prob): New function.
+ (remap_edge_summaries): Rename from ...; use remap_edge_change_prob.
+ (remap_edge_predicates): ... this one.
+ (inline_merge_summary): Remap edge summaries; handle predicate probabilities;
+ remove param summaries after we are done.
+ (do_estimate_edge_time): Update.
+ (do_estimate_edge_growth): Update.
+ (read_inline_edge_summary): Read param info.
+ (inline_read_summary): Fix formating.
+ (write_inline_edge_summary): Write param summaries.
+
+2011-09-23 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/i386.c (ix86_print_operand): Handle %~.
+ (ix86_print_operand_punct_valid_p): Return true also for '~'.
+ * config/i386/sse.md (i128): New mode_attr.
+ (vec_extract_hi_<mode>, vec_extract_hi_<mode>,
+ avx_vbroadcastf128_<mode>, *avx_vperm2f128<mode>_full,
+ *avx_vperm2f128<mode>_nozero, vec_set_lo_<mode>,
+ vec_set_hi_<mode>, *vec_concat<mode>_avx): Use <i128> in the
+ patterns, use "<sseinsnmode>" for "mode" attribute.
+ (vec_extract_hi_v16hi, vec_extract_hi_v32qi, vec_set_lo_v16hi,
+ vec_set_hi_v16hi, vec_set_lo_v32qi, vec_set_hi_v32qi): Use
+ %~128 in the patterns, use "OI" for "mode" attribute.
+
+2011-09-23 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50447
+ * config/avr/avr.md (adjust_len): Add alternatives "tsthi",
+ "tstsi", "compare".
+ (*cmpqi_sign_extend): Use s8_operand.
+ (*cmphi, *cmpsi): Rewrite using avr_out_compare.
+ * config/avr/avr-protos.h (compare_diff_p, compare_eq_p): Remove
+ prototypes.
+ (out_tsthi, out_tstsi): Remove prototypes.
+ (avr_out_tsthi, avr_out_tstsi): New prototypes.
+ * config/avr/avr.c (out_tsthi, out_tstsi): Remove functions.
+ (avr_asm_len): Negative length now sets *plen to -length.
+ (compare_sign_p): Return bool instead of int.
+ (compare_diff_p, compare_eq_p): Ditto and make static.
+ (avr_out_tsthi): New function.
+ (avr_out_tstsi): New function.
+ (avr_out_compare): New function.
+ (adjust_insn_length): Handle ADJUST_LEN_TSTHI, ADJUST_LEN_TSTSI,
+ ADJUST_LEN_COMPARE.
+
+2011-09-23 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50447
+ * config/avr/avr.md: (adjust_len): Add alternative "out_plus".
+ (addsi3): Rewrite using QI scratch register. Adjust text
+ peepholes using plus:SI.
+ (*addsi3_zero_extend.hi): New insn.
+ (*subsi3_zero_extend.hi): New insn.
+ (*subhi3_zero_extend1): Set attribute "cc" to "set_czn".
+ (*subsi3_zero_extend): Ditto.
+ (subsi3): Change predicate #2 to register_operand.
+ * config/avr/avr-protos.h (avr_out_plus): New prototype.
+ (avr_out_plus_1): New static function.
+ (avr_out_plus): New function.
+ (adjust_insn_length): Handle ADJUST_LEN_OUT_PLUS.
+
+2011-09-23 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/i386.c (ix86_prepare_sse_fp_compare_args): For
+ GE/GT/UNLE/UNLT swap arguments and condition even for TARGET_AVX.
+
+2011-09-23 Ian Lance Taylor <iant@google.com>
+
+ * godump.c (go_define): Treat a single character in single quotes,
+ or a string, as an operand.
+
+2011-09-23 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-prop.h (jump_func_type): Updated comments.
+ (ipa_known_type_data): New type.
+ (ipa_jump_func): Use it to describe known type jump functions.
+ * ipa-prop.c (ipa_print_node_jump_functions_for_edge): Updated to
+ reflect the new known type jump function contents.
+ (compute_known_type_jump_func): Likewise.
+ (combine_known_type_and_ancestor_jfs): Likewise.
+ (try_make_edge_direct_virtual_call): Likewise.
+ (ipa_write_jump_function): Likewise.
+ (ipa_read_jump_function): Likewise.
+ * ipa-cp.c (ipa_value_from_known_type_jfunc): New function.
+ (ipa_value_from_jfunc): Use ipa_value_from_known_type_jfunc.
+ (propagate_accross_jump_function): Likewise.
+
+2011-09-23 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50446
+ * config/avr/avr.md (rotlqi3): Support all offsets 0..7.
+ (rotlqi3_4): Turn insn into expander.
+ (*rotlqi3): New insn.
+ (rotlhi3, rotlsi3): Support rotate left/right by 1.
+ (*rotlhi2.1, *rotlhi2.15): New insns.
+ (*rotlsi2.1, *rotlsi2.31): New insns.
+ * config/avr/constraints.md (C03, C05, C06, C07): New constraints.
+
+2011-09-23 Bin Cheng <bin.cheng@arm.com>
+
+ * config/arm/bpabi.h (BE8_LINK_SPEC): Add cortex-m arch
+ and processors.
+
+2011-09-22 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ * ipa-prop.c (ipa_print_node_jump_functions): Fix typos.
+
+2011-09-22 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * reload.c (find_reloads): Set operand_mode to Pmode for address
+ operands consisting of just a CONST_INT.
+
+2011-09-22 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/50482
+ * config/i386/i386.c (ix86_expand_sse_movcc): When generating
+ blendv, force op_true to register if it doesn't satisfy
+ nonimmediate_operand predicate.
+
+2011-09-22 Richard Sandiford <rdsandiford@googlemail.com>
+
+ PR middle-end/50113
+ PR middle-end/50061
+ * calls.c (emit_library_call_value_1): Use BLOCK_REG_PADDING to
+ get the locate.where_pad value for register-only arguments.
+ * config/arm/arm.c (arm_pad_arg_upward): Remove HFmode handling.
+ (arm_pad_reg_upward): Handle null types.
+
+2011-09-22 Jan Hubicka <jh@suse.cz>
+
+ * ipa-inline-analysis.c: Fix overly long lines.
+
+2011-09-22 Jan Hubicka <jh@suse.cz>
+
+ * ipa-inline-transform.c (inline_call): Always update jump functions
+ after inlining.
+ * ipa-inline.c (ipa_inline): Likewise; do not call
+ ipa_create_all_structures_for_iinln.
+ (ipa_inline): Always free jump functions.
+ * ipa-inline-analysis.c (evaluate_conditions_for_edge): Remove hack.
+ (remap_edge_predicates): Fix pasto.
+ (inline_merge_summary): Remove nlined edge predicate; remove hack.
+ (inline_analyze_function): Always initialize jump functions.
+ (inline_generate_summary): Likewise.
+ (inline_write_summary): Always write jump functions when ipa-cp
+ is not doing that.
+ (inline_read_summary): Always read jump functions when ipa-cp
+ is not doing that.
+ * ipa-prop.c (iinlining_processed_edges): Remove.
+ (update_indirect_edges_after_inlining): Do not use
+ iinlining_processed_edges; instead set param_index to -1.
+ (propagate_info_to_inlined_callees): Only try to indirect inlining
+ when asked to do so; update jump functions of indirect calls, too;
+ remove jump functions of the inlined edge.
+ (ipa_edge_duplication_hook): Do not copy iinlining_processed_edges.
+ (ipa_create_all_structures_for_iinln): Remove.
+ (ipa_free_all_structures_after_iinln): Do not free
+ iinlining_processed_edges.
+ * ipa-prop.h (ipa_create_all_structures_for_iinln): Remove.
+
+2011-09-22 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * config/arm/predicates.md (expandable_comparison_operator): New
+ predicate, extracted from...
+ (arm_comparison_operator): ...here.
+ * config/arm/arm.md (cbranchsi4, cbranchsf4, cbranchdf4, cbranchdi4)
+ (cstoresi4, cstoresf4, cstoredf4, cstoredi4, movsicc, movsfcc)
+ (movdfcc): Use expandable_comparison_operator.
+
+2011-09-22 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50447
+ PR target/50465
+ * config/avr/avr-protos.h (avr_out_bitop): New prototype.
+ (avr_popcount_each_byte): New prototype.
+ * config/avr/avr.c (avr_popcount): New static function.
+ (avr_popcount_each_byte): New function.
+ (avr_out_bitop): New function.
+ (adjust_insn_length): ADJUST_LEN_OUT_BITOP dispatches to
+ avr_out_bitop. Cleanup code.
+ * config/avr/constraints.md (Ca2, Co2, Cx2): New constraints.
+ (Ca4, Co4, Cx4): New constraints.
+ * config/avr/avr.md (adjust_len): Add "out_bitop" insn attribute
+ alternative.
+ (andhi3, iorhi3, xorhi3): Rewrite insns using avr_out_bitop.
+ (andsi3, iorsi3, xorsi3): Ditto.
+ (*iorhi3_clobber, *iorsi3_clobber): Remove insns.
+
+2011-09-22 Ira Rosen <ira.rosen@linaro.org>
+
+ PR tree-optimization/50451
+ * tree-vect-slp.c (vect_get_constant_vectors): Don't fail for
+ constant operands in reduction.
+ (vect_get_slp_defs): Don't create vector operand for NULL scalar
+ operand.
+
+2011-09-22 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.c (sparc_vis_init_builtins): Do not mark
+ fpack16, fpack32, fpackfix as const.
+
+ * config/sparc/sparc.md (G[0-7]_REG, O[0-7]_REG, L[0-7]_REG,
+ I[0-7]_REG, F[0-62]_REG, FCC[0-3]_REG, CC_REG, SFP_REG): New
+ constants. Use them everywhere.
+
+2011-09-22 Oleg Endo <oleg.endo@t-online.de>
+
+ * config/sh/sh.c (andcosts): Renamed to and_xor_ior_costs.
+ Added AND special case. Adapted comments.
+ (sh_rtx_costs): Added XOR and IOR case.
+
+2011-09-21 Jan Hubicka <jh@suse.cz>
+
+ * ipa-inline-analsis.c (compute_inline_parameters): Set
+ cfun and current_function_decl.
+
+2011-09-21 Jan Hubicka <jh@suse.cz>
+
+ * ipa-inline-analysis.c (set_cond_stmt_execution_predicate): Allow
+ handled components in parameter of builtin_constant_p.
+ (will_be_nonconstant_predicate): Allow loads of non-SSA parameters.
+
+2011-09-21 Jan Hubicka <jh@suse.cz>
+
+ * ipa-inline.c (relative_time_benefit): Fix wrong bracketting.
+ * ipa-inline.h (estimate_edge_time): Fix pasto.
+ * ipa-inline-analysis.c (do_estiamte_edge_time): Remove capping.
+
+2011-09-21 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/i386.c (ix86_expand_sse_movcc): Use
+ blendvps, blendvpd and pblendvb if possible.
+
2011-09-21 Uros Bizjak <ubizjak@gmail.com>
PR target/50464
(sparc_vis_init_builtins): Use def_builtin_const for all VIS builtins
other than alignaddr and falignaddr.
+ * config/sparc/sparc.md (UNSPEC_FCMPLE, UNSPEC_FCMPNE, UNSPEC_FCMPGT,
+ UNSPEC_FCMPEQ): New unspec codes.
+ (fcmple16_vis, fcmple32_vis, fcmpne16_vis, fcmpne32_vis, fcmpgt16_vis,
+ fcmpgt32_vis, fcmpeq16_vis, fcmpeq32_vis): New patterns.
+ * config/sparc/sparc.c (sparc_vis_init_builtins): Create builtins for
+ new pixel compare VIS patterns.
+ * config/sparc/visintrin.h (__vis_fcmple16, __vis_fcmple32,
+ __vis_fcmpne16, __vis_fcmpne32, __vis_fcmpgt16, __vis_fcmpgt32,
+ __vis_fcmpeq16, __vis_fcmpeq32): New.
+ * doc/extend.texi: Document new pixel compare VIS intrinsics.
+
2011-09-21 Tom de Vries <tom@codesourcery.com>
* final.c (final): Handle if JUMP_LABEL is not LABEL_P.
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