+2008-03-13 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/35185
+ * omp-low.c (lower_regimplify, init_tmp_var, save_tmp_var): Removed.
+ (lower_omp_2): New function.
+ (lower_omp_1, lower_omp): Rewritten.
+
+2008-03-13 Danny Smith <dannysmith@users.sourceforge.net>
+
+ PR 35054
+ * doc/extend.texi (Structure-Packing Pragmas): Replace "Win32"
+ with the phrase "Microsoft Windows compilers".
+ (Push/Pop Macro Pragmas): New subsection. Document
+ #pragma push_macro and pragma pop_macro.
+
+2008-03-12 Paul Brook <paul@codesourcery.com>
+
+ * config/arm/arm.c (output_move_double): Prefer LDRD to LDM.
+
+2008-03-12 Paul Brook <paul@codesourcery.com>
+
+ * config/arm/thumb2.md: Extend peephole to cover 3-arg subs.
+ (thumb2_alusi3_short): Exclude PLUS and MINUS.
+ (thumb2_addsi_shortim): Rename ...
+ (thumb2_addsi_short): ... to this. Allow register operands.
+ (thumb2_subsi_short): New pattern.
+ (thumb2_one_cmplsi2_short,
+ thumb2_negsi2_short): New patterns and peepholes.
+
+2008-03-12 Paul Brook <paul@codesourcery.com>
+
+ * config/arm/arm.c (arm_size_rtx_costs): Use ARM costs for Thumb-2.
+
+2008-03-12 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (int_cond): New code iterator.
+ (fp_cond): Ditto.
+ ("s<code>"): Macroize expander from seq, sne, sgt, sgtu, slt, sltu,
+ sge, sgeu, sle and sleu expanders usign int_cond code iterator.
+ ("s<code>"): Macroize expander from sunordered, sordered, suneq, sunge,
+ sungt, sunle, sunlt and sltgt expanders usign fp_cond code iterator.
+ ("b<code>"): Macroize expander from beq, bne, bgt, bgtu, blt, bltu,
+ bge, bgeu, ble and bleu expanders usign int_cond code iterator.
+ ("b<code>"): Macroize expander from bunordered, bordered, buneq, bunge,
+ bungt, bunle, bunlt and bltgt expanders usign fp_cond code iterator.
+
+2008-03-12 Paul Brook <paul@codesourcery.com>
+
+ * config/arm/arm.c (use_return_insn): Use offsets->saved_regs_mask
+ instead of {arm,thumb}_compute_save_reg_mask.
+ (output_return_instruction): Ditto.
+ (thumb_unexpanded_epilogue): Ditto.
+ (thumb1_expand_prologue): Ditto.
+ (thumb1_output_function_prologue): Ditto.
+ (arm_set_return_address): Ditto.
+ (thumb_set_return_address): Ditto.
+ (arm_get_frame_offsets): Set offsets->saved_regs_mask. Push extra
+ regs to achieve stack alignment.
+ (thumb1_compute_save_reg_mask): Fix compiler warning.
+ (arm_output_epilogue): Use offsets->saved_regs_mask.
+ Adjust stack pointer by poping call clobered registers.
+ (arm_expand_prologue): Use offsets->saved_regs_mask.
+ Adjust stack pointer by pushing extra registers.
+ * config/arm.h (arm_stack_offsets): Add saved_regs_mask.
+
+2008-03-12 Paolo Bonzini <bonzini@gnu.org>
+
+ PR tree-opt/35422
+ * fold-const.c (fold_unary) <NOP_EXPR>: Distribute a narrowing
+ conversion to the operands of a multiplication.
+
+2008-03-12 Richard Guenther <rguenther@suse.de>
+
+ * Makefile.in (OBJS-common): Add tree-ssa-phiprop.o
+ (tree-ssa-phiprop.o): Copy dependencies from tree-ssa-forwprop.o.
+ * timevar.def (TV_TREE_PHIPROP): Add.
+ * tree-ssa-phiprop.c: Split from tree-ssa-forwprop.c, added
+ pass description. Use TV_TREE_PHIPROP.
+ * tree-ssa-forwprop.c: Remove phiprop code.
+
+2008-03-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/35549
+ * omp-low.c (maybe_lookup_decl): Constify first argument.
+ (use_pointer_for_field): Change last argument from bool to
+ omp_context *. Disallow shared copy-in/out in nested
+ parallel if decl is shared in outer parallel too.
+ (build_outer_var_ref, scan_sharing_clauses,
+ lower_rec_input_clauses, lower_copyprivate_clauses,
+ lower_send_clauses, lower_send_shared_vars): Adjust callers.
+
+2008-03-12 Victor Kaplansky <victork@il.ibm.com>
+ Ira Rosen <irar@il.ibm.com>
+
+ * tree-vectorizer.c (free_stmt_vec_info): New function.
+ (destroy_loop_vec_info): Move code to free_stmt_vec_info().
+ Call free_stmt_vec_info(). Free LOOP_VINFO_STRIDED_STORES..
+ * tree-vectorizer.h (free_stmt_vec_info): Declare.
+ * tree-vect-transform.c (vectorizable_conversion): Free
+ vec_oprnds0 if it was allocated.
+ (vect_permute_store_chain): Remove unused VECs.
+ (vectorizable_store): Free VECs that are allocated in the..
+ function.
+ (vect_transform_strided_load, vectorizable_load): Likewise.
+ (vect_remove_stores): Simplify the code.
+ (vect_transform_loop): Move code to vect_remove_stores().
+ Call vect_remove_stores() and free_stmt_vec_info().
+
+2008-03-11 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
+
+ * pa.h (TARGET_LONG_PIC_SDIFF_CALL): Conditionalize define on
+ TARGET_HPUX. Revise comment.
+ (TARGET_LONG_PIC_PCREL_CALL): Revise comment.
+ * pa.c (output_call): Update for revised TARGET_LONG_PIC_SDIFF_CALL.
+ Use sr4 variant of `be' instruction when not generating PIC code.
+ (attr_length_call): Adjust for above change.
+
+2008-03-11 Andrew Pinski <andrew_pinski@playstation.sony.com>
+
+ * ipa-reference.c (static_execute): Remove module_statics_const and
+ associated setting code.
+
+2008-03-11 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/35540
+ * config/i386/i386.md (paritysi2, paritydi2): Use register_operand
+ constraint for operand 1.
+ (paritysi2_cmp): Use register_operand constraint for operand 2.
+ Use earlyclobber modifier for operand 1. Remove support for
+ memory operands.
+ (paritydi2_cmp): Use register_operand constraint for operand 3.
+ Use earlyclobber modifier for operand 1. Remove support for
+ memory operands.
+
+2008-03-11 Paul Brook <paul@codesourcery.com>
+ Vladimir Prus <vladimir@codesourcery.com>
+
+ * config/arm/arm.c (use_return_insn): Check TARGET_APCS_FRAME.
+ (arm_compute_save_reg0_reg12_mask): Always
+ check if register 11 must be saved. Always safe hard frame pointer
+ when frame_pointer_needeed.
+ (arm_compute_save_reg_mask): Save IP and PC
+ only with apcs frames.
+ (arm_output_epilogue): Adjust Thumb2 codepath to
+ be also invoked and work for ARM non-apcs frames.
+ (arm_expand_prologue): Don't bother saving IP
+ for non-apcs frame, since it's not clobbered by
+ prologue code. Implement non-apcs frame
+ layout.
+
+2008-03-11 Paolo Bonzini <bonzini@gnu.org>
+
+ PR rtl-optimization/35281
+ * expr.c (convert_move): Use a new pseudo for the intermediate
+ from_mode->word_mode result.
+
+2008-03-11 Paolo Bonzini <bonzini@gnu.org>
+
+ * langhooks-def.h (LANG_HOOKS_CLEAR_BINDING_STACK): Delete.
+ * langhooks.h (struct lang_hooks): Delete clear_binding_stack member.
+ * toplev.c (compile_file): Don't call it.
+
+2008-03-11 Uros Bizjak <ubizjak@gmail.com>
+
+ PR middle-end/35526
+ * expr.c (store_expr): Call emit_block_move if the mode
+ of "temp" RTX is BLKmode.
+
+2008-03-11 Andrew Pinski <andrew_pinski@playstation.sony.com>
+ Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/31358
+ * tree-ssa-loop-manip.c (create_iv): Call force_gimple_operand for
+ the step with a NULL_TREE.
+ * tree-ssa-loop-ivopts.c (find_bivs): Convert the step
+ to sizetype if type is a pointer type.
+ (add_candidate_1): Don't convert the base and step to
+ the generic type if the orginal type is a pointer type.
+ (add_iv_value_candidates): Use sizetype for the step
+ if type is a pointer type.
+ (cand_value_at): Likewise.
+ * tree-ssa-address.c (add_to_parts): Use POINTER_PLUS_EXPR
+ for pointer types.
+ * tree-affine.c (tree_to_aff_combination <POINTER_PLUS_EXPR>):
+ Don't convert the tem affine to the type.
+ (add_elt_to_tree): Use sizetype for the step if a pointer.
+ Use POINTER_PLUS_EXPR for pointers.
+ (aff_combination_to_tree): Use sizetype for the step if a
+ pointer.
+
+2008-03-10 Vladimir Makarov <vmakarov@redhat.com>
+
+ * config/i386/sse.md (ssse3_pmaddubswv8hi3, ssse3_pmaddubswv4hi3):
+ Remove commutativity hint.
+
+2008-03-10 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/35438
+ PR c/35439
+ * c-parser.c (c_parser_omp_threadprivate): Don't add vars with
+ errorneous type. Check that v is a VAR_DECL.
+
+ PR middle-end/35099
+ * tree-cfg.c (new_label_mapper): Update cfun->last_label_uid.
+
+2008-03-10 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR tree-optimization/35494
+ * tree-ssa-ccp.c (get_symbol_constant_value): Check if value
+ may be overriden at link and run time.
+
+2008-03-10 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/34677
+ * tree-ssa-pre.c (modify_expr_node_pool): Remove.
+ (poolify_tree): Likewise.
+ (modify_expr_template): Likewise.
+ (poolify_modify_stmt): Likewise.
+ (insert_fake_stores): Handle all component-ref style stores
+ in addition to INDIRECT_REF. Also handle complex types.
+ Do not poolify the inserted load.
+ (realify_fake_stores): Do not rebuild the tree but only
+ make it a SSA_NAME copy.
+ (init_pre): Remove initialzation of modify_expr_template.
+ Do not allocate modify_expr_node_pool.
+ (fini_pre): Do not free modify_expr_node_pool.
+
+2008-03-10 Paul Brook <paul@codesourcery.com>
+
+ * config/arm/arm.md (UNSPEC_STACK_ALIGN, UNSPEC_PIC_OFFSET): Renumber
+ to avoid conflicts.
+
+2008-03-10 Paul Brook <paul@codesourcery.com>
+ Mark Shinwell <shinwell@codesourcery.com>
+
+ * config/arm/cortex-r4.md: New.
+ * config/arm/thumb2.md (divsi3, udivsi3): Annotate with
+ insn attributes.
+ * config/arm/arm.md: Include cortex-r4.md.
+ (insn): Add smmls, sdiv and udiv values.
+ (generic_sched): Don't use generic scheduling for Cortex-R4.
+ (arm_issue_rate): New function.
+ (TARGET_SCHED_ISSUE_RATE): Define.
+
+2008-03-10 Sebastian Pop <sebastian.pop@amd.com>
+
+ * doc/invoke.texi (-ftree-loop-distribution): Add an example.
+
+2008-03-10 Richard Guenther <rguenther@suse.de>
+
+ * tree-ssa-pre.c (get_sccvn_value): Simplify.
+ (compute_avail): Do not add stmt uses to AVAIL_OUT.
+
+2008-03-10 Paolo Bonzini <bonzini@gnu.org>
+
+ * langhooks-def.h (LANG_HOOKS_REDUCE_BIT_FIELD_OPERATIONS):
+ Set default to true.
+
+2008-03-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * c.opt (Wsynth): Deprecate.
+ * doc/invoke.texi (Option Summary, Warning Options): Document
+ -Wno-format-contains-nul.
+
+2008-03-09 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/35496
+ * config/i386/i386.c (ix86_constant_alignment): Compute alignment using
+ ALIGN_MODE_128 for VECTOR_CST and INTEGER_CST in addition to REAL_CST.
+
+2008-03-09 Ira Rosen <irar@il.ibm.com>
+
+ * config/rs6000/rs6000.c (builtin_description): Rename vector
+ left shift operations.
+ * config/rs6000/altivec.md (UNSPEC_VSL): Remove.
+ (altivec_vsl<VI_char>): Rename to ...
+ (ashl<mode>3): ... new name.
+ (mulv4sf3, mulv4si3, negv4sf2): Replace gen_altivec_vslw with
+ gen_ashlv4si3.
+ (absv4sf2): Convert to use ashift:V4SI instead of UNSPEC_VSL.
+
+2008-03-08 Richard Guenther <rguenther@suse.de>
+
+ * coverage.h (tree_coverage_counter_addr): Declare.
+ * coverage.c (tree_coverage_counter_addr): New function.
+ * tree-profile.c (tree_gen_edge_profiler): Unshare counter
+ before using again.
+ (tree_gen_pow2_profiler): Use tree_coverage_counter_addr.
+ (tree_gen_one_value_profiler): Likewise.
+ (tree_gen_ic_profiler): Likewise.
+ (tree_gen_average_profiler): Likewise.
+ (tree_gen_ior_profiler): Likewise.
+
+2008-03-08 Richard Guenther <rguenther@suse.de>
+
+ * tree-ssa-sccvn.h (vn_binary_op_lookup): Remove.
+ (vn_binary_op_insert): Likewise.
+ (vn_unary_op_lookup): Likewise.
+ (vn_unary_op_insert): Likewise.
+ (vn_nary_op_lookup): Declare.
+ (vn_nary_op_insert): Likewise.
+ * tree-ssa-sccvn.c (struct vn_tables_s): Merge unary
+ and binary hashes, use a single obstack for unary_op_pool
+ and binary_op_pool.
+ (struct vn_binary_op_s, struct vn_unary_op_s): Replace with
+ a single struct vn_nary_op_s. Store tree code length and
+ a variable number of operands.
+ (struct vn_reference_op_struct): Remove unused op2.
+ (vn_reference_op_eq): Do not compare op2.
+ (vn_reference_op_compute_hash): Do not compute hash of op2.
+ (vn_unary_op_hash, vn_binary_op_hash): Replace with vn_nary_op_hash.
+ (vn_unary_op_compute_hash, vn_binary_op_compute_hash): Replace
+ with vn_nary_op_compute_hash.
+ (vn_unary_op_eq, vn_binary_op_eq): Replace with vn_nary_op_eq.
+ (vn_unary_op_lookup, vn_binary_op_lookup): Replace with
+ vn_nary_op_lookup.
+ (vn_unary_op_insert, vn_binary_op_insert): Replace with
+ vn_nary_op_insert.
+ (visit_unary_op): Call nary functions.
+ (visit_binary_op): Likewise.
+ (process_scc): Adjust for struct vn_tables_s changes.
+ (allocate_vn_table): Likewise.
+ (free_vn_table): Likewise.
+ * tree-vn.c (vn_add): Call nary functions.
+ (vn_lookup): Likewise.
+
+2008-03-08 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/35498
+ * config/rs6000/rs6000.c (rs6000_expand_compare_and_swapqhi): Shift
+ wdst back after sync_compare_and_swapqhi_internal.
+
+2008-03-08 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/22152
+ * config/i386/i386-modes.def (V1DI): New vector mode.
+ * config/i386/i386.h (VALID_MMX_REG_MODE): Add V1DImode.
+ * config/i386/mmx.md (MMXMODEI8): New mode iterator.
+ (MMXMODE248): Ditto.
+ (MMXMODE): Add V1DI mode.
+ (mmxvecsize): Change DI mode to V1DI mode.
+ ("mov<mode>): Use MMXMODEI8 mode iterator.
+ ("*mov<mode>_internal_rex64"): Ditto.
+ ("*mov<mode>_internal"): Ditto.
+ ("mmx_add<mode>3"): Ditto. Handle V1DImode for TARGET_SSE2.
+ ("mmx_sub<mode>3"): Ditto.
+ ("mmx_adddi3"): Remove insn pattern.
+ ("mmx_subdi3"): Ditto.
+ ("mmx_ashr<mode>3"): Use SImode and "yN" constraint for operand 2.
+ ("mmx_lshr<mode>3"): Ditto. Use MMXMODE248 mode iterator.
+ ("mmx_ashl<mode>3"): Ditto.
+ ("mmx_lshrdi3"): Remove insn pattern.
+ ("mmx_ashldi3"): Ditto.
+ * config/i386/i386.c (classify_argument): Handle V1DImode.
+ (function_arg_advance_32): Ditto.
+ (function_arg_32): Ditto.
+ (struct builtin_description) [IX86_BUILTIN_PADDQ]: Use
+ mmx_addv1di3 insn pattern.
+ [IX86_BUILTIN_PSUBQ]: Use mmx_subv1di3 insn pattern.
+ [IX86_BUILTIN_PSLL?, IX86_BUILTIN_PSRL?, IX86_BUILTIN_PSRA?,
+ IX86_BUILTIN_PSLL?I, IX86_BUILTIN_PSRL?I, IX86_BUILTIN_PSRA?I,
+ IX86_BUILTIN_PSLL?I128, IX86_BUILTIN_PSRL?I128, IX86_BUILTIN_PSRA?I128]:
+ Remove definitions of built-in functions.
+ (V1DI_type_node): New node.
+ (v1di_ftype_v1di_int): Ditto.
+ (v1di_ftype_v1di_v1di): Ditto.
+ (v2si_ftype_v2si_si): Ditto.
+ (v4hi_ftype_v4hi_di): Remove node.
+ (v2si_ftype_v2si_di): Ditto.
+ (ix86_init_mmx_sse_builtins): Handle V1DImode.
+ (__builtin_ia32_psll?, __builtin_ia32_psrl?, __builtin_ia32_psra?):
+ Redefine builtins using def_builtin_const with *_ftype_*_int node.
+ (__builtin_ia32_psll?i, __builtin_ia32_psrl?i, __builtin_ia32_psra?i):
+ Add new builtins using def_builtin_const.
+ (ix86_expand_builtin) [IX86_BUILTIN_PSLL?, IX86_BUILTIN_PSRL?,
+ IX86_BUILTIN_PSRA?, IX86_BUILTIN_PSLL?I, IX86_BUILTIN_PSRL?I,
+ IX86_BUILTIN_PSRA?I]: Handle builtin definitions.
+ * config/i386/mmintrin.h (__v1di): New typedef.
+ (_mm_add_si64): Cast arguments to __v1di type.
+ (_mm_sub_si64): Ditto.
+ (_mm_sll_pi16): Cast __count to __v4hi type.
+ (_mm_sll_pi32): Cast __count to __v2si type.
+ (_mm_sll_si64): Cast arguments to __v1di type.
+ (_mm_srl_pi16): Cast __count to __v4hi type.
+ (_mm_srl_pi32): Cast __count to __v2si type.
+ (_mm_srl_si64): Cast arguments to __v1di type.
+ (_mm_sra_pi16): Cast __count to __v4hi type.
+ (_mm_sra_pi32): Cast __count to __v2si type.
+ (_mm_slli_pi16): Use __builtin_ia32_psllwi.
+ (_mm_slli_pi32): Use __builtin_ia32_pslldi.
+ (_mm_slli_si64): Use __builtin_ia32_psllqi. Cast __m to __v1di type.
+ (_mm_srli_pi16): Use __builtin_ia32_psrlwi.
+ (_mm_srli_pi32): Use __builtin_ia32_psrldi.
+ (_mm_srli_si64): Use __builtin_ia32_psrlqi. Cast __m to __v1di type.
+ (_mm_srai_pi16): Use __builtin_ia32_psrawi.
+ (_mm_srai_pi32): Use __builtin_ia32_psradi.
+ * config/i386/i386.md (UNSPEC_NOP): Remove unspec definition.
+ * doc/extend.texi (X86 Built-in Functions) [__builtin_ia32_psll?,
+ __builtin_ia32_psrl?, __builtin_ia32_psra?, __builtin_ia32_psll?i,
+ __builtin_ia32_psrl?i, __builtin_ia32_psra?i]: Add new builtins.
+
+2008-03-07 Joseph Myers <joseph@codesourcery.com>
+
+ * doc/include/texinfo.tex: Update to version 2008-03-07.10.
+
+2008-03-07 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR target/35373
+ * config/rs6000/rs6000.c (rs6000_legitimize_address): Don't generate
+ reg+const addressing for Altivec modes. Don't generate reg+reg
+ addressing for TFmode or TDmode quantities.
+
+2008-03-07 Paolo Bonzini <bonzini@gnu.org>
+
+ * c-common.c (vector_types_convertible_p): Call langhook
+ instead of comptypes.
+
+2008-03-06 Andrew Pinski <andrew_pinski@playstation.sony.com>
+
+ PR tree-opt/35402
+ * tree-ssa-ccp.c (get_symbol_constant_value): Handle
+ integral and scalar float variables which have a
+ NULL DECL_INITIAL.
+
2008-03-06 Nathan Froyd <froydnj@codesourcery.com>
* dwarf2out.c (dwarf2out_frame_debug_expr): Consult the
transformations for modes that have signed zeros.
* ifcvt.c (noce_try_abs): Ditto.
->>>>>>> .r132956
2008-03-04 Joseph Myers <joseph@codesourcery.com>
* config/i386/i386.c (override_options): Force
__absvsi2, __absvDI2): Use unsigned arithmetic.
2008-03-02 Andi Kleen <ak@suse.de>
- Richard Guenther <rguenther@suse.de>
+ Richard Guenther <rguenther@suse.de>
* struct-equiv.c: Remove file.
* cfg_cleanup.c (condjump_equiv_p): Remove.
(OPTION_MASK_ISA_SSE5_UNSET): Likewise.
(OPTION_MASK_ISA_SSE4): Removed.
(ix86_handle_option): Turn on bits in ix86_isa_flags and
- ix86_isa_flags_explicit with OPTION_MASK_ISA_XXX_SET for
- -mXXX.
+ ix86_isa_flags_explicit with OPTION_MASK_ISA_XXX_SET for -mXXX.
(override_options): Don't turn on implied SSE/MMX bits in
ix86_isa_flags.
2008-01-02 Arthur Norman <acn1@cam.ac.uk>
PR target/34013
- * gcc/config/i386/i386.c (ix86_expand_prologue): Save red-zone
+ * config/i386/i386.c (ix86_expand_prologue): Save red-zone
while stack probing.
2008-01-01 Douglas Gregor <doug.gregor@gmail.com>
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