+2011-10-24 Dodji Seketeli <dodji@redhat.com>
+
+ * input.c (expand_location): Rewrite using
+ linemap_resolve_location and linemap_expand_location. Add a
+ comment.
+
+2011-10-25 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/50596
+ * tree-vect-stmts.c (vect_mark_relevant): Only use
+ FOR_EACH_IMM_USE_FAST if lhs is SSA_NAME.
+ (vectorizable_store): If is_pattern_stmt_p look through
+ VIEW_CONVERT_EXPR on lhs.
+ * tree-vect-patterns.c (check_bool_pattern, adjust_bool_pattern):
+ Use unsigned type instead of signed.
+ (vect_recog_bool_pattern): Optimize also stores into bool memory in
+ addition to casts from bool to integral types.
+ (vect_mark_pattern_stmts): If pattern_stmt already has vinfo
+ created, don't create it again.
+
+2011-10-25 Kai Tietz <ktietz@redhat.com>
+
+ * config/i386/i386.c (ix86_frame_pointer_required): Require
+ frame-pointer, if setjmp is used for 32-bit ms-abi.
+
+2011-10-24 Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ * builtins.c (set_builtin_user_assembler_name): Remove extra
+ newline added in October 11th, 2011 change.
+
+2011-10-24 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/little-endian.opt: Delete.
+ * config.gcc: Remove references to config/sparc/little-endian.opt
+ * doc/invoke.texi: Remove documentation of -mlittl-endian on sparc.
+ * config/sparc/linux64.h: Delete references to -mlittle-endian.
+ * config/sparc/netbsd-elf.h: Likewise.
+ * config/sparc/openbsd64.h: Likewise.
+ * config/sparc/sparc.h: Likewise.
+ * config/sparc/sp64-elf.h: Likewise and delete overrides for
+ BYTES_BIG_ENDIAN and WORDS_BIG_ENDIAN.
+ * config/sparc/sparc.c (dump_target_flag_bits): Remove reference
+ to MASK_LITTLE_ENDIAN.
+ * config/sparc/sparc.opt (Mask(LITTLE_ENDIAN)): Delete.
+
+ * config/sparc/sparc.md: Only use F, G, and C constraints in FP
+ insns. Only use D, Y, and Z constraints in vector insns.
+
+ * config/sparc/sparc.md (cpu_feature, enabled): New attributes.
+ (*movsi_insn_novis3, *movsi_insn_vis3): Consolidate into one pattern
+ called *movsi_insn.
+ (*movdi_insn_sp32_v9_novis3, *movdi_insn_sp32_v9_vis3): Consolidate
+ into *movdi_insn_sp32.
+ (*movdi_insn_sp64_novis3, *movdi_insn_sp64_vis3): Consolidate into
+ one pattern called *movdi_insn_sp64.
+ (*movsf_insn_novis3, *movsf_insn_vis3, *movsf_insn_no_fpu):
+ Consolidate into one pattern called *movsf_insn.
+ (*movdf_insn_sp32_no_fpu, *movdf_insn_sp32_v9_novis3,
+ *movdf_insn_sp32_v9_vis3, *movdf_insn_sp32_v9_no_fpu): Consolidate
+ into *movdf_insn_sp32.
+ (*movdf_insn_sp64_novis3, *movdf_insn_sp64_vis3,
+ *movdf_insn_sp64_no_fpu): Consolidate into one pattern called
+ *movdf_insn_sp64.
+ (*zero_extendsidi2_insn_sp64_novis3,
+ *zero_extendsidi2_insn_sp64_vis3): Consolidate into one pattern
+ called *zero_extendsidi2_insn_sp64.
+ (*sign_extendsidi2_insn_novis3, *sign_extendsidi2_insn_vis3):
+ Consolidate into one pattern named *sign_extendsidi2_insn.
+ (*mov<VM32:mode>_insn_novis3, *mov<VM32:mode>_insn_vis3):
+ Consolidate into one pattern named *mov<VM32:mode>_insn.
+ (*mov<VM64:mode>_insn_sp64_novis3,
+ *mov<VM64:mode>_insn_sp64_novis3): Consolidate into one pattern
+ named *mov<VM64:mode>_insn_sp64.
+ (*mov<VM64:mode>_insn_sp32_novis3,
+ *mov<VM64:mode>_insn_sp32_vis3): Consolidate into one pattern
+ named *mov<VM64:mode>_insn_sp32.
+
+2011-10-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * tree-ssa-strlen.c (get_string_length): Change assertion to STPCPY.
+ (zero_length_string): Change assertion to accept strinfo without
+ length but with stmt instead.
+ Set the endptr pointer also if starting a new chain.
+ (adjust_related_strinfos): Ignore strinfos marked for delayed
+ length computation.
+ (handle_builtin_strcpy): Mark earlier strinfo elements also for
+ delayed length computation.
+
+2011-10-24 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50820
+ Port from 4.6 branch r180379
+ * doc/invoke.texi (AVR Options): New subsubsection to explain EIND
+ handling and indirect jump/calls on devices > 128k.
+
+2011-10-24 Anatoly Sokolov <aesok@post.ru>
+ Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/49824
+ * doc/extend.texi (Declaring Attributes of Functions):
+ Document OS_main and OS_task attributes.
+ (Specifying Attributes of Variables): Move up
+ subsection "AVR Variable Attributes" as of alphabetical order.
+
+2011-10-24 Richard Guenther <rguenther@suse.de>
+
+ * tree-vect-stmts.c (vect_get_vec_def_for_operand): Convert constants
+ to vector element type.
+ (vectorizable_assignment): Bail out for non-mode-precision operations.
+ (vectorizable_shift): Likewise.
+ (vectorizable_operation): Likewise.
+ (vectorizable_type_demotion): Likewise.
+ (vectorizable_type_promotion): Likewise.
+ (vectorizable_store): Handle non-mode-precision stores.
+ (vectorizable_load): Handle non-mode-precision loads.
+ (get_vectype_for_scalar_type_and_size): Return a vector type
+ for non-mode-precision integers.
+ * tree-vect-loop.c (vectorizable_reduction): Bail out for
+ non-mode-precision reductions.
+
+2011-10-24 Julian Brown <julian@codesourcery.com>
+
+ * config/m68k/m68k.c (notice_update_cc): Tighten condition for
+ setting CC_REVERSED for FP comparisons.
+
+2011-10-24 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/50838
+ * tree-data-ref.c (dr_analyze_indices): Properly canonicalize
+ a MEM_REF base if we change it.
+
+2011-10-24 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR bootstrap/50836
+ * rtlanal.c: Swap includes of "hard-reg-set.h" and "rtl.h".
+
+ PR rtl-optimization/50833
+ * function.c (thread_prologue_and_epilogue_insns): Expect the
+ return insn optimization only if optimize.
+
+2011-10-24 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.c: Break long lines.
+ Define target hooks on the fly if applicable.
+ (TARGET_ASM_FUNCTION_RODATA_SECTION): Remove first definition
+ overridden later.
+ (targetm): Move definition to end of file.
+ (avr_can_eliminate): Make static on the fly.
+ (avr_frame_pointer_required_p): Ditto.
+ (avr_hard_regno_scratch_ok): Ditto.
+ (avr_builtin_setjmp_frame_value): Make static on the fly.
+ Indent according to coding rules.
+ (avr_case_values_threshold): Ditto.
+ (avr_attribute_table): Move down.
+
+2011-10-24 Ira Rosen <ira.rosen@linaro.org>
+
+ PR tree-optimization/50730
+ * tree-vect-data-refs.c (vect_analyze_data_refs): Stop basic block
+ analysis if encountered unsupported data-ref.
+
+2011-10-23 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.c (sparc_option_override): Remove -mv8plus
+ cpu adjustment.
+ * config/sparc/linux64.h (CC1_SPEC): When defaulting to 64-bit,
+ append -mcpu=v9 when -mv8plus is given.
+
+ * config/sparc/sparc.h (SECONDARY_MEMORY_NEEDED): We can move
+ between float and non-float regs when VIS3.
+ * config/sparc/sparc.c (eligible_for_restore_insn): We can't
+ use a restore when the source is a float register.
+ (sparc_split_regreg_legitimate): When VIS3 allow moves between
+ float and integer regs.
+ (sparc_register_move_cost): Adjust to account for VIS3 moves.
+ (sparc_preferred_reload_class): On 32-bit with VIS3 when moving an
+ integer reg to a class containing EXTRA_FP_REGS, constrain to
+ FP_REGS.
+ (sparc_secondary_reload): On 32-bit with VIS3 when moving between
+ float and integer regs we sometimes need a FP_REGS class
+ intermediate move to satisfy the reload. When this happens
+ specify an extra cost of 2.
+ (*movsi_insn): Rename to have "_novis3" suffix and add !VIS3
+ guard.
+ (*movdi_insn_sp32_v9): Likewise.
+ (*movdi_insn_sp64): Likewise.
+ (*movsf_insn): Likewise.
+ (*movdf_insn_sp32_v9): Likewise.
+ (*movdf_insn_sp64): Likewise.
+ (*zero_extendsidi2_insn_sp64): Likewise.
+ (*sign_extendsidi2_insn): Likewise.
+ (*movsi_insn_vis3): New insn.
+ (*movdi_insn_sp32_v9_vis3): New insn.
+ (*movdi_insn_sp64_vis3): New insn.
+ (*movsf_insn_vis3): New insn.
+ (*movdf_insn_sp32_v9_vis3): New insn.
+ (*movdf_insn_sp64_vis3): New insn.
+ (*zero_extendsidi2_insn_sp64_vis3): New insn.
+ (*sign_extendsidi2_insn_vis3): New insn.
+ (TFmode reg/reg split): Make sure both REG operands are float.
+ (*mov<VM32:mode>_insn): Add "_novis3" suffix and !VIS3 guard. Remove
+ easy constant to integer reg alternatives.
+ (*mov<VM64:mode>_insn_sp64): Likewise.
+ (*mov<VM64:mode>_insn_sp32_novis3): Likewise.
+ (*mov<VM32:mode>_insn_vis3): New insn.
+ (*mov<VM64:mode>_insn_sp64_vis3): New insn.
+ (*mov<VM64:mode>_insn_sp32_vis3): New insn.
+ (VM64 reg<-->reg split): New spliiter for 32-bit.
+
+ * config/sparc/sparc.c (sparc_split_regreg_legitimate): New
+ function.
+ * config/sparc/sparc-protos.h (sparc_split_regreg_legitimate):
+ Declare it.
+ * config/sparc/sparc.md (DImode reg/reg split): Use it.
+ (DFmode reg/reg split): Likewise.
+
+ * config/sparc/sparc.md (*movdi_insn_sp32_v9): Add alternatives for
+ generating fzero and fone instructions.
+ (DImode const_int --> reg splitter): Only trigger for integer regs.
+
+ * config/sparc/predicates.md (input_operand): Disallow vector
+ constants other than 0 and -1.
+ * config/sparc/sparc.c (sparc_preferred_reload_class): Return
+ NO_REGS for vector constants other than 0 and -1.
+
+ * config/sparc/sparc.h (SPARC_FIRST_INT_REG, SPARC_LAST_INT_REG,
+ SPARC_INT_REG_P): Define.
+ (HARD_REGNO_NREGS): Use SPARC_INT_REG_P.
+ (REGNO_OK_FOR_INDEX_P): Likewise.
+ * config/sparc/sparc.c (gen_df_reg): Likewise.
+ (eligible_for_return_delay): Likewise.
+ (eligible_for_sibcall_delay): Likewise.
+ (sparc_legitimate_address_p): Likewise.
+ (emit_save_or_restore_regs): Likewise.
+ (registers_ok_for_ldd_peep): Likewise.
+ * config/spac/sparc.md (DI mode splitters): Likewise.
+ (SF mode const splitters): Likewise.
+ (DF mode splitters): Likewise.
+ (32-bit DI mode logical op splitters): Likewise.
+
+2011-10-23 Paolo Carlini <paolo.carlini@oracle.com>
+
+ PR c++/50841
+ Revert:
+ 2011-10-23 Paolo Carlini <paolo.carlini@oracle.com>
+
+ PR c++/50810
+ * doc/invoke.texi ([-Wnarrowing], [-Wc++0x-compat]): Update.
+
+2011-10-23 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/sse.md (avx2_lshl<mode>3): Remove insn pattern.
+ (VI248_256): Remove mode iterator.
+ * config/i386/i386.c (ix86_expand_vec_perm): Use gen_ashlv4di3
+ instead of gen_avx2_lshlv4di3.
+ (bdesc_args): Use CODE_FOR_ashl{v16hi,v8si,v4di}3 instead of
+ CODE_FOR_avx2_lshl{v16hi,v8si,v4di}3.
+
+2011-10-23 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/sse.md (sseintprefix): Rename from gthrfirstp.
+ (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Delete expander.
+ (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>) Merge insn
+ pattern from *avx2_maskload<ssemodesuffix><avxsizesuffix> and
+ *avx_maskload<ssemodesuffix><avxsizesuffix> using V48_AVX mode
+ iterator. Use sseintprefix mode attribute.
+ (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Delete expander.
+ (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>) Merge insn
+ pattern from *avx2_maskstore<ssemodesuffix><avxsizesuffix> and
+ *avx_maskstore<ssemodesuffix><avxsizesuffix> using V48_AVX mode
+ iterator. Use sseintprefix mode attribute.
+ (*avx2_gathersi<mode>) Use sseintprefix and ssemodesuffix mode
+ attributes.
+ (*avx2_gatherdi<mode>): Ditto.
+ (*avx2_gatherdi<mode>256): Ditto.
+ (VI48_AVX2): Remove mode iterator.
+ (gthrlastfp): Remove mode attribute.
+
+2011-10-23 Paolo Carlini <paolo.carlini@oracle.com>
+
+ PR c++/50810
+ * doc/invoke.texi ([-Wnarrowing], [-Wc++0x-compat]): Update.
+
+2011-10-23 Tom de Vries <tom@codesourcery.com>
+
+ PR tree-optimization/50763
+ * tree-ssa-tail-merge.c (same_succ_flush_bb): New function, factored out
+ of ...
+ (same_succ_flush_bbs): Use same_succ_flush_bb.
+ (purge_bbs): Remove argument. Remove calls to same_succ_flush_bbs,
+ release_last_vdef and delete_basic_block.
+ (unlink_virtual_phi): New function.
+ (update_vuses): Add and use vuse1_phi_args argument. Set var to
+ SSA_NAME_VAR of vuse1 or vuse2, and use var. Handle case that def_stmt2
+ is NULL. Use phi result as phi arg in case vuse1 or vuse2 is NULL_TREE.
+ Replace uses of vuse1 if vuse2 is NULL_TREE. Fix code to limit
+ replacement of uses. Propagate phi argument for phis with a single
+ argument.
+ (replace_block_by): Update vops if phi_vuse1 or phi_vuse2 is NULL_TREE.
+ Set vuse1_phi_args if vuse1 is a phi defined in bb1. Add vuse1_phi_args
+ as argument to call to update_vuses. Call release_last_vdef,
+ same_succ_flush_bb, delete_basic_block. Update CDI_DOMINATORS info.
+ (tail_merge_optimize): Remove argument in call to purge_bbs. Remove
+ call to free_dominance_info. Only call calculate_dominance_info once.
+
+2011-10-23 Eric Botcazou <ebotcazou@adacore.com>
+
+ * fold-const.c (invert_tree_comparison): Always invert EQ_EXPR/NE_EXPR.
+
+ PR tree-optimization/44683
+ * tree-ssa-dom.c (record_edge_info): Record simple equivalences only if
+ we can be sure that there are no signed zeros involved.
+
+2011-10-23 Jan Hubicka <jh@suse.cz>
+
+ * ipa-inline.c (estimate_badness): Scale up and handle overflows.
+
+2011-10-23 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/50788
+ * config/i386/sse.md (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>):
+ Remove (match_dup 0).
+ (*avx2_maskload<ssemodesuffix><avxsizesuffix>): New insn pattern.
+ (*avx_maskload<ssemodesuffix><avxsizesuffix>): Ditto.
+ (*avx2_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
+ (*avx_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
+ (*avx2_maskmov<ssemodesuffix><avxsizesuffix>): Remove insn pattern.
+ (*avx_maskmov<ssemodesuffix><avxsizesuffix>): Ditto.
+
+2011-10-23 Ira Rosen <ira.rosen@linaro.org>
+
+ PR tree-optimization/50819
+ * tree-vectorizer.h (vect_analyze_data_ref_dependences): Remove
+ the last argument.
+ * tree-vect-loop.c (vect_analyze_loop_2): Update call to
+ vect_analyze_data_ref_dependences.
+ * tree-vect-data-refs.c (vect_analyze_data_ref_dependence): Remove
+ the last argument. Check load-after-store dependence for unknown
+ dependencies in basic blocks.
+ (vect_analyze_data_ref_dependences): Update call to
+ vect_analyze_data_ref_dependences.
+ * tree-vect-patterns.c (vect_recog_widen_shift_pattern): Fix typo.
+ * tree-vect-slp.c (vect_bb_vectorizable_with_dependencies): Remove.
+ (vect_slp_analyze_bb_1): Update call to
+ vect_analyze_data_ref_dependences. Don't call
+ vect_bb_vectorizable_with_dependencies.
+
+2011-10-22 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.h (SECONDARY_INPUT_RELOAD_CLASS,
+ SECONDARY_OUTPUT_RELOAD_CLASS): Delete.
+ * config/sparc/sparc.c (TARGET_SECONDARY_RELOAD): Redefine.
+ (sparc_secondary_reload): New function.
+
+ * config/sparc/sparc.h (sparc_costs): Remove extern decl.
+ (struct processor_costs): Move from here..
+ * config/sparc/sparc.c (struct processor_costs): To here.
+ (sparc_costs): Mark static.
+
+ * config/sparc/sparc.c (short_branch, reg_unused_after): Delete.
+ * config/sparc/sparc-protos.h (short_branch, reg_unused_after):
+ Get rid of declarations.
+
+2011-10-21 Paul Brook <paul@codesourcery.com>
+
+ * config/c6x/c6x.c (c6x_asm_emit_except_personality,
+ c6x_asm_init_sections): New functions.
+ (TARGET_ASM_EMIT_EXCEPT_PERSONALITY, TARGET_ASM_INIT_SECTIONS): Define.
+
+2011-10-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/50813
+ * config/i386/i386.c (expand_vec_perm_even_odd_1): Handle
+ V4DImode and V8SImode for !TARGET_AVX2.
+
+2011-10-21 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR bootstrap/50825
+ * sched-deps.c (add_dependence): If not doing predication, promote
+ REG_DEP_CONTROL to REG_DEP_ANTI.
+
+2011-10-21 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.h (LEGITIMIZE_RELOAD_ADDRESS): Pass address of X
+ instead of X to avr_legitimize_reload_address.
+ * config/avr/avr-protos.h (avr_legitimize_reload_address): Change
+ first argument's type from rtx to rtx*.
+ * config/avr/avr.c (avr_legitimize_reload_address): Ditto.
+ Pass PX to push_reload instead of &X. Change log messages for
+ better distinction.
+
+2011-10-21 Roland Stigge <stigge@antcom.de>
+
+ PR translation/47064
+ * params.def: Fix typo "compilatoin" -> "compilation".
+
+2011-10-21 H.J. Lu <hongjiu.lu@intel.com>
+ Kirill Yukhin <kirill.yukhin@intel.com>
+
+ PR target/50740
+ * config/i386/driver-i386.c (host_detect_local_cpu): Do cpuid 7 only
+ if max_level allows that.
+
2011-10-21 Bernd Schmidt <bernds@codesourcery.com>
* reg-notes.def (DEP_CONTROL): New.
2011-10-21 Jan Hubicka <jh@suse.cz>
* cgraph.c (dump_cgraph_node): Dump alias flag.
- * cgraphunit.c (handle_alias_pairs): Handle weakrefs with no destination.
+ * cgraphunit.c (handle_alias_pairs): Handle weakrefs with
+ no destination.
(get_alias_symbol): New function.
(output_weakrefs): Output also weakrefs with no destinatoin.
(lto_output_node): Output weakref alias flag when at function boundary.
2011-10-21 Andrew Stubbs <ams@codesourcery.com>
PR target/50809
-
* config/arm/driver-arm.c (vendors): Make static.
2011-10-21 Uros Bizjak <ubizjak@gmail.com>
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