+2011-08-22 Bernd Schmidt <bernds@codesourcery.com>
+
+ * config/c6x/c6x.md (indirect_jump_shadow): Tweak representation
+ to make computed_jump_p return true.
+
+2011-08-22 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * configure.ac (GCC_PICFLAG_FOR_TARGET): Call it.
+ (PICFLAG_FOR_TARGET): Substitute.
+ * aclocal.m4: Regenerate.
+ * configure: Regenerate.
+
+2011-08-22 Dodji Seketeli <dodji@redhat.com>
+
+ * c-family/c-pch.c (c_common_read_pch): Re-set line table right
+ after reading in the pch.
+
+2011-08-22 H.J. Lu <hongjiu.lu@intel.com>
+
+ * acinclude.m4 (gcc_AC_INITFINI_ARRAY): Error if __ELF__ isn't
+ defined.
+ * configure: Regenerated.
+
+2011-08-22 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/50133
+ * tree-vect-stmts.c (vect_finish_stmt_generation): Copy location
+ from stmt instead of some statement around gsi.
+
+ PR middle-end/50141
+ * expr.c (get_bit_range): Only use DECL_THREAD_LOCAL_P if
+ innerdecl is a VAR_DECL.
+
+2011-08-22 Kirill Yukhin <kirill.yukhin@intel.com>
+
+ * config/i386/avx2intrin.h: New file.
+ * config/i386/i386-builtin-types.def (PCINT, PCINT64, PV4SI,
+ PV8SI, V32QI_FTYPE_V32QI, V32QI_FTYPE_V16QI, V16HI_FTYPE_V16HI,
+ V16HI_FTYPE_V8HI, V8SI_FTYPE_V8SI, V16HI_FTYPE_V16QI,
+ V8SI_FTYPE_V16QI, V4DI_FTYPE_V16QI, V8SI_FTYPE_V8HI,
+ V4DI_FTYPE_V8HI, V4DI_FTYPE_V4SI, V4DI_FTYPE_PV4DI,
+ V4DI_FTYPE_V2DI, V2DI_FTYPE_PCV2DI_V2DI, V4SI_FTYPE_PCV4SI_V4SI,
+ V32QI_FTYPE_V16HI_V16HI, V16HI_FTYPE_V8SI_V8SI,
+ V32QI_FTYPE_V32QI_V32QI, V16HI_FTYPE_V32QI_V32QI,
+ V16HI_FTYPE_V16HI_V8HI, V16HI_FTYPE_V16HI_V16HI,
+ V16HI_FTYPE_V16HI_INT, V16HI_FTYPE_V16HI_SI,
+ V16HI_FTYPE_V16HI_V16HI_INT, V32QI_FTYPE_V32QI_V32QI_INT,
+ V8SI_FTYPE_V8SI_V4SI, V8SI_FTYPE_V8SI_V8SI,
+ V8SI_FTYPE_V16HI_V16HI, V8SI_FTYPE_V8SI_INT, V8SI_FTYPE_V8SI_SI,
+ V8SI_FTYPE_PCV8SI_V8SI, V4DI_FTYPE_V4DI_V4DI,
+ V4DI_FTYPE_V8SI_V8SI, V4DI_FTYPE_V4DI_V2DI,
+ V4DI_FTYPE_PCV4DI_V4DI, V4DI_FTYPE_V4DI_INT,
+ V2DI_FTYPE_V4DI_INT, V4DI_FTYPE_V4DI_V4DI_INT,
+ V4DI_FTYPE_V4DI_V2DI_INT, VOID_FTYPE_PV2DI_V2DI_V2DI,
+ VOID_FTYPE_PV4DI_V4DI_V4DI, VOID_FTYPE_PV4SI_V4SI_V4SI,
+ VOID_FTYPE_PV8SI_V8SI_V8SI,
+ V2DF_FTYPE_V2DF_PCDOUBLE_V4SI_V2DF_INT,
+ V4DF_FTYPE_V4DF_PCDOUBLE_V4SI_V4DF_INT,
+ V2DF_FTYPE_V2DF_PCDOUBLE_V2DI_V2DF_INT,
+ V4DF_FTYPE_V4DF_PCDOUBLE_V4DI_V4DF_INT,
+ V4SF_FTYPE_V4SF_PCFLOAT_V4SI_V4SF_INT,
+ V8SF_FTYPE_V8SF_PCFLOAT_V8SI_V8SF_INT,
+ V4SF_FTYPE_V4SF_PCFLOAT_V2DI_V4SF_INT,
+ V4SF_FTYPE_V4SF_PCFLOAT_V4DI_V4SF_INT,
+ V2DI_FTYPE_V2DI_PCINT64_V4SI_V2DI_INT,
+ V4DI_FTYPE_V4DI_PCINT64_V4SI_V4DI_INT,
+ V2DI_FTYPE_V2DI_PCINT64_V2DI_V2DI_INT,
+ V4DI_FTYPE_V4DI_PCINT64_V4DI_V4DI_INT,
+ V4SI_FTYPE_V4SI_PCINT_V4SI_V4SI_INT,
+ V8SI_FTYPE_V8SI_PCINT_V8SI_V8SI_INT,
+ V4SI_FTYPE_V4SI_PCINT_V2DI_V4SI_INT,
+ V4SI_FTYPE_V4SI_PCINT_V4DI_V4SI_INT,
+ V16HI_FTYPE_V16HI_SI_COUNT, V16HI_FTYPE_V16HI_V8HI_COUNT,
+ V8SI_FTYPE_V8SI_SI_COUNT, V8SI_FTYPE_V8SI_V4SI_COUNT,
+ V4DI_FTYPE_V4DI_INT_COUNT, V4DI_FTYPE_V4DI_V2DI_COUNT,
+ V4DI_FTYPE_V4DI_INT_CONVERT,
+ V4DI_FTYPE_V4DI_V4DI_INT_CONVERT): New.
+ * config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_MPSADBW256,
+ IX86_BUILTIN_PABSB256, IX86_BUILTIN_PABSW256,
+ IX86_BUILTIN_PABSD256, IX86_BUILTIN_PACKSSDW256,
+ IX86_BUILTIN_PACKSSWB256, IX86_BUILTIN_PACKUSDW256,
+ IX86_BUILTIN_PACKUSWB256, IX86_BUILTIN_PADDB256,
+ IX86_BUILTIN_PADDW256, IX86_BUILTIN_PADDD256,
+ IX86_BUILTIN_PADDQ256, IX86_BUILTIN_PADDSB256,
+ IX86_BUILTIN_PADDSW256, IX86_BUILTIN_PADDUSB256,
+ IX86_BUILTIN_PADDUSW256, IX86_BUILTIN_PALIGNR256,
+ IX86_BUILTIN_AND256I, IX86_BUILTIN_ANDNOT256I,
+ IX86_BUILTIN_PAVGB256, IX86_BUILTIN_PAVGW256,
+ IX86_BUILTIN_PBLENDVB256, IX86_BUILTIN_PBLENDVW256,
+ IX86_BUILTIN_PCMPEQB256, IX86_BUILTIN_PCMPEQW256,
+ IX86_BUILTIN_PCMPEQD256, IX86_BUILTIN_PCMPEQQ256,
+ IX86_BUILTIN_PCMPGTB256, IX86_BUILTIN_PCMPGTW256,
+ IX86_BUILTIN_PCMPGTD256, IX86_BUILTIN_PCMPGTQ256,
+ IX86_BUILTIN_PHADDW256, IX86_BUILTIN_PHADDD256,
+ IX86_BUILTIN_PHADDSW256, IX86_BUILTIN_PHSUBW256,
+ IX86_BUILTIN_PHSUBD256, IX86_BUILTIN_PHSUBSW256,
+ IX86_BUILTIN_PMADDUBSW256, IX86_BUILTIN_PMADDWD256,
+ IX86_BUILTIN_PMAXSB256, IX86_BUILTIN_PMAXSW256,
+ IX86_BUILTIN_PMAXSD256, IX86_BUILTIN_PMAXUB256,
+ IX86_BUILTIN_PMAXUW256, IX86_BUILTIN_PMAXUD256,
+ IX86_BUILTIN_PMINSB256, IX86_BUILTIN_PMINSW256,
+ IX86_BUILTIN_PMINSD256, IX86_BUILTIN_PMINUB256,
+ IX86_BUILTIN_PMINUW256, IX86_BUILTIN_PMINUD256,
+ IX86_BUILTIN_PMOVMSKB256, IX86_BUILTIN_PMOVSXBW256,
+ IX86_BUILTIN_PMOVSXBD256, IX86_BUILTIN_PMOVSXBQ256,
+ IX86_BUILTIN_PMOVSXWD256, IX86_BUILTIN_PMOVSXWQ256,
+ IX86_BUILTIN_PMOVSXDQ256, IX86_BUILTIN_PMOVZXBW256,
+ IX86_BUILTIN_PMOVZXBD256, IX86_BUILTIN_PMOVZXBQ256,
+ IX86_BUILTIN_PMOVZXWD256, IX86_BUILTIN_PMOVZXWQ256,
+ IX86_BUILTIN_PMOVZXDQ256, IX86_BUILTIN_PMULDQ256,
+ IX86_BUILTIN_PMULHRSW256, IX86_BUILTIN_PMULHUW256,
+ IX86_BUILTIN_PMULHW256, IX86_BUILTIN_PMULLW256,
+ IX86_BUILTIN_PMULLD256, IX86_BUILTIN_PMULUDQ256,
+ IX86_BUILTIN_POR256, IX86_BUILTIN_PSADBW256,
+ IX86_BUILTIN_PSHUFB256, IX86_BUILTIN_PSHUFD256,
+ IX86_BUILTIN_PSHUFHW256, IX86_BUILTIN_PSHUFLW256,
+ IX86_BUILTIN_PSIGNB256, IX86_BUILTIN_PSIGNW256,
+ IX86_BUILTIN_PSIGND256, IX86_BUILTIN_PSLLDQI256,
+ IX86_BUILTIN_PSLLWI256, IX86_BUILTIN_PSLLW256,
+ IX86_BUILTIN_PSLLDI256, IX86_BUILTIN_PSLLD256,
+ IX86_BUILTIN_PSLLQI256, IX86_BUILTIN_PSLLQ256,
+ IX86_BUILTIN_PSRAWI256, IX86_BUILTIN_PSRAW256,
+ IX86_BUILTIN_PSRADI256, IX86_BUILTIN_PSRAD256,
+ IX86_BUILTIN_PSRLDQI256, IX86_BUILTIN_PSRLWI256,
+ IX86_BUILTIN_PSRLW256, IX86_BUILTIN_PSRLDI256,
+ IX86_BUILTIN_PSRLD256, IX86_BUILTIN_PSRLQI256,
+ IX86_BUILTIN_PSRLQ256, IX86_BUILTIN_PSUBB256,
+ IX86_BUILTIN_PSUBW256, IX86_BUILTIN_PSUBD256,
+ IX86_BUILTIN_PSUBQ256, IX86_BUILTIN_PSUBSB256,
+ IX86_BUILTIN_PSUBSW256, IX86_BUILTIN_PSUBUSB256,
+ IX86_BUILTIN_PSUBUSW256, IX86_BUILTIN_PUNPCKHBW256,
+ IX86_BUILTIN_PUNPCKHWD256, IX86_BUILTIN_PUNPCKHDQ256,
+ IX86_BUILTIN_PUNPCKHQDQ256, IX86_BUILTIN_PUNPCKLBW256,
+ IX86_BUILTIN_PUNPCKLWD256, IX86_BUILTIN_PUNPCKLDQ256,
+ IX86_BUILTIN_PUNPCKLQDQ256, IX86_BUILTIN_PXOR256,
+ IX86_BUILTIN_MOVNTDQA256, IX86_BUILTIN_VBROADCASTSS_PS,
+ IX86_BUILTIN_VBROADCASTSS_PS256,
+ IX86_BUILTIN_VBROADCASTSD_PD256,
+ IX86_BUILTIN_VBROADCASTSI256, IX86_BUILTIN_PBLENDD256,
+ IX86_BUILTIN_PBLENDD128, IX86_BUILTIN_PBROADCASTB256,
+ IX86_BUILTIN_PBROADCASTW256, IX86_BUILTIN_PBROADCASTD256,
+ IX86_BUILTIN_PBROADCASTQ256, IX86_BUILTIN_PBROADCASTB128,
+ IX86_BUILTIN_PBROADCASTW128, IX86_BUILTIN_PBROADCASTD128,
+ IX86_BUILTIN_PBROADCASTQ128, IX86_BUILTIN_VPERMVARSI256,
+ IX86_BUILTIN_VPERMDF256, IX86_BUILTIN_VPERMVARSF256,
+ IX86_BUILTIN_VPERMDI256, IX86_BUILTIN_VPERMTI256,
+ IX86_BUILTIN_VEXTRACT128I256, IX86_BUILTIN_VINSERT128I256,
+ IX86_BUILTIN_MASKLOADD, IX86_BUILTIN_MASKLOADQ,
+ IX86_BUILTIN_MASKLOADD256, IX86_BUILTIN_MASKLOADQ256,
+ IX86_BUILTIN_MASKSTORED, IX86_BUILTIN_MASKSTOREQ,
+ IX86_BUILTIN_MASKSTORED256, IX86_BUILTIN_MASKSTOREQ256,
+ IX86_BUILTIN_PSLLVV4DI, IX86_BUILTIN_PSLLVV2DI,
+ IX86_BUILTIN_PSLLVV8SI, IX86_BUILTIN_PSLLVV4SI,
+ IX86_BUILTIN_PSRAVV8SI, IX86_BUILTIN_PSRAVV4SI,
+ IX86_BUILTIN_PSRLVV4DI, IX86_BUILTIN_PSRLVV2DI,
+ IX86_BUILTIN_PSRLVV8SI, IX86_BUILTIN_PSRLVV4SI,
+ IX86_BUILTIN_GATHERSIV2DF, IX86_BUILTIN_GATHERSIV4DF,
+ IX86_BUILTIN_GATHERDIV2DF, IX86_BUILTIN_GATHERDIV4DF,
+ IX86_BUILTIN_GATHERSIV4SF, IX86_BUILTIN_GATHERSIV8SF,
+ IX86_BUILTIN_GATHERDIV4SF, IX86_BUILTIN_GATHERDIV8SF,
+ IX86_BUILTIN_GATHERSIV2DI, IX86_BUILTIN_GATHERSIV4DI,
+ IX86_BUILTIN_GATHERDIV2DI, IX86_BUILTIN_GATHERDIV4DI,
+ IX86_BUILTIN_GATHERSIV4SI, IX86_BUILTIN_GATHERSIV8SI,
+ IX86_BUILTIN_GATHERDIV4SI, IX86_BUILTIN_GATHERDIV8SI.
+ (bdesc_special_args): Add IX86_BUILTIN_MOVNTDQA256,
+ IX86_BUILTIN_MASKLOADD, IX86_BUILTIN_MASKLOADQ,
+ IX86_BUILTIN_MASKLOADD256, IX86_BUILTIN_MASKLOADQ256,
+ IX86_BUILTIN_MASKSTORED, IX86_BUILTIN_MASKSTOREQ,
+ IX86_BUILTIN_MASKSTORED256, IX86_BUILTIN_MASKSTOREQ256.
+ (bdesc_args): Add IX86_BUILTIN_MPSADBW256,
+ IX86_BUILTIN_PABSB256, IX86_BUILTIN_PABSW256,
+ IX86_BUILTIN_PABSD256, IX86_BUILTIN_PACKSSDW256,
+ IX86_BUILTIN_PACKSSWB256, IX86_BUILTIN_PACKUSDW256,
+ IX86_BUILTIN_PACKUSWB256, IX86_BUILTIN_PADDB256,
+ IX86_BUILTIN_PADDW256, IX86_BUILTIN_PADDD256,
+ IX86_BUILTIN_PADDQ256, IX86_BUILTIN_PADDSB256,
+ IX86_BUILTIN_PADDSW256, IX86_BUILTIN_PADDUSB256,
+ IX86_BUILTIN_PADDUSW256, IX86_BUILTIN_PALIGNR256,
+ IX86_BUILTIN_AND256I, IX86_BUILTIN_ANDNOT256I,
+ IX86_BUILTIN_PAVGB256, IX86_BUILTIN_PAVGW256,
+ IX86_BUILTIN_PBLENDVB256, IX86_BUILTIN_PBLENDVW256,
+ IX86_BUILTIN_PCMPEQB256, IX86_BUILTIN_PCMPEQW256,
+ IX86_BUILTIN_PCMPEQD256, IX86_BUILTIN_PCMPEQQ256,
+ IX86_BUILTIN_PCMPGTB256, IX86_BUILTIN_PCMPGTW256,
+ IX86_BUILTIN_PCMPGTD256, IX86_BUILTIN_PCMPGTQ256,
+ IX86_BUILTIN_PHADDW256, IX86_BUILTIN_PHADDD256,
+ IX86_BUILTIN_PHADDSW256, IX86_BUILTIN_PHSUBW256,
+ IX86_BUILTIN_PHSUBD256, IX86_BUILTIN_PHSUBSW256,
+ IX86_BUILTIN_PMADDUBSW256, IX86_BUILTIN_PMADDWD256,
+ IX86_BUILTIN_PMAXSB256, IX86_BUILTIN_PMAXSW256,
+ IX86_BUILTIN_PMAXSD256, IX86_BUILTIN_PMAXUB256,
+ IX86_BUILTIN_PMAXUW256, IX86_BUILTIN_PMAXUD256,
+ IX86_BUILTIN_PMINSB256, IX86_BUILTIN_PMINSW256,
+ IX86_BUILTIN_PMINSD256, IX86_BUILTIN_PMINUB256,
+ IX86_BUILTIN_PMINUW256, IX86_BUILTIN_PMINUD256,
+ IX86_BUILTIN_PMOVMSKB256, IX86_BUILTIN_PMOVSXBW256,
+ IX86_BUILTIN_PMOVSXBD256, IX86_BUILTIN_PMOVSXBQ256,
+ IX86_BUILTIN_PMOVSXWD256, IX86_BUILTIN_PMOVSXWQ256,
+ IX86_BUILTIN_PMOVSXDQ256, IX86_BUILTIN_PMOVZXBW256,
+ IX86_BUILTIN_PMOVZXBD256, IX86_BUILTIN_PMOVZXBQ256,
+ IX86_BUILTIN_PMOVZXWD256, IX86_BUILTIN_PMOVZXWQ256,
+ IX86_BUILTIN_PMOVZXDQ256, IX86_BUILTIN_PMULDQ256,
+ IX86_BUILTIN_PMULHRSW256, IX86_BUILTIN_PMULHUW256,
+ IX86_BUILTIN_PMULHW256, IX86_BUILTIN_PMULLW256,
+ IX86_BUILTIN_PMULLD256, IX86_BUILTIN_PMULUDQ256,
+ IX86_BUILTIN_POR256, IX86_BUILTIN_PSADBW256,
+ IX86_BUILTIN_PSHUFB256, IX86_BUILTIN_PSHUFD256,
+ IX86_BUILTIN_PSHUFHW256, IX86_BUILTIN_PSHUFLW256,
+ IX86_BUILTIN_PSIGNB256, IX86_BUILTIN_PSIGNW256,
+ IX86_BUILTIN_PSIGND256, IX86_BUILTIN_PSLLDQI256,
+ IX86_BUILTIN_PSLLWI256, IX86_BUILTIN_PSLLW256,
+ IX86_BUILTIN_PSLLDI256, IX86_BUILTIN_PSLLD256,
+ IX86_BUILTIN_PSLLQI256, IX86_BUILTIN_PSLLQ256,
+ IX86_BUILTIN_PSRAWI256, IX86_BUILTIN_PSRAW256,
+ IX86_BUILTIN_PSRADI256, IX86_BUILTIN_PSRAD256,
+ IX86_BUILTIN_PSRLDQI256, IX86_BUILTIN_PSRLWI256,
+ IX86_BUILTIN_PSRLW256, IX86_BUILTIN_PSRLDI256,
+ IX86_BUILTIN_PSRLD256, IX86_BUILTIN_PSRLQI256,
+ IX86_BUILTIN_PSRLQ256, IX86_BUILTIN_PSUBB256,
+ IX86_BUILTIN_PSUBW256, IX86_BUILTIN_PSUBD256,
+ IX86_BUILTIN_PSUBQ256, IX86_BUILTIN_PSUBSB256,
+ IX86_BUILTIN_PSUBSW256, IX86_BUILTIN_PSUBUSB256,
+ IX86_BUILTIN_PSUBUSW256, IX86_BUILTIN_PUNPCKHBW256,
+ IX86_BUILTIN_PUNPCKHWD256, IX86_BUILTIN_PUNPCKHDQ256,
+ IX86_BUILTIN_PUNPCKHQDQ256, IX86_BUILTIN_PUNPCKLBW256,
+ IX86_BUILTIN_PUNPCKLWD256, IX86_BUILTIN_PUNPCKLDQ256,
+ IX86_BUILTIN_PUNPCKLQDQ256, IX86_BUILTIN_PXOR256,
+ IX86_BUILTIN_VBROADCASTSS_PS, IX86_BUILTIN_VBROADCASTSS_PS256,
+ IX86_BUILTIN_VBROADCASTSD_PD256,
+ IX86_BUILTIN_VBROADCASTSI256, IX86_BUILTIN_PBLENDD256,
+ IX86_BUILTIN_PBLENDD128, IX86_BUILTIN_PBROADCASTB256,
+ IX86_BUILTIN_PBROADCASTW256, IX86_BUILTIN_PBROADCASTD256,
+ IX86_BUILTIN_PBROADCASTQ256, IX86_BUILTIN_PBROADCASTB128,
+ IX86_BUILTIN_PBROADCASTW128, IX86_BUILTIN_PBROADCASTD128,
+ IX86_BUILTIN_PBROADCASTQ128, IX86_BUILTIN_VPERMVARSI256,
+ IX86_BUILTIN_VPERMDF256, IX86_BUILTIN_VPERMVARSF256,
+ IX86_BUILTIN_VPERMDI256, IX86_BUILTIN_VPERMTI256,
+ IX86_BUILTIN_VEXTRACT128I256, IX86_BUILTIN_VINSERT128I256,
+ IX86_BUILTIN_PSLLVV4DI, IX86_BUILTIN_PSLLVV2DI,
+ IX86_BUILTIN_PSLLVV8SI, IX86_BUILTIN_PSLLVV4SI,
+ IX86_BUILTIN_PSRAVV8SI, IX86_BUILTIN_PSRAVV4SI,
+ IX86_BUILTIN_PSRLVV4DI, IX86_BUILTIN_PSRLVV2DI,
+ IX86_BUILTIN_PSRLVV8SI, IX86_BUILTIN_PSRLVV4SI.
+ (ix86_init_mmx_sse_builtins): Add IX86_BUILTIN_GATHERSIV2DF,
+ IX86_BUILTIN_GATHERSIV4DF, IX86_BUILTIN_GATHERDIV2DF,
+ IX86_BUILTIN_GATHERDIV4DF, IX86_BUILTIN_GATHERSIV4SF,
+ IX86_BUILTIN_GATHERSIV8SF, IX86_BUILTIN_GATHERDIV4SF,
+ IX86_BUILTIN_GATHERDIV8SF, IX86_BUILTIN_GATHERSIV2DI,
+ IX86_BUILTIN_GATHERSIV4DI, IX86_BUILTIN_GATHERDIV2DI,
+ IX86_BUILTIN_GATHERDIV4DI, IX86_BUILTIN_GATHERSIV4SI,
+ IX86_BUILTIN_GATHERSIV8SI, IX86_BUILTIN_GATHERDIV4SI,
+ IX86_BUILTIN_GATHERDIV8SI.
+ (ix86_preferred_simd_mode): Support AVX2 modes.
+ (ix86_expand_args_builtin): Support AVX2 builtins.
+ (ix86_expand_special_args_builtin): Likewise.
+ (ix86_expand_builtin): Likewise.
+ * config/i386/i386.md (UNSPEC_VPERMSI): New.
+ (UNSPEC_VPERMDF): Likewise.
+ (UNSPEC_VPERMSF): Likewise.
+ (UNSPEC_VPERMDI): Likewise.
+ (UNSPEC_VPERMTI): Likewise.
+ (UNSPEC_GATHER): Likewise.
+ (ssemodesuffix): Extend.
+ * config/i386/immintrin.h: Include avx2intrin.h when __AVX2__
+ is defined.
+ * config/i386/predicates.md (const1248_operand): New.
+ * config/i386/sse.md (VI1_AVX2): New mode iterator.
+ (VI2_AVX2): Likewise.
+ (VI4_AVX2): Likewise.
+ (VI8_AVX2): Likewise.
+ (VIMAX_AVX2): Likewise.
+ (SSESCALARMODE): Likewise.
+ (VI12_AVX2): Likewise.
+ (VI24_AVX2): Likewise.
+ (VI124_AVX2): Likewise.
+ (VI248_AVX2): Likewise.
+ (VI48_AVX2): Likewise.
+ (VI4SD_AVX2): Likewise.
+ (V48_AVX2): Likewise.
+ (AVX256MODE2P): Likewise.
+ (AVXMODE48P_DI): Likewise.
+ (sse2_avx2): New mode attribute.
+ (ssse3_avx2): Likewise.
+ (sse4_1_avx2): Likewise.
+ (avx_avx2): Likewise.
+ (ssebytemode): Likewise.
+ (AVXTOSSEMODE): Likewise.
+ (AVXMODE48P_DI): Likewise.
+ (gthrfirstp): Likewise.
+ (gthrlastp): Likewise.
+ (lshift): New code_iterator
+ (lshift): New code attribute.
+ (lshift): Likewise.
+ (ssescalarmodesuffix): Update.
+ (sseunpackmode): Likewise.
+ (ssepackmode): Likewise.
+ (avx2_vec_dupv4sf): New insn pattern.
+ (avx2_vec_dupv8sf): Likewise.
+ (avx2_interleave_highv4di): Likewise.
+ (avx2_interleave_lowv4di): Likewise.
+ (avx2_umulv4siv4di3): Likewise
+ (*avx2_umulv4siv4di3): Likewise
+ (avx2_pmaddwd): Likewise.
+ (*avx2_pmaddwd): Likewise.
+ (avx2_lshrqv4di3): Likewise.
+ (avx2_lshlqv4di3): Likewise.
+ (avx2_lshl<mode>3): Likewise.
+ (avx2_<umaxmin:code><mode>3): Likewise.
+ (*avx2_<umaxmin:code><mode>3): Likewise.
+ (avx2_<smaxmin:code><mode>3): Likewise.
+ (*avx2_<smaxmin:code><mode>3): Likewise.
+ (avx2_eq<mode>3): Likewise.
+ (*avx2_eq<mode>3): Likewise.
+ (avx2_gt<mode>3): Likewise.
+ (avx2_interleave_highv32qi): New.
+ (avx2_interleave_lowv32qi): Likewise.
+ (avx2_interleave_highv16hi): Likewise.
+ (avx2_interleave_lowv16hi): Likewise.
+ (avx2_interleave_highv8si): Likewise.
+ (avx2_interleave_lowv8si): Likewise.
+ (avx2_pshufd): Likewise.
+ (avx2_pshufd_1): Likewise.
+ (avx2_pshuflwv3): Likewise.
+ (avx2_pshuflw_1): Likewise.
+ (avx2_pshufhwv3): Likewise.
+ (avx2_pshufhw_1): Likewise.
+ (avx2_uavgv32qi3): Likewise.
+ (*avx2_uavgv32qi3): Likewise.
+ (avx2_uavgv16hi3): Likewise.
+ (*avx2_uavgv16hi3): Likewise.
+ (avx2_pmovmskb): Likewise.
+ (avx2_phaddwv16hi3): Likewise.
+ (avx2_phadddv8si3): Likewise.
+ (avx2_phaddswv16hi3): Likewise.
+ (avx2_phsubwv16hi3): Likewise.
+ (avx2_phsubdv8si3): Likewise.
+ (avx2_phsubswv16hi3): Likewise.
+ (avx2_pmaddubsw256): Likewise.
+ (avx2_umulhrswv16hi3): Likewise.
+ (*avx2_umulhrswv16hi3): Likewise.
+ (avx2_packusdw): Likewise.
+ (avx2_pblendd<mode>): Likewise.
+ (avx2_<code>v16qiv16hi2): Likewise.
+ (avx2_<code>v8qiv8si2): Likewise.
+ (avx2_<code>v8hiv8si2): Likewise.
+ (avx2_<code>v4qiv4di2): Likewise.
+ (avx2_<code>v4hiv4di2): Likewise.
+ (avx2_<code>v4siv4di2): Likewise.
+ (avx2_pbroadcast<mode>): Likewise.
+ (avx2_permvarv8si): Likewise.
+ (avx2_permv4df): Likewise.
+ (avx2_permvarv8sf): Likewise.
+ (avx2_permv4di): Likewise.
+ (avx2_permv2ti): Likewise.
+ (avx2_vec_dupv4df): Likewise.
+ (avx2_vbroadcasti128_<mode>): Likewise.
+ (avx2_vec_set_lo_v4di): Likewise.
+ (avx2_vec_set_hi_v4di): Likewise.
+ (*avx2_maskmov<avx2modesuffix><avxmodesuffix>): Likewise.
+ (avx2_extracti128): Likewise.
+ (avx2_inserti128): Likewise.
+ (avx2_ashrvv8si): Likewise.
+ (avx2_ashrvv4si): Likewise.
+ (avx2_<lshift>vv8si): Likewise.
+ (avx2_<lshift>v<mode>): Likewise.
+ (avx2_<lshift>vv2di): Likewise.
+ (avx2_gathersi<mode>): Likewise.
+ (*avx2_gathersi<mode>): Likewise.
+ (avx2_gatherdi<mode>): Likewise.
+ (*avx2_gatherdi<mode>): Likewise.
+ (avx2_gatherdi<mode>256): Likewise.
+ (*avx2_gatherdi<mode>256): Likewise.
+ (<plusminus_insn><mode>3): Use VI mode iterator.
+ (*<plusminus_insn><mode>3): Use VI mode iterator.
+ (<sse2_avx2>_<plusminus_insn><mode>3): Rename from
+ sse2_<plusminus_insn><mode>3. Use VI12_AVX2 mode iterator.
+ (*<sse2_avx2>_<plusminus_insn><mode>3): Rename from
+ *sse2_<plusminus_insn><mode>3. Use VI12_AVX2 mode iterator.
+ (mul<mode>3): Rename from mulv8hi3. Use VI2_AVX2 mode iterator.
+ (*mul<mode>3): Rename from *mulv8hi3. Use VI2_AVX2 mode iterator.
+ (<s>mul<mode>3_highpart): Rename from <s>mulv8hi3_highpart.
+ Use VI2_AVX2 mode iterator.
+ (*<s>mul<mode>3_highpart): Rename from *<s>mulv8hi3_highpart.
+ Use VI2_AVX2 mode iterator.
+ (mul<mode>3): Rename from mulv4si3. Use VI4_AVX2 mode iterator.
+ (*mul<mode>3): Rename from *mulv4si3. Use VI4_AVX2 mode iterator.
+ (*<sse4_1_avx2>_mulv2siv2di3): Rename from *sse4_1_mulv4si3.
+ Use VI4_AVX2 mode iterator.
+ (ashr<mode>3): Use VI24_AVX2 mode iterator.
+ (lshr<mode>3): Use VI248_AVX2 mode iterator.
+ (<sse2_avx2>_ashl<mode>3): Rename from sse2_ashlv1ti3.
+ Use VIMAX_AVX2 mode iterator.
+ (<sse2_avx2>_andnot<mode>3): Rename from sse2_andnot<mode>3.
+ Use VI mode iterator.
+ (*andnot<mode>3): Update for AVX2.
+ (*<any_logic:code><mode>3): Likewise.
+ (<sse2_avx2>_packsswb): Rename from sse2_packsswb.
+ Use VI1_AVX mode iterator.
+ (<sse2_avx2>_packssdw): Rename from sse2_packssdw.
+ Use VI2_AVX mode iterator.
+ (<sse2_avx2>_packuswb): Rename from sse2_packsswb.
+ Use VI1_AVX mode iterator.
+ (<sse2_avx2>_psadbw): Rename from sse2_psadbw.
+ Use VI8_AVX2 mode iterator.
+ (<ssse3_avx2>_pshufb<mode>3): Rename from ssse3_pshufbv16qi3.
+ Use VI1_AVX2 mode iterator.
+ (<ssse3_avx2>_psign<mode>3): Rename from ssse3_psign<mode>3.
+ Use VI124_AVX2 mode iterator.
+ (<ssse3_avx2>_palignr<mode>): Rename from ssse3_palignrti.
+ Use SSESCALARMODE mode iterator.
+ (abs<mode>2): Use VI124_AVX2 mode iterator.
+ (<sse4_1_avx2>_movntdqa): Rename from sse4_1_movntdqa.
+ Use VI8_AVX2 mode iterator.
+ (<sse4_1_avx2>_mpsadbw): Rename from sse4_1_mpsadbw.
+ Use VI1_AVX2 mode iterator.
+ (<sse4_1_avx2>_pblendvb): Rename from sse4_1_pblendvb.
+ Use VI1_AVX2 mode iterator.
+ (<sse4_1_avx2>_pblendw): Rename from sse4_1_pblendvb.
+ Use VI2_AVX2 mode iterator.
+ (<avx_avx2>_maskload<avx2modesuffix><avxmodesuffix>): Rename from
+ avx_maskload<ssemodesuffix><avxsizesuffix>. Use V48_AVX2 mode iterator.
+ (<avx_avx2>_maskstore<avx2modesuffix><avxmodesuffix>): Rename from
+ avx_maskstore<ssemodesuffix><avxsizesuffix>.
+ Use V48_AVX2 mode iterator.
+ * doc/extend.texi: Document AVX2 built-in functions.
+ * doc/invoke.texi: Document -mavx2.
+
+2011-08-22 Matthias Klose <doko@debian.org>
+
+ Revert:
+ 2011-07-11 Arthur Loiret <aloiret@debian.org>
+ Matthias Klose <doko@debian.org>
+ * config/mips/t-linux64 (MULTILIB_DIRNAMES): Set to 'n32 . 64' if
+ tm_defines contains MIPS_ABI_DEFAULT ABI_32, to follow the glibc
+ convention.
+ * config.gcc (tm_defines): Add MIPS_ABI_DEFAULT=ABI_32.
+
+2011-08-22 Mikael Pettersson <mikpe@it.uu.se>
+
+ PR bootstrap/50146
+ * ira-color.c (assign_hard_reg): Move saved_nregs declaration
+ to #ifndef HONOR_REG_ALLOC_ORDER block.
+
+2011-08-21 Richard Henderson <rth@redhat.com>
+
+ * rtl.h (INSN_ANNULLED_BRANCH_P): Only allow JUMP_INSN.
+ * dwarf2cfi.c (scan_trace): Test JUMP_P before INSN_ANNULLED_BRANCH_P.
+ * resource.c (next_insn_no_annul): Likewise.
+ (mark_set_resources): Likewise.
+ * reorg.c (delete_from_delay_slot): Likewise.
+ (dbr_schedule, redundant_insn, try_merge_delay_insns): Likewise.
+ (get_branch_condition): Test pc_rtx and LABEL_REF before dereferencing.
+
+2011-08-21 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (any_div): Remove.
+ (sgnprefix): Update for removal.
+ (u): Ditto.
+
+2011-08-20 Vladimir Makarov <vmakarov@redhat.com>
+
+ * ira-lives.c (mark_pseudo_regno_subword_live): Use allocno class
+ for ira_reg_class_max_nregs. Increase pressure by 1.
+ (mark_pseudo_regno_subword_dead): Use allocno class
+ for ira_reg_class_max_nregs.
+
+2011-08-20 Richard Henderson <rth@redhat.com>
+
+ * config/c6x/eqd.c, config/c6x/eqf.c, config/c6x/ged.c,
+ config/c6x/gef.c, config/c6x/gtd.c, config/c6x/gtf.c,
+ config/c6x/led.c, config/c6x/lef.c, config/c6x/ltd.c,
+ config/c6x/ltf.c: Adjust include path for soft-fp.
+
+2011-08-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR other/46770
+ * config.gcc (tm_file): Add initfini-array.h if
+ .init_arrary/.fini_array are supported.
+
+ * crtstuff.c: Don't generate .ctors nor .dtors sections if
+ USE_INITFINI_ARRAY is defined.
+
+ * output.h (default_elf_init_array_asm_out_constructor): New.
+ (default_elf_fini_array_asm_out_destructor): Likewise.
+ * varasm.c (elf_init_array_section): Likewise.
+ (elf_fini_array_section): Likewise.
+ (get_elf_initfini_array_priority_section): Likewise.
+ (default_elf_init_array_asm_out_constructor): Likewise.
+ (default_elf_fini_array_asm_out_destructor): Likewise.
+
+ * config/initfini-array.h: New.
+
+2011-08-20 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/mips/mips.c (mips_class_max_nregs): Check that the mode is
+ OK for ST_REGS and FP_REGS before taking those classes into account.
+
+2011-08-20 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/mips/mips.c (mips_reorg_process_insns): Check for jumps
+ before checking for annulled branches.
+
+2011-08-20 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (ix86_binary_operator_ok): Use
+ satisfies_constraint_L.
+
+2011-08-20 Uros Bizjak <ubizjak@gmail.com>
+ Michael Matz <matz@suse.de>
+
+ * config/i386/i386.c (ix86_expand_round_sse4): Expand as
+ trunc (a + copysign (nextafter (0.5, 0.0), a)).
+
+2011-08-20 Anatoly Sokolov <aesok@post.ru>
+
+ * doc/tm.texi.in (PREFERRED_OUTPUT_RELOAD_CLASS): Remove.
+ * doc/tm.texi: Regenerate.
+ * targhooks.c (default_preferred_output_reload_class): Don't use
+ PREFERRED_OUTPUT_RELOAD_CLASS macro.
+ * system.h (PREFERRED_OUTPUT_RELOAD_CLASS): Poison.
+
+2011-08-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/48739
+ * tree-ssa.c: Include cfgloop.h.
+ (execute_update_addresses_taken): When updating ssa, if in loop closed
+ SSA form, call rewrite_into_loop_closed_ssa instead of update_ssa.
+ * Makefile.in (tree-ssa.o): Depend on $(CFGLOOP_H).
+
+2011-08-19 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/49936
+ * ira.c (ira_init_register_move_cost): Ignore too small subclasses
+ for calculation of max register move costs.
+
+2011-08-19 Joseph Myers <joseph@codesourcery.com>
+
+ * c-parser.c (c_parser_postfix_expression): Convert operands of
+ __builtin_complex to their semantic types.
+
+2011-08-19 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR middle-end/49721
+ * explow.c (convert_memory_address_addr_space): Also permute the
+ conversion and addition of constant for zero-extend.
+
+2011-08-19 Joseph Myers <joseph@codesourcery.com>
+
+ * c-parser.c (c_parser_postfix_expression): Handle RID_BUILTIN_COMPLEX.
+ * doc/extend.texi (__builtin_complex): Document.
+
+2011-08-19 Andrew Stubbs <ams@codesourcery.com>
+
+ * tree-ssa-math-opts.c (is_widening_mult_rhs_p): Handle constants
+ beyond conversions.
+ (convert_mult_to_widen): Convert constant inputs to the right type.
+ (convert_plusminus_to_widen): Don't automatically reject inputs that
+ are not an SSA_NAME.
+ Convert constant inputs to the right type.
+
+2011-08-19 Andrew Stubbs <ams@codesourcery.com>
+
+ * tree-ssa-math-opts.c (convert_plusminus_to_widen): Convert add_rhs
+ to the correct type.
+
+2011-08-19 Andrew Stubbs <ams@codesourcery.com>
+
+ * tree-ssa-math-opts.c (convert_mult_to_widen): Better handle
+ unsigned inputs of different modes.
+ (convert_plusminus_to_widen): Likewise.
+
+2011-08-19 Andrew Stubbs <ams@codesourcery.com>
+
+ * tree-ssa-math-opts.c (is_widening_mult_rhs_p): Add new argument
+ 'type'.
+ Use 'type' from caller, not inferred from 'rhs'.
+ Don't reject non-conversion statements. Do return lhs in this case.
+ (is_widening_mult_p): Add new argument 'type'.
+ Use 'type' from caller, not inferred from 'stmt'.
+ Pass type to is_widening_mult_rhs_p.
+ (convert_mult_to_widen): Pass type to is_widening_mult_p.
+ (convert_plusminus_to_widen): Likewise.
+
+2011-08-19 Andrew Stubbs <ams@codesourcery.com>
+
+ * tree-ssa-math-opts.c (is_widening_mult_p): Remove FIXME.
+ Ensure the the larger type is the first operand.
+
+2011-08-19 Andrew Stubbs <ams@codesourcery.com>
+
+ * tree-ssa-math-opts.c (convert_mult_to_widen): Convert
+ unsupported unsigned multiplies to signed.
+ (convert_plusminus_to_widen): Likewise.
+
+2011-08-19 Andrew Stubbs <ams@codesourcery.com>
+
+ * tree-ssa-math-opts.c (convert_plusminus_to_widen): Permit a single
+ conversion statement separating multiply-and-accumulate.
+
+2011-08-19 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/50067
+ * tree-data-ref.c (dr_analyze_indices): Simplify, strip MEM_REF
+ offset only if we accounted for it.
+
+2011-08-19 Andrew Stubbs <ams@codesourcery.com>
+
+ * config/arm/arm.md (maddhidi4): Remove '*' from name.
+ * expr.c (expand_expr_real_2): Use find_widening_optab_handler.
+ * optabs.c (find_widening_optab_handler_and_mode): New function.
+ (expand_widen_pattern_expr): Use find_widening_optab_handler.
+ (expand_binop_directly): Likewise.
+ (expand_binop): Likewise.
+ * optabs.h (find_widening_optab_handler): New macro define.
+ (find_widening_optab_handler_and_mode): New prototype.
+ * tree-cfg.c (verify_gimple_assign_binary): Adjust WIDEN_MULT_EXPR
+ type precision rules.
+ (verify_gimple_assign_ternary): Likewise for WIDEN_MULT_PLUS_EXPR.
+ * tree-ssa-math-opts.c (build_and_insert_cast): New function.
+ (is_widening_mult_rhs_p): Allow widening by more than one mode.
+ Explicitly disallow mis-matched input types.
+ (convert_mult_to_widen): Use find_widening_optab_handler, and cast
+ input types to fit the new handler.
+ (convert_plusminus_to_widen): Likewise.
+
+2011-08-19 Andrew Stubbs <ams@codesourcery.com>
+
+ * expr.c (expand_expr_real_2): Use widening_optab_handler.
+ * genopinit.c (optabs): Use set_widening_optab_handler for $N.
+ (gen_insn): $N now means $a must be wider than $b, not consecutive.
+ * optabs.c (widened_mode): New function.
+ (expand_widen_pattern_expr): Use widening_optab_handler.
+ (expand_binop_directly): Likewise.
+ (expand_binop): Likewise.
+ * optabs.h (widening_optab_handlers): New struct.
+ (optab_d): New member, 'widening'.
+ (widening_optab_handler): New function.
+ (set_widening_optab_handler): New function.
+ * tree-ssa-math-opts.c (convert_mult_to_widen): Use
+ widening_optab_handler.
+ (convert_plusminus_to_widen): Likewise.
+
+2011-08-19 Joseph Myers <joseph@codesourcery.com>
+
+ * c-decl.c (grokdeclarator): Diagnose _Noreturn for non-C1X if
+ pedantic.
+ * c-parser.c (c_parser_declspecs): Include _Noreturn in syntax comment.
+ * ginclude/stdnoreturn.h (noreturn): Don't define for C++.
+
+2011-08-19 Joseph Myers <joseph@codesourcery.com>
+
+ * opth-gen.awk: Do not declare target save/restore structures and
+ functions if IN_RTS defined.
+
+2011-08-19 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ PR target/49437
+ * config/arm/arm.c (arm_output_epilogue): Properly handle epilogue
+ when stack was realigned in interrupt handler prologue.
+
+2011-08-18 Joseph Myers <joseph@codesourcery.com>
+
+ * c-decl.c (shadow_tag_warned): Check for _Noreturn.
+ (quals_from_declspecs): Assert _Noreturn not present.
+ (grokdeclarator): Handle _Noreturn.
+ (build_null_declspecs): Initialize noreturn_p.
+ (declspecs_add_scspec): Handle RID_NORETURN.
+ * c-parser.c (c_token_starts_declspecs, c_parser_declspecs)
+ (c_parser_attributes): Handle RID_NORETURN.
+ * c-tree.h (struct c_declspecs): Add noreturn_p.
+ * ginclude/stdnoreturn.h: New.
+ * Makefile.in (USER_H): Add stdnoreturn.h.
+
+2011-08-18 Kirill Yukhin <kirill.yukhin@intel.com>
+
+ * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX2_SET): New.
+ (OPTION_MASK_ISA_AVX_UNSET): Update.
+ (OPTION_MASK_ISA_AVX2_UNSET): New.
+ (ix86_handle_option): Handle OPT_mavx2 case.
+ * config/i386/cpuid.h (bit_AVX2): New.
+ * config/i386/driver-i386.c (host_detect_local_cpu): Detect
+ AVX2 feature.
+ * config/i386/i386-c.c (ix86_target_macros_internal):
+ Conditionally define __AVX2__.
+ * config/i386/i386.c (ix86_option_override_internal): Define PTA_AVX2.
+ Define "core-avx2" processor alias. Handle avx2 option.
+ (ix86_valid_target_attribute_inner_p): Handle avx2 option.
+ * config/i386/i386.h (TARGET_AVX2): New.
+ * config/i386/i386.opt (mavx2): New.
+ * doc/invoke.texi: Document -mavx2.
+
+2011-08-18 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/49890
+ * ira-costs.c (setup_regno_cost_classes_by_aclass): Don't exclude
+ subclasses of class which is superset of a pressure class.
+
+2011-08-18 H.J. Lu <hongjiu.lu@intel.com>
+ Igor Zamyatin <igor.zamyatin@intel.com>
+
+ * config/i386/i386-c.c (ix86_target_macros_internal): Replace int
+ with HOST_WIDE_INT for isa_flag.
+ (ix86_pragma_target_parse): Replace int with HOST_WIDE_INT for
+ isa variables.
+
+ * config/i386/i386.c (ix86_target_string): Replace int with
+ HOST_WIDE_INT for isa. Use HOST_WIDE_INT_PRINT to print isa.
+ (ix86_target_opts): Replace int with HOST_WIDE_INT on mask.
+ (pta_flags): Removed.
+ (PTA_XXX): Redefined as (HOST_WIDE_INT_1 << X).
+ (pta): Use HOST_WIDE_INT on flags.
+ (builtin_isa): Use HOST_WIDE_INT on isa.
+ (ix86_add_new_builtins): Likewise.
+ (def_builtin): Use HOST_WIDE_INT on mask.
+ (def_builtin_const): Likewise.
+ (builtin_description): Likewise.
+
+ * config/i386/i386.opt (ix86_isa_flags): Replace int with
+ HOST_WIDE_INT.
+ (ix86_isa_flags_explicit): Likewise.
+ (x_ix86_isa_flags_explicit): Likewise.
+
+2011-08-17 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR rtl-optimization/50107
+ * ira-int.h (ira_hard_reg_not_in_set_p): Remove.
+ (ira_hard_reg_in_set_p): New.
+
+ * ira-color.c (calculate_saved_nregs): New.
+ (assign_hard_reg): Use it. Set up allocated_hard_reg_p for all
+ hard regs.
+ (allocno_reload_assign, fast_allocation): Use
+ ira_hard_reg_set_intersection_p instead of
+ ira_hard_reg_not_in_set_p.
+
+ * ira.c (setup_reg_renumber): Use
+ ira_hard_reg_set_intersection_p instead of
+ ira_hard_reg_not_in_set_p.
+ (setup_allocno_assignment_flags, calculate_allocation_cost): Use
+ ira_hard_reg_in_set_p instead of ira_hard_reg_not_in_set_p.
+
+ * ira-costs.c (ira_tune_allocno_costs): Use
+ ira_hard_reg_set_intersection_p instead of
+ ira_hard_reg_not_in_set_p.
+
+2011-08-18 H.J. Lu <hongjiu.lu@intel.com>
+ Igor Zamyatin <igor.zamyatin@intel.com>
+
+ * hwint.h (HOST_WIDE_INT_1): New.
+
+ * opt-functions.awk (switch_bit_fields): Initialize the
+ host_wide_int field.
+ (host_wide_int_var_name): New.
+ (var_type_struct): Check and return HOST_WIDE_INT.
+
+ * opt-read.awk: Handle HOST_WIDE_INT for "Variable".
+
+ * optc-save-gen.awk: Support HOST_WIDE_INT on var_target_other.
+
+ * opth-gen.awk: Use HOST_WIDE_INT_1 on HOST_WIDE_INT. Properly
+ check masks for HOST_WIDE_INT.
+
+ * opts-common.c (set_option): Support HOST_WIDE_INT flag_var.
+ (option_enabled): Likewise.
+ (get_option_state): Likewise.
+
+ * opts.h (cl_option): Add cl_host_wide_int. Change var_value
+ to HOST_WIDE_INT.
+
+2011-08-18 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+ Marc Glisse <marc.glisse@normalesup.org>
+
+ PR libstdc++-v3/1773
+ * target.def (decl_mangling_context): New C++ hook.
+ * doc/tm.texi: Regenerate.
+ * config/sol2-cxx.c, config/sol2-stubs.c: New files.
+ * config/sol2-protos.h: Group by source file.
+ (solaris_cxx_decl_mangling_context): Declare.
+ * config/sol2.h (TARGET_CXX_DECL_MANGLING_CONTEXT): Define.
+ * config/t-sol2 (sol2-cxx.o, sol2-stubs.o): New targets.
+ Use $<.
+ * config.gcc (*-*-solaris2*): Add sol2-cxx.o to cxx_target_objs.
+ Add sol2-stubs.o to extra_objs.
+
+2011-08-18 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/50009
+ * stor-layout.c (update_alignment_for_field): Don't ICE on
+ packed flexible array members if ms_bitfield_layout_p.
+
+ PR target/50092
+ * config/i386/i386.c (assign_386_stack_local): Call validize_mem
+ on the result before returning it.
+
+ PR debug/50017
+ * tree-vect-stmts.c (vect_finish_stmt_generation): If gsi_stmt (*gsi)
+ is a debug stmt, use location of the first non-debug stmt after it.
+
+2011-08-18 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * config/arm/arm.c (arm_rtx_costs_1): Don't modify the costs of SET.
+ (arm_size_rtx_costs): Likewise.
+
+2011-08-18 Richard Guenther <rguenther@suse.de>
+
+ * tree.h (tree_int_cst_msb): Remove.
+ * tree.c (tree_int_cst_msb): Likewise.
+ (tree_int_cst_sign_bit): Move from ...
+ * tree-ssa-loop-ivopts.c (tree_int_cst_sign_bit): ... here.
+
+2011-08-18 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * doc/tm.texi.in (TARGET_RTX_COSTS): Add an opno paramter.
+ * doc/tm.texi: Regenerate.
+ * target.def (rtx_costs): Add an opno parameter.
+ * hooks.h (hook_bool_rtx_int_int_intp_bool_false): Replace with...
+ (hook_bool_rtx_int_int_int_intp_bool_false): ...this.
+ * hooks.c (hook_bool_rtx_int_int_intp_bool_false): Replace with...
+ (hook_bool_rtx_int_int_int_intp_bool_false): ...this.
+ * cse.c (COST_IN): Add an opno parameter.
+ (notreg_cost): Likewise. Update call to rtx_cost.
+ (COST, fold_rtx): Update accordingly.
+ * dojump.c (prefer_and_bit_test): Update call to rtx_cost.
+ * expmed.c (emit_store_flag): Likewise.
+ * optabs.c (avoid_expensive_constant): Add an opno parameter.
+ Update call to rtx_cost.
+ (expand_binop_directly, expand_binop): Likewise.
+ (expand_twoval_binop, prepare_cmp_insn): Likewise.
+ * rtl.h (rtx_cost, get_full_rtx_cost): Add opno parameters.
+ (set_src_cost, get_full_set_src_cost): Update accordingly.
+ * rtlanal.c (rtx_cost): Add an opno parameter. Update call
+ to target hook.
+ (get_full_rtx_cost): Add an opno paramter. Update calls to rtx_cost.
+ (default_adress_cost): Update calls to rtx_cost.
+
+ * config/arm/arm.c (arm_rtx_costs_1, arm_size_rtx_costs)
+ (arm_slowmul_rtx_costs): Adjust calls to rtx_cost.
+ (arm_rtx_costs): Add an opno parameter.
+ * config/alpha/alpha.c (alpha_rtx_costs): Add an opno parameter and
+ adjust any recursive rtx-cost calls.
+ * config/avr/avr.c (avr_operand_rtx_cost, avr_rtx_costs): Likewise.
+ * config/bfin/bfin.c (bfin_rtx_costs): Likewise.
+ * config/c6x/c6x.c (c6x_rtx_costs): Likewise.
+ * config/cris/cris.c (cris_rtx_costs): Likewise.
+ * config/frv/frv.c (frv_rtx_costs): Likewise.
+ * config/h8300/h8300.c (h8300_rtx_costs): Likewise.
+ * config/i386/i386.c (ix86_rtx_costs): Likewise.
+ * config/ia64/ia64.c (ia64_rtx_costs): Likewise.
+ * config/iq2000/iq2000.c (iq2000_rtx_costs): Likewise.
+ * config/lm32/lm32.c (lm32_rtx_costs): Likewise.
+ * config/m32c/m32c.c (m32c_rtx_costs): Likewise.
+ * config/m32r/m32r.c (m32r_rtx_costs): Likewise.
+ * config/m68k/m68k.c (m68k_rtx_costs): Likewise.
+ * config/mcore/mcore.c (mcore_rtx_costs): Likewise.
+ * config/mep/mep.c (mep_rtx_cost): Likewise.
+ * config/microblaze/microblaze.c (microblaze_rtx_costs): Likewise.
+ * config/mips/mips.c (mips_binary_cost): Update call to rtx_cost.
+ (mips_zero_extend_cost): Add an opno parameter.
+ * config/mmix/mmix.c (mmix_rtx_costs): Likewise.
+ * config/mn10300/mn10300.c (mn10300_address_cost): Update call
+ to rtx_cost.
+ (mn10300_rtx_costs): Add an opno parameter and adjust any recursive
+ rtx-cost calls.
+ * config/pa/pa.c (hppa_rtx_costs): Likewise.
+ * config/pdp11/pdp11.c (pdp11_rtx_costs): Likewise.
+ * config/picochip/picochip.c (picochip_rtx_costs): Likewise.
+ * config/rs6000/rs6000.c (rs6000_rtx_costs): Likewise.
+ (rs6000_debug_rtx_costs): Likewise.
+ * config/s390/s390.c (s390_rtx_costs): Likewise.
+ * config/score/score-protos.h (score_rtx_costs): Likewise.
+ * config/score/score.c (score_rtx_costs): Likewise.
+ * config/sh/sh.c (andcosts): Update call to rtx_cost.
+ (sh_rtx_costs): Add an opno parameter.
+ * config/sparc/sparc.c (sparc_rtx_costs): Likewise.
+ * config/spu/spu.c (spu_rtx_costs): Likewise.
+ * config/stormy16/stormy16.c (xstormy16_rtx_costs): Likewise.
+ * config/v850/v850.c (v850_rtx_costs): Likewise.
+ * config/vax/vax.c (vax_rtx_costs): Likewise.
+ * config/xtensa/xtensa.c (xtensa_rtx_costs): Likewise.
+
+2011-08-18 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * rtl.h (set_src_cost, get_full_set_src_cost): New functions.
+ * auto-inc-dec.c (attempt_change): Use set_src_cost instead of
+ rtx_cost.
+ * calls.c (precompute_register_parameters): Likewise.
+ * combine.c (expand_compound_operation, make_extraction): Likewise.
+ (force_to_mode, distribute_and_simplify_rtx): Likewise.
+ * dse.c (find_shift_sequence): Likewise.
+ * expmed.c (init_expmed, expand_mult, expand_smod_pow2): Likewise.
+ * expr.c (compress_float_constant): Likewise.
+ * fwprop.c (should_replace_address, try_fwprop_subst): Likewise.
+ * gcse.c (want_to_gcse_p): Likewise.
+ * ifcvt.c (noce_try_sign_mask): Likewise.
+ * loop-doloop.c (doloop_optimize): Likewise.
+ * loop-invariant.c (create_new_invariant): Likewise.
+ * optabs.c (avoid_expensive_constant): Likewise.
+ * postreload.c (reload_cse_simplify_set, reload_cse_simplify_operands)
+ (try_replace_in_use, reload_cse_move2add): Likewise.
+ * reload1.c (calculate_elim_costs_all_insns): Likewise.
+ (note_reg_elim_costly): Likewise.
+ * rtlanal.c (insn_rtx_cost): Likewise.
+ * simplify-rtx.c (simplify_binary_operation_1): Likewise.
+ * stmt.c (lshift_cheap_p): Likewise.
+ * tree-ssa-loop-ivopts.c (seq_cost, computation_cost): Likewise.
+ * config/avr/avr.c (final_prescan_insn): Likewise.
+ * config/bfin/bfin.c (bfin_rtx_costs): Likewise.
+ * config/mips/mips.c (mips_binary_cost, mips_rtx_costs): Likewise.
+
+2011-08-18 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * rtl.h (set_rtx_cost, get_full_set_rtx_cost): New functions.
+ * auto-inc-dec.c (attempt_change): Use set_rtx_cost.
+ * cfgloopanal.c (seq_cost): Likewise.
+ * loop-invariant.c (create_new_invariant): Likewise.
+ * postreload.c (move2add_use_add2_insn, move2add_use_add3_insn)
+ (reload_cse_move2add): Use get_full_set_rtx_cost.
+
+2011-08-18 Richard Guenther <rguenther@suse.de>
+
+ * expr.c (get_inner_reference): Fix typo in last change.
+
+2011-08-18 Paolo Carlini <paolo.carlini@oracle.com>
+ Joseph Myers <joseph@codesourcery.com>
+
+ PR tree-optimization/49963
+ * hwint.c (absu_hwi): Define.
+ * hwint.h (absu_hwi): Declare.
+ * fold-const.c (fold_plusminus_mult_expr): Use absu_hwi instead
+ of abs_hwi.
+ * tree-ssa-math-opts.c (gimple_expand_builtin_pow): Likewise.
+ * tree-ssa-loop-prefetch.c (prune_ref_by_group_reuse): Likewise.
+
+2011-08-18 Richard Guenther <rguenther@suse.de>
+
+ * expr.c (get_inner_reference): Sign-extend the constant
+ twos-complement offset before doing arbitrary precision
+ arithmetic on it.
+ * tree-ssa-structalias.c (get_constraint_for_ptr_offset): Likewise.
+ (get_constraint_for_1): Pass the offset of a MEM_REF unchanged
+ to get_constraint_for_ptr_offset.
+
+2011-08-17 Kaz Kojima <kkojima@gcc.gnu.org>
+
+ PR target/50068
+ * config/sh/sh.c (sh_output_mi_thunk): Don't call dbr_schedule.
+
+2011-08-17 Richard Guenther <rguenther@suse.de>
+
+ * tree.h (convert_to_ptrofftype_loc): New function.
+ (convert_to_ptrofftype): Define.
+ * builtins.c (expand_builtin_bzero): Use size_type_node.
+ (fold_builtin_bzero): Likewise.
+ (std_gimplify_va_arg_expr): Build the BIT_AND_EXPR on the pointer.
+ * c-typeck.c (build_unary_op): Use convert_to_ptrofftype_loc.
+ * cgraphunit.c (thunk_adjust): Use fold_build_pointer_plus_loc.
+ (cgraph_redirect_edge_call_stmt_to_callee): Use size_int.
+ * expr.c (expand_expr_addr_expr_1): Use fold_build_pointer_plus.
+ * fold-const.c (build_range_check): Negate using the original type.
+ (fold_unary_loc): Use fold_build_pointer_plus_loc.
+ * gimple-fold.c (gimple_adjust_this_by_delta): Use
+ convert_to_ptrofftype.
+ * gimplify.c (gimplify_self_mod_expr): Likewise.
+ * graphite-clast-to-gimple.c (clast_to_gcc_expression): Likewise.
+ (graphite_create_new_loop_guard): Likewise.
+ * graphite-sese-to-poly.c (my_long_long): Remove.
+ (scop_ivs_can_be_represented): Adjust.
+ * tree-cfg.c (verify_gimple_assign_unary): Use ptrofftype_p.
+ * tree-chrec.c (chrec_fold_plus_1): Use fold_build_pointer_plus.
+ * tree-loop-distribution.c (build_size_arg_loc): Use
+ size_type_node.
+ (generate_memset_zero): Simplify.
+ * tree-mudflap.c: Use fold_convert, not convert.
+ * tree-predcom.c (suitable_reference_p): Expand DR_OFFSET in
+ its own type.
+ (determine_offset): Likewise for DR_STEP.
+ (valid_initializer_p): Likewise.
+ * tree-profile.c (prepare_instrumented_value): Convert the pointer
+ to an integer type of same size.
+ * tree-scalar-evolution.c (interpret_rhs_expr): Do not refer
+ to sizetype without need.
+ * tree-ssa-address.c (tree_mem_ref_addr): Likewise.
+ * tree-ssa-loop-ivopts.c (find_bivs): Use convert_to_ptrofftype.
+ * tree-ssa-loop-manip.c (create_iv): Likewise.
+ (determine_exit_conditions): Adjust comment.
+ * tree-ssa-pre.c (create_expression_by_pieces): Use
+ convert_to_ptrofftype.
+ * tree-ssa-structalias.c (get_constraint_for_1): Likewise.
+ * varasm.c (array_size_for_constructor): Compute using double_ints.
+
+2011-08-16 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
+
+ * config/spu/spu.c (spu_emit_branch_or_set): Avoid reverse tests
+ when generating an integer result where possible. Short-cut
+ comparison against 0 also for QImode.
+
+2011-08-16 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
+
+ * config/spu/spu.h (LEGITIMIZE_RELOAD_ADDRESS): New macro.
+ * config/spu/spu-protos.h (spu_legitimize_reload_address): Add
+ prototype.
+ * config/spu/spu.c (spu_legitimize_reload_address): New function.
+ (spu_legitimate_address_p): Do not check displacement if the base
+ is an eliminable stack register.
+
+2011-08-16 Anatoly Sokolov <aesok@post.ru>
+
+ * config/m32c/m32c.h (PREFERRED_RELOAD_CLASS,
+ PREFERRED_OUTPUT_RELOAD_CLASS): Remove macro.
+ * config/m32c/m32c-protos.h (m32c_preferred_reload_class,
+ m32c_preferred_output_reload_class): Remove.
+ * config/m32c/m32c.c (m32c_preferred_reload_class): Make static.
+ Change rclass argument and return types to reg_class_t. Use
+ reg_class_subset_p instead of class_sizes.
+ (m32c_preferred_output_reload_class): Make static. Change rclass
+ argument and return types to reg_class_t.
+ (TARGET_PREFERRED_RELOAD_CLASS,
+ TARGET_PREFERRED_OUTPUT_RELOAD_CLASS): Define.
+
+2011-08-16 Kai Tietz <ktietz@redhat.com>
+
+ * config/i386/mingw32.h (GOMP_SELF_SPEC): Add -pthread option.
+
+2011-08-16 Richard GUenther <rguenther@suse.de>
+
+ PR tree-optimization/50082
+ * tree-ssa-forwprop.c (combine_cond_expr_cond): Handle overflow
+ warnings here, instead of ...
+ (ssa_forward_propagate_and_combine): ... here.
+ (forward_propagate_into_comparison_1): Adjust.
+ (forward_propagate_into_comparison): Likewise.
+ (forward_propagate_into_gimple_cond): Likewise.
+ (forward_propagate_into_cond): Likewise.
+
+2011-08-16 Andreas Schwab <schwab@redhat.com>
+
+ * ggc.h (ggc_alloc_rtvec_sized): Use ggc_alloc_zone_rtvec_def
+ instead of ggc_alloc_zone_vec_rtvec_def.
+
+2011-08-16 Richard Guenther <rguenther@suse.de>
+
+ * tree.h (ptrofftype_p): New helper function.
+ * tree-cfg.c (verify_expr): Use ptrofftype_p for POINTER_PLUS_EXPR
+ offset verification.
+ (verify_gimple_assign_binary): Likewise.
+ * tree.c (build2_stat): Likewise.
+ * tree-chrec.c (chrec_fold_plus_poly_poly): Likewise.
+ (reset_evolution_in_loop): Likewise.
+ * tree-chrec.h (build_polynomial_chrec): Likewise.
+
+2011-08-16 Liang Wang <lwang1@marvell.com>
+
+ * ggc.h (ggc_alloc_rtvec_sized): Change arguments of
+ ggc_alloc_zone_vec_rtvec_def.
+
+2011-08-16 Richard Guenther <rguenther@suse.de>
+
+ * tree-vrp.c (extract_range_from_multiplicative_op_1): New
+ helper factored out from ...
+ (extract_range_from_binary_expr_1): ... here. Re-structure
+ to not glob handling too different tree codes.
+
2011-08-15 Richard Henderson <rth@redhat.com>
PR middle-end/50006
(avr_reorg): Use them. Use next_real_insn instead of NEXT_INSN.
Use CONST_INT_P. Beauty.
-2011-08-12 David Li <davidxl@google.com>
-
- * cp/class.c (update_vtable_entry_for_fn): Set
- LOST_PRIMARY bit properly.
-
2011-08-12 Richard Henderson <rth@redhat.com>
PR rtl-opt/49994
2011-08-12 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
- PR target/48328
+ PR target/48328
* config/arm/arm.h (CASE_VECTOR_SHORTEN_MODE): Fix distance
for tbh instructions.
-2011-08-12 Diego Novillo <dnovillo@google.com>
+2011-08-12 Diego Novillo <dnovillo@google.com>
* data-streamer.h (streamer_write_zero): Rename from output_zero.
(streamer_write_uhwi): Rename from lto_output_uleb128.
2011-08-12 Richard Guenther <rguenther@suse.de>
- * tree-vrp.c (extract_range_from_unary_expr_1): Implement
- -X as 0 - X.
+ * tree-vrp.c (extract_range_from_unary_expr_1): Implement -X as 0 - X.
2011-08-12 Romain Geissler <romain.geissler@gmail.com>
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