OSDN Git Service

2008-01-02 Sebastian Pop <sebastian.pop@amd.com>
[pf3gnuchains/gcc-fork.git] / gcc / ChangeLog
index 952bb9a..0364c4f 100644 (file)
@@ -1,4 +1,763 @@
-2007-12-13  Golovanevsky Olga  <olga@il.ibm.com>
+2008-01-03  Sebastian Pop  <sebastian.pop@amd.com>
+
+       PR tree-optimization/34458
+       * tree-data-ref.c (dd_int_cst_value): New.
+       (initialize_matrix_A, compute_overlap_steps_for_affine_1_2,
+       analyze_subscript_affine_affine, build_classic_dist_vector_1,
+       add_multivariate_self_dist, init_omega_eq_with_af): Use 
+       dd_int_cst_value instead of int_cst_value.
+
+2008-01-03  Jan Hubicka  <jh@suse.cz>
+
+       PR tree-optimization/31081
+       * tree-inline.c (remap_ssa_name): Initialize uninitialized SSA vars to
+       0 when inlining and not inlining to first basic block.
+       (remap_decl): When var is initialized to 0, don't set default_def.
+       (expand_call_inline): Set entry_bb.
+       * tree-inline.h (copy_body_data): Add entry_bb.
+
+2008-01-03  Jakub Jelinek  <jakub@redhat.com>
+
+       PR c++/34619
+       * cgraphunit.c (cgraph_build_static_cdtor): set_cfun back to NULL
+       before returning.
+
+       PR tree-optimization/29484
+       * tree-inline.c (inline_forbidden_p_2): New function.
+       (inline_forbidden_p): Disallow inlining if some static var
+       has an address of a local LABEL_DECL in its initializer.
+       * doc/extend.texi (Labels as Values): Document &&foo behaviour
+       vs. inlining.
+
+2008-01-03  Sebastian Pop  <sebastian.pop@amd.com>
+
+       PR tree-optimization/34635
+       * tree-data-ref.c (add_other_self_distances): Make sure that the
+       evolution step is constant.
+
+2008-01-03  Jakub Jelinek  <jakub@redhat.com>
+
+       PR middle-end/34608
+       * omp-low.c (expand_omp_parallel): Purge dead EH edges in the
+       child fn.
+
+2008-01-02  Richard Sandiford  <rsandifo@nildram.co.uk>
+
+       * tree-sra.c (scalarize_init): Insert the generate_element_init
+       statements after the generate_element_zero statements.
+
+2008-01-02  Richard Guenther  <rguenther@suse.de>
+
+       PR middle-end/34093
+       PR middle-end/31976
+       * tree-ssa-operands.c (ssa_operand_alloc): Also allocate a buffer
+       for very large number of operands instead of ICEing.
+
+2008-01-02  Arthur Norman <acn1@cam.ac.uk>
+
+       PR 34013
+       * gcc/config/i386/i386.c: (ix86_expand_prologue): Save red-zone
+       while stack probing.
+
+2008-01-01  Douglas Gregor  <doug.gregor@gmail.com>
+
+       * c-opts.c (sanitize_cpp_opts): Don't warn about "long long" when
+       in C++0x mode.
+
+2008-01-01  Volker Reichelt  <v.reichelt@netcologne.de>
+
+       PR libmudflap/26442
+       * tree-mudflap.c (mx_register_decls): Guard warning by
+       !DECL_ARTIFICIAL check.
+
+2008-01-01  Jakub Jelinek  <jakub@redhat.com>
+
+       * config/i386/sse.md (sse5_pperm, sse5_pperm_pack_v2di_v4si,
+       sse5_pperm_pack_v4si_v8hi, sse5_pperm_pack_v8hi_v16qi,
+       sse5_perm<mode>): Fix constraints.
+
+2007-12-31  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+       PR driver/33772
+       * collect2.c (SHLIB_SUFFIX): Define if not defined.
+       (write_c_file_stat): Use SHLIB_SUFFIX.
+       * som.h (SHLIB_SUFFIX): Define.
+       * doc/tm.texi (SHLIB_SUFFIX): Document.
+
+2007-12-29  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/sse.md ("*divv4sf3"): Rename to "sse_divv4sf3".
+       ("*sse_rsqrtv4sf2"): Export.
+       ("*sse_sqrtv4sf2"): Ditto.
+       * config/i386/i386.c (enum ix86_builtins) [IX86_BUILTIN_RSQRTPS_NR,
+       IX86_BUILTIN_SQRTPS_NR]: New constants.
+       (struct builtin_description) [IX86_BUILTIN_DIVPS]: Use
+       CODE_FOR_sse_divv4sf3.
+       [IX86_BUILTIN_SQRTPS]: Use CODE_FOR_sse_sqrtv4sf2.
+       [IX86_BUILTIN_SQRTPS_NR]: New.
+       [IX86_BUILTIN_RSQRTPS_NR]: Ditto.
+       (ix86_init_mmx_sse_builtins): Initialize __builtin_ia32_rsqrtps_nr and
+       __builtin_ia32_sqrtps_nr.
+       (ix86_builtin_vectorized_function): Convert BUILT_IN_SQRTF to
+       IX86_BUILTIN_SQRTPS_NR.
+       (ix86_builtin_reciprocal): Convert IX86_BUILTIN_SQRTPS_NR to
+       IX86_BUILTIN_RSQRTPS_NR.
+
+2007-12-27  Brian Dessent  <brian@dessent.net>
+
+       * doc/invoke.texi (Optimize Options): Add missing opindex for
+       -fno-toplevel-reorder.
+
+2007-12-27  Dorit Nuzman  <dorit@il.ibm.com>
+
+       PR tree-optimization/34591
+       * tree-vect-trasnform.c (vect_estimate_min_profitable_iters): Skip
+       stmts (including reduction stmts) that are not live.
+
+2007-12-27  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/34281
+       * config/arm/arm.c (arm_setup_incoming_varargs): If last named
+       argument needs double word alignment and cum->nregs is odd, account
+       for the inserted padding.
+
+       PR debug/34535
+       * tree-mudflap.c (mf_make_builtin): Make decl artificial
+       and don't emit debug info for it.
+
+2007-12-26  Anatoly Sokolov <aesok@post.ru>
+
+       * config/avr/avr.h (LINK_SPEC, CRT_BINUTILS_SPECS): Move AT90USB82 
+       and AT90USB162 devices from 'avr5' to 'avr35' architecture.
+       (ASM_SPEC): Add 'avr35' architecture.
+       * config/avr/avr.c (avr_mcu_types): Move AT90USB82 and AT90USB162 
+       devices from 'avr5' to 'avr35' architecture.
+       (avr_arch_types): Add "avr23" entries.
+       (avr_arch): Add 'ARCH_AVR35'.
+       * config/avr/t-avr (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Add 'avr35'.
+       (MULTILIB_MATCHES): Move AT90USB82 and AT90USB162 devices from 'avr5'
+       to 'avr35' architecture.
+
+2007-12-22  David Daney  <ddaney@avtrex.com>
+
+       * doc/install.texi (disable-libgcj-bc): Document new option.
+
+2007-12-21  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+       * config/pa/pa.c (hppa_legitimize_address): Use INT14_OK_STRICT in
+       mask selection.
+
+       PR target/34525
+       * pa.c (legitimize_pic_address): Emit insn to load function label
+       forced to memory.
+
+2007-12-21  Andrew Pinski  <pinskia@gmail.com>
+       Rask Ingemann Lambertsen  <rask@sygehus.dk>
+
+       PR target/8835
+       * config/mcore/mcore.c (mcore_function_value): Call promote_mode
+       instead of PROMOTE_MODE.
+
+2007-12-21  Sebastian Pop  <sebastian.pop@amd.com>
+
+       * lambda-code.c (lambda_loopnest_to_gcc_loopnest): Fix typo.
+
+2007-12-21  Sebastian Pop  <sebastian.pop@amd.com>
+
+       * tree-data-ref.c (signed_type_for_types): New.
+       (affine_fn_op): Use signed_type_for_types and signed_type_for instead
+       of long_integer_type_node.
+       (analyze_ziv_subscript): Same.
+       (analyze_siv_subscript_cst_affine): Same.
+       (analyze_miv_subscript): Same.
+       (omega_setup_subscript): Same.
+
+2007-12-21  Richard Sandiford  <rsandifo@nildram.co.uk>
+
+       * config/mips/mips.c (mips_emit_loadgp): Replace gen_* calls with
+       separate gen_*_si and gen_*_di calls.  Pass pic_offset_table_rtx
+       as the first argument.
+       * config/mips/mips.md (loadgp_newabi, loadgp_absolute)
+       (loadgp_rtp): Rename to...
+       (loadgp_newabi_<mode>, loadgp_absolute<mode>, loadgp_rtp<mode>):
+       ...these.  Add modes to all operands.  Add the target register
+       as an operand.  Combine loadgp_rtp<mode> with its splitter.
+
+2007-12-20  Bob Wilson  <bob.wilson@acm.org>
+
+       * config/xtensa/xtensa.md (fix_return_addr): Remove.
+       * config/xtensa/xtensa-protos.h (xtensa_initialize_trampoline): New.
+       (xtensa_trampoline_template): New.
+       * config/xtensa/xtensa.c (MIN_FRAME_SIZE): Moved here from xtensa.h.
+       (xtensa_return_addr): Expand to standard Xtensa insns instead of
+       fix_return_addr.  Get high bits from a local label.
+       (xtensa_trampoline_template): New function with code moved from
+       TRAMPOLINE_TEMPLATE in xtensa.h.  Use L32R instead of CALL0 except
+       when using CONST16 or absolute-mode literals.
+       (xtensa_initialize_trampoline): New function with code moved from
+       INITIALIZE_TRAMPOLINE in xtensa.h.  Use different offsets depending
+       on which trampoline version is used.
+       * config/xtensa/lib2funcs.S (TRAMPOLINE_SIZE): Add comment.
+       * config/xtensa/xtensa.h (TARGET_ABSOLUTE_LITERALS): Define.
+       (MIN_FRAME_SIZE): Moved to xtensa.c.
+       (TRAMPOLINE_TEMPLATE): Use xtensa_trampoline_template.
+       (TRAMPOLINE_SIZE): Two versions of the trampoline have different sizes.
+       (INITIALIZE_TRAMPOLINE): Use xtensa_initialize_trampoline.
+       * config/xtensa/ieee754-df.S (XCHAL_NO_MUL): Define.
+       (__muldf3): Use CALL12 instead of CALL0 to invoke .Lmul_mulsi3
+       helper when not using the CALL0 ABI.  Change .Lmul_mulsi3 to match.
+       * config/xtensa/lib1funcs.asm (__umulsidi3): Likewise.
+       * config/xtensa/ieee754-sf.S (__mulsf3): Likewise.
+       
+2007-12-20  Jakub Jelinek  <jakub@redhat.com>
+
+       PR c++/34459
+       * tree-ssa-dse.c (dse_optimize_stmt): Don't eliminate store if
+       USE_STMT not only stores into the same object as STMT, but might
+       read it too.
+
+2007-12-19  Sebastian Pop  <sebastian.pop@amd.com>
+
+       PR tree-optimization/34413
+       * tree-data-ref.c (affine_fn_op, analyze_ziv_subscript,
+       analyze_siv_subscript_cst_affine, analyze_miv_subscript,
+       omega_setup_subscript): Use long_integer_type_node instead of
+       integer_type_node.
+
+2007-12-19  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+       PR target/34525
+       * pa.c (legitimize_pic_address): Force function labels into memory.
+
+2007-12-19  Zdenek Dvorak  <ook@ucw.cz>
+
+       * omp-low.c (build_omp_regions_1): Recognition of combined parallels
+       moved ...
+       (expand_omp): ... here.
+
+2007-12-19  Zdenek Dvorak  <ook@ucw.cz>
+
+       PR tree-optimization/34355
+       * tree-parloops.c (take_address_of): Handle expresions
+       instead of just variables.
+       (eliminate_local_variables_1): Force whole invariant
+       address to ssa name.
+
+2007-12-19  Alexander Monakov  <amonakov@ispras.ru>
+           Revital Eres  <eres@il.ibm.com>
+
+       * modulo-sched.c (generate_reg_moves): Insert the reg-moves
+       right before the notes which precedes the insn, if they exists.
+       (loop_canon_p): Add dump info.
+       (sms_schedule): Likewise.
+
+2007-12-19  Richard Sandiford  <rsandifo@nildram.co.uk>
+
+       * tree.h (set_decl_incoming_rtl): Add a by_reference_p parameter.
+       * emit-rtl.c (set_decl_incoming_rtl): Likewise.  Don't set the
+       rtl's register attributes when the parameter is true.
+       * function.c (assign_parms_unsplit_complex, assign_parms)
+       (expand_function_start): Update calls to set_decl_incoming_rtl.
+
+2007-12-19  Richard Sandiford  <rsandifo@nildram.co.uk>
+
+       * rtl.def (SUBREG): Update comments.
+       * rtl.h (reg_attrs): Be explicit about the type of offset used.
+       (set_reg_attrs_from_mem): Rename to...
+       (set_reg_attrs_from_value): ...this.
+       (adjust_reg_mode, byte_lowpart_offset): Declare.
+       * emit-rtl.c (byte_lowpart_offset): New function.
+       (update_reg_offset): Remove special offset handling for big-endian
+       targets.
+       (gen_rtx_REG_offset, gen_reg_rtx_offset): Explicitly say that the
+       offset parameter is added to REG_OFFSET.
+       (adjust_reg_mode): New function.
+       (set_reg_attrs_for_mem): Rename to...
+       (set_reg_attrs_for_value): ...this and generalize to all values.
+       If the register is a lowpart of the value, adjust the offset
+       accordingly.
+       (set_reg_attrs_for_parm): Update after the above renaming.
+       (set_reg_attrs_for_decl_rtl): New function, split out from
+       set_decl_incoming_rtl.  Set the offset of plain REGs to the
+       offset of the REG's mode from the decl's.  Assert that all
+       subregs are lowparts and handle their inner registers in the
+       same way as plain REGs.
+       (set_decl_rtl, set_incoming_decl_rtl): Use reg_attrs_for_decl_rtl.
+       (subreg_lowpart_offset): Explicitly say that the returned offset
+       is a SUBREG_BYTE.
+       * combine.c (do_SUBST_MODE, try_combine, undo_all): Use adjust_reg_mode
+       instead of PUT_MODE.
+       * final.c (alter_subreg): Fix/update argument to gen_rtx_REG_offset.
+       * config/ia64/ia64.c (ia64_expand_load_address): Likewise.
+       * regclass.c (reg_scan_mark_refs): Use set_reg_attrs_from_value.
+       * reload.c (find_reloads_subreg_address): Call set_mem_offset
+       when offseting a MEM.
+       * var-tracking.c (offset_valid_for_tracked_p): Delete.
+       (mode_for_reg_attrs): Replace with...
+       (track_loc_p): ...this new function.  Return the mode and offset
+       to the caller, checking that the latter is valid.  If the rtx is
+       a paradoxical lowpart of the decl, use the decl's mode instead.
+       Do the same when storing to a register that contains the entire decl.
+       (var_lowpart): Use byte_lowpart_offset rather than
+       subreg_lowpart_offset when adjusting the offset attribute.
+       (count_uses, add_uses, add_stores): Use track_reg_p instead of
+       REG_EXPR, MEM_EXPR, REG_OFFSET, INT_MEM_OFFSET, track_expr_p,
+       offset_valid_for_tracked_p and mode_for_reg_attrs.  Generate
+       lowparts for MEMs as well as REGs.
+       (vt_add_function_parameters): When obtaining the information from
+       the decl_rtl, adjust the offset to match incoming.  Use track_loc_p
+       and var_lowpart.
+
+2007-12-18  Sebastian Pop  <sebastian.pop@amd.com>
+
+       PR tree-optimization/34123
+       * lambda-code.c (can_duplicate_iv): New.
+       (cannot_convert_modify_to_perfect_nest): New.
+       (cannot_convert_bb_to_perfect_nest): New.
+       (can_convert_to_perfect_nest): Split up.
+
+2007-12-18  David Daney  <ddaney@avtrex.com>
+
+       * config/mips/mips.md (clear_hazard): Use PRINT_OPERAND punctuation
+       instead of .set push and .set pop.
+
+2007-12-18  Rask Ingemann Lambertsen  <rask@sygehus.dk>
+
+       PR target/33474
+       * config/bfin/bfin.c (bfin_adjust_cost): Dig into PARALLELs to find
+       the SET.
+
+2007-12-18  Razya Ladelsky <razya@il.ibm.com>
+
+       * tree-parloops.c (reduiction_info): Change documentation of
+       reduction_initial field.
+       (initialize_reductions): Remove creation of reduction_initial variable.
+       (create_loads_for_reductions): don't join reduction_initial to
+       the loaded value.
+
+2007-12-18  Kaz Kylheku  <kaz@zeugmasystems.com>
+
+       PR rtl-optimization/34456
+       * resource.c (mark_set_resources): Use regs_invalidated_by_call
+       rather than call_used_regs and global_regs.
+
+2007-12-18  Jakub Jelinek  <jakub@redhat.com>
+
+       PR rtl-optimization/34490
+       * simplify-rtx.c (simplify_const_relational_operation): If !sign,
+       don't reduce mmin/mmax using num_sign_bit_copies.
+
+2007-12-17  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
+
+       * doc/install.texi: Change recommended MPFR from 2.2.1 > 2.3.0.
+
+2007-12-17  Andreas Schwab  <schwab@suse.de>
+
+       * doc/invoke.texi (Warning Options): Use @itemx.
+
+2007-12-17  Dorit Nuzman  <dorit@il.ibm.com>
+
+       * tree-vectorizer.h (verbosity_levels): Add new verbosity level
+       REPORT_COST.
+       * tree-vect-transform.c (vect_estimate_min_profitable_iters): Change
+       verbosity level to REPORT_COST.
+       (vect_model_reduction_cost): Likewise.
+       (vect_model_induction_cost): Likewise.
+       (vect_model_simple_cost): likewise.
+       (vect_model_store_cost): likewise.
+       (vect_model_load_cost): likewise.
+       (conservative_cost_threshold): Likewise. Remove print.
+
+2007-12-17  Rask Ingemann Lambertsen  <rask@sygehus.dk>
+
+       * doc/tm.texi (TARGET_SECONDARY_RELOAD): Fix typos.
+
+2007-12-17  Jakub Jelinek  <jakub@redhat.com>
+
+       PR c/34506
+       * c-parser.c (c_parser_omp_all_clauses): Accept optional comma
+       in between clauses.
+
+2007-12-17  Dorit Nuzman  <dorit@il.ibm.com>
+
+       PR tree-optimization/34445
+       * tree-vect-trasnform.c (vect_estimate_min_profitable_iters): Skip 
+       stmts (including live stmts) that are not relevant.
+
+2007-12-17  Jack Howarth  <howarth@bromo.med.uc.edu>
+
+       PR target/34025
+       * config/i386/t-crtpc: Add $(MULTILIB_CFLAGS).
+       * config/i386/t-crtfm: Likewise.
+
+2007-12-17  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.h (WIDEST_HARDWARE_FP_SIZE): Define.
+
+2007-12-16  Uros Bizjak  <ubizjak@gmail.com>
+
+       * tree-vect-transform.c (conservative_cost_threshold): Add missing
+       space to "not vectorized" message.
+
+2007-12-16  Richard Sandiford  <rsandifo@nildram.co.uk>
+
+       PR rtl-optimization/34415
+       * df.h (DF_LR_IN, DF_LR_OUT): Update comments.
+       * resource.c (mark_target_live_regs): Use DF_LR_IN rather than
+       df_get_live_in.  Don't handle pseudos.
+
+2007-12-16  Jakub Jelinek  <jakub@redhat.com>
+
+       PR bootstrap/34003
+       * c-decl.c (merge_decls): Copy RTL from olddecl to newdecl.
+       * config/pa/pa.c (pa_encode_section_info): If !first, preserve
+       SYMBOL_FLAG_REFERENCED flag.
+
+2007-12-15  Alexandre Oliva  <aoliva@redhat.com>
+
+       * tree.c (type_hash_add): Fix whitespace.
+
+2007-12-15  Hans-Peter Nilsson  <hp@axis.com>
+
+       Add CRIS v32 support.  Fix -mcc-init.
+       * config.gcc: Make crisv32-* have cpu_type cris.  Handle
+       crisv32-*-elf and crisv32-*-none like cris-*-elf and cris-*-none
+       but without multilibs and with target_cpu_default=32.
+       (crisv32-*-linux*): Handle as cris-*-linux*.  Set
+       target_cpu_default to 32 and 10 accordingly.
+       * config/cris/cris.c (ASSERT_PLT_UNSPEC): Remove unused macro.
+       (cris_movem_load_rest_p, cris_store_multiple_op_p): Remove FIXME.
+       Change regno_dir and regno only if !TARGET_V32.
+       (cris_conditional_register_usage): If TARGET_V32, set
+       reg_alloc_order as per REG_ALLOC_ORDER_V32 and make
+       CRIS_ACR_REGNUM non-fixed.
+       (cris_print_base): Add gcc_assert for post_inc on CRIS_ACR_REGNUM.
+       (cris_print_operand) <case 'Z', case 'u'>: New cases.
+       <case REG of case 'H'>: Allow for CRIS_SRP_REGNUM.
+       (cris_reload_address_legitimized): Always return false for TARGET_V32.
+       (cris_register_move_cost): New function, guts from
+       REGISTER_MOVE_COST adjusted for CRIS v32.
+       (cris_normal_notice_update_cc): New function split out from...
+       (cris_notice_update_cc): Set cc_status.flags CC_REVERSED for
+       TARGET_CCINIT.  Call cris_normal_notice_update_cc for CC_REV,
+       CC_NOOV32 and CC_NORMAL, but set cc_status.flags CC_NO_OVERFLOW
+       for CC_NOOV32 and TARGET_V32.
+       (cris_simple_epilogue): Always return false for TARGET_V32 if
+       cris_return_address_on_stack yields true.
+       (cris_cc0_user_requires_cmp): New function.
+       (cris_valid_pic_const): Add argument ANY_OPERAND.  All callers
+       changed.  Handle CRIS_UNSPEC_PLT_PCREL and CRIS_UNSPEC_PCREL.
+       (cris_asm_output_case_end): New function, guts from
+       ASM_OUTPUT_CASE_END adjusted for CRIS v32.
+       (cris_override_options): Adjust for CRIS v32.  Mask out
+       TARGET_SIDE_EFFECT_PREFIXES and TARGET_MUL_BUG if v32.
+       (cris_asm_output_mi_thunk, cris_expand_epilogue)
+       (cris_gen_movem_load, cris_emit_movem_store)
+       (cris_expand_pic_call_address, cris_asm_output_symbol_ref)
+       (cris_asm_output_label_ref, cris_output_addr_const_extra): Adjust
+       for CRIS v32.
+       (cris_split_movdx): Copy re-used MEM.
+       * config/cris/t-elfmulti: Add multilib v32 for -march=v32.
+       * config/cris/predicates.md
+       ("cris_general_operand_or_pic_source"): New predicate.
+       ("cris_general_operand_or_plt_symbol"): Replace by...
+       ("cris_nonmemory_operand_or_callable_symbol"): New predicate.
+       * config/cris/linux.h: Sanity-check TARGET_CPU_DEFAULT for
+       presence and contents.
+       (CRIS_SUBTARGET_DEFAULT_ARCH): New macro, MASK_AVOID_GOTPLT for
+       v32, 0 otherwise.
+       (CRIS_CPP_SUBTARGET_SPEC, CRIS_CC1_SUBTARGET_SPEC,
+       CRIS_ASM_SUBTARGET_SPEC): Adjust for different TARGET_CPU_DEFAULT.
+       (CRIS_SUBTARGET_DEFAULT): Add CRIS_SUBTARGET_DEFAULT_ARCH.
+       * config/cris/cris.h: Sanity-check TARGET_CPU_DEFAULT for contents.
+       (CRIS_DEFAULT_TUNE, CRIS_ARCH_CPP_DEFAULT)
+       (CRIS_DEFAULT_ASM_ARCH_OPTION): New macros.
+       (CRIS_CC1_SUBTARGET_SPEC): Change default tuning to use
+       CRIS_DEFAULT_TUNE. 
+       (CRIS_CPP_SUBTARGET_SPEC): Ditto.  Add CRIS_ARCH_CPP_DEFAULT.
+       (ASM_SPEC): Add sanity-check erroring out when both -march= and
+       -mcpu= are specified.  Pass on either as --march=v32.
+       (CRIS_ASM_SUBTARGET_SPEC): When neither -march= or -mcpu= are
+       specified, pass on CRIS_DEFAULT_ASM_ARCH_OPTION.
+       (CRIS_CPU_V32): New macro.
+       [!TARGET_CPU_DEFAULT]: Default-define as CRIS_CPU_BASE.
+       [!TARGET_DEFAULT, TARGET_CPU_DEFAULT == 32]: Move default
+       TARGET_DEFAULT definition after new TARGET_CPU_DEFAULT definition.
+       Define v32-adjusted TARGET_DEFAULT.
+       (CRIS_DEFAULT_CPU_VERSION): Change to TARGET_CPU_DEFAULT from
+       CRIS_CPU_BASE.
+       (TARGET_V32): New macro.
+       (REG_ALLOC_ORDER_V32): New macro.
+       (HARD_REGNO_MODE_OK): Do not allow larger-than-register-size modes
+       into CRIS_ACR_REGNUM.
+       (enum reg_class): New classes ACR_REGS, SPEC_ACR_REGS, GENNONACR_REGS
+       and SPEC_GENNONACR_REGS.
+       (REG_CLASS_NAMES, REG_CLASS_CONTENTS): Adjust for new classes.
+       (REGNO_REG_CLASS): Give ACR_REGS for CRIS_ACR_REGNUM.
+       (MODE_CODE_BASE_REG_CLASS): Define, give for OCODE POST_INC
+       GENNONACR_REGS, BASE_REG_CLASS otherwise.
+       (REG_CLASS_FROM_LETTER): 'a' is for ACR_REGS.
+       (REGNO_MODE_CODE_OK_FOR_BASE_P): Define, refusing OCODE POST_INC
+       for CRIS_ACR_REGNUM.
+       (PREFERRED_RELOAD_CLASS): Keep ACR_REGS as preferred.
+       (HARD_REGNO_RENAME_OK): Refuse CRIS_ACR_REGNUM as TO.
+       (EXTRA_CONSTRAINT): New constraint 'U'.
+       (TRAMPOLINE_TEMPLATE, TRAMPOLINE_SIZE, INITIALIZE_TRAMPOLINE)
+       (ASM_OUTPUT_ADDR_DIFF_ELT): Adjust for CRIS v32.
+       (BASE_OR_AUTOINCR_P): Refuse POST_INC for CRIS_ACR_REGNUM.
+       (SIMPLE_ADDRESS_P): Remove.
+       (GO_IF_LEGITIMATE_ADDRESS): Use BASE_OR_AUTOINCR_P, not redundant
+       SIMPLE_ADDRESS_P.  Make one chained if-else, finishing as
+       non-match after BASE_OR_AUTOINCR_P for TARGET_V32.
+       (REGISTER_MOVE_COST): Just call the new function
+       cris_register_move_cost.
+       (enum cris_pic_symbol_type): Rename cris_gotrel_symbol to
+       cris_rel_symbol.  All users changed.
+       (REGISTER_NAMES): Replace "pc" with "acr".
+       (ADDITIONAL_REGISTER_NAMES): Add "pc" for 15.
+       (ASM_OUTPUT_REG_PUSH): Change to v32-compatible sequence.
+       (ASM_OUTPUT_REG_POP): Change to v32-compatible syntax.
+       (ASM_OUTPUT_CASE_END): Just call the new function
+       cris_asm_output_case_end.
+       * gcc/config/cris/cris.md: Group related constants together, with
+       comments local.
+       (CRIS_UNSPEC_PLT_GOTREL, CRIS_UNSPEC_PLT_PCREL, CRIS_UNSPEC_PCREL)
+       (CRIS_UNSPEC_CASESI): New constants.
+       (CRIS_UNSPEC_PLT): Remove constant.
+       (CRIS_ACR_REGNUM): New constant.
+       ("slottable"): New attr alternatives "has_return_slot" and
+       "has_call_slot".
+       ("cc"): New attr alternatives "noov32" and "rev".
+       ((eq_attr "slottable" "has_call_slot"))
+       ((eq_attr "slottable" "has_return_slot")): New define_delays.
+       ("movdi", "movsi"): Adjust operands for CRIS v32.
+       ("tstdi", "cmpdi", "adddi3", "subdi3", "uminsi3")
+       ("indirect_jump"): Ditto.  Make define_expand.
+       ("*tstdi_non_v32", "*tstdi_v32", "*tst<mode>_cmp")
+       ("*tst<mode>_non_cmp", "*cmpdi_non_v32", "*cmpdi_v32")
+       ("*movdi_v32", "*adddi3_non_v32", "*adddi3_v32")
+       ("*addsi3_non_v32", "*addsi3_v32", "*addhi3_non_v32")
+       ("*addhi3_v32", "*addqi3_non_v32", "*addqi3_v32")
+       ("*subdi3_non_v32", "*subdi3_v32", "*subsi3_non_v32")
+       ("*subsi3_v32", "*sub<mode>3_nonv32", "*sub<mode>3_v32")
+       ("*andqi3_non_v32", "*andqi3_v32", "*iorsi3_non_v32")
+       ("*iorsi3_v32", "*iorhi3_non_v32", "*iorhi3_v32")
+       ("*iorqi3_non_v32", "*iorqi3_v32", "*uminsi3_non_v32")
+       ("*uminsi3_v32", "*indirect_jump_non_v32", "*indirect_jump_v32")
+       ("*expanded_call_v32", "*expanded_call_value_v32"): New patterns,
+       for the corresponding standard name.
+       ("tst<mode>"): Limit to BW and make define_expand.
+       ("tstsi"): Make separate insn, adjusting for CRIS v32.
+       ("*cmp_swapext<mode>"): Adjust for v32.  Specify "rev" for attr "cc".
+       ("cmpsi", "cmp<mode>"): Remove special cases for zero.  Specify
+       attr "cc".
+       ("*btst"): Don't match for TARGET_CCINIT.  Replace test of
+       register with compatible "cmpq 0".  Specify attr "cc".
+       ("*movdi_insn_non_v32"): New pattern, replacing "*movdi_insn" and
+       define_split.
+       (define_split for DI move): Match CRIS v32 only.
+       ("*movsi_got_load", "*movsi_internal", "*addi"): Adjust for CRIS v32.
+       ("load_multiple", "store_multiple", "*addsbw_v32", "*addubw_v32")
+       ("*adds<mode>_v32", "*addu<mode>_v32", "*bound<mode>_v32")
+       ("*casesi_jump_v32", "*expanded_andsi_v32", "*expanded_andhi_v32")
+       ("*extop<mode>si_v32", "*extopqihi_v32", "*andhi_lowpart_v32")
+       ("*andqi_lowpart_v32", "cris_casesi_v32"): New patterns. 
+       ("add<mode>3"): Make addsi3, addhi3 and addqi3 define_expand.
+       ("sub<mode>3"): Ditto subsi3, subhi3 and subqi3.
+       ("ior<mode>3"): Ditto iorsi3, iorhi3 and iorqi3.
+       ("*extopqihi_non_v32"): Replace "*extopqihi".
+       ("*extop<mode>si_non_v32"): Replace "*extop<mode>si".
+       ("*addxqihi_swap_non_v32"): Rename from "*extopqihi_swap", make
+       non-v32 only.
+       ("*extop<mode>si_swap_non_v32"): Ditto "*extop<mode>si_swap".
+       ("*expanded_andsi_non_v32"): Ditto "*expanded_andsi".
+       ("*expanded_andhi_non_v32"): Ditto "*expanded_andhi".
+       ("*andhi_lowpart_non_v32"): Ditto "*andhi_lowpart".
+       ("*andqi_lowpart_non_v32"): Ditto "*andqi_lowpart".
+       ("*expanded_call_non_v32"): Ditto "*expanded_call".  Change from
+       "cris_general_operand_or_plt_symbol" to "general_operand".
+       ("*expanded_call_value_non_v32") Ditto "*expanded_call_value".
+       ("*casesi_adds_w", "mstep_shift", "mstep_mul")
+       ("*expanded_call_side", "*expanded_call_value_side")
+       (op-extend-split, op-extend-split-rx=rz, op-extend-split-swapped)
+       (op-extend-split-swapped-rx=rz, op-extend, op-split-rx=rz)
+       (op-split-swapped, op-split-swapped-rx=rz): Make non-v32 only.
+       ("dstep_mul", "xorsi3", "one_cmplsi2", "<shlr>si3")
+       ("*expanded_<shlr><mode>", "*<shlr><mode>_lowpart", "ashl<mode>3")
+       ("*ashl<mode>_lowpart", "abssi2", "clzsi2", "bswapsi2")
+       ("cris_swap_bits"): Specify "noov32" for attr "cc".
+       ("<su>mulsi3_highpart"): Ditto.  Correct operand 0 to register_operand.
+       ("andqi3"): Make define_expand.
+       ("*return_expanded"): For attr "slottable", change from "has_slot"
+       to "has_return_slot".
+       ("cris_casesi_non_v32"): New pattern, old contents of "casesi".
+       ("casesi"): Divert into "cris_casesi_v32" and "cris_casesi_non_v32".
+       (moversideqi, movemsideqi, mover2side): Require
+       TARGET_SIDE_EFFECT_PREFIXES.
+       (gotplt-to-plt, gotplt-to-plt-side): Change from CRIS_UNSPEC_PLT
+       to CRIS_UNSPEC_PLT_GOTREL.
+       * config/cris/cris-protos.h (cris_register_move_cost)
+       (cris_cc0_user_requires_cmp, cris_asm_output_case_end): Declare.
+
+2007-12-15  Alexandre Oliva  <aoliva@redhat.com>
+
+       PR debug/7081
+       * dwarf2out.c (dwarf_tag_name): Synchronize with dwarf2.h.
+       (is_type_die): Cover interface types.
+       (class_or_namespace_scope_p): Cover interface and class types.
+       (record_type_tag): New.
+       (gen_inlined_structure_type_die): Use it.
+       (gen_struct_or_union_type_die): Likewise.
+       (prune_unused_types_walk): Cover interface types.
+       * langhooks.h (classify_record): New enum.
+       (classify_record): New member in struct langhooks_for_types.
+       * langhooks-def.h (LANG_HOOKS_CLASSIFY_RECORD): New.
+       (LANGHOOKS_FOR_TYPES_INITIALIZER): Adjust.
+
+2007-12-15  Alexandre Oliva  <aoliva@redhat.com>
+
+       * dwarf2out.c (reference_to_unused): Don't emit strings in
+       initializers just because of debug information.
+       * tree.h (TREE_ASM_WRITTEN): Document use for STRING_CSTs.
+
+2007-12-15  Sebastian Pop  <sebastian.pop@amd.com>
+
+       * tree-scalar-evolution.c (number_of_iterations_for_all_loops): Replace
+       print_loop_ir with print_loops.
+       * tree-flow.h (dot_cfg, debug_loops, debug_loop, debug_loop_num,
+       print_loops, print_loops_bb): Declare.
+       * tree-cfg.c (print_loops_bb): New.
+       (print_loop): Print header, latch, bounds, estimation of iterations.
+       (print_loop_and_siblings): New.
+       (print_loop_ir): Renamed print_loops.
+       (debug_loop_ir): Renamed debug_loops.
+       (debug_loop, debug_loop_num): New.
+
+2007-12-15  Bernhard Fischer  <aldot@gcc.gnu.org>
+
+       * tree-flow-inline.h.c (next_readonly_imm_use): Fix typo in comment.
+
+2007-12-15  Bernhard Fischer  <aldot@gcc.gnu.org>
+
+       * toplev.c (process_options): Fix typo in warning.
+
+2007-12-14  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/29978
+       * config/i386/i386.c (ix86_expand_branch): Optimize LE/LEU/GT/GTU
+       DImode comparisons against constant with all 1's in the lower word.
+
+2007-12-14  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/sse.md (sse4_2_pcmpestr): Use reg_not_xmm0_operand
+       constraint for operand 2.  Use nonimm_not_xmm0_operand constraint
+       for operand 4.  Update arguments in the call to
+       gen_sse4_2_pcmpestr_cconly.
+       (sse_4_2_pcmpestr_cconly): Renumber insn operands and update insn
+       template accordingly.
+       (sse4_2_pcmpistr): Use reg_not_xmm0_operand constraint for operand2.
+       Use nonimm_not_xmm0_operand constraint for operand 3.  Update
+       arguments in the call to gen_sse4_2_pcmpistr_cconly.
+       (sse_4_2_pcmpistr_cconly): Renumber insn operands and update insn
+       template accordingly.
+
+2007-12-14  Richard Guenther  <rguenther@suse.de>
+
+       PR middle-end/34462
+       * tree-ssa-operands.h (create_ssa_artificial_load_stmt): Add
+       parameter to say whether to unlink immediate uses.
+       * tree-ssa-operands.c (create_ssa_artificial_load_stmt): Do not
+       mark the artificial stmt as modified.  Unlink immediate uses
+       only if requested.
+       * tree-ssa-dom.c (record_equivalences_from_stmt): Update caller.
+       * tree-ssa-pre.c (insert_fake_stores): Likewise.
+
+2007-12-13  Eric Botcazou  <ebotcazou@libertysurf.fr>
+
+       PR middle-end/33088
+       * gimplify.c (gimplify_modify_expr_complex_part): Add note to comment.
+       * tree-complex.c (init_dont_simulate_again): Return true if there are
+       uninitialized loads generated by gimplify_modify_expr_complex_part.
+       * tree-gimple.c (is_gimple_reg_type): Return false for complex types
+       if not optimizing.
+       * tree-ssa.c (ssa_undefined_value_p): New predicate extracted from...
+       (warn_uninit): ...here.  Use ssa_undefined_value_p.
+       * tree-ssa-pre.c (is_undefined_value): Delete.
+       (phi_translate_1): Use ssa_undefined_value_p.
+       (add_to_exp_gen): Likewise.
+       (make_values_for_stmt): Likewise.
+       * tree-flow.h (ssa_undefined_value_p): Declare.
+
+2007-12-13  Andrew Pinski  <pinskia@gmail.com>
+           David Daney  <ddaney@avtrex.com>
+
+       PR bootstrap/34144
+       * system.h: Make -Wuninitialized non-fatal if ASSERT_CHECKING
+       is disabled.
+
+2007-12-13  Jakub Jelinek  <jakub@redhat.com>
+
+       PR rtl-optimization/32636
+       * df-scan.c (df_get_entry_block_def_set): Set struct_value_rtx
+       regno in entry_block_defs even if HAVE_prologue && epilogue_completed.
+
+2007-12-13  Uros Bizjak  <ubizjak@gmail.com>
+           Richard Guenther  <rguenther@suse.de>
+
+       PR target/34435
+       * config/i386/emmintrin.h (_mm_shuffle_pd, _mm_extract_epi16,
+       _mm_insert_epi16, _mm_shufflehi_epi16, _mm_shufflelo_epi16,
+       _mm_shuffle_epi32): Cast non-constant input values to either __m64,
+       __m128, __m128i or __m128d in a macro version of the intrinsic.
+       Cast constant input values to int.
+       * config/i386/ammintrin.h (_mm_extracti_si64, _mm_inserti_si64): Ditto.
+       * config/i386/bmmintrin.h (_mm_roti_epi8, _mm_roti_epi16,
+       _mm_roti_epi32, _mm_roti_epi64): Ditto.
+       * config/i386/smmintrin.h (_mm_blend_epi16, _mm_blend_ps, _mm_blend_pd,
+       _mm_dp_ps, _mm_dp_pd, _mm_insert_ps, _mm_extract_ps, _mm_insert_epi8,
+       _mm_insert_epi32, _mm_insert_epi64, _mm_extract_epi8, mm_extract_epi32,
+       _mm_extract_epi64, _mm_mpsadbw_epu8, _mm_cmpistrm, _mm_cmpistri,
+       _mm_cmpestrm, _mm_cmpestri, _mm_cmpistra, _mm_cmpistrc, _mm_cmpistro,
+       _mm_cmpistrs, _mm_cmpistrz, _mm_cmpestra, _mm_cmpestrc, _mm_cmpestro,
+       _mm_cmpestrs, _mm_cmpestrz): Ditto.
+       * config/i386/tmmintrin.h (_mm_alignr_epi8, _mm_alignr_pi8): Ditto.
+       * config/i386/xmmintrin.h (_mm_shuffle_ps, _mm_extract_pi16, _m_pextrw,
+       _mm_insert_pi16, _m_pinsrw, _mm_shuffle_pi16, _m_pshufw): Ditto.
+       * config/i386/mmintrin-common.h (_mm_round_pd, _mm_round_sd,
+       _mm_round_ps, _mm_round_ss): Ditto.
+
+2007-12-13  Richard Guenther  <rguenther@suse.de>
+
+       PR tree-optimization/34450
+       * params.def (PARAM_SCCVN_MAX_SCC_SIZE): New param.
+       * invoke.texi (sccvn-max-scc-size): Document.
+       * Makefile.in (tree-ssa-sccvn.o): Add $(PARAMS_H) dependency.
+       * tree-ssa-sccvn.h (run_scc_vn): Return true on success, false
+       on error.
+       * tree-ssa-sccvn.c (params.h): Include.
+       (DFS): Return true if all went well, return false as soon as
+       a SCC exceeds the size of PARAM_SCCVN_MAX_SCC_SIZE.
+       (run_scc_vn): Return true if all went well, return false if
+       we aborted during DFS.
+       * tree-ssa-pre.c (execute_pre): Check if SCCVN finished
+       successfully, otherwise bail out.
+
+2007-12-13  Olga Golovanevsky  <olga@il.ibm.com>
+
+       * ipa-struct-reorg.c (is_candidate): Print information to dump 
+       file when the type is initialized.
+       (get_stmt_accesses):  Likewise when a structure has bitfields
+       or field access is too complicate.
+       (safe_cond_expr_check): Likewise for unsafe condition expressions.
+       (exclude_cold_structs): Likewise for cold structures.
+       (collect_structures): Suppress redundant print when there are 
+       no structures to transform.
+       (do_reorg): Print to dump file a number of structures that 
+       will be transformed.
+       (dump_new_types): Print a number of new types to replace 
+       an original structure type.
+       
+2007-12-13  Olga Golovanevsky  <olga@il.ibm.com>
 
        * doc/invoke.texi (Optimiza Options): Document new -fipa-struct-reorg
        option and struct-reorg-cold-struct-ratio parameter.
        * stormy16/stormy16.h (EXPAND_BUILTIN_VA_START): Remove.
        * stormy16/stormy16-protos.h (xstormy16_expand_builtin_va_start):
        Remove prototype.
-       * stormy16/stormy16.c (xstormy16_expand_builtin_va_start): Made
-       static.
+       * stormy16/stormy16.c (xstormy16_expand_builtin_va_start): Made static.
        (TARGET_EXPAND_BUILTIN_VA_START): Define.
        * s390/s390-protos.h (s390_va_start): Remove prototype.
        * s390/s390.c (s390_va_start): Made static.
        * config/s390/s390.c (s390_dump_pool): Create copy of constant
        pool entries since they might hold values that must not be shared.
 
+2007-09-10 Robert Kidd <rkidd@crhc.uiuc.edu>
+
+       * bb-reorder.c (rest_of_handler_reorder_blocks): Removed call to
+       RTL level tracer pass.
+       * passes.c (init_optimization_passes): Move pass_tracer from
+       after pass_rtl_ifcvt to after pass_dce.
+       * tracer.c: Update copyright.
+       (layout_superblocks): Remove function.
+       (mark_bb_seen): New.
+       (bb_seen_p): New.
+       (count_insns): Change to estimate instructions in a Tree-SSA
+       statement.
+       (find_trace): Use bb_seen_p.
+       (tail_duplicate): Use bb_seen_p.  Call add_phi_args_after_copy
+       after duplicate_block.
+       (tracer): Change prototype to match that of a pass execute
+       callback.
+       (gate_tracer): Rename from gate_handle_tracer.
+       (rest_of_handle_tracer): Remove function.
+       * rtl.h: Remove prototype for tracer.
+       * testsuite/gcc.dg/tree-prof/tracer-1.c: New.
+
 2007-09-10  Uros Bizjak  <ubizjak@gmail.com>
 
        PR target/33369