; Options for the rs6000 port of the compiler ; ; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software ; Foundation, Inc. ; Contributed by Aldy Hernandez . ; ; This file is part of GCC. ; ; GCC is free software; you can redistribute it and/or modify it under ; the terms of the GNU General Public License as published by the Free ; Software Foundation; either version 3, or (at your option) any later ; version. ; ; GCC is distributed in the hope that it will be useful, but WITHOUT ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ; License for more details. ; ; You should have received a copy of the GNU General Public License ; along with GCC; see the file COPYING3. If not see ; . HeaderInclude config/rs6000/rs6000-opts.h ;; Current processor TargetVariable enum processor_type rs6000_cpu = PROCESSOR_RIOS1 ;; Always emit branch hint bits. TargetVariable unsigned char rs6000_always_hint ;; Schedule instructions for group formation. TargetVariable unsigned char rs6000_sched_groups ;; Align branch targets. TargetVariable unsigned char rs6000_align_branch_targets ;; Support for -msched-costly-dep option. TargetVariable enum rs6000_dependence_cost rs6000_sched_costly_dep = no_dep_costly ;; Support for -minsert-sched-nops option. TargetVariable enum rs6000_nop_insertion rs6000_sched_insert_nops = sched_finish_none ;; Non-zero to allow overriding loop alignment. TargetVariable unsigned char can_override_loop_align ;; Which small data model to use (for System V targets only) TargetVariable enum rs6000_sdata_type rs6000_sdata = SDATA_DATA ;; Bit size of immediate TLS offsets and string from which it is decoded. TargetVariable int rs6000_tls_size = 32 ;; ABI enumeration available for subtarget to use. TargetVariable enum rs6000_abi rs6000_current_abi = ABI_NONE ;; Type of traceback to use. TargetVariable enum rs6000_traceback_type rs6000_traceback = traceback_default ;; Control alignment for fields within structures. TargetVariable unsigned char rs6000_alignment_flags ;; Code model for 64-bit linux. TargetVariable enum rs6000_cmodel rs6000_current_cmodel = CMODEL_SMALL ;; What type of reciprocal estimation instructions to generate TargetVariable unsigned int rs6000_recip_control ;; Debug flags TargetVariable unsigned int rs6000_debug ;; Save for target_flags_explicit TargetSave int rs6000_target_flags_explicit mpower Target Report RejectNegative Mask(POWER) Use POWER instruction set mno-power Target Report RejectNegative Do not use POWER instruction set mpower2 Target Report Mask(POWER2) Use POWER2 instruction set mpowerpc Target Report RejectNegative Mask(POWERPC) Use PowerPC instruction set mno-powerpc Target Report RejectNegative Do not use PowerPC instruction set mpowerpc64 Target Report Mask(POWERPC64) Use PowerPC-64 instruction set mpowerpc-gpopt Target Report Mask(PPC_GPOPT) Save Use PowerPC General Purpose group optional instructions mpowerpc-gfxopt Target Report Mask(PPC_GFXOPT) Save Use PowerPC Graphics group optional instructions mmfcrf Target Report Mask(MFCRF) Save Use PowerPC V2.01 single field mfcr instruction mpopcntb Target Report Mask(POPCNTB) Save Use PowerPC V2.02 popcntb instruction mfprnd Target Report Mask(FPRND) Save Use PowerPC V2.02 floating point rounding instructions mcmpb Target Report Mask(CMPB) Save Use PowerPC V2.05 compare bytes instruction mmfpgpr Target Report Mask(MFPGPR) Save Use extended PowerPC V2.05 move floating point to/from GPR instructions maltivec Target Report Mask(ALTIVEC) Save Use AltiVec instructions mhard-dfp Target Report Mask(DFP) Save Use decimal floating point instructions mmulhw Target Report Mask(MULHW) Save Use 4xx half-word multiply instructions mdlmzb Target Report Mask(DLMZB) Save Use 4xx string-search dlmzb instruction mmultiple Target Report Mask(MULTIPLE) Save Generate load/store multiple instructions mstring Target Report Mask(STRING) Save Generate string instructions for block moves mnew-mnemonics Target Report RejectNegative Mask(NEW_MNEMONICS) Use new mnemonics for PowerPC architecture mold-mnemonics Target Report RejectNegative InverseMask(NEW_MNEMONICS) Use old mnemonics for PowerPC architecture msoft-float Target Report RejectNegative Mask(SOFT_FLOAT) Do not use hardware floating point mhard-float Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT) Use hardware floating point mpopcntd Target Report Mask(POPCNTD) Save Use PowerPC V2.06 popcntd instruction mfriz Target Report Var(TARGET_FRIZ) Init(-1) Save Under -ffast-math, generate a FRIZ instruction for (double)(long long) conversions mveclibabi= Target RejectNegative Joined Var(rs6000_veclibabi_name) Vector library ABI to use mvsx Target Report Mask(VSX) Save Use vector/scalar (VSX) instructions mvsx-scalar-double Target Undocumented Report Var(TARGET_VSX_SCALAR_DOUBLE) Init(-1) ; If -mvsx, use VSX arithmetic instructions for scalar double (on by default) mvsx-scalar-memory Target Undocumented Report Var(TARGET_VSX_SCALAR_MEMORY) ; If -mvsx, use VSX scalar memory reference instructions for scalar double (off by default) mvsx-align-128 Target Undocumented Report Var(TARGET_VSX_ALIGN_128) ; If -mvsx, set alignment to 128 bits instead of 32/64 mallow-movmisalign Target Undocumented Var(TARGET_ALLOW_MOVMISALIGN) Init(-1) ; Allow/disallow the movmisalign in DF/DI vectors mallow-df-permute Target Undocumented Var(TARGET_ALLOW_DF_PERMUTE) ; Allow/disallow permutation of DF/DI vectors msched-groups Target Undocumented Report Var(TARGET_SCHED_GROUPS) Init(-1) ; Explicitly set/unset whether rs6000_sched_groups is set malways-hint Target Undocumented Report Var(TARGET_ALWAYS_HINT) Init(-1) ; Explicitly set/unset whether rs6000_always_hint is set malign-branch-targets Target Undocumented Report Var(TARGET_ALIGN_BRANCH_TARGETS) Init(-1) ; Explicitly set/unset whether rs6000_align_branch_targets is set mvectorize-builtins Target Undocumented Report Var(TARGET_VECTORIZE_BUILTINS) Init(-1) ; Explicitly control whether we vectorize the builtins or not. mno-update Target Report RejectNegative Mask(NO_UPDATE) Save Do not generate load/store with update instructions mupdate Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE) Generate load/store with update instructions msingle-pic-base Target Report Var(TARGET_SINGLE_PIC_BASE) Init(0) Do not load the PIC register in function prologues mavoid-indexed-addresses Target Report Var(TARGET_AVOID_XFORM) Init(-1) Save Avoid generation of indexed load/store instructions when possible mtls-markers Target Report Var(tls_markers) Init(1) Save Mark __tls_get_addr calls with argument info msched-epilog Target Undocumented Var(TARGET_SCHED_PROLOG) Init(1) Save msched-prolog Target Report Var(TARGET_SCHED_PROLOG) Save Schedule the start and end of the procedure maix-struct-return Target Report RejectNegative Var(aix_struct_return) Save Return all structures in memory (AIX default) msvr4-struct-return Target Report RejectNegative Var(aix_struct_return,0) Save Return small structures in registers (SVR4 default) mxl-compat Target Report Var(TARGET_XL_COMPAT) Save Conform more closely to IBM XLC semantics mrecip Target Report Generate software reciprocal divide and square root for better throughput. mrecip= Target Report RejectNegative Joined Var(rs6000_recip_name) Generate software reciprocal divide and square root for better throughput. mrecip-precision Target Report Mask(RECIP_PRECISION) Save Assume that the reciprocal estimate instructions provide more accuracy. mno-fp-in-toc Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC) Save Do not place floating point constants in TOC mfp-in-toc Target Report RejectNegative Var(TARGET_NO_FP_IN_TOC,0) Save Place floating point constants in TOC mno-sum-in-toc Target RejectNegative Var(TARGET_NO_SUM_IN_TOC) Save Do not place symbol+offset constants in TOC msum-in-toc Target RejectNegative Var(TARGET_NO_SUM_IN_TOC,0) Save Place symbol+offset constants in TOC ; Output only one TOC entry per module. Normally linking fails if ; there are more than 16K unique variables/constants in an executable. With ; this option, linking fails only if there are more than 16K modules, or ; if there are more than 16K unique variables/constant in a single module. ; ; This is at the cost of having 2 extra loads and one extra store per ; function, and one less allocable register. mminimal-toc Target Report Mask(MINIMAL_TOC) Use only one TOC entry per procedure mfull-toc Target Report Put everything in the regular TOC mvrsave Target Report Var(TARGET_ALTIVEC_VRSAVE) Save Generate VRSAVE instructions when generating AltiVec code mvrsave=no Target RejectNegative Alias(mvrsave) NegativeAlias Deprecated option. Use -mno-vrsave instead mvrsave=yes Target RejectNegative Alias(mvrsave) Deprecated option. Use -mvrsave instead mblock-move-inline-limit= Target Report Var(rs6000_block_move_inline_limit) Init(0) RejectNegative Joined UInteger Save Specify how many bytes should be moved inline before calling out to memcpy/memmove misel Target Report Mask(ISEL) Save Generate isel instructions misel=no Target RejectNegative Alias(misel) NegativeAlias Deprecated option. Use -mno-isel instead misel=yes Target RejectNegative Alias(misel) Deprecated option. Use -misel instead mspe Target Var(rs6000_spe) Save Generate SPE SIMD instructions on E500 mpaired Target Var(rs6000_paired_float) Save Generate PPC750CL paired-single instructions mspe=no Target RejectNegative Alias(mspe) NegativeAlias Deprecated option. Use -mno-spe instead mspe=yes Target RejectNegative Alias(mspe) Deprecated option. Use -mspe instead mdebug= Target RejectNegative Joined -mdebug= Enable debug output mabi=altivec Target RejectNegative Var(rs6000_altivec_abi) Save Use the AltiVec ABI extensions mabi=no-altivec Target RejectNegative Var(rs6000_altivec_abi, 0) Do not use the AltiVec ABI extensions mabi=spe Target RejectNegative Var(rs6000_spe_abi) Save Use the SPE ABI extensions mabi=no-spe Target RejectNegative Var(rs6000_spe_abi, 0) Do not use the SPE ABI extensions ; These are here for testing during development only, do not document ; in the manual please. ; If we want Darwin's struct-by-value-in-regs ABI. mabi=d64 Target RejectNegative Undocumented Warn(using darwin64 ABI) Var(rs6000_darwin64_abi) Save mabi=d32 Target RejectNegative Undocumented Warn(using old darwin ABI) Var(rs6000_darwin64_abi, 0) mabi=ieeelongdouble Target RejectNegative Undocumented Warn(using IEEE extended precision long double) Var(rs6000_ieeequad) Save mabi=ibmlongdouble Target RejectNegative Undocumented Warn(using IBM extended precision long double) Var(rs6000_ieeequad, 0) mcpu= Target RejectNegative Joined Var(rs6000_cpu_index) Init(-1) Enum(rs6000_cpu_opt_value) Save -mcpu= Use features of and schedule code for given CPU mtune= Target RejectNegative Joined Var(rs6000_tune_index) Init(-1) Enum(rs6000_cpu_opt_value) Save -mtune= Schedule code for given CPU mtraceback= Target RejectNegative Joined Enum(rs6000_traceback_type) Var(rs6000_traceback) -mtraceback= Select full, part, or no traceback table Enum Name(rs6000_traceback_type) Type(enum rs6000_traceback_type) EnumValue Enum(rs6000_traceback_type) String(full) Value(traceback_full) EnumValue Enum(rs6000_traceback_type) String(part) Value(traceback_part) EnumValue Enum(rs6000_traceback_type) String(no) Value(traceback_none) mlongcall Target Report Var(rs6000_default_long_calls) Save Avoid all range limits on call instructions mgen-cell-microcode Target Report Var(rs6000_gen_cell_microcode) Init(-1) Save Generate Cell microcode mwarn-cell-microcode Target Var(rs6000_warn_cell_microcode) Init(0) Warning Save Warn when a Cell microcoded instruction is emitted mwarn-altivec-long Target Var(rs6000_warn_altivec_long) Init(1) Save Warn about deprecated 'vector long ...' AltiVec type usage mfloat-gprs= Target RejectNegative Joined Enum(rs6000_float_gprs) Var(rs6000_float_gprs) Save -mfloat-gprs= Select GPR floating point method Enum Name(rs6000_float_gprs) Type(unsigned char) Valid arguments to -mfloat-gprs=: EnumValue Enum(rs6000_float_gprs) String(yes) Value(1) EnumValue Enum(rs6000_float_gprs) String(single) Value(1) EnumValue Enum(rs6000_float_gprs) String(double) Value(2) EnumValue Enum(rs6000_float_gprs) String(no) Value(0) mlong-double- Target RejectNegative Joined UInteger Var(rs6000_long_double_type_size) Save -mlong-double- Specify size of long double (64 or 128 bits) msched-costly-dep= Target RejectNegative Joined Var(rs6000_sched_costly_dep_str) Determine which dependences between insns are considered costly minsert-sched-nops= Target RejectNegative Joined Var(rs6000_sched_insert_nops_str) Specify which post scheduling nop insertion scheme to apply malign- Target RejectNegative Joined Enum(rs6000_alignment_flags) Var(rs6000_alignment_flags) Specify alignment of structure fields default/natural Enum Name(rs6000_alignment_flags) Type(unsigned char) Valid arguments to -malign-: EnumValue Enum(rs6000_alignment_flags) String(power) Value(MASK_ALIGN_POWER) EnumValue Enum(rs6000_alignment_flags) String(natural) Value(MASK_ALIGN_NATURAL) mprioritize-restricted-insns= Target RejectNegative Joined UInteger Var(rs6000_sched_restricted_insns_priority) Save Specify scheduling priority for dispatch slot restricted insns msingle-float Target RejectNegative Var(rs6000_single_float) Save Single-precision floating point unit mdouble-float Target RejectNegative Var(rs6000_double_float) Save Double-precision floating point unit msimple-fpu Target RejectNegative Var(rs6000_simple_fpu) Save Floating point unit does not support divide & sqrt mfpu= Target RejectNegative Joined Enum(fpu_type_t) Var(rs6000_fpu_type) Init(FPU_NONE) -mfpu= Specify FP (sp, dp, sp-lite, dp-lite) (implies -mxilinx-fpu) Enum Name(fpu_type_t) Type(enum fpu_type_t) EnumValue Enum(fpu_type_t) String(none) Value(FPU_NONE) EnumValue Enum(fpu_type_t) String(sp_lite) Value(FPU_SF_LITE) EnumValue Enum(fpu_type_t) String(dp_lite) Value(FPU_DF_LITE) EnumValue Enum(fpu_type_t) String(sp_full) Value(FPU_SF_FULL) EnumValue Enum(fpu_type_t) String(dp_full) Value(FPU_DF_FULL) mxilinx-fpu Target Var(rs6000_xilinx_fpu) Save Specify Xilinx FPU.