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1 /* Xtensa configuration settings.
2    Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010
3    Free Software Foundation, Inc.
4    Contributed by Bob Wilson (bob.wilson@acm.org) at Tensilica.
5
6    This program is free software; you can redistribute it and/or modify
7    it under the terms of the GNU General Public License as published by
8    the Free Software Foundation; either version 2, or (at your option)
9    any later version.
10
11    This program is distributed in the hope that it will be useful, but
12    WITHOUT ANY WARRANTY; without even the implied warranty of
13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14    General Public License for more details.
15
16    You should have received a copy of the GNU General Public License
17    along with this program; if not, write to the Free Software
18    Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
19
20 #ifndef XTENSA_CONFIG_H
21 #define XTENSA_CONFIG_H
22
23 /* The macros defined here match those with the same names in the Xtensa
24    compile-time HAL (Hardware Abstraction Layer).  Please refer to the
25    Xtensa System Software Reference Manual for documentation of these
26    macros.  */
27
28 #undef XCHAL_HAVE_BE
29 #define XCHAL_HAVE_BE                   1
30
31 #undef XCHAL_HAVE_DENSITY
32 #define XCHAL_HAVE_DENSITY              1
33
34 #undef XCHAL_HAVE_CONST16
35 #define XCHAL_HAVE_CONST16              0
36
37 #undef XCHAL_HAVE_ABS
38 #define XCHAL_HAVE_ABS                  1
39
40 #undef XCHAL_HAVE_ADDX
41 #define XCHAL_HAVE_ADDX                 1
42
43 #undef XCHAL_HAVE_L32R
44 #define XCHAL_HAVE_L32R                 1
45
46 #undef XSHAL_USE_ABSOLUTE_LITERALS
47 #define XSHAL_USE_ABSOLUTE_LITERALS     0
48
49 #undef XSHAL_HAVE_TEXT_SECTION_LITERALS
50 #define XSHAL_HAVE_TEXT_SECTION_LITERALS 1 /* Set if there is some memory that allows both code and literals.  */
51
52 #undef XCHAL_HAVE_MAC16
53 #define XCHAL_HAVE_MAC16                0
54
55 #undef XCHAL_HAVE_MUL16
56 #define XCHAL_HAVE_MUL16                1
57
58 #undef XCHAL_HAVE_MUL32
59 #define XCHAL_HAVE_MUL32                1
60
61 #undef XCHAL_HAVE_MUL32_HIGH
62 #define XCHAL_HAVE_MUL32_HIGH           0
63
64 #undef XCHAL_HAVE_DIV32
65 #define XCHAL_HAVE_DIV32                1
66
67 #undef XCHAL_HAVE_NSA
68 #define XCHAL_HAVE_NSA                  1
69
70 #undef XCHAL_HAVE_MINMAX
71 #define XCHAL_HAVE_MINMAX               1
72
73 #undef XCHAL_HAVE_SEXT
74 #define XCHAL_HAVE_SEXT                 1
75
76 #undef XCHAL_HAVE_LOOPS
77 #define XCHAL_HAVE_LOOPS                1
78
79 #undef XCHAL_HAVE_THREADPTR
80 #define XCHAL_HAVE_THREADPTR            1
81
82 #undef XCHAL_HAVE_RELEASE_SYNC
83 #define XCHAL_HAVE_RELEASE_SYNC         1
84
85 #undef XCHAL_HAVE_S32C1I
86 #define XCHAL_HAVE_S32C1I               1
87
88 #undef XCHAL_HAVE_BOOLEANS
89 #define XCHAL_HAVE_BOOLEANS             0
90
91 #undef XCHAL_HAVE_FP
92 #define XCHAL_HAVE_FP                   0
93
94 #undef XCHAL_HAVE_FP_DIV
95 #define XCHAL_HAVE_FP_DIV               0
96
97 #undef XCHAL_HAVE_FP_RECIP
98 #define XCHAL_HAVE_FP_RECIP             0
99
100 #undef XCHAL_HAVE_FP_SQRT
101 #define XCHAL_HAVE_FP_SQRT              0
102
103 #undef XCHAL_HAVE_FP_RSQRT
104 #define XCHAL_HAVE_FP_RSQRT             0
105
106 #undef XCHAL_HAVE_DFP_accel
107 #define XCHAL_HAVE_DFP_accel                    0
108 #undef XCHAL_HAVE_WINDOWED
109 #define XCHAL_HAVE_WINDOWED             1
110
111 #undef XCHAL_NUM_AREGS
112 #define XCHAL_NUM_AREGS                 32
113
114 #undef XCHAL_HAVE_WIDE_BRANCHES
115 #define XCHAL_HAVE_WIDE_BRANCHES        0
116
117 #undef XCHAL_HAVE_PREDICTED_BRANCHES
118 #define XCHAL_HAVE_PREDICTED_BRANCHES   0
119
120
121 #undef XCHAL_ICACHE_SIZE
122 #define XCHAL_ICACHE_SIZE               16384
123
124 #undef XCHAL_DCACHE_SIZE
125 #define XCHAL_DCACHE_SIZE               16384
126
127 #undef XCHAL_ICACHE_LINESIZE
128 #define XCHAL_ICACHE_LINESIZE           32
129
130 #undef XCHAL_DCACHE_LINESIZE
131 #define XCHAL_DCACHE_LINESIZE           32
132
133 #undef XCHAL_ICACHE_LINEWIDTH
134 #define XCHAL_ICACHE_LINEWIDTH          5
135
136 #undef XCHAL_DCACHE_LINEWIDTH
137 #define XCHAL_DCACHE_LINEWIDTH          5
138
139 #undef XCHAL_DCACHE_IS_WRITEBACK
140 #define XCHAL_DCACHE_IS_WRITEBACK       1
141
142
143 #undef XCHAL_HAVE_MMU
144 #define XCHAL_HAVE_MMU                  1
145
146 #undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
147 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE     12
148
149
150 #undef XCHAL_HAVE_DEBUG
151 #define XCHAL_HAVE_DEBUG                1
152
153 #undef XCHAL_NUM_IBREAK
154 #define XCHAL_NUM_IBREAK                2
155
156 #undef XCHAL_NUM_DBREAK
157 #define XCHAL_NUM_DBREAK                2
158
159 #undef XCHAL_DEBUGLEVEL
160 #define XCHAL_DEBUGLEVEL                6
161
162
163 #undef XCHAL_MAX_INSTRUCTION_SIZE
164 #define XCHAL_MAX_INSTRUCTION_SIZE      3
165
166 #undef XCHAL_INST_FETCH_WIDTH
167 #define XCHAL_INST_FETCH_WIDTH          4
168
169
170 #undef XSHAL_ABI
171 #undef XTHAL_ABI_WINDOWED
172 #undef XTHAL_ABI_CALL0
173 #define XSHAL_ABI                       XTHAL_ABI_WINDOWED
174 #define XTHAL_ABI_WINDOWED              0
175 #define XTHAL_ABI_CALL0                 1
176
177 #endif /* !XTENSA_CONFIG_H */