1 /* { dg-do compile { target powerpc-*-* rs6000-*-* } } */
2 /* { dg-options "-O3 -mcpu=power2 -fno-schedule-insns -w -mhard-float" } */
3 /* This used to ICE as the peephole was not checking to see
4 if the register is a floating point one (I think this cannot
5 happen in real life except in this example). */
7 register volatile double t1 __asm__("r14");
8 register volatile double t2 __asm__("r15");
9 register volatile double t3 __asm__("r16"), t4 __asm__("r17");
10 void t(double *a, double *b)