1 /* Analyze RTL for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
26 #include "coretypes.h"
30 #include "hard-reg-set.h"
31 #include "insn-config.h"
41 /* Information about a subreg of a hard register. */
44 /* Offset of first hard register involved in the subreg. */
46 /* Number of hard registers involved in the subreg. */
48 /* Whether this subreg can be represented as a hard reg with the new
53 /* Forward declarations */
54 static void set_of_1 (rtx, rtx, void *);
55 static bool covers_regno_p (rtx, unsigned int);
56 static bool covers_regno_no_parallel_p (rtx, unsigned int);
57 static int rtx_referenced_p_1 (rtx *, void *);
58 static int computed_jump_p_1 (rtx);
59 static void parms_set (rtx, rtx, void *);
60 static void subreg_get_info (unsigned int, enum machine_mode,
61 unsigned int, enum machine_mode,
62 struct subreg_info *);
64 static unsigned HOST_WIDE_INT cached_nonzero_bits (rtx, enum machine_mode,
65 rtx, enum machine_mode,
66 unsigned HOST_WIDE_INT);
67 static unsigned HOST_WIDE_INT nonzero_bits1 (rtx, enum machine_mode, rtx,
69 unsigned HOST_WIDE_INT);
70 static unsigned int cached_num_sign_bit_copies (rtx, enum machine_mode, rtx,
73 static unsigned int num_sign_bit_copies1 (rtx, enum machine_mode, rtx,
74 enum machine_mode, unsigned int);
76 /* Offset of the first 'e', 'E' or 'V' operand for each rtx code, or
77 -1 if a code has no such operand. */
78 static int non_rtx_starting_operands[NUM_RTX_CODE];
80 /* Bit flags that specify the machine subtype we are compiling for.
81 Bits are tested using macros TARGET_... defined in the tm.h file
82 and set by `-m...' switches. Must be defined in rtlanal.c. */
86 /* Truncation narrows the mode from SOURCE mode to DESTINATION mode.
87 If TARGET_MODE_REP_EXTENDED (DESTINATION, DESTINATION_REP) is
88 SIGN_EXTEND then while narrowing we also have to enforce the
89 representation and sign-extend the value to mode DESTINATION_REP.
91 If the value is already sign-extended to DESTINATION_REP mode we
92 can just switch to DESTINATION mode on it. For each pair of
93 integral modes SOURCE and DESTINATION, when truncating from SOURCE
94 to DESTINATION, NUM_SIGN_BIT_COPIES_IN_REP[SOURCE][DESTINATION]
95 contains the number of high-order bits in SOURCE that have to be
96 copies of the sign-bit so that we can do this mode-switch to
100 num_sign_bit_copies_in_rep[MAX_MODE_INT + 1][MAX_MODE_INT + 1];
102 /* Return 1 if the value of X is unstable
103 (would be different at a different point in the program).
104 The frame pointer, arg pointer, etc. are considered stable
105 (within one function) and so is anything marked `unchanging'. */
108 rtx_unstable_p (rtx x)
110 RTX_CODE code = GET_CODE (x);
117 return !MEM_READONLY_P (x) || rtx_unstable_p (XEXP (x, 0));
128 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
129 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
130 /* The arg pointer varies if it is not a fixed register. */
131 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
133 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
134 /* ??? When call-clobbered, the value is stable modulo the restore
135 that must happen after a call. This currently screws up local-alloc
136 into believing that the restore is not needed. */
137 if (x == pic_offset_table_rtx)
143 if (MEM_VOLATILE_P (x))
152 fmt = GET_RTX_FORMAT (code);
153 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
156 if (rtx_unstable_p (XEXP (x, i)))
159 else if (fmt[i] == 'E')
162 for (j = 0; j < XVECLEN (x, i); j++)
163 if (rtx_unstable_p (XVECEXP (x, i, j)))
170 /* Return 1 if X has a value that can vary even between two
171 executions of the program. 0 means X can be compared reliably
172 against certain constants or near-constants.
173 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
174 zero, we are slightly more conservative.
175 The frame pointer and the arg pointer are considered constant. */
178 rtx_varies_p (rtx x, int for_alias)
191 return !MEM_READONLY_P (x) || rtx_varies_p (XEXP (x, 0), for_alias);
202 /* Note that we have to test for the actual rtx used for the frame
203 and arg pointers and not just the register number in case we have
204 eliminated the frame and/or arg pointer and are using it
206 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
207 /* The arg pointer varies if it is not a fixed register. */
208 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
210 if (x == pic_offset_table_rtx
211 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
212 /* ??? When call-clobbered, the value is stable modulo the restore
213 that must happen after a call. This currently screws up
214 local-alloc into believing that the restore is not needed, so we
215 must return 0 only if we are called from alias analysis. */
223 /* The operand 0 of a LO_SUM is considered constant
224 (in fact it is related specifically to operand 1)
225 during alias analysis. */
226 return (! for_alias && rtx_varies_p (XEXP (x, 0), for_alias))
227 || rtx_varies_p (XEXP (x, 1), for_alias);
230 if (MEM_VOLATILE_P (x))
239 fmt = GET_RTX_FORMAT (code);
240 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
243 if (rtx_varies_p (XEXP (x, i), for_alias))
246 else if (fmt[i] == 'E')
249 for (j = 0; j < XVECLEN (x, i); j++)
250 if (rtx_varies_p (XVECEXP (x, i, j), for_alias))
257 /* Return nonzero if the use of X as an address in a MEM can cause a trap.
258 MODE is the mode of the MEM (not that of X) and UNALIGNED_MEMS controls
259 whether nonzero is returned for unaligned memory accesses on strict
260 alignment machines. */
263 rtx_addr_can_trap_p_1 (rtx x, enum machine_mode mode, bool unaligned_mems)
265 enum rtx_code code = GET_CODE (x);
270 return SYMBOL_REF_WEAK (x);
276 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
277 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
278 || x == stack_pointer_rtx
279 /* The arg pointer varies if it is not a fixed register. */
280 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
282 /* All of the virtual frame registers are stack references. */
283 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
284 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
289 return rtx_addr_can_trap_p_1 (XEXP (x, 0), mode, unaligned_mems);
292 /* An address is assumed not to trap if:
293 - it is an address that can't trap plus a constant integer,
294 with the proper remainder modulo the mode size if we are
295 considering unaligned memory references. */
296 if (!rtx_addr_can_trap_p_1 (XEXP (x, 0), mode, unaligned_mems)
297 && GET_CODE (XEXP (x, 1)) == CONST_INT)
299 HOST_WIDE_INT offset;
301 if (!STRICT_ALIGNMENT
303 || GET_MODE_SIZE (mode) == 0)
306 offset = INTVAL (XEXP (x, 1));
308 #ifdef SPARC_STACK_BOUNDARY_HACK
309 /* ??? The SPARC port may claim a STACK_BOUNDARY higher than
310 the real alignment of %sp. However, when it does this, the
311 alignment of %sp+STACK_POINTER_OFFSET is STACK_BOUNDARY. */
312 if (SPARC_STACK_BOUNDARY_HACK
313 && (XEXP (x, 0) == stack_pointer_rtx
314 || XEXP (x, 0) == hard_frame_pointer_rtx))
315 offset -= STACK_POINTER_OFFSET;
318 return offset % GET_MODE_SIZE (mode) != 0;
321 /* - or it is the pic register plus a constant. */
322 if (XEXP (x, 0) == pic_offset_table_rtx && CONSTANT_P (XEXP (x, 1)))
329 return rtx_addr_can_trap_p_1 (XEXP (x, 1), mode, unaligned_mems);
336 return rtx_addr_can_trap_p_1 (XEXP (x, 0), mode, unaligned_mems);
342 /* If it isn't one of the case above, it can cause a trap. */
346 /* Return nonzero if the use of X as an address in a MEM can cause a trap. */
349 rtx_addr_can_trap_p (rtx x)
351 return rtx_addr_can_trap_p_1 (x, VOIDmode, false);
354 /* Return true if X is an address that is known to not be zero. */
357 nonzero_address_p (rtx x)
359 enum rtx_code code = GET_CODE (x);
364 return !SYMBOL_REF_WEAK (x);
370 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
371 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
372 || x == stack_pointer_rtx
373 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
375 /* All of the virtual frame registers are stack references. */
376 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
377 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
382 return nonzero_address_p (XEXP (x, 0));
385 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
386 return nonzero_address_p (XEXP (x, 0));
387 /* Handle PIC references. */
388 else if (XEXP (x, 0) == pic_offset_table_rtx
389 && CONSTANT_P (XEXP (x, 1)))
394 /* Similar to the above; allow positive offsets. Further, since
395 auto-inc is only allowed in memories, the register must be a
397 if (GET_CODE (XEXP (x, 1)) == CONST_INT
398 && INTVAL (XEXP (x, 1)) > 0)
400 return nonzero_address_p (XEXP (x, 0));
403 /* Similarly. Further, the offset is always positive. */
410 return nonzero_address_p (XEXP (x, 0));
413 return nonzero_address_p (XEXP (x, 1));
419 /* If it isn't one of the case above, might be zero. */
423 /* Return 1 if X refers to a memory location whose address
424 cannot be compared reliably with constant addresses,
425 or if X refers to a BLKmode memory object.
426 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
427 zero, we are slightly more conservative. */
430 rtx_addr_varies_p (rtx x, int for_alias)
441 return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0), for_alias);
443 fmt = GET_RTX_FORMAT (code);
444 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
447 if (rtx_addr_varies_p (XEXP (x, i), for_alias))
450 else if (fmt[i] == 'E')
453 for (j = 0; j < XVECLEN (x, i); j++)
454 if (rtx_addr_varies_p (XVECEXP (x, i, j), for_alias))
460 /* Return the value of the integer term in X, if one is apparent;
462 Only obvious integer terms are detected.
463 This is used in cse.c with the `related_value' field. */
466 get_integer_term (rtx x)
468 if (GET_CODE (x) == CONST)
471 if (GET_CODE (x) == MINUS
472 && GET_CODE (XEXP (x, 1)) == CONST_INT)
473 return - INTVAL (XEXP (x, 1));
474 if (GET_CODE (x) == PLUS
475 && GET_CODE (XEXP (x, 1)) == CONST_INT)
476 return INTVAL (XEXP (x, 1));
480 /* If X is a constant, return the value sans apparent integer term;
482 Only obvious integer terms are detected. */
485 get_related_value (rtx x)
487 if (GET_CODE (x) != CONST)
490 if (GET_CODE (x) == PLUS
491 && GET_CODE (XEXP (x, 1)) == CONST_INT)
493 else if (GET_CODE (x) == MINUS
494 && GET_CODE (XEXP (x, 1)) == CONST_INT)
499 /* Return the number of places FIND appears within X. If COUNT_DEST is
500 zero, we do not count occurrences inside the destination of a SET. */
503 count_occurrences (rtx x, rtx find, int count_dest)
507 const char *format_ptr;
528 count = count_occurrences (XEXP (x, 0), find, count_dest);
530 count += count_occurrences (XEXP (x, 1), find, count_dest);
534 if (MEM_P (find) && rtx_equal_p (x, find))
539 if (SET_DEST (x) == find && ! count_dest)
540 return count_occurrences (SET_SRC (x), find, count_dest);
547 format_ptr = GET_RTX_FORMAT (code);
550 for (i = 0; i < GET_RTX_LENGTH (code); i++)
552 switch (*format_ptr++)
555 count += count_occurrences (XEXP (x, i), find, count_dest);
559 for (j = 0; j < XVECLEN (x, i); j++)
560 count += count_occurrences (XVECEXP (x, i, j), find, count_dest);
567 /* Nonzero if register REG appears somewhere within IN.
568 Also works if REG is not a register; in this case it checks
569 for a subexpression of IN that is Lisp "equal" to REG. */
572 reg_mentioned_p (rtx reg, rtx in)
584 if (GET_CODE (in) == LABEL_REF)
585 return reg == XEXP (in, 0);
587 code = GET_CODE (in);
591 /* Compare registers by number. */
593 return REG_P (reg) && REGNO (in) == REGNO (reg);
595 /* These codes have no constituent expressions
605 /* These are kept unique for a given value. */
612 if (GET_CODE (reg) == code && rtx_equal_p (reg, in))
615 fmt = GET_RTX_FORMAT (code);
617 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
622 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
623 if (reg_mentioned_p (reg, XVECEXP (in, i, j)))
626 else if (fmt[i] == 'e'
627 && reg_mentioned_p (reg, XEXP (in, i)))
633 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
634 no CODE_LABEL insn. */
637 no_labels_between_p (rtx beg, rtx end)
642 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
648 /* Nonzero if register REG is used in an insn between
649 FROM_INSN and TO_INSN (exclusive of those two). */
652 reg_used_between_p (rtx reg, rtx from_insn, rtx to_insn)
656 if (from_insn == to_insn)
659 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
661 && (reg_overlap_mentioned_p (reg, PATTERN (insn))
662 || (CALL_P (insn) && find_reg_fusage (insn, USE, reg))))
667 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
668 is entirely replaced by a new value and the only use is as a SET_DEST,
669 we do not consider it a reference. */
672 reg_referenced_p (rtx x, rtx body)
676 switch (GET_CODE (body))
679 if (reg_overlap_mentioned_p (x, SET_SRC (body)))
682 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
683 of a REG that occupies all of the REG, the insn references X if
684 it is mentioned in the destination. */
685 if (GET_CODE (SET_DEST (body)) != CC0
686 && GET_CODE (SET_DEST (body)) != PC
687 && !REG_P (SET_DEST (body))
688 && ! (GET_CODE (SET_DEST (body)) == SUBREG
689 && REG_P (SUBREG_REG (SET_DEST (body)))
690 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body))))
691 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
692 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body)))
693 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
694 && reg_overlap_mentioned_p (x, SET_DEST (body)))
699 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
700 if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i)))
707 return reg_overlap_mentioned_p (x, body);
710 return reg_overlap_mentioned_p (x, TRAP_CONDITION (body));
713 return reg_overlap_mentioned_p (x, XEXP (body, 0));
716 case UNSPEC_VOLATILE:
717 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
718 if (reg_overlap_mentioned_p (x, XVECEXP (body, 0, i)))
723 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
724 if (reg_referenced_p (x, XVECEXP (body, 0, i)))
729 if (MEM_P (XEXP (body, 0)))
730 if (reg_overlap_mentioned_p (x, XEXP (XEXP (body, 0), 0)))
735 if (reg_overlap_mentioned_p (x, COND_EXEC_TEST (body)))
737 return reg_referenced_p (x, COND_EXEC_CODE (body));
744 /* Nonzero if register REG is set or clobbered in an insn between
745 FROM_INSN and TO_INSN (exclusive of those two). */
748 reg_set_between_p (rtx reg, rtx from_insn, rtx to_insn)
752 if (from_insn == to_insn)
755 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
756 if (INSN_P (insn) && reg_set_p (reg, insn))
761 /* Internals of reg_set_between_p. */
763 reg_set_p (rtx reg, rtx insn)
765 /* We can be passed an insn or part of one. If we are passed an insn,
766 check if a side-effect of the insn clobbers REG. */
768 && (FIND_REG_INC_NOTE (insn, reg)
771 && REGNO (reg) < FIRST_PSEUDO_REGISTER
772 && TEST_HARD_REG_BIT (regs_invalidated_by_call,
775 || find_reg_fusage (insn, CLOBBER, reg)))))
778 return set_of (reg, insn) != NULL_RTX;
781 /* Similar to reg_set_between_p, but check all registers in X. Return 0
782 only if none of them are modified between START and END. Return 1 if
783 X contains a MEM; this routine does usememory aliasing. */
786 modified_between_p (rtx x, rtx start, rtx end)
788 enum rtx_code code = GET_CODE (x);
811 if (modified_between_p (XEXP (x, 0), start, end))
813 if (MEM_READONLY_P (x))
815 for (insn = NEXT_INSN (start); insn != end; insn = NEXT_INSN (insn))
816 if (memory_modified_in_insn_p (x, insn))
822 return reg_set_between_p (x, start, end);
828 fmt = GET_RTX_FORMAT (code);
829 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
831 if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end))
834 else if (fmt[i] == 'E')
835 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
836 if (modified_between_p (XVECEXP (x, i, j), start, end))
843 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
844 of them are modified in INSN. Return 1 if X contains a MEM; this routine
845 does use memory aliasing. */
848 modified_in_p (rtx x, rtx insn)
850 enum rtx_code code = GET_CODE (x);
869 if (modified_in_p (XEXP (x, 0), insn))
871 if (MEM_READONLY_P (x))
873 if (memory_modified_in_insn_p (x, insn))
879 return reg_set_p (x, insn);
885 fmt = GET_RTX_FORMAT (code);
886 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
888 if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn))
891 else if (fmt[i] == 'E')
892 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
893 if (modified_in_p (XVECEXP (x, i, j), insn))
900 /* Helper function for set_of. */
908 set_of_1 (rtx x, rtx pat, void *data1)
910 struct set_of_data *data = (struct set_of_data *) (data1);
911 if (rtx_equal_p (x, data->pat)
912 || (!MEM_P (x) && reg_overlap_mentioned_p (data->pat, x)))
916 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
917 (either directly or via STRICT_LOW_PART and similar modifiers). */
919 set_of (rtx pat, rtx insn)
921 struct set_of_data data;
922 data.found = NULL_RTX;
924 note_stores (INSN_P (insn) ? PATTERN (insn) : insn, set_of_1, &data);
928 /* Given an INSN, return a SET expression if this insn has only a single SET.
929 It may also have CLOBBERs, USEs, or SET whose output
930 will not be used, which we ignore. */
933 single_set_2 (rtx insn, rtx pat)
936 int set_verified = 1;
939 if (GET_CODE (pat) == PARALLEL)
941 for (i = 0; i < XVECLEN (pat, 0); i++)
943 rtx sub = XVECEXP (pat, 0, i);
944 switch (GET_CODE (sub))
951 /* We can consider insns having multiple sets, where all
952 but one are dead as single set insns. In common case
953 only single set is present in the pattern so we want
954 to avoid checking for REG_UNUSED notes unless necessary.
956 When we reach set first time, we just expect this is
957 the single set we are looking for and only when more
958 sets are found in the insn, we check them. */
961 if (find_reg_note (insn, REG_UNUSED, SET_DEST (set))
962 && !side_effects_p (set))
968 set = sub, set_verified = 0;
969 else if (!find_reg_note (insn, REG_UNUSED, SET_DEST (sub))
970 || side_effects_p (sub))
982 /* Given an INSN, return nonzero if it has more than one SET, else return
986 multiple_sets (rtx insn)
991 /* INSN must be an insn. */
995 /* Only a PARALLEL can have multiple SETs. */
996 if (GET_CODE (PATTERN (insn)) == PARALLEL)
998 for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++)
999 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
1001 /* If we have already found a SET, then return now. */
1009 /* Either zero or one SET. */
1013 /* Return nonzero if the destination of SET equals the source
1014 and there are no side effects. */
1017 set_noop_p (rtx set)
1019 rtx src = SET_SRC (set);
1020 rtx dst = SET_DEST (set);
1022 if (dst == pc_rtx && src == pc_rtx)
1025 if (MEM_P (dst) && MEM_P (src))
1026 return rtx_equal_p (dst, src) && !side_effects_p (dst);
1028 if (GET_CODE (dst) == ZERO_EXTRACT)
1029 return rtx_equal_p (XEXP (dst, 0), src)
1030 && ! BYTES_BIG_ENDIAN && XEXP (dst, 2) == const0_rtx
1031 && !side_effects_p (src);
1033 if (GET_CODE (dst) == STRICT_LOW_PART)
1034 dst = XEXP (dst, 0);
1036 if (GET_CODE (src) == SUBREG && GET_CODE (dst) == SUBREG)
1038 if (SUBREG_BYTE (src) != SUBREG_BYTE (dst))
1040 src = SUBREG_REG (src);
1041 dst = SUBREG_REG (dst);
1044 return (REG_P (src) && REG_P (dst)
1045 && REGNO (src) == REGNO (dst));
1048 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1052 noop_move_p (rtx insn)
1054 rtx pat = PATTERN (insn);
1056 if (INSN_CODE (insn) == NOOP_MOVE_INSN_CODE)
1059 /* Insns carrying these notes are useful later on. */
1060 if (find_reg_note (insn, REG_EQUAL, NULL_RTX))
1063 /* For now treat an insn with a REG_RETVAL note as a
1064 a special insn which should not be considered a no-op. */
1065 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
1068 if (GET_CODE (pat) == SET && set_noop_p (pat))
1071 if (GET_CODE (pat) == PARALLEL)
1074 /* If nothing but SETs of registers to themselves,
1075 this insn can also be deleted. */
1076 for (i = 0; i < XVECLEN (pat, 0); i++)
1078 rtx tem = XVECEXP (pat, 0, i);
1080 if (GET_CODE (tem) == USE
1081 || GET_CODE (tem) == CLOBBER)
1084 if (GET_CODE (tem) != SET || ! set_noop_p (tem))
1094 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1095 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1096 If the object was modified, if we hit a partial assignment to X, or hit a
1097 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1098 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1102 find_last_value (rtx x, rtx *pinsn, rtx valid_to, int allow_hwreg)
1106 for (p = PREV_INSN (*pinsn); p && !LABEL_P (p);
1110 rtx set = single_set (p);
1111 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
1113 if (set && rtx_equal_p (x, SET_DEST (set)))
1115 rtx src = SET_SRC (set);
1117 if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
1118 src = XEXP (note, 0);
1120 if ((valid_to == NULL_RTX
1121 || ! modified_between_p (src, PREV_INSN (p), valid_to))
1122 /* Reject hard registers because we don't usually want
1123 to use them; we'd rather use a pseudo. */
1125 && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg))
1132 /* If set in non-simple way, we don't have a value. */
1133 if (reg_set_p (x, p))
1140 /* Return nonzero if register in range [REGNO, ENDREGNO)
1141 appears either explicitly or implicitly in X
1142 other than being stored into.
1144 References contained within the substructure at LOC do not count.
1145 LOC may be zero, meaning don't ignore anything. */
1148 refers_to_regno_p (unsigned int regno, unsigned int endregno, rtx x,
1152 unsigned int x_regno;
1157 /* The contents of a REG_NONNEG note is always zero, so we must come here
1158 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1162 code = GET_CODE (x);
1167 x_regno = REGNO (x);
1169 /* If we modifying the stack, frame, or argument pointer, it will
1170 clobber a virtual register. In fact, we could be more precise,
1171 but it isn't worth it. */
1172 if ((x_regno == STACK_POINTER_REGNUM
1173 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1174 || x_regno == ARG_POINTER_REGNUM
1176 || x_regno == FRAME_POINTER_REGNUM)
1177 && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER)
1180 return (endregno > x_regno
1181 && regno < x_regno + (x_regno < FIRST_PSEUDO_REGISTER
1182 ? hard_regno_nregs[x_regno][GET_MODE (x)]
1186 /* If this is a SUBREG of a hard reg, we can see exactly which
1187 registers are being modified. Otherwise, handle normally. */
1188 if (REG_P (SUBREG_REG (x))
1189 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
1191 unsigned int inner_regno = subreg_regno (x);
1192 unsigned int inner_endregno
1193 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
1194 ? subreg_nregs (x) : 1);
1196 return endregno > inner_regno && regno < inner_endregno;
1202 if (&SET_DEST (x) != loc
1203 /* Note setting a SUBREG counts as referring to the REG it is in for
1204 a pseudo but not for hard registers since we can
1205 treat each word individually. */
1206 && ((GET_CODE (SET_DEST (x)) == SUBREG
1207 && loc != &SUBREG_REG (SET_DEST (x))
1208 && REG_P (SUBREG_REG (SET_DEST (x)))
1209 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
1210 && refers_to_regno_p (regno, endregno,
1211 SUBREG_REG (SET_DEST (x)), loc))
1212 || (!REG_P (SET_DEST (x))
1213 && refers_to_regno_p (regno, endregno, SET_DEST (x), loc))))
1216 if (code == CLOBBER || loc == &SET_SRC (x))
1225 /* X does not match, so try its subexpressions. */
1227 fmt = GET_RTX_FORMAT (code);
1228 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1230 if (fmt[i] == 'e' && loc != &XEXP (x, i))
1238 if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc))
1241 else if (fmt[i] == 'E')
1244 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1245 if (loc != &XVECEXP (x, i, j)
1246 && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc))
1253 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1254 we check if any register number in X conflicts with the relevant register
1255 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1256 contains a MEM (we don't bother checking for memory addresses that can't
1257 conflict because we expect this to be a rare case. */
1260 reg_overlap_mentioned_p (rtx x, rtx in)
1262 unsigned int regno, endregno;
1264 /* If either argument is a constant, then modifying X can not
1265 affect IN. Here we look at IN, we can profitably combine
1266 CONSTANT_P (x) with the switch statement below. */
1267 if (CONSTANT_P (in))
1271 switch (GET_CODE (x))
1273 case STRICT_LOW_PART:
1276 /* Overly conservative. */
1281 regno = REGNO (SUBREG_REG (x));
1282 if (regno < FIRST_PSEUDO_REGISTER)
1283 regno = subreg_regno (x);
1284 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
1285 ? subreg_nregs (x) : 1);
1290 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
1291 ? hard_regno_nregs[regno][GET_MODE (x)] : 1);
1293 return refers_to_regno_p (regno, endregno, in, (rtx*) 0);
1303 fmt = GET_RTX_FORMAT (GET_CODE (in));
1304 for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--)
1307 if (reg_overlap_mentioned_p (x, XEXP (in, i)))
1310 else if (fmt[i] == 'E')
1313 for (j = XVECLEN (in, i) - 1; j >= 0; --j)
1314 if (reg_overlap_mentioned_p (x, XVECEXP (in, i, j)))
1324 return reg_mentioned_p (x, in);
1330 /* If any register in here refers to it we return true. */
1331 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1332 if (XEXP (XVECEXP (x, 0, i), 0) != 0
1333 && reg_overlap_mentioned_p (XEXP (XVECEXP (x, 0, i), 0), in))
1339 gcc_assert (CONSTANT_P (x));
1344 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1345 (X would be the pattern of an insn).
1346 FUN receives two arguments:
1347 the REG, MEM, CC0 or PC being stored in or clobbered,
1348 the SET or CLOBBER rtx that does the store.
1350 If the item being stored in or clobbered is a SUBREG of a hard register,
1351 the SUBREG will be passed. */
1354 note_stores (rtx x, void (*fun) (rtx, rtx, void *), void *data)
1358 if (GET_CODE (x) == COND_EXEC)
1359 x = COND_EXEC_CODE (x);
1361 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1363 rtx dest = SET_DEST (x);
1365 while ((GET_CODE (dest) == SUBREG
1366 && (!REG_P (SUBREG_REG (dest))
1367 || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER))
1368 || GET_CODE (dest) == ZERO_EXTRACT
1369 || GET_CODE (dest) == STRICT_LOW_PART)
1370 dest = XEXP (dest, 0);
1372 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
1373 each of whose first operand is a register. */
1374 if (GET_CODE (dest) == PARALLEL)
1376 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1377 if (XEXP (XVECEXP (dest, 0, i), 0) != 0)
1378 (*fun) (XEXP (XVECEXP (dest, 0, i), 0), x, data);
1381 (*fun) (dest, x, data);
1384 else if (GET_CODE (x) == PARALLEL)
1385 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1386 note_stores (XVECEXP (x, 0, i), fun, data);
1389 /* Like notes_stores, but call FUN for each expression that is being
1390 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1391 FUN for each expression, not any interior subexpressions. FUN receives a
1392 pointer to the expression and the DATA passed to this function.
1394 Note that this is not quite the same test as that done in reg_referenced_p
1395 since that considers something as being referenced if it is being
1396 partially set, while we do not. */
1399 note_uses (rtx *pbody, void (*fun) (rtx *, void *), void *data)
1404 switch (GET_CODE (body))
1407 (*fun) (&COND_EXEC_TEST (body), data);
1408 note_uses (&COND_EXEC_CODE (body), fun, data);
1412 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
1413 note_uses (&XVECEXP (body, 0, i), fun, data);
1417 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
1418 note_uses (&PATTERN (XVECEXP (body, 0, i)), fun, data);
1422 (*fun) (&XEXP (body, 0), data);
1426 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
1427 (*fun) (&ASM_OPERANDS_INPUT (body, i), data);
1431 (*fun) (&TRAP_CONDITION (body), data);
1435 (*fun) (&XEXP (body, 0), data);
1439 case UNSPEC_VOLATILE:
1440 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
1441 (*fun) (&XVECEXP (body, 0, i), data);
1445 if (MEM_P (XEXP (body, 0)))
1446 (*fun) (&XEXP (XEXP (body, 0), 0), data);
1451 rtx dest = SET_DEST (body);
1453 /* For sets we replace everything in source plus registers in memory
1454 expression in store and operands of a ZERO_EXTRACT. */
1455 (*fun) (&SET_SRC (body), data);
1457 if (GET_CODE (dest) == ZERO_EXTRACT)
1459 (*fun) (&XEXP (dest, 1), data);
1460 (*fun) (&XEXP (dest, 2), data);
1463 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART)
1464 dest = XEXP (dest, 0);
1467 (*fun) (&XEXP (dest, 0), data);
1472 /* All the other possibilities never store. */
1473 (*fun) (pbody, data);
1478 /* Return nonzero if X's old contents don't survive after INSN.
1479 This will be true if X is (cc0) or if X is a register and
1480 X dies in INSN or because INSN entirely sets X.
1482 "Entirely set" means set directly and not through a SUBREG, or
1483 ZERO_EXTRACT, so no trace of the old contents remains.
1484 Likewise, REG_INC does not count.
1486 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1487 but for this use that makes no difference, since regs don't overlap
1488 during their lifetimes. Therefore, this function may be used
1489 at any time after deaths have been computed (in flow.c).
1491 If REG is a hard reg that occupies multiple machine registers, this
1492 function will only return 1 if each of those registers will be replaced
1496 dead_or_set_p (rtx insn, rtx x)
1498 unsigned int regno, last_regno;
1501 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1502 if (GET_CODE (x) == CC0)
1505 gcc_assert (REG_P (x));
1508 last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno
1509 : regno + hard_regno_nregs[regno][GET_MODE (x)] - 1);
1511 for (i = regno; i <= last_regno; i++)
1512 if (! dead_or_set_regno_p (insn, i))
1518 /* Return TRUE iff DEST is a register or subreg of a register and
1519 doesn't change the number of words of the inner register, and any
1520 part of the register is TEST_REGNO. */
1523 covers_regno_no_parallel_p (rtx dest, unsigned int test_regno)
1525 unsigned int regno, endregno;
1527 if (GET_CODE (dest) == SUBREG
1528 && (((GET_MODE_SIZE (GET_MODE (dest))
1529 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1530 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1531 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1532 dest = SUBREG_REG (dest);
1537 regno = REGNO (dest);
1538 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1539 : regno + hard_regno_nregs[regno][GET_MODE (dest)]);
1540 return (test_regno >= regno && test_regno < endregno);
1543 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1544 any member matches the covers_regno_no_parallel_p criteria. */
1547 covers_regno_p (rtx dest, unsigned int test_regno)
1549 if (GET_CODE (dest) == PARALLEL)
1551 /* Some targets place small structures in registers for return
1552 values of functions, and those registers are wrapped in
1553 PARALLELs that we may see as the destination of a SET. */
1556 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1558 rtx inner = XEXP (XVECEXP (dest, 0, i), 0);
1559 if (inner != NULL_RTX
1560 && covers_regno_no_parallel_p (inner, test_regno))
1567 return covers_regno_no_parallel_p (dest, test_regno);
1570 /* Utility function for dead_or_set_p to check an individual register. Also
1571 called from flow.c. */
1574 dead_or_set_regno_p (rtx insn, unsigned int test_regno)
1578 /* See if there is a death note for something that includes TEST_REGNO. */
1579 if (find_regno_note (insn, REG_DEAD, test_regno))
1583 && find_regno_fusage (insn, CLOBBER, test_regno))
1586 pattern = PATTERN (insn);
1588 if (GET_CODE (pattern) == COND_EXEC)
1589 pattern = COND_EXEC_CODE (pattern);
1591 if (GET_CODE (pattern) == SET)
1592 return covers_regno_p (SET_DEST (pattern), test_regno);
1593 else if (GET_CODE (pattern) == PARALLEL)
1597 for (i = XVECLEN (pattern, 0) - 1; i >= 0; i--)
1599 rtx body = XVECEXP (pattern, 0, i);
1601 if (GET_CODE (body) == COND_EXEC)
1602 body = COND_EXEC_CODE (body);
1604 if ((GET_CODE (body) == SET || GET_CODE (body) == CLOBBER)
1605 && covers_regno_p (SET_DEST (body), test_regno))
1613 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1614 If DATUM is nonzero, look for one whose datum is DATUM. */
1617 find_reg_note (rtx insn, enum reg_note kind, rtx datum)
1623 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1624 if (! INSN_P (insn))
1628 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1629 if (REG_NOTE_KIND (link) == kind)
1634 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1635 if (REG_NOTE_KIND (link) == kind && datum == XEXP (link, 0))
1640 /* Return the reg-note of kind KIND in insn INSN which applies to register
1641 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1642 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1643 it might be the case that the note overlaps REGNO. */
1646 find_regno_note (rtx insn, enum reg_note kind, unsigned int regno)
1650 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1651 if (! INSN_P (insn))
1654 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1655 if (REG_NOTE_KIND (link) == kind
1656 /* Verify that it is a register, so that scratch and MEM won't cause a
1658 && REG_P (XEXP (link, 0))
1659 && REGNO (XEXP (link, 0)) <= regno
1660 && ((REGNO (XEXP (link, 0))
1661 + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1
1662 : hard_regno_nregs[REGNO (XEXP (link, 0))]
1663 [GET_MODE (XEXP (link, 0))]))
1669 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1673 find_reg_equal_equiv_note (rtx insn)
1680 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1681 if (REG_NOTE_KIND (link) == REG_EQUAL
1682 || REG_NOTE_KIND (link) == REG_EQUIV)
1684 /* FIXME: We should never have REG_EQUAL/REG_EQUIV notes on
1685 insns that have multiple sets. Checking single_set to
1686 make sure of this is not the proper check, as explained
1687 in the comment in set_unique_reg_note.
1689 This should be changed into an assert. */
1690 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
1697 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1698 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1701 find_reg_fusage (rtx insn, enum rtx_code code, rtx datum)
1703 /* If it's not a CALL_INSN, it can't possibly have a
1704 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1714 for (link = CALL_INSN_FUNCTION_USAGE (insn);
1716 link = XEXP (link, 1))
1717 if (GET_CODE (XEXP (link, 0)) == code
1718 && rtx_equal_p (datum, XEXP (XEXP (link, 0), 0)))
1723 unsigned int regno = REGNO (datum);
1725 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1726 to pseudo registers, so don't bother checking. */
1728 if (regno < FIRST_PSEUDO_REGISTER)
1730 unsigned int end_regno
1731 = regno + hard_regno_nregs[regno][GET_MODE (datum)];
1734 for (i = regno; i < end_regno; i++)
1735 if (find_regno_fusage (insn, code, i))
1743 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1744 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1747 find_regno_fusage (rtx insn, enum rtx_code code, unsigned int regno)
1751 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1752 to pseudo registers, so don't bother checking. */
1754 if (regno >= FIRST_PSEUDO_REGISTER
1758 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1760 unsigned int regnote;
1763 if (GET_CODE (op = XEXP (link, 0)) == code
1764 && REG_P (reg = XEXP (op, 0))
1765 && (regnote = REGNO (reg)) <= regno
1766 && regnote + hard_regno_nregs[regnote][GET_MODE (reg)] > regno)
1773 /* Return true if INSN is a call to a pure function. */
1776 pure_call_p (rtx insn)
1780 if (!CALL_P (insn) || ! CONST_OR_PURE_CALL_P (insn))
1783 /* Look for the note that differentiates const and pure functions. */
1784 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1788 if (GET_CODE (u = XEXP (link, 0)) == USE
1789 && MEM_P (m = XEXP (u, 0)) && GET_MODE (m) == BLKmode
1790 && GET_CODE (XEXP (m, 0)) == SCRATCH)
1797 /* Remove register note NOTE from the REG_NOTES of INSN. */
1800 remove_note (rtx insn, rtx note)
1804 if (note == NULL_RTX)
1807 if (REG_NOTES (insn) == note)
1809 REG_NOTES (insn) = XEXP (note, 1);
1813 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1814 if (XEXP (link, 1) == note)
1816 XEXP (link, 1) = XEXP (note, 1);
1823 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1824 return 1 if it is found. A simple equality test is used to determine if
1828 in_expr_list_p (rtx listp, rtx node)
1832 for (x = listp; x; x = XEXP (x, 1))
1833 if (node == XEXP (x, 0))
1839 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1840 remove that entry from the list if it is found.
1842 A simple equality test is used to determine if NODE matches. */
1845 remove_node_from_expr_list (rtx node, rtx *listp)
1848 rtx prev = NULL_RTX;
1852 if (node == XEXP (temp, 0))
1854 /* Splice the node out of the list. */
1856 XEXP (prev, 1) = XEXP (temp, 1);
1858 *listp = XEXP (temp, 1);
1864 temp = XEXP (temp, 1);
1868 /* Nonzero if X contains any volatile instructions. These are instructions
1869 which may cause unpredictable machine state instructions, and thus no
1870 instructions should be moved or combined across them. This includes
1871 only volatile asms and UNSPEC_VOLATILE instructions. */
1874 volatile_insn_p (rtx x)
1878 code = GET_CODE (x);
1898 case UNSPEC_VOLATILE:
1899 /* case TRAP_IF: This isn't clear yet. */
1904 if (MEM_VOLATILE_P (x))
1911 /* Recursively scan the operands of this expression. */
1914 const char *fmt = GET_RTX_FORMAT (code);
1917 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1921 if (volatile_insn_p (XEXP (x, i)))
1924 else if (fmt[i] == 'E')
1927 for (j = 0; j < XVECLEN (x, i); j++)
1928 if (volatile_insn_p (XVECEXP (x, i, j)))
1936 /* Nonzero if X contains any volatile memory references
1937 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
1940 volatile_refs_p (rtx x)
1944 code = GET_CODE (x);
1962 case UNSPEC_VOLATILE:
1968 if (MEM_VOLATILE_P (x))
1975 /* Recursively scan the operands of this expression. */
1978 const char *fmt = GET_RTX_FORMAT (code);
1981 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1985 if (volatile_refs_p (XEXP (x, i)))
1988 else if (fmt[i] == 'E')
1991 for (j = 0; j < XVECLEN (x, i); j++)
1992 if (volatile_refs_p (XVECEXP (x, i, j)))
2000 /* Similar to above, except that it also rejects register pre- and post-
2004 side_effects_p (rtx x)
2008 code = GET_CODE (x);
2026 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
2027 when some combination can't be done. If we see one, don't think
2028 that we can simplify the expression. */
2029 return (GET_MODE (x) != VOIDmode);
2038 case UNSPEC_VOLATILE:
2039 /* case TRAP_IF: This isn't clear yet. */
2045 if (MEM_VOLATILE_P (x))
2052 /* Recursively scan the operands of this expression. */
2055 const char *fmt = GET_RTX_FORMAT (code);
2058 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2062 if (side_effects_p (XEXP (x, i)))
2065 else if (fmt[i] == 'E')
2068 for (j = 0; j < XVECLEN (x, i); j++)
2069 if (side_effects_p (XVECEXP (x, i, j)))
2077 enum may_trap_p_flags
2079 MTP_UNALIGNED_MEMS = 1,
2082 /* Return nonzero if evaluating rtx X might cause a trap.
2083 (FLAGS & MTP_UNALIGNED_MEMS) controls whether nonzero is returned for
2084 unaligned memory accesses on strict alignment machines. If
2085 (FLAGS & AFTER_MOVE) is true, returns nonzero even in case the expression
2086 cannot trap at its current location, but it might become trapping if moved
2090 may_trap_p_1 (rtx x, unsigned flags)
2095 bool unaligned_mems = (flags & MTP_UNALIGNED_MEMS) != 0;
2099 code = GET_CODE (x);
2102 /* Handle these cases quickly. */
2116 case UNSPEC_VOLATILE:
2121 return MEM_VOLATILE_P (x);
2123 /* Memory ref can trap unless it's a static var or a stack slot. */
2125 if (/* MEM_NOTRAP_P only relates to the actual position of the memory
2126 reference; moving it out of condition might cause its address
2128 !(flags & MTP_AFTER_MOVE)
2130 && (!STRICT_ALIGNMENT || !unaligned_mems))
2133 rtx_addr_can_trap_p_1 (XEXP (x, 0), GET_MODE (x), unaligned_mems);
2135 /* Division by a non-constant might trap. */
2140 if (HONOR_SNANS (GET_MODE (x)))
2142 if (SCALAR_FLOAT_MODE_P (GET_MODE (x)))
2143 return flag_trapping_math;
2144 if (!CONSTANT_P (XEXP (x, 1)) || (XEXP (x, 1) == const0_rtx))
2149 /* An EXPR_LIST is used to represent a function call. This
2150 certainly may trap. */
2159 /* Some floating point comparisons may trap. */
2160 if (!flag_trapping_math)
2162 /* ??? There is no machine independent way to check for tests that trap
2163 when COMPARE is used, though many targets do make this distinction.
2164 For instance, sparc uses CCFPE for compares which generate exceptions
2165 and CCFP for compares which do not generate exceptions. */
2166 if (HONOR_NANS (GET_MODE (x)))
2168 /* But often the compare has some CC mode, so check operand
2170 if (HONOR_NANS (GET_MODE (XEXP (x, 0)))
2171 || HONOR_NANS (GET_MODE (XEXP (x, 1))))
2177 if (HONOR_SNANS (GET_MODE (x)))
2179 /* Often comparison is CC mode, so check operand modes. */
2180 if (HONOR_SNANS (GET_MODE (XEXP (x, 0)))
2181 || HONOR_SNANS (GET_MODE (XEXP (x, 1))))
2186 /* Conversion of floating point might trap. */
2187 if (flag_trapping_math && HONOR_NANS (GET_MODE (XEXP (x, 0))))
2194 /* These operations don't trap even with floating point. */
2198 /* Any floating arithmetic may trap. */
2199 if (SCALAR_FLOAT_MODE_P (GET_MODE (x))
2200 && flag_trapping_math)
2204 fmt = GET_RTX_FORMAT (code);
2205 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2209 if (may_trap_p_1 (XEXP (x, i), flags))
2212 else if (fmt[i] == 'E')
2215 for (j = 0; j < XVECLEN (x, i); j++)
2216 if (may_trap_p_1 (XVECEXP (x, i, j), flags))
2223 /* Return nonzero if evaluating rtx X might cause a trap. */
2228 return may_trap_p_1 (x, 0);
2231 /* Return nonzero if evaluating rtx X might cause a trap, when the expression
2232 is moved from its current location by some optimization. */
2235 may_trap_after_code_motion_p (rtx x)
2237 return may_trap_p_1 (x, MTP_AFTER_MOVE);
2240 /* Same as above, but additionally return nonzero if evaluating rtx X might
2241 cause a fault. We define a fault for the purpose of this function as a
2242 erroneous execution condition that cannot be encountered during the normal
2243 execution of a valid program; the typical example is an unaligned memory
2244 access on a strict alignment machine. The compiler guarantees that it
2245 doesn't generate code that will fault from a valid program, but this
2246 guarantee doesn't mean anything for individual instructions. Consider
2247 the following example:
2249 struct S { int d; union { char *cp; int *ip; }; };
2251 int foo(struct S *s)
2259 on a strict alignment machine. In a valid program, foo will never be
2260 invoked on a structure for which d is equal to 1 and the underlying
2261 unique field of the union not aligned on a 4-byte boundary, but the
2262 expression *s->ip might cause a fault if considered individually.
2264 At the RTL level, potentially problematic expressions will almost always
2265 verify may_trap_p; for example, the above dereference can be emitted as
2266 (mem:SI (reg:P)) and this expression is may_trap_p for a generic register.
2267 However, suppose that foo is inlined in a caller that causes s->cp to
2268 point to a local character variable and guarantees that s->d is not set
2269 to 1; foo may have been effectively translated into pseudo-RTL as:
2272 (set (reg:SI) (mem:SI (%fp - 7)))
2274 (set (reg:QI) (mem:QI (%fp - 7)))
2276 Now (mem:SI (%fp - 7)) is considered as not may_trap_p since it is a
2277 memory reference to a stack slot, but it will certainly cause a fault
2278 on a strict alignment machine. */
2281 may_trap_or_fault_p (rtx x)
2283 return may_trap_p_1 (x, MTP_UNALIGNED_MEMS);
2286 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2287 i.e., an inequality. */
2290 inequality_comparisons_p (rtx x)
2294 enum rtx_code code = GET_CODE (x);
2324 len = GET_RTX_LENGTH (code);
2325 fmt = GET_RTX_FORMAT (code);
2327 for (i = 0; i < len; i++)
2331 if (inequality_comparisons_p (XEXP (x, i)))
2334 else if (fmt[i] == 'E')
2337 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2338 if (inequality_comparisons_p (XVECEXP (x, i, j)))
2346 /* Replace any occurrence of FROM in X with TO. The function does
2347 not enter into CONST_DOUBLE for the replace.
2349 Note that copying is not done so X must not be shared unless all copies
2350 are to be modified. */
2353 replace_rtx (rtx x, rtx from, rtx to)
2358 /* The following prevents loops occurrence when we change MEM in
2359 CONST_DOUBLE onto the same CONST_DOUBLE. */
2360 if (x != 0 && GET_CODE (x) == CONST_DOUBLE)
2366 /* Allow this function to make replacements in EXPR_LISTs. */
2370 if (GET_CODE (x) == SUBREG)
2372 rtx new = replace_rtx (SUBREG_REG (x), from, to);
2374 if (GET_CODE (new) == CONST_INT)
2376 x = simplify_subreg (GET_MODE (x), new,
2377 GET_MODE (SUBREG_REG (x)),
2382 SUBREG_REG (x) = new;
2386 else if (GET_CODE (x) == ZERO_EXTEND)
2388 rtx new = replace_rtx (XEXP (x, 0), from, to);
2390 if (GET_CODE (new) == CONST_INT)
2392 x = simplify_unary_operation (ZERO_EXTEND, GET_MODE (x),
2393 new, GET_MODE (XEXP (x, 0)));
2402 fmt = GET_RTX_FORMAT (GET_CODE (x));
2403 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2406 XEXP (x, i) = replace_rtx (XEXP (x, i), from, to);
2407 else if (fmt[i] == 'E')
2408 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2409 XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to);
2415 /* Replace occurrences of the old label in *X with the new one.
2416 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2419 replace_label (rtx *x, void *data)
2422 rtx old_label = ((replace_label_data *) data)->r1;
2423 rtx new_label = ((replace_label_data *) data)->r2;
2424 bool update_label_nuses = ((replace_label_data *) data)->update_label_nuses;
2429 if (GET_CODE (l) == SYMBOL_REF
2430 && CONSTANT_POOL_ADDRESS_P (l))
2432 rtx c = get_pool_constant (l);
2433 if (rtx_referenced_p (old_label, c))
2436 replace_label_data *d = (replace_label_data *) data;
2438 /* Create a copy of constant C; replace the label inside
2439 but do not update LABEL_NUSES because uses in constant pool
2441 new_c = copy_rtx (c);
2442 d->update_label_nuses = false;
2443 for_each_rtx (&new_c, replace_label, data);
2444 d->update_label_nuses = update_label_nuses;
2446 /* Add the new constant NEW_C to constant pool and replace
2447 the old reference to constant by new reference. */
2448 new_l = XEXP (force_const_mem (get_pool_mode (l), new_c), 0);
2449 *x = replace_rtx (l, l, new_l);
2454 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2455 field. This is not handled by for_each_rtx because it doesn't
2456 handle unprinted ('0') fields. */
2457 if (JUMP_P (l) && JUMP_LABEL (l) == old_label)
2458 JUMP_LABEL (l) = new_label;
2460 if ((GET_CODE (l) == LABEL_REF
2461 || GET_CODE (l) == INSN_LIST)
2462 && XEXP (l, 0) == old_label)
2464 XEXP (l, 0) = new_label;
2465 if (update_label_nuses)
2467 ++LABEL_NUSES (new_label);
2468 --LABEL_NUSES (old_label);
2476 /* When *BODY is equal to X or X is directly referenced by *BODY
2477 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2478 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2481 rtx_referenced_p_1 (rtx *body, void *x)
2485 if (*body == NULL_RTX)
2486 return y == NULL_RTX;
2488 /* Return true if a label_ref *BODY refers to label Y. */
2489 if (GET_CODE (*body) == LABEL_REF && LABEL_P (y))
2490 return XEXP (*body, 0) == y;
2492 /* If *BODY is a reference to pool constant traverse the constant. */
2493 if (GET_CODE (*body) == SYMBOL_REF
2494 && CONSTANT_POOL_ADDRESS_P (*body))
2495 return rtx_referenced_p (y, get_pool_constant (*body));
2497 /* By default, compare the RTL expressions. */
2498 return rtx_equal_p (*body, y);
2501 /* Return true if X is referenced in BODY. */
2504 rtx_referenced_p (rtx x, rtx body)
2506 return for_each_rtx (&body, rtx_referenced_p_1, x);
2509 /* If INSN is a tablejump return true and store the label (before jump table) to
2510 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2513 tablejump_p (rtx insn, rtx *labelp, rtx *tablep)
2518 && (label = JUMP_LABEL (insn)) != NULL_RTX
2519 && (table = next_active_insn (label)) != NULL_RTX
2521 && (GET_CODE (PATTERN (table)) == ADDR_VEC
2522 || GET_CODE (PATTERN (table)) == ADDR_DIFF_VEC))
2533 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2534 constant that is not in the constant pool and not in the condition
2535 of an IF_THEN_ELSE. */
2538 computed_jump_p_1 (rtx x)
2540 enum rtx_code code = GET_CODE (x);
2559 return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
2560 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)));
2563 return (computed_jump_p_1 (XEXP (x, 1))
2564 || computed_jump_p_1 (XEXP (x, 2)));
2570 fmt = GET_RTX_FORMAT (code);
2571 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2574 && computed_jump_p_1 (XEXP (x, i)))
2577 else if (fmt[i] == 'E')
2578 for (j = 0; j < XVECLEN (x, i); j++)
2579 if (computed_jump_p_1 (XVECEXP (x, i, j)))
2586 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2588 Tablejumps and casesi insns are not considered indirect jumps;
2589 we can recognize them by a (use (label_ref)). */
2592 computed_jump_p (rtx insn)
2597 rtx pat = PATTERN (insn);
2599 if (find_reg_note (insn, REG_LABEL, NULL_RTX))
2601 else if (GET_CODE (pat) == PARALLEL)
2603 int len = XVECLEN (pat, 0);
2604 int has_use_labelref = 0;
2606 for (i = len - 1; i >= 0; i--)
2607 if (GET_CODE (XVECEXP (pat, 0, i)) == USE
2608 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0))
2610 has_use_labelref = 1;
2612 if (! has_use_labelref)
2613 for (i = len - 1; i >= 0; i--)
2614 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
2615 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
2616 && computed_jump_p_1 (SET_SRC (XVECEXP (pat, 0, i))))
2619 else if (GET_CODE (pat) == SET
2620 && SET_DEST (pat) == pc_rtx
2621 && computed_jump_p_1 (SET_SRC (pat)))
2627 /* Optimized loop of for_each_rtx, trying to avoid useless recursive
2628 calls. Processes the subexpressions of EXP and passes them to F. */
2630 for_each_rtx_1 (rtx exp, int n, rtx_function f, void *data)
2633 const char *format = GET_RTX_FORMAT (GET_CODE (exp));
2636 for (; format[n] != '\0'; n++)
2643 result = (*f) (x, data);
2645 /* Do not traverse sub-expressions. */
2647 else if (result != 0)
2648 /* Stop the traversal. */
2652 /* There are no sub-expressions. */
2655 i = non_rtx_starting_operands[GET_CODE (*x)];
2658 result = for_each_rtx_1 (*x, i, f, data);
2666 if (XVEC (exp, n) == 0)
2668 for (j = 0; j < XVECLEN (exp, n); ++j)
2671 x = &XVECEXP (exp, n, j);
2672 result = (*f) (x, data);
2674 /* Do not traverse sub-expressions. */
2676 else if (result != 0)
2677 /* Stop the traversal. */
2681 /* There are no sub-expressions. */
2684 i = non_rtx_starting_operands[GET_CODE (*x)];
2687 result = for_each_rtx_1 (*x, i, f, data);
2695 /* Nothing to do. */
2703 /* Traverse X via depth-first search, calling F for each
2704 sub-expression (including X itself). F is also passed the DATA.
2705 If F returns -1, do not traverse sub-expressions, but continue
2706 traversing the rest of the tree. If F ever returns any other
2707 nonzero value, stop the traversal, and return the value returned
2708 by F. Otherwise, return 0. This function does not traverse inside
2709 tree structure that contains RTX_EXPRs, or into sub-expressions
2710 whose format code is `0' since it is not known whether or not those
2711 codes are actually RTL.
2713 This routine is very general, and could (should?) be used to
2714 implement many of the other routines in this file. */
2717 for_each_rtx (rtx *x, rtx_function f, void *data)
2723 result = (*f) (x, data);
2725 /* Do not traverse sub-expressions. */
2727 else if (result != 0)
2728 /* Stop the traversal. */
2732 /* There are no sub-expressions. */
2735 i = non_rtx_starting_operands[GET_CODE (*x)];
2739 return for_each_rtx_1 (*x, i, f, data);
2743 /* Searches X for any reference to REGNO, returning the rtx of the
2744 reference found if any. Otherwise, returns NULL_RTX. */
2747 regno_use_in (unsigned int regno, rtx x)
2753 if (REG_P (x) && REGNO (x) == regno)
2756 fmt = GET_RTX_FORMAT (GET_CODE (x));
2757 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2761 if ((tem = regno_use_in (regno, XEXP (x, i))))
2764 else if (fmt[i] == 'E')
2765 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2766 if ((tem = regno_use_in (regno , XVECEXP (x, i, j))))
2773 /* Return a value indicating whether OP, an operand of a commutative
2774 operation, is preferred as the first or second operand. The higher
2775 the value, the stronger the preference for being the first operand.
2776 We use negative values to indicate a preference for the first operand
2777 and positive values for the second operand. */
2780 commutative_operand_precedence (rtx op)
2782 enum rtx_code code = GET_CODE (op);
2784 /* Constants always come the second operand. Prefer "nice" constants. */
2785 if (code == CONST_INT)
2787 if (code == CONST_DOUBLE)
2789 op = avoid_constant_pool_reference (op);
2790 code = GET_CODE (op);
2792 switch (GET_RTX_CLASS (code))
2795 if (code == CONST_INT)
2797 if (code == CONST_DOUBLE)
2802 /* SUBREGs of objects should come second. */
2803 if (code == SUBREG && OBJECT_P (SUBREG_REG (op)))
2806 if (!CONSTANT_P (op))
2809 /* As for RTX_CONST_OBJ. */
2813 /* Complex expressions should be the first, so decrease priority
2817 case RTX_COMM_ARITH:
2818 /* Prefer operands that are themselves commutative to be first.
2819 This helps to make things linear. In particular,
2820 (and (and (reg) (reg)) (not (reg))) is canonical. */
2824 /* If only one operand is a binary expression, it will be the first
2825 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
2826 is canonical, although it will usually be further simplified. */
2830 /* Then prefer NEG and NOT. */
2831 if (code == NEG || code == NOT)
2839 /* Return 1 iff it is necessary to swap operands of commutative operation
2840 in order to canonicalize expression. */
2843 swap_commutative_operands_p (rtx x, rtx y)
2845 return (commutative_operand_precedence (x)
2846 < commutative_operand_precedence (y));
2849 /* Return 1 if X is an autoincrement side effect and the register is
2850 not the stack pointer. */
2854 switch (GET_CODE (x))
2862 /* There are no REG_INC notes for SP. */
2863 if (XEXP (x, 0) != stack_pointer_rtx)
2871 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
2873 loc_mentioned_in_p (rtx *loc, rtx in)
2882 code = GET_CODE (in);
2883 fmt = GET_RTX_FORMAT (code);
2884 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2886 if (loc == &in->u.fld[i].rt_rtx)
2890 if (loc_mentioned_in_p (loc, XEXP (in, i)))
2893 else if (fmt[i] == 'E')
2894 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
2895 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
2901 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
2902 and SUBREG_BYTE, return the bit offset where the subreg begins
2903 (counting from the least significant bit of the operand). */
2906 subreg_lsb_1 (enum machine_mode outer_mode,
2907 enum machine_mode inner_mode,
2908 unsigned int subreg_byte)
2910 unsigned int bitpos;
2914 /* A paradoxical subreg begins at bit position 0. */
2915 if (GET_MODE_BITSIZE (outer_mode) > GET_MODE_BITSIZE (inner_mode))
2918 if (WORDS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
2919 /* If the subreg crosses a word boundary ensure that
2920 it also begins and ends on a word boundary. */
2921 gcc_assert (!((subreg_byte % UNITS_PER_WORD
2922 + GET_MODE_SIZE (outer_mode)) > UNITS_PER_WORD
2923 && (subreg_byte % UNITS_PER_WORD
2924 || GET_MODE_SIZE (outer_mode) % UNITS_PER_WORD)));
2926 if (WORDS_BIG_ENDIAN)
2927 word = (GET_MODE_SIZE (inner_mode)
2928 - (subreg_byte + GET_MODE_SIZE (outer_mode))) / UNITS_PER_WORD;
2930 word = subreg_byte / UNITS_PER_WORD;
2931 bitpos = word * BITS_PER_WORD;
2933 if (BYTES_BIG_ENDIAN)
2934 byte = (GET_MODE_SIZE (inner_mode)
2935 - (subreg_byte + GET_MODE_SIZE (outer_mode))) % UNITS_PER_WORD;
2937 byte = subreg_byte % UNITS_PER_WORD;
2938 bitpos += byte * BITS_PER_UNIT;
2943 /* Given a subreg X, return the bit offset where the subreg begins
2944 (counting from the least significant bit of the reg). */
2949 return subreg_lsb_1 (GET_MODE (x), GET_MODE (SUBREG_REG (x)),
2953 /* Fill in information about a subreg of a hard register.
2954 xregno - A regno of an inner hard subreg_reg (or what will become one).
2955 xmode - The mode of xregno.
2956 offset - The byte offset.
2957 ymode - The mode of a top level SUBREG (or what may become one).
2958 info - Pointer to structure to fill in. */
2960 subreg_get_info (unsigned int xregno, enum machine_mode xmode,
2961 unsigned int offset, enum machine_mode ymode,
2962 struct subreg_info *info)
2964 int nregs_xmode, nregs_ymode;
2965 int mode_multiple, nregs_multiple;
2966 int offset_adj, y_offset, y_offset_adj;
2967 int regsize_xmode, regsize_ymode;
2970 gcc_assert (xregno < FIRST_PSEUDO_REGISTER);
2974 /* If there are holes in a non-scalar mode in registers, we expect
2975 that it is made up of its units concatenated together. */
2976 if (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode))
2978 enum machine_mode xmode_unit;
2980 nregs_xmode = HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode);
2981 if (GET_MODE_INNER (xmode) == VOIDmode)
2984 xmode_unit = GET_MODE_INNER (xmode);
2985 gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode_unit));
2986 gcc_assert (nregs_xmode
2987 == (GET_MODE_NUNITS (xmode)
2988 * HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode_unit)));
2989 gcc_assert (hard_regno_nregs[xregno][xmode]
2990 == (hard_regno_nregs[xregno][xmode_unit]
2991 * GET_MODE_NUNITS (xmode)));
2993 /* You can only ask for a SUBREG of a value with holes in the middle
2994 if you don't cross the holes. (Such a SUBREG should be done by
2995 picking a different register class, or doing it in memory if
2996 necessary.) An example of a value with holes is XCmode on 32-bit
2997 x86 with -m128bit-long-double; it's represented in 6 32-bit registers,
2998 3 for each part, but in memory it's two 128-bit parts.
2999 Padding is assumed to be at the end (not necessarily the 'high part')
3001 if ((offset / GET_MODE_SIZE (xmode_unit) + 1
3002 < GET_MODE_NUNITS (xmode))
3003 && (offset / GET_MODE_SIZE (xmode_unit)
3004 != ((offset + GET_MODE_SIZE (ymode) - 1)
3005 / GET_MODE_SIZE (xmode_unit))))
3007 info->representable_p = false;
3012 nregs_xmode = hard_regno_nregs[xregno][xmode];
3014 nregs_ymode = hard_regno_nregs[xregno][ymode];
3016 /* Paradoxical subregs are otherwise valid. */
3019 && GET_MODE_SIZE (ymode) > GET_MODE_SIZE (xmode))
3021 info->representable_p = true;
3022 /* If this is a big endian paradoxical subreg, which uses more
3023 actual hard registers than the original register, we must
3024 return a negative offset so that we find the proper highpart
3026 if (GET_MODE_SIZE (ymode) > UNITS_PER_WORD
3027 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN)
3028 info->offset = nregs_xmode - nregs_ymode;
3031 info->nregs = nregs_ymode;
3035 /* If registers store different numbers of bits in the different
3036 modes, we cannot generally form this subreg. */
3037 if (!HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode)
3038 && !HARD_REGNO_NREGS_HAS_PADDING (xregno, ymode)
3039 && (GET_MODE_SIZE (xmode) % nregs_xmode) == 0
3040 && (GET_MODE_SIZE (ymode) % nregs_ymode) == 0)
3042 regsize_xmode = GET_MODE_SIZE (xmode) / nregs_xmode;
3043 regsize_ymode = GET_MODE_SIZE (ymode) / nregs_ymode;
3044 if (!rknown && regsize_xmode > regsize_ymode && nregs_ymode > 1)
3046 info->representable_p = false;
3048 = (GET_MODE_SIZE (ymode) + regsize_xmode - 1) / regsize_xmode;
3049 info->offset = offset / regsize_xmode;
3052 if (!rknown && regsize_ymode > regsize_xmode && nregs_xmode > 1)
3054 info->representable_p = false;
3056 = (GET_MODE_SIZE (ymode) + regsize_xmode - 1) / regsize_xmode;
3057 info->offset = offset / regsize_xmode;
3062 /* Lowpart subregs are otherwise valid. */
3063 if (!rknown && offset == subreg_lowpart_offset (ymode, xmode))
3065 info->representable_p = true;
3068 if (offset == 0 || nregs_xmode == nregs_ymode)
3071 info->nregs = nregs_ymode;
3076 /* This should always pass, otherwise we don't know how to verify
3077 the constraint. These conditions may be relaxed but
3078 subreg_regno_offset would need to be redesigned. */
3079 gcc_assert ((GET_MODE_SIZE (xmode) % GET_MODE_SIZE (ymode)) == 0);
3080 gcc_assert ((nregs_xmode % nregs_ymode) == 0);
3082 /* The XMODE value can be seen as a vector of NREGS_XMODE
3083 values. The subreg must represent a lowpart of given field.
3084 Compute what field it is. */
3085 offset_adj = offset;
3086 offset_adj -= subreg_lowpart_offset (ymode,
3087 mode_for_size (GET_MODE_BITSIZE (xmode)
3091 /* Size of ymode must not be greater than the size of xmode. */
3092 mode_multiple = GET_MODE_SIZE (xmode) / GET_MODE_SIZE (ymode);
3093 gcc_assert (mode_multiple != 0);
3095 y_offset = offset / GET_MODE_SIZE (ymode);
3096 y_offset_adj = offset_adj / GET_MODE_SIZE (ymode);
3097 nregs_multiple = nregs_xmode / nregs_ymode;
3099 gcc_assert ((offset_adj % GET_MODE_SIZE (ymode)) == 0);
3100 gcc_assert ((mode_multiple % nregs_multiple) == 0);
3104 info->representable_p = (!(y_offset_adj % (mode_multiple / nregs_multiple)));
3107 info->offset = (y_offset / (mode_multiple / nregs_multiple)) * nregs_ymode;
3108 info->nregs = nregs_ymode;
3111 /* This function returns the regno offset of a subreg expression.
3112 xregno - A regno of an inner hard subreg_reg (or what will become one).
3113 xmode - The mode of xregno.
3114 offset - The byte offset.
3115 ymode - The mode of a top level SUBREG (or what may become one).
3116 RETURN - The regno offset which would be used. */
3118 subreg_regno_offset (unsigned int xregno, enum machine_mode xmode,
3119 unsigned int offset, enum machine_mode ymode)
3121 struct subreg_info info;
3122 subreg_get_info (xregno, xmode, offset, ymode, &info);
3126 /* This function returns true when the offset is representable via
3127 subreg_offset in the given regno.
3128 xregno - A regno of an inner hard subreg_reg (or what will become one).
3129 xmode - The mode of xregno.
3130 offset - The byte offset.
3131 ymode - The mode of a top level SUBREG (or what may become one).
3132 RETURN - Whether the offset is representable. */
3134 subreg_offset_representable_p (unsigned int xregno, enum machine_mode xmode,
3135 unsigned int offset, enum machine_mode ymode)
3137 struct subreg_info info;
3138 subreg_get_info (xregno, xmode, offset, ymode, &info);
3139 return info.representable_p;
3142 /* Return the final regno that a subreg expression refers to. */
3144 subreg_regno (rtx x)
3147 rtx subreg = SUBREG_REG (x);
3148 int regno = REGNO (subreg);
3150 ret = regno + subreg_regno_offset (regno,
3158 /* Return the number of registers that a subreg expression refers
3161 subreg_nregs (rtx x)
3163 struct subreg_info info;
3164 rtx subreg = SUBREG_REG (x);
3165 int regno = REGNO (subreg);
3167 subreg_get_info (regno, GET_MODE (subreg), SUBREG_BYTE (x), GET_MODE (x),
3172 struct parms_set_data
3178 /* Helper function for noticing stores to parameter registers. */
3180 parms_set (rtx x, rtx pat ATTRIBUTE_UNUSED, void *data)
3182 struct parms_set_data *d = data;
3183 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3184 && TEST_HARD_REG_BIT (d->regs, REGNO (x)))
3186 CLEAR_HARD_REG_BIT (d->regs, REGNO (x));
3191 /* Look backward for first parameter to be loaded.
3192 Note that loads of all parameters will not necessarily be
3193 found if CSE has eliminated some of them (e.g., an argument
3194 to the outer function is passed down as a parameter).
3195 Do not skip BOUNDARY. */
3197 find_first_parameter_load (rtx call_insn, rtx boundary)
3199 struct parms_set_data parm;
3200 rtx p, before, first_set;
3202 /* Since different machines initialize their parameter registers
3203 in different orders, assume nothing. Collect the set of all
3204 parameter registers. */
3205 CLEAR_HARD_REG_SET (parm.regs);
3207 for (p = CALL_INSN_FUNCTION_USAGE (call_insn); p; p = XEXP (p, 1))
3208 if (GET_CODE (XEXP (p, 0)) == USE
3209 && REG_P (XEXP (XEXP (p, 0), 0)))
3211 gcc_assert (REGNO (XEXP (XEXP (p, 0), 0)) < FIRST_PSEUDO_REGISTER);
3213 /* We only care about registers which can hold function
3215 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p, 0), 0))))
3218 SET_HARD_REG_BIT (parm.regs, REGNO (XEXP (XEXP (p, 0), 0)));
3222 first_set = call_insn;
3224 /* Search backward for the first set of a register in this set. */
3225 while (parm.nregs && before != boundary)
3227 before = PREV_INSN (before);
3229 /* It is possible that some loads got CSEed from one call to
3230 another. Stop in that case. */
3231 if (CALL_P (before))
3234 /* Our caller needs either ensure that we will find all sets
3235 (in case code has not been optimized yet), or take care
3236 for possible labels in a way by setting boundary to preceding
3238 if (LABEL_P (before))
3240 gcc_assert (before == boundary);
3244 if (INSN_P (before))
3246 int nregs_old = parm.nregs;
3247 note_stores (PATTERN (before), parms_set, &parm);
3248 /* If we found something that did not set a parameter reg,
3249 we're done. Do not keep going, as that might result
3250 in hoisting an insn before the setting of a pseudo
3251 that is used by the hoisted insn. */
3252 if (nregs_old != parm.nregs)
3261 /* Return true if we should avoid inserting code between INSN and preceding
3262 call instruction. */
3265 keep_with_call_p (rtx insn)
3269 if (INSN_P (insn) && (set = single_set (insn)) != NULL)
3271 if (REG_P (SET_DEST (set))
3272 && REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
3273 && fixed_regs[REGNO (SET_DEST (set))]
3274 && general_operand (SET_SRC (set), VOIDmode))
3276 if (REG_P (SET_SRC (set))
3277 && FUNCTION_VALUE_REGNO_P (REGNO (SET_SRC (set)))
3278 && REG_P (SET_DEST (set))
3279 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
3281 /* There may be a stack pop just after the call and before the store
3282 of the return register. Search for the actual store when deciding
3283 if we can break or not. */
3284 if (SET_DEST (set) == stack_pointer_rtx)
3286 rtx i2 = next_nonnote_insn (insn);
3287 if (i2 && keep_with_call_p (i2))
3294 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3295 to non-complex jumps. That is, direct unconditional, conditional,
3296 and tablejumps, but not computed jumps or returns. It also does
3297 not apply to the fallthru case of a conditional jump. */
3300 label_is_jump_target_p (rtx label, rtx jump_insn)
3302 rtx tmp = JUMP_LABEL (jump_insn);
3307 if (tablejump_p (jump_insn, NULL, &tmp))
3309 rtvec vec = XVEC (PATTERN (tmp),
3310 GET_CODE (PATTERN (tmp)) == ADDR_DIFF_VEC);
3311 int i, veclen = GET_NUM_ELEM (vec);
3313 for (i = 0; i < veclen; ++i)
3314 if (XEXP (RTVEC_ELT (vec, i), 0) == label)
3322 /* Return an estimate of the cost of computing rtx X.
3323 One use is in cse, to decide which expression to keep in the hash table.
3324 Another is in rtl generation, to pick the cheapest way to multiply.
3325 Other uses like the latter are expected in the future. */
3328 rtx_cost (rtx x, enum rtx_code outer_code ATTRIBUTE_UNUSED)
3338 /* Compute the default costs of certain things.
3339 Note that targetm.rtx_costs can override the defaults. */
3341 code = GET_CODE (x);
3345 total = COSTS_N_INSNS (5);
3351 total = COSTS_N_INSNS (7);
3354 /* Used in combine.c as a marker. */
3358 total = COSTS_N_INSNS (1);
3368 /* If we can't tie these modes, make this expensive. The larger
3369 the mode, the more expensive it is. */
3370 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
3371 return COSTS_N_INSNS (2
3372 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
3376 if (targetm.rtx_costs (x, code, outer_code, &total))
3381 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3382 which is already in total. */
3384 fmt = GET_RTX_FORMAT (code);
3385 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3387 total += rtx_cost (XEXP (x, i), code);
3388 else if (fmt[i] == 'E')
3389 for (j = 0; j < XVECLEN (x, i); j++)
3390 total += rtx_cost (XVECEXP (x, i, j), code);
3395 /* Return cost of address expression X.
3396 Expect that X is properly formed address reference. */
3399 address_cost (rtx x, enum machine_mode mode)
3401 /* We may be asked for cost of various unusual addresses, such as operands
3402 of push instruction. It is not worthwhile to complicate writing
3403 of the target hook by such cases. */
3405 if (!memory_address_p (mode, x))
3408 return targetm.address_cost (x);
3411 /* If the target doesn't override, compute the cost as with arithmetic. */
3414 default_address_cost (rtx x)
3416 return rtx_cost (x, MEM);
3420 unsigned HOST_WIDE_INT
3421 nonzero_bits (rtx x, enum machine_mode mode)
3423 return cached_nonzero_bits (x, mode, NULL_RTX, VOIDmode, 0);
3427 num_sign_bit_copies (rtx x, enum machine_mode mode)
3429 return cached_num_sign_bit_copies (x, mode, NULL_RTX, VOIDmode, 0);
3432 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3433 It avoids exponential behavior in nonzero_bits1 when X has
3434 identical subexpressions on the first or the second level. */
3436 static unsigned HOST_WIDE_INT
3437 cached_nonzero_bits (rtx x, enum machine_mode mode, rtx known_x,
3438 enum machine_mode known_mode,
3439 unsigned HOST_WIDE_INT known_ret)
3441 if (x == known_x && mode == known_mode)
3444 /* Try to find identical subexpressions. If found call
3445 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3446 precomputed value for the subexpression as KNOWN_RET. */
3448 if (ARITHMETIC_P (x))
3450 rtx x0 = XEXP (x, 0);
3451 rtx x1 = XEXP (x, 1);
3453 /* Check the first level. */
3455 return nonzero_bits1 (x, mode, x0, mode,
3456 cached_nonzero_bits (x0, mode, known_x,
3457 known_mode, known_ret));
3459 /* Check the second level. */
3460 if (ARITHMETIC_P (x0)
3461 && (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1)))
3462 return nonzero_bits1 (x, mode, x1, mode,
3463 cached_nonzero_bits (x1, mode, known_x,
3464 known_mode, known_ret));
3466 if (ARITHMETIC_P (x1)
3467 && (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1)))
3468 return nonzero_bits1 (x, mode, x0, mode,
3469 cached_nonzero_bits (x0, mode, known_x,
3470 known_mode, known_ret));
3473 return nonzero_bits1 (x, mode, known_x, known_mode, known_ret);
3476 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3477 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3478 is less useful. We can't allow both, because that results in exponential
3479 run time recursion. There is a nullstone testcase that triggered
3480 this. This macro avoids accidental uses of num_sign_bit_copies. */
3481 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3483 /* Given an expression, X, compute which bits in X can be nonzero.
3484 We don't care about bits outside of those defined in MODE.
3486 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3487 an arithmetic operation, we can do better. */
3489 static unsigned HOST_WIDE_INT
3490 nonzero_bits1 (rtx x, enum machine_mode mode, rtx known_x,
3491 enum machine_mode known_mode,
3492 unsigned HOST_WIDE_INT known_ret)
3494 unsigned HOST_WIDE_INT nonzero = GET_MODE_MASK (mode);
3495 unsigned HOST_WIDE_INT inner_nz;
3497 unsigned int mode_width = GET_MODE_BITSIZE (mode);
3499 /* For floating-point values, assume all bits are needed. */
3500 if (FLOAT_MODE_P (GET_MODE (x)) || FLOAT_MODE_P (mode))
3503 /* If X is wider than MODE, use its mode instead. */
3504 if (GET_MODE_BITSIZE (GET_MODE (x)) > mode_width)
3506 mode = GET_MODE (x);
3507 nonzero = GET_MODE_MASK (mode);
3508 mode_width = GET_MODE_BITSIZE (mode);
3511 if (mode_width > HOST_BITS_PER_WIDE_INT)
3512 /* Our only callers in this case look for single bit values. So
3513 just return the mode mask. Those tests will then be false. */
3516 #ifndef WORD_REGISTER_OPERATIONS
3517 /* If MODE is wider than X, but both are a single word for both the host
3518 and target machines, we can compute this from which bits of the
3519 object might be nonzero in its own mode, taking into account the fact
3520 that on many CISC machines, accessing an object in a wider mode
3521 causes the high-order bits to become undefined. So they are
3522 not known to be zero. */
3524 if (GET_MODE (x) != VOIDmode && GET_MODE (x) != mode
3525 && GET_MODE_BITSIZE (GET_MODE (x)) <= BITS_PER_WORD
3526 && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT
3527 && GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (GET_MODE (x)))
3529 nonzero &= cached_nonzero_bits (x, GET_MODE (x),
3530 known_x, known_mode, known_ret);
3531 nonzero |= GET_MODE_MASK (mode) & ~GET_MODE_MASK (GET_MODE (x));
3536 code = GET_CODE (x);
3540 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3541 /* If pointers extend unsigned and this is a pointer in Pmode, say that
3542 all the bits above ptr_mode are known to be zero. */
3543 if (POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode
3545 nonzero &= GET_MODE_MASK (ptr_mode);
3548 /* Include declared information about alignment of pointers. */
3549 /* ??? We don't properly preserve REG_POINTER changes across
3550 pointer-to-integer casts, so we can't trust it except for
3551 things that we know must be pointers. See execute/960116-1.c. */
3552 if ((x == stack_pointer_rtx
3553 || x == frame_pointer_rtx
3554 || x == arg_pointer_rtx)
3555 && REGNO_POINTER_ALIGN (REGNO (x)))
3557 unsigned HOST_WIDE_INT alignment
3558 = REGNO_POINTER_ALIGN (REGNO (x)) / BITS_PER_UNIT;
3560 #ifdef PUSH_ROUNDING
3561 /* If PUSH_ROUNDING is defined, it is possible for the
3562 stack to be momentarily aligned only to that amount,
3563 so we pick the least alignment. */
3564 if (x == stack_pointer_rtx && PUSH_ARGS)
3565 alignment = MIN ((unsigned HOST_WIDE_INT) PUSH_ROUNDING (1),
3569 nonzero &= ~(alignment - 1);
3573 unsigned HOST_WIDE_INT nonzero_for_hook = nonzero;
3574 rtx new = rtl_hooks.reg_nonzero_bits (x, mode, known_x,
3575 known_mode, known_ret,
3579 nonzero_for_hook &= cached_nonzero_bits (new, mode, known_x,
3580 known_mode, known_ret);
3582 return nonzero_for_hook;
3586 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
3587 /* If X is negative in MODE, sign-extend the value. */
3588 if (INTVAL (x) > 0 && mode_width < BITS_PER_WORD
3589 && 0 != (INTVAL (x) & ((HOST_WIDE_INT) 1 << (mode_width - 1))))
3590 return (INTVAL (x) | ((HOST_WIDE_INT) (-1) << mode_width));
3596 #ifdef LOAD_EXTEND_OP
3597 /* In many, if not most, RISC machines, reading a byte from memory
3598 zeros the rest of the register. Noticing that fact saves a lot
3599 of extra zero-extends. */
3600 if (LOAD_EXTEND_OP (GET_MODE (x)) == ZERO_EXTEND)
3601 nonzero &= GET_MODE_MASK (GET_MODE (x));
3606 case UNEQ: case LTGT:
3607 case GT: case GTU: case UNGT:
3608 case LT: case LTU: case UNLT:
3609 case GE: case GEU: case UNGE:
3610 case LE: case LEU: case UNLE:
3611 case UNORDERED: case ORDERED:
3612 /* If this produces an integer result, we know which bits are set.
3613 Code here used to clear bits outside the mode of X, but that is
3615 /* Mind that MODE is the mode the caller wants to look at this
3616 operation in, and not the actual operation mode. We can wind
3617 up with (subreg:DI (gt:V4HI x y)), and we don't have anything
3618 that describes the results of a vector compare. */
3619 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
3620 && mode_width <= HOST_BITS_PER_WIDE_INT)
3621 nonzero = STORE_FLAG_VALUE;
3626 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3627 and num_sign_bit_copies. */
3628 if (num_sign_bit_copies (XEXP (x, 0), GET_MODE (x))
3629 == GET_MODE_BITSIZE (GET_MODE (x)))
3633 if (GET_MODE_SIZE (GET_MODE (x)) < mode_width)
3634 nonzero |= (GET_MODE_MASK (mode) & ~GET_MODE_MASK (GET_MODE (x)));
3639 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3640 and num_sign_bit_copies. */
3641 if (num_sign_bit_copies (XEXP (x, 0), GET_MODE (x))
3642 == GET_MODE_BITSIZE (GET_MODE (x)))
3648 nonzero &= (cached_nonzero_bits (XEXP (x, 0), mode,
3649 known_x, known_mode, known_ret)
3650 & GET_MODE_MASK (mode));
3654 nonzero &= cached_nonzero_bits (XEXP (x, 0), mode,
3655 known_x, known_mode, known_ret);
3656 if (GET_MODE (XEXP (x, 0)) != VOIDmode)
3657 nonzero &= GET_MODE_MASK (GET_MODE (XEXP (x, 0)));
3661 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
3662 Otherwise, show all the bits in the outer mode but not the inner
3664 inner_nz = cached_nonzero_bits (XEXP (x, 0), mode,
3665 known_x, known_mode, known_ret);
3666 if (GET_MODE (XEXP (x, 0)) != VOIDmode)
3668 inner_nz &= GET_MODE_MASK (GET_MODE (XEXP (x, 0)));
3670 & (((HOST_WIDE_INT) 1
3671 << (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))) - 1))))
3672 inner_nz |= (GET_MODE_MASK (mode)
3673 & ~GET_MODE_MASK (GET_MODE (XEXP (x, 0))));
3676 nonzero &= inner_nz;
3680 nonzero &= cached_nonzero_bits (XEXP (x, 0), mode,
3681 known_x, known_mode, known_ret)
3682 & cached_nonzero_bits (XEXP (x, 1), mode,
3683 known_x, known_mode, known_ret);
3687 case UMIN: case UMAX: case SMIN: case SMAX:
3689 unsigned HOST_WIDE_INT nonzero0 =
3690 cached_nonzero_bits (XEXP (x, 0), mode,
3691 known_x, known_mode, known_ret);
3693 /* Don't call nonzero_bits for the second time if it cannot change
3695 if ((nonzero & nonzero0) != nonzero)
3697 | cached_nonzero_bits (XEXP (x, 1), mode,
3698 known_x, known_mode, known_ret);
3702 case PLUS: case MINUS:
3704 case DIV: case UDIV:
3705 case MOD: case UMOD:
3706 /* We can apply the rules of arithmetic to compute the number of
3707 high- and low-order zero bits of these operations. We start by
3708 computing the width (position of the highest-order nonzero bit)
3709 and the number of low-order zero bits for each value. */
3711 unsigned HOST_WIDE_INT nz0 =
3712 cached_nonzero_bits (XEXP (x, 0), mode,
3713 known_x, known_mode, known_ret);
3714 unsigned HOST_WIDE_INT nz1 =
3715 cached_nonzero_bits (XEXP (x, 1), mode,
3716 known_x, known_mode, known_ret);
3717 int sign_index = GET_MODE_BITSIZE (GET_MODE (x)) - 1;
3718 int width0 = floor_log2 (nz0) + 1;
3719 int width1 = floor_log2 (nz1) + 1;
3720 int low0 = floor_log2 (nz0 & -nz0);
3721 int low1 = floor_log2 (nz1 & -nz1);
3722 HOST_WIDE_INT op0_maybe_minusp
3723 = (nz0 & ((HOST_WIDE_INT) 1 << sign_index));
3724 HOST_WIDE_INT op1_maybe_minusp
3725 = (nz1 & ((HOST_WIDE_INT) 1 << sign_index));
3726 unsigned int result_width = mode_width;
3732 result_width = MAX (width0, width1) + 1;
3733 result_low = MIN (low0, low1);
3736 result_low = MIN (low0, low1);
3739 result_width = width0 + width1;
3740 result_low = low0 + low1;
3745 if (! op0_maybe_minusp && ! op1_maybe_minusp)
3746 result_width = width0;
3751 result_width = width0;
3756 if (! op0_maybe_minusp && ! op1_maybe_minusp)
3757 result_width = MIN (width0, width1);
3758 result_low = MIN (low0, low1);
3763 result_width = MIN (width0, width1);
3764 result_low = MIN (low0, low1);
3770 if (result_width < mode_width)
3771 nonzero &= ((HOST_WIDE_INT) 1 << result_width) - 1;
3774 nonzero &= ~(((HOST_WIDE_INT) 1 << result_low) - 1);
3776 #ifdef POINTERS_EXTEND_UNSIGNED
3777 /* If pointers extend unsigned and this is an addition or subtraction
3778 to a pointer in Pmode, all the bits above ptr_mode are known to be
3780 if (POINTERS_EXTEND_UNSIGNED > 0 && GET_MODE (x) == Pmode
3781 && (code == PLUS || code == MINUS)
3782 && REG_P (XEXP (x, 0)) && REG_POINTER (XEXP (x, 0)))
3783 nonzero &= GET_MODE_MASK (ptr_mode);
3789 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3790 && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT)
3791 nonzero &= ((HOST_WIDE_INT) 1 << INTVAL (XEXP (x, 1))) - 1;
3795 /* If this is a SUBREG formed for a promoted variable that has
3796 been zero-extended, we know that at least the high-order bits
3797 are zero, though others might be too. */
3799 if (SUBREG_PROMOTED_VAR_P (x) && SUBREG_PROMOTED_UNSIGNED_P (x) > 0)
3800 nonzero = GET_MODE_MASK (GET_MODE (x))
3801 & cached_nonzero_bits (SUBREG_REG (x), GET_MODE (x),
3802 known_x, known_mode, known_ret);
3804 /* If the inner mode is a single word for both the host and target
3805 machines, we can compute this from which bits of the inner
3806 object might be nonzero. */
3807 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) <= BITS_PER_WORD
3808 && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
3809 <= HOST_BITS_PER_WIDE_INT))
3811 nonzero &= cached_nonzero_bits (SUBREG_REG (x), mode,
3812 known_x, known_mode, known_ret);
3814 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
3815 /* If this is a typical RISC machine, we only have to worry
3816 about the way loads are extended. */
3817 if ((LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND
3819 & (((unsigned HOST_WIDE_INT) 1
3820 << (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) - 1))))
3822 : LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) != ZERO_EXTEND)
3823 || !MEM_P (SUBREG_REG (x)))
3826 /* On many CISC machines, accessing an object in a wider mode
3827 causes the high-order bits to become undefined. So they are
3828 not known to be zero. */
3829 if (GET_MODE_SIZE (GET_MODE (x))
3830 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3831 nonzero |= (GET_MODE_MASK (GET_MODE (x))
3832 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (x))));
3841 /* The nonzero bits are in two classes: any bits within MODE
3842 that aren't in GET_MODE (x) are always significant. The rest of the
3843 nonzero bits are those that are significant in the operand of
3844 the shift when shifted the appropriate number of bits. This
3845 shows that high-order bits are cleared by the right shift and
3846 low-order bits by left shifts. */
3847 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3848 && INTVAL (XEXP (x, 1)) >= 0
3849 && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT)
3851 enum machine_mode inner_mode = GET_MODE (x);
3852 unsigned int width = GET_MODE_BITSIZE (inner_mode);
3853 int count = INTVAL (XEXP (x, 1));
3854 unsigned HOST_WIDE_INT mode_mask = GET_MODE_MASK (inner_mode);
3855 unsigned HOST_WIDE_INT op_nonzero =
3856 cached_nonzero_bits (XEXP (x, 0), mode,
3857 known_x, known_mode, known_ret);
3858 unsigned HOST_WIDE_INT inner = op_nonzero & mode_mask;
3859 unsigned HOST_WIDE_INT outer = 0;
3861 if (mode_width > width)
3862 outer = (op_nonzero & nonzero & ~mode_mask);
3864 if (code == LSHIFTRT)
3866 else if (code == ASHIFTRT)
3870 /* If the sign bit may have been nonzero before the shift, we
3871 need to mark all the places it could have been copied to
3872 by the shift as possibly nonzero. */
3873 if (inner & ((HOST_WIDE_INT) 1 << (width - 1 - count)))
3874 inner |= (((HOST_WIDE_INT) 1 << count) - 1) << (width - count);
3876 else if (code == ASHIFT)
3879 inner = ((inner << (count % width)
3880 | (inner >> (width - (count % width)))) & mode_mask);
3882 nonzero &= (outer | inner);
3888 /* This is at most the number of bits in the mode. */
3889 nonzero = ((HOST_WIDE_INT) 2 << (floor_log2 (mode_width))) - 1;
3893 /* If CLZ has a known value at zero, then the nonzero bits are
3894 that value, plus the number of bits in the mode minus one. */
3895 if (CLZ_DEFINED_VALUE_AT_ZERO (mode, nonzero))
3896 nonzero |= ((HOST_WIDE_INT) 1 << (floor_log2 (mode_width))) - 1;
3902 /* If CTZ has a known value at zero, then the nonzero bits are
3903 that value, plus the number of bits in the mode minus one. */
3904 if (CTZ_DEFINED_VALUE_AT_ZERO (mode, nonzero))
3905 nonzero |= ((HOST_WIDE_INT) 1 << (floor_log2 (mode_width))) - 1;
3916 unsigned HOST_WIDE_INT nonzero_true =
3917 cached_nonzero_bits (XEXP (x, 1), mode,
3918 known_x, known_mode, known_ret);
3920 /* Don't call nonzero_bits for the second time if it cannot change
3922 if ((nonzero & nonzero_true) != nonzero)
3923 nonzero &= nonzero_true
3924 | cached_nonzero_bits (XEXP (x, 2), mode,
3925 known_x, known_mode, known_ret);
3936 /* See the macro definition above. */
3937 #undef cached_num_sign_bit_copies
3940 /* The function cached_num_sign_bit_copies is a wrapper around
3941 num_sign_bit_copies1. It avoids exponential behavior in
3942 num_sign_bit_copies1 when X has identical subexpressions on the
3943 first or the second level. */
3946 cached_num_sign_bit_copies (rtx x, enum machine_mode mode, rtx known_x,
3947 enum machine_mode known_mode,
3948 unsigned int known_ret)
3950 if (x == known_x && mode == known_mode)
3953 /* Try to find identical subexpressions. If found call
3954 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
3955 the precomputed value for the subexpression as KNOWN_RET. */
3957 if (ARITHMETIC_P (x))
3959 rtx x0 = XEXP (x, 0);
3960 rtx x1 = XEXP (x, 1);
3962 /* Check the first level. */
3965 num_sign_bit_copies1 (x, mode, x0, mode,
3966 cached_num_sign_bit_copies (x0, mode, known_x,
3970 /* Check the second level. */
3971 if (ARITHMETIC_P (x0)
3972 && (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1)))
3974 num_sign_bit_copies1 (x, mode, x1, mode,
3975 cached_num_sign_bit_copies (x1, mode, known_x,
3979 if (ARITHMETIC_P (x1)
3980 && (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1)))
3982 num_sign_bit_copies1 (x, mode, x0, mode,
3983 cached_num_sign_bit_copies (x0, mode, known_x,
3988 return num_sign_bit_copies1 (x, mode, known_x, known_mode, known_ret);
3991 /* Return the number of bits at the high-order end of X that are known to
3992 be equal to the sign bit. X will be used in mode MODE; if MODE is
3993 VOIDmode, X will be used in its own mode. The returned value will always
3994 be between 1 and the number of bits in MODE. */
3997 num_sign_bit_copies1 (rtx x, enum machine_mode mode, rtx known_x,
3998 enum machine_mode known_mode,
3999 unsigned int known_ret)
4001 enum rtx_code code = GET_CODE (x);
4002 unsigned int bitwidth = GET_MODE_BITSIZE (mode);
4003 int num0, num1, result;
4004 unsigned HOST_WIDE_INT nonzero;
4006 /* If we weren't given a mode, use the mode of X. If the mode is still
4007 VOIDmode, we don't know anything. Likewise if one of the modes is
4010 if (mode == VOIDmode)
4011 mode = GET_MODE (x);
4013 if (mode == VOIDmode || FLOAT_MODE_P (mode) || FLOAT_MODE_P (GET_MODE (x)))
4016 /* For a smaller object, just ignore the high bits. */
4017 if (bitwidth < GET_MODE_BITSIZE (GET_MODE (x)))
4019 num0 = cached_num_sign_bit_copies (x, GET_MODE (x),
4020 known_x, known_mode, known_ret);
4022 num0 - (int) (GET_MODE_BITSIZE (GET_MODE (x)) - bitwidth));
4025 if (GET_MODE (x) != VOIDmode && bitwidth > GET_MODE_BITSIZE (GET_MODE (x)))
4027 #ifndef WORD_REGISTER_OPERATIONS
4028 /* If this machine does not do all register operations on the entire
4029 register and MODE is wider than the mode of X, we can say nothing
4030 at all about the high-order bits. */
4033 /* Likewise on machines that do, if the mode of the object is smaller
4034 than a word and loads of that size don't sign extend, we can say
4035 nothing about the high order bits. */
4036 if (GET_MODE_BITSIZE (GET_MODE (x)) < BITS_PER_WORD
4037 #ifdef LOAD_EXTEND_OP
4038 && LOAD_EXTEND_OP (GET_MODE (x)) != SIGN_EXTEND
4049 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4050 /* If pointers extend signed and this is a pointer in Pmode, say that
4051 all the bits above ptr_mode are known to be sign bit copies. */
4052 if (! POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode && mode == Pmode
4054 return GET_MODE_BITSIZE (Pmode) - GET_MODE_BITSIZE (ptr_mode) + 1;
4058 unsigned int copies_for_hook = 1, copies = 1;
4059 rtx new = rtl_hooks.reg_num_sign_bit_copies (x, mode, known_x,
4060 known_mode, known_ret,
4064 copies = cached_num_sign_bit_copies (new, mode, known_x,
4065 known_mode, known_ret);
4067 if (copies > 1 || copies_for_hook > 1)
4068 return MAX (copies, copies_for_hook);
4070 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
4075 #ifdef LOAD_EXTEND_OP
4076 /* Some RISC machines sign-extend all loads of smaller than a word. */
4077 if (LOAD_EXTEND_OP (GET_MODE (x)) == SIGN_EXTEND)
4078 return MAX (1, ((int) bitwidth
4079 - (int) GET_MODE_BITSIZE (GET_MODE (x)) + 1));
4084 /* If the constant is negative, take its 1's complement and remask.
4085 Then see how many zero bits we have. */
4086 nonzero = INTVAL (x) & GET_MODE_MASK (mode);
4087 if (bitwidth <= HOST_BITS_PER_WIDE_INT
4088 && (nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4089 nonzero = (~nonzero) & GET_MODE_MASK (mode);
4091 return (nonzero == 0 ? bitwidth : bitwidth - floor_log2 (nonzero) - 1);
4094 /* If this is a SUBREG for a promoted object that is sign-extended
4095 and we are looking at it in a wider mode, we know that at least the
4096 high-order bits are known to be sign bit copies. */
4098 if (SUBREG_PROMOTED_VAR_P (x) && ! SUBREG_PROMOTED_UNSIGNED_P (x))
4100 num0 = cached_num_sign_bit_copies (SUBREG_REG (x), mode,
4101 known_x, known_mode, known_ret);
4102 return MAX ((int) bitwidth
4103 - (int) GET_MODE_BITSIZE (GET_MODE (x)) + 1,
4107 /* For a smaller object, just ignore the high bits. */
4108 if (bitwidth <= GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))))
4110 num0 = cached_num_sign_bit_copies (SUBREG_REG (x), VOIDmode,
4111 known_x, known_mode, known_ret);
4112 return MAX (1, (num0
4113 - (int) (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4117 #ifdef WORD_REGISTER_OPERATIONS
4118 #ifdef LOAD_EXTEND_OP
4119 /* For paradoxical SUBREGs on machines where all register operations
4120 affect the entire register, just look inside. Note that we are
4121 passing MODE to the recursive call, so the number of sign bit copies
4122 will remain relative to that mode, not the inner mode. */
4124 /* This works only if loads sign extend. Otherwise, if we get a
4125 reload for the inner part, it may be loaded from the stack, and
4126 then we lose all sign bit copies that existed before the store
4129 if ((GET_MODE_SIZE (GET_MODE (x))
4130 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4131 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND
4132 && MEM_P (SUBREG_REG (x)))
4133 return cached_num_sign_bit_copies (SUBREG_REG (x), mode,
4134 known_x, known_mode, known_ret);
4140 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
4141 return MAX (1, (int) bitwidth - INTVAL (XEXP (x, 1)));
4145 return (bitwidth - GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
4146 + cached_num_sign_bit_copies (XEXP (x, 0), VOIDmode,
4147 known_x, known_mode, known_ret));
4150 /* For a smaller object, just ignore the high bits. */
4151 num0 = cached_num_sign_bit_copies (XEXP (x, 0), VOIDmode,
4152 known_x, known_mode, known_ret);
4153 return MAX (1, (num0 - (int) (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
4157 return cached_num_sign_bit_copies (XEXP (x, 0), mode,
4158 known_x, known_mode, known_ret);
4160 case ROTATE: case ROTATERT:
4161 /* If we are rotating left by a number of bits less than the number
4162 of sign bit copies, we can just subtract that amount from the
4164 if (GET_CODE (XEXP (x, 1)) == CONST_INT
4165 && INTVAL (XEXP (x, 1)) >= 0
4166 && INTVAL (XEXP (x, 1)) < (int) bitwidth)
4168 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4169 known_x, known_mode, known_ret);
4170 return MAX (1, num0 - (code == ROTATE ? INTVAL (XEXP (x, 1))
4171 : (int) bitwidth - INTVAL (XEXP (x, 1))));
4176 /* In general, this subtracts one sign bit copy. But if the value
4177 is known to be positive, the number of sign bit copies is the
4178 same as that of the input. Finally, if the input has just one bit
4179 that might be nonzero, all the bits are copies of the sign bit. */
4180 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4181 known_x, known_mode, known_ret);
4182 if (bitwidth > HOST_BITS_PER_WIDE_INT)
4183 return num0 > 1 ? num0 - 1 : 1;
4185 nonzero = nonzero_bits (XEXP (x, 0), mode);
4190 && (((HOST_WIDE_INT) 1 << (bitwidth - 1)) & nonzero))
4195 case IOR: case AND: case XOR:
4196 case SMIN: case SMAX: case UMIN: case UMAX:
4197 /* Logical operations will preserve the number of sign-bit copies.
4198 MIN and MAX operations always return one of the operands. */
4199 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4200 known_x, known_mode, known_ret);
4201 num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4202 known_x, known_mode, known_ret);
4203 return MIN (num0, num1);
4205 case PLUS: case MINUS:
4206 /* For addition and subtraction, we can have a 1-bit carry. However,
4207 if we are subtracting 1 from a positive number, there will not
4208 be such a carry. Furthermore, if the positive number is known to
4209 be 0 or 1, we know the result is either -1 or 0. */
4211 if (code == PLUS && XEXP (x, 1) == constm1_rtx
4212 && bitwidth <= HOST_BITS_PER_WIDE_INT)
4214 nonzero = nonzero_bits (XEXP (x, 0), mode);
4215 if ((((HOST_WIDE_INT) 1 << (bitwidth - 1)) & nonzero) == 0)
4216 return (nonzero == 1 || nonzero == 0 ? bitwidth
4217 : bitwidth - floor_log2 (nonzero) - 1);
4220 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4221 known_x, known_mode, known_ret);
4222 num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4223 known_x, known_mode, known_ret);
4224 result = MAX (1, MIN (num0, num1) - 1);
4226 #ifdef POINTERS_EXTEND_UNSIGNED
4227 /* If pointers extend signed and this is an addition or subtraction
4228 to a pointer in Pmode, all the bits above ptr_mode are known to be
4230 if (! POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode
4231 && (code == PLUS || code == MINUS)
4232 && REG_P (XEXP (x, 0)) && REG_POINTER (XEXP (x, 0)))
4233 result = MAX ((int) (GET_MODE_BITSIZE (Pmode)
4234 - GET_MODE_BITSIZE (ptr_mode) + 1),
4240 /* The number of bits of the product is the sum of the number of
4241 bits of both terms. However, unless one of the terms if known
4242 to be positive, we must allow for an additional bit since negating
4243 a negative number can remove one sign bit copy. */
4245 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4246 known_x, known_mode, known_ret);
4247 num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4248 known_x, known_mode, known_ret);
4250 result = bitwidth - (bitwidth - num0) - (bitwidth - num1);
4252 && (bitwidth > HOST_BITS_PER_WIDE_INT
4253 || (((nonzero_bits (XEXP (x, 0), mode)
4254 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4255 && ((nonzero_bits (XEXP (x, 1), mode)
4256 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0))))
4259 return MAX (1, result);
4262 /* The result must be <= the first operand. If the first operand
4263 has the high bit set, we know nothing about the number of sign
4265 if (bitwidth > HOST_BITS_PER_WIDE_INT)
4267 else if ((nonzero_bits (XEXP (x, 0), mode)
4268 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4271 return cached_num_sign_bit_copies (XEXP (x, 0), mode,
4272 known_x, known_mode, known_ret);
4275 /* The result must be <= the second operand. */
4276 return cached_num_sign_bit_copies (XEXP (x, 1), mode,
4277 known_x, known_mode, known_ret);
4280 /* Similar to unsigned division, except that we have to worry about
4281 the case where the divisor is negative, in which case we have
4283 result = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4284 known_x, known_mode, known_ret);
4286 && (bitwidth > HOST_BITS_PER_WIDE_INT
4287 || (nonzero_bits (XEXP (x, 1), mode)
4288 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0))
4294 result = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4295 known_x, known_mode, known_ret);
4297 && (bitwidth > HOST_BITS_PER_WIDE_INT
4298 || (nonzero_bits (XEXP (x, 1), mode)
4299 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0))
4305 /* Shifts by a constant add to the number of bits equal to the
4307 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4308 known_x, known_mode, known_ret);
4309 if (GET_CODE (XEXP (x, 1)) == CONST_INT
4310 && INTVAL (XEXP (x, 1)) > 0)
4311 num0 = MIN ((int) bitwidth, num0 + INTVAL (XEXP (x, 1)));
4316 /* Left shifts destroy copies. */
4317 if (GET_CODE (XEXP (x, 1)) != CONST_INT
4318 || INTVAL (XEXP (x, 1)) < 0
4319 || INTVAL (XEXP (x, 1)) >= (int) bitwidth)
4322 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4323 known_x, known_mode, known_ret);
4324 return MAX (1, num0 - INTVAL (XEXP (x, 1)));
4327 num0 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4328 known_x, known_mode, known_ret);
4329 num1 = cached_num_sign_bit_copies (XEXP (x, 2), mode,
4330 known_x, known_mode, known_ret);
4331 return MIN (num0, num1);
4333 case EQ: case NE: case GE: case GT: case LE: case LT:
4334 case UNEQ: case LTGT: case UNGE: case UNGT: case UNLE: case UNLT:
4335 case GEU: case GTU: case LEU: case LTU:
4336 case UNORDERED: case ORDERED:
4337 /* If the constant is negative, take its 1's complement and remask.
4338 Then see how many zero bits we have. */
4339 nonzero = STORE_FLAG_VALUE;
4340 if (bitwidth <= HOST_BITS_PER_WIDE_INT
4341 && (nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4342 nonzero = (~nonzero) & GET_MODE_MASK (mode);
4344 return (nonzero == 0 ? bitwidth : bitwidth - floor_log2 (nonzero) - 1);
4350 /* If we haven't been able to figure it out by one of the above rules,
4351 see if some of the high-order bits are known to be zero. If so,
4352 count those bits and return one less than that amount. If we can't
4353 safely compute the mask for this mode, always return BITWIDTH. */
4355 bitwidth = GET_MODE_BITSIZE (mode);
4356 if (bitwidth > HOST_BITS_PER_WIDE_INT)
4359 nonzero = nonzero_bits (x, mode);
4360 return nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))
4361 ? 1 : bitwidth - floor_log2 (nonzero) - 1;
4364 /* Calculate the rtx_cost of a single instruction. A return value of
4365 zero indicates an instruction pattern without a known cost. */
4368 insn_rtx_cost (rtx pat)
4373 /* Extract the single set rtx from the instruction pattern.
4374 We can't use single_set since we only have the pattern. */
4375 if (GET_CODE (pat) == SET)
4377 else if (GET_CODE (pat) == PARALLEL)
4380 for (i = 0; i < XVECLEN (pat, 0); i++)
4382 rtx x = XVECEXP (pat, 0, i);
4383 if (GET_CODE (x) == SET)
4396 cost = rtx_cost (SET_SRC (set), SET);
4397 return cost > 0 ? cost : COSTS_N_INSNS (1);
4400 /* Given an insn INSN and condition COND, return the condition in a
4401 canonical form to simplify testing by callers. Specifically:
4403 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4404 (2) Both operands will be machine operands; (cc0) will have been replaced.
4405 (3) If an operand is a constant, it will be the second operand.
4406 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4407 for GE, GEU, and LEU.
4409 If the condition cannot be understood, or is an inequality floating-point
4410 comparison which needs to be reversed, 0 will be returned.
4412 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4414 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4415 insn used in locating the condition was found. If a replacement test
4416 of the condition is desired, it should be placed in front of that
4417 insn and we will be sure that the inputs are still valid.
4419 If WANT_REG is nonzero, we wish the condition to be relative to that
4420 register, if possible. Therefore, do not canonicalize the condition
4421 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4422 to be a compare to a CC mode register.
4424 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4428 canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
4429 rtx want_reg, int allow_cc_mode, int valid_at_insn_p)
4436 int reverse_code = 0;
4437 enum machine_mode mode;
4438 basic_block bb = BLOCK_FOR_INSN (insn);
4440 code = GET_CODE (cond);
4441 mode = GET_MODE (cond);
4442 op0 = XEXP (cond, 0);
4443 op1 = XEXP (cond, 1);
4446 code = reversed_comparison_code (cond, insn);
4447 if (code == UNKNOWN)
4453 /* If we are comparing a register with zero, see if the register is set
4454 in the previous insn to a COMPARE or a comparison operation. Perform
4455 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4458 while ((GET_RTX_CLASS (code) == RTX_COMPARE
4459 || GET_RTX_CLASS (code) == RTX_COMM_COMPARE)
4460 && op1 == CONST0_RTX (GET_MODE (op0))
4463 /* Set nonzero when we find something of interest. */
4467 /* If comparison with cc0, import actual comparison from compare
4471 if ((prev = prev_nonnote_insn (prev)) == 0
4472 || !NONJUMP_INSN_P (prev)
4473 || (set = single_set (prev)) == 0
4474 || SET_DEST (set) != cc0_rtx)
4477 op0 = SET_SRC (set);
4478 op1 = CONST0_RTX (GET_MODE (op0));
4484 /* If this is a COMPARE, pick up the two things being compared. */
4485 if (GET_CODE (op0) == COMPARE)
4487 op1 = XEXP (op0, 1);
4488 op0 = XEXP (op0, 0);
4491 else if (!REG_P (op0))
4494 /* Go back to the previous insn. Stop if it is not an INSN. We also
4495 stop if it isn't a single set or if it has a REG_INC note because
4496 we don't want to bother dealing with it. */
4498 if ((prev = prev_nonnote_insn (prev)) == 0
4499 || !NONJUMP_INSN_P (prev)
4500 || FIND_REG_INC_NOTE (prev, NULL_RTX)
4501 /* In cfglayout mode, there do not have to be labels at the
4502 beginning of a block, or jumps at the end, so the previous
4503 conditions would not stop us when we reach bb boundary. */
4504 || BLOCK_FOR_INSN (prev) != bb)
4507 set = set_of (op0, prev);
4510 && (GET_CODE (set) != SET
4511 || !rtx_equal_p (SET_DEST (set), op0)))
4514 /* If this is setting OP0, get what it sets it to if it looks
4518 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
4519 #ifdef FLOAT_STORE_FLAG_VALUE
4520 REAL_VALUE_TYPE fsfv;
4523 /* ??? We may not combine comparisons done in a CCmode with
4524 comparisons not done in a CCmode. This is to aid targets
4525 like Alpha that have an IEEE compliant EQ instruction, and
4526 a non-IEEE compliant BEQ instruction. The use of CCmode is
4527 actually artificial, simply to prevent the combination, but
4528 should not affect other platforms.
4530 However, we must allow VOIDmode comparisons to match either
4531 CCmode or non-CCmode comparison, because some ports have
4532 modeless comparisons inside branch patterns.
4534 ??? This mode check should perhaps look more like the mode check
4535 in simplify_comparison in combine. */
4537 if ((GET_CODE (SET_SRC (set)) == COMPARE
4540 && GET_MODE_CLASS (inner_mode) == MODE_INT
4541 && (GET_MODE_BITSIZE (inner_mode)
4542 <= HOST_BITS_PER_WIDE_INT)
4543 && (STORE_FLAG_VALUE
4544 & ((HOST_WIDE_INT) 1
4545 << (GET_MODE_BITSIZE (inner_mode) - 1))))
4546 #ifdef FLOAT_STORE_FLAG_VALUE
4548 && SCALAR_FLOAT_MODE_P (inner_mode)
4549 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
4550 REAL_VALUE_NEGATIVE (fsfv)))
4553 && COMPARISON_P (SET_SRC (set))))
4554 && (((GET_MODE_CLASS (mode) == MODE_CC)
4555 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
4556 || mode == VOIDmode || inner_mode == VOIDmode))
4558 else if (((code == EQ
4560 && (GET_MODE_BITSIZE (inner_mode)
4561 <= HOST_BITS_PER_WIDE_INT)
4562 && GET_MODE_CLASS (inner_mode) == MODE_INT
4563 && (STORE_FLAG_VALUE
4564 & ((HOST_WIDE_INT) 1
4565 << (GET_MODE_BITSIZE (inner_mode) - 1))))
4566 #ifdef FLOAT_STORE_FLAG_VALUE
4568 && SCALAR_FLOAT_MODE_P (inner_mode)
4569 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
4570 REAL_VALUE_NEGATIVE (fsfv)))
4573 && COMPARISON_P (SET_SRC (set))
4574 && (((GET_MODE_CLASS (mode) == MODE_CC)
4575 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
4576 || mode == VOIDmode || inner_mode == VOIDmode))
4586 else if (reg_set_p (op0, prev))
4587 /* If this sets OP0, but not directly, we have to give up. */
4592 /* If the caller is expecting the condition to be valid at INSN,
4593 make sure X doesn't change before INSN. */
4594 if (valid_at_insn_p)
4595 if (modified_in_p (x, prev) || modified_between_p (x, prev, insn))
4597 if (COMPARISON_P (x))
4598 code = GET_CODE (x);
4601 code = reversed_comparison_code (x, prev);
4602 if (code == UNKNOWN)
4607 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
4613 /* If constant is first, put it last. */
4614 if (CONSTANT_P (op0))
4615 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
4617 /* If OP0 is the result of a comparison, we weren't able to find what
4618 was really being compared, so fail. */
4620 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
4623 /* Canonicalize any ordered comparison with integers involving equality
4624 if we can do computations in the relevant mode and we do not
4627 if (GET_MODE_CLASS (GET_MODE (op0)) != MODE_CC
4628 && GET_CODE (op1) == CONST_INT
4629 && GET_MODE (op0) != VOIDmode
4630 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
4632 HOST_WIDE_INT const_val = INTVAL (op1);
4633 unsigned HOST_WIDE_INT uconst_val = const_val;
4634 unsigned HOST_WIDE_INT max_val
4635 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
4640 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
4641 code = LT, op1 = gen_int_mode (const_val + 1, GET_MODE (op0));
4644 /* When cross-compiling, const_val might be sign-extended from
4645 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
4647 if ((HOST_WIDE_INT) (const_val & max_val)
4648 != (((HOST_WIDE_INT) 1
4649 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
4650 code = GT, op1 = gen_int_mode (const_val - 1, GET_MODE (op0));
4654 if (uconst_val < max_val)
4655 code = LTU, op1 = gen_int_mode (uconst_val + 1, GET_MODE (op0));
4659 if (uconst_val != 0)
4660 code = GTU, op1 = gen_int_mode (uconst_val - 1, GET_MODE (op0));
4668 /* Never return CC0; return zero instead. */
4672 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
4675 /* Given a jump insn JUMP, return the condition that will cause it to branch
4676 to its JUMP_LABEL. If the condition cannot be understood, or is an
4677 inequality floating-point comparison which needs to be reversed, 0 will
4680 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4681 insn used in locating the condition was found. If a replacement test
4682 of the condition is desired, it should be placed in front of that
4683 insn and we will be sure that the inputs are still valid. If EARLIEST
4684 is null, the returned condition will be valid at INSN.
4686 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
4687 compare CC mode register.
4689 VALID_AT_INSN_P is the same as for canonicalize_condition. */
4692 get_condition (rtx jump, rtx *earliest, int allow_cc_mode, int valid_at_insn_p)
4698 /* If this is not a standard conditional jump, we can't parse it. */
4700 || ! any_condjump_p (jump))
4702 set = pc_set (jump);
4704 cond = XEXP (SET_SRC (set), 0);
4706 /* If this branches to JUMP_LABEL when the condition is false, reverse
4709 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
4710 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
4712 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX,
4713 allow_cc_mode, valid_at_insn_p);
4716 /* Initialize the table NUM_SIGN_BIT_COPIES_IN_REP based on
4717 TARGET_MODE_REP_EXTENDED.
4719 Note that we assume that the property of
4720 TARGET_MODE_REP_EXTENDED(B, C) is sticky to the integral modes
4721 narrower than mode B. I.e., if A is a mode narrower than B then in
4722 order to be able to operate on it in mode B, mode A needs to
4723 satisfy the requirements set by the representation of mode B. */
4726 init_num_sign_bit_copies_in_rep (void)
4728 enum machine_mode mode, in_mode;
4730 for (in_mode = GET_CLASS_NARROWEST_MODE (MODE_INT); in_mode != VOIDmode;
4731 in_mode = GET_MODE_WIDER_MODE (mode))
4732 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != in_mode;
4733 mode = GET_MODE_WIDER_MODE (mode))
4735 enum machine_mode i;
4737 /* Currently, it is assumed that TARGET_MODE_REP_EXTENDED
4738 extends to the next widest mode. */
4739 gcc_assert (targetm.mode_rep_extended (mode, in_mode) == UNKNOWN
4740 || GET_MODE_WIDER_MODE (mode) == in_mode);
4742 /* We are in in_mode. Count how many bits outside of mode
4743 have to be copies of the sign-bit. */
4744 for (i = mode; i != in_mode; i = GET_MODE_WIDER_MODE (i))
4746 enum machine_mode wider = GET_MODE_WIDER_MODE (i);
4748 if (targetm.mode_rep_extended (i, wider) == SIGN_EXTEND
4749 /* We can only check sign-bit copies starting from the
4750 top-bit. In order to be able to check the bits we
4751 have already seen we pretend that subsequent bits
4752 have to be sign-bit copies too. */
4753 || num_sign_bit_copies_in_rep [in_mode][mode])
4754 num_sign_bit_copies_in_rep [in_mode][mode]
4755 += GET_MODE_BITSIZE (wider) - GET_MODE_BITSIZE (i);
4760 /* Suppose that truncation from the machine mode of X to MODE is not a
4761 no-op. See if there is anything special about X so that we can
4762 assume it already contains a truncated value of MODE. */
4765 truncated_to_mode (enum machine_mode mode, rtx x)
4767 /* This register has already been used in MODE without explicit
4769 if (REG_P (x) && rtl_hooks.reg_truncated_to_mode (mode, x))
4772 /* See if we already satisfy the requirements of MODE. If yes we
4773 can just switch to MODE. */
4774 if (num_sign_bit_copies_in_rep[GET_MODE (x)][mode]
4775 && (num_sign_bit_copies (x, GET_MODE (x))
4776 >= num_sign_bit_copies_in_rep[GET_MODE (x)][mode] + 1))
4782 /* Initialize non_rtx_starting_operands, which is used to speed up
4788 for (i = 0; i < NUM_RTX_CODE; i++)
4790 const char *format = GET_RTX_FORMAT (i);
4791 const char *first = strpbrk (format, "eEV");
4792 non_rtx_starting_operands[i] = first ? first - format : -1;
4795 init_num_sign_bit_copies_in_rep ();
4798 /* Check whether this is a constant pool constant. */
4800 constant_pool_constant_p (rtx x)
4802 x = avoid_constant_pool_reference (x);
4803 return GET_CODE (x) == CONST_DOUBLE;