1 /* Analyze RTL for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
30 #include "insn-config.h"
42 /* Information about a subreg of a hard register. */
45 /* Offset of first hard register involved in the subreg. */
47 /* Number of hard registers involved in the subreg. */
49 /* Whether this subreg can be represented as a hard reg with the new
54 /* Forward declarations */
55 static void set_of_1 (rtx, const_rtx, void *);
56 static bool covers_regno_p (const_rtx, unsigned int);
57 static bool covers_regno_no_parallel_p (const_rtx, unsigned int);
58 static int rtx_referenced_p_1 (rtx *, void *);
59 static int computed_jump_p_1 (const_rtx);
60 static void parms_set (rtx, const_rtx, void *);
61 static void subreg_get_info (unsigned int, enum machine_mode,
62 unsigned int, enum machine_mode,
63 struct subreg_info *);
65 static unsigned HOST_WIDE_INT cached_nonzero_bits (const_rtx, enum machine_mode,
66 const_rtx, enum machine_mode,
67 unsigned HOST_WIDE_INT);
68 static unsigned HOST_WIDE_INT nonzero_bits1 (const_rtx, enum machine_mode,
69 const_rtx, enum machine_mode,
70 unsigned HOST_WIDE_INT);
71 static unsigned int cached_num_sign_bit_copies (const_rtx, enum machine_mode, const_rtx,
74 static unsigned int num_sign_bit_copies1 (const_rtx, enum machine_mode, const_rtx,
75 enum machine_mode, unsigned int);
77 /* Offset of the first 'e', 'E' or 'V' operand for each rtx code, or
78 -1 if a code has no such operand. */
79 static int non_rtx_starting_operands[NUM_RTX_CODE];
81 /* Bit flags that specify the machine subtype we are compiling for.
82 Bits are tested using macros TARGET_... defined in the tm.h file
83 and set by `-m...' switches. Must be defined in rtlanal.c. */
87 /* Truncation narrows the mode from SOURCE mode to DESTINATION mode.
88 If TARGET_MODE_REP_EXTENDED (DESTINATION, DESTINATION_REP) is
89 SIGN_EXTEND then while narrowing we also have to enforce the
90 representation and sign-extend the value to mode DESTINATION_REP.
92 If the value is already sign-extended to DESTINATION_REP mode we
93 can just switch to DESTINATION mode on it. For each pair of
94 integral modes SOURCE and DESTINATION, when truncating from SOURCE
95 to DESTINATION, NUM_SIGN_BIT_COPIES_IN_REP[SOURCE][DESTINATION]
96 contains the number of high-order bits in SOURCE that have to be
97 copies of the sign-bit so that we can do this mode-switch to
101 num_sign_bit_copies_in_rep[MAX_MODE_INT + 1][MAX_MODE_INT + 1];
103 /* Return 1 if the value of X is unstable
104 (would be different at a different point in the program).
105 The frame pointer, arg pointer, etc. are considered stable
106 (within one function) and so is anything marked `unchanging'. */
109 rtx_unstable_p (const_rtx x)
111 const RTX_CODE code = GET_CODE (x);
118 return !MEM_READONLY_P (x) || rtx_unstable_p (XEXP (x, 0));
130 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
131 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
132 /* The arg pointer varies if it is not a fixed register. */
133 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
135 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
136 /* ??? When call-clobbered, the value is stable modulo the restore
137 that must happen after a call. This currently screws up local-alloc
138 into believing that the restore is not needed. */
139 if (x == pic_offset_table_rtx)
145 if (MEM_VOLATILE_P (x))
154 fmt = GET_RTX_FORMAT (code);
155 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
158 if (rtx_unstable_p (XEXP (x, i)))
161 else if (fmt[i] == 'E')
164 for (j = 0; j < XVECLEN (x, i); j++)
165 if (rtx_unstable_p (XVECEXP (x, i, j)))
172 /* Return 1 if X has a value that can vary even between two
173 executions of the program. 0 means X can be compared reliably
174 against certain constants or near-constants.
175 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
176 zero, we are slightly more conservative.
177 The frame pointer and the arg pointer are considered constant. */
180 rtx_varies_p (const_rtx x, bool for_alias)
193 return !MEM_READONLY_P (x) || rtx_varies_p (XEXP (x, 0), for_alias);
205 /* Note that we have to test for the actual rtx used for the frame
206 and arg pointers and not just the register number in case we have
207 eliminated the frame and/or arg pointer and are using it
209 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
210 /* The arg pointer varies if it is not a fixed register. */
211 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
213 if (x == pic_offset_table_rtx
214 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
215 /* ??? When call-clobbered, the value is stable modulo the restore
216 that must happen after a call. This currently screws up
217 local-alloc into believing that the restore is not needed, so we
218 must return 0 only if we are called from alias analysis. */
226 /* The operand 0 of a LO_SUM is considered constant
227 (in fact it is related specifically to operand 1)
228 during alias analysis. */
229 return (! for_alias && rtx_varies_p (XEXP (x, 0), for_alias))
230 || rtx_varies_p (XEXP (x, 1), for_alias);
233 if (MEM_VOLATILE_P (x))
242 fmt = GET_RTX_FORMAT (code);
243 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
246 if (rtx_varies_p (XEXP (x, i), for_alias))
249 else if (fmt[i] == 'E')
252 for (j = 0; j < XVECLEN (x, i); j++)
253 if (rtx_varies_p (XVECEXP (x, i, j), for_alias))
260 /* Return nonzero if the use of X as an address in a MEM can cause a trap.
261 MODE is the mode of the MEM (not that of X) and UNALIGNED_MEMS controls
262 whether nonzero is returned for unaligned memory accesses on strict
263 alignment machines. */
266 rtx_addr_can_trap_p_1 (const_rtx x, enum machine_mode mode, bool unaligned_mems)
268 enum rtx_code code = GET_CODE (x);
273 return SYMBOL_REF_WEAK (x);
279 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
280 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
281 || x == stack_pointer_rtx
282 /* The arg pointer varies if it is not a fixed register. */
283 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
285 /* All of the virtual frame registers are stack references. */
286 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
287 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
292 return rtx_addr_can_trap_p_1 (XEXP (x, 0), mode, unaligned_mems);
295 /* An address is assumed not to trap if:
296 - it is an address that can't trap plus a constant integer,
297 with the proper remainder modulo the mode size if we are
298 considering unaligned memory references. */
299 if (!rtx_addr_can_trap_p_1 (XEXP (x, 0), mode, unaligned_mems)
300 && GET_CODE (XEXP (x, 1)) == CONST_INT)
302 HOST_WIDE_INT offset;
304 if (!STRICT_ALIGNMENT
306 || GET_MODE_SIZE (mode) == 0)
309 offset = INTVAL (XEXP (x, 1));
311 #ifdef SPARC_STACK_BOUNDARY_HACK
312 /* ??? The SPARC port may claim a STACK_BOUNDARY higher than
313 the real alignment of %sp. However, when it does this, the
314 alignment of %sp+STACK_POINTER_OFFSET is STACK_BOUNDARY. */
315 if (SPARC_STACK_BOUNDARY_HACK
316 && (XEXP (x, 0) == stack_pointer_rtx
317 || XEXP (x, 0) == hard_frame_pointer_rtx))
318 offset -= STACK_POINTER_OFFSET;
321 return offset % GET_MODE_SIZE (mode) != 0;
324 /* - or it is the pic register plus a constant. */
325 if (XEXP (x, 0) == pic_offset_table_rtx && CONSTANT_P (XEXP (x, 1)))
332 return rtx_addr_can_trap_p_1 (XEXP (x, 1), mode, unaligned_mems);
339 return rtx_addr_can_trap_p_1 (XEXP (x, 0), mode, unaligned_mems);
345 /* If it isn't one of the case above, it can cause a trap. */
349 /* Return nonzero if the use of X as an address in a MEM can cause a trap. */
352 rtx_addr_can_trap_p (const_rtx x)
354 return rtx_addr_can_trap_p_1 (x, VOIDmode, false);
357 /* Return true if X is an address that is known to not be zero. */
360 nonzero_address_p (const_rtx x)
362 const enum rtx_code code = GET_CODE (x);
367 return !SYMBOL_REF_WEAK (x);
373 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
374 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
375 || x == stack_pointer_rtx
376 || (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM]))
378 /* All of the virtual frame registers are stack references. */
379 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
380 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
385 return nonzero_address_p (XEXP (x, 0));
388 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
389 return nonzero_address_p (XEXP (x, 0));
390 /* Handle PIC references. */
391 else if (XEXP (x, 0) == pic_offset_table_rtx
392 && CONSTANT_P (XEXP (x, 1)))
397 /* Similar to the above; allow positive offsets. Further, since
398 auto-inc is only allowed in memories, the register must be a
400 if (GET_CODE (XEXP (x, 1)) == CONST_INT
401 && INTVAL (XEXP (x, 1)) > 0)
403 return nonzero_address_p (XEXP (x, 0));
406 /* Similarly. Further, the offset is always positive. */
413 return nonzero_address_p (XEXP (x, 0));
416 return nonzero_address_p (XEXP (x, 1));
422 /* If it isn't one of the case above, might be zero. */
426 /* Return 1 if X refers to a memory location whose address
427 cannot be compared reliably with constant addresses,
428 or if X refers to a BLKmode memory object.
429 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
430 zero, we are slightly more conservative. */
433 rtx_addr_varies_p (const_rtx x, bool for_alias)
444 return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0), for_alias);
446 fmt = GET_RTX_FORMAT (code);
447 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
450 if (rtx_addr_varies_p (XEXP (x, i), for_alias))
453 else if (fmt[i] == 'E')
456 for (j = 0; j < XVECLEN (x, i); j++)
457 if (rtx_addr_varies_p (XVECEXP (x, i, j), for_alias))
463 /* Return the value of the integer term in X, if one is apparent;
465 Only obvious integer terms are detected.
466 This is used in cse.c with the `related_value' field. */
469 get_integer_term (const_rtx x)
471 if (GET_CODE (x) == CONST)
474 if (GET_CODE (x) == MINUS
475 && GET_CODE (XEXP (x, 1)) == CONST_INT)
476 return - INTVAL (XEXP (x, 1));
477 if (GET_CODE (x) == PLUS
478 && GET_CODE (XEXP (x, 1)) == CONST_INT)
479 return INTVAL (XEXP (x, 1));
483 /* If X is a constant, return the value sans apparent integer term;
485 Only obvious integer terms are detected. */
488 get_related_value (const_rtx x)
490 if (GET_CODE (x) != CONST)
493 if (GET_CODE (x) == PLUS
494 && GET_CODE (XEXP (x, 1)) == CONST_INT)
496 else if (GET_CODE (x) == MINUS
497 && GET_CODE (XEXP (x, 1)) == CONST_INT)
502 /* Return true if SYMBOL is a SYMBOL_REF and OFFSET + SYMBOL points
503 to somewhere in the same object or object_block as SYMBOL. */
506 offset_within_block_p (const_rtx symbol, HOST_WIDE_INT offset)
510 if (GET_CODE (symbol) != SYMBOL_REF)
518 if (CONSTANT_POOL_ADDRESS_P (symbol)
519 && offset < (int) GET_MODE_SIZE (get_pool_mode (symbol)))
522 decl = SYMBOL_REF_DECL (symbol);
523 if (decl && offset < int_size_in_bytes (TREE_TYPE (decl)))
527 if (SYMBOL_REF_HAS_BLOCK_INFO_P (symbol)
528 && SYMBOL_REF_BLOCK (symbol)
529 && SYMBOL_REF_BLOCK_OFFSET (symbol) >= 0
530 && ((unsigned HOST_WIDE_INT) offset + SYMBOL_REF_BLOCK_OFFSET (symbol)
531 < (unsigned HOST_WIDE_INT) SYMBOL_REF_BLOCK (symbol)->size))
537 /* Split X into a base and a constant offset, storing them in *BASE_OUT
538 and *OFFSET_OUT respectively. */
541 split_const (rtx x, rtx *base_out, rtx *offset_out)
543 if (GET_CODE (x) == CONST)
546 if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
548 *base_out = XEXP (x, 0);
549 *offset_out = XEXP (x, 1);
554 *offset_out = const0_rtx;
557 /* Return the number of places FIND appears within X. If COUNT_DEST is
558 zero, we do not count occurrences inside the destination of a SET. */
561 count_occurrences (const_rtx x, const_rtx find, int count_dest)
565 const char *format_ptr;
587 count = count_occurrences (XEXP (x, 0), find, count_dest);
589 count += count_occurrences (XEXP (x, 1), find, count_dest);
593 if (MEM_P (find) && rtx_equal_p (x, find))
598 if (SET_DEST (x) == find && ! count_dest)
599 return count_occurrences (SET_SRC (x), find, count_dest);
606 format_ptr = GET_RTX_FORMAT (code);
609 for (i = 0; i < GET_RTX_LENGTH (code); i++)
611 switch (*format_ptr++)
614 count += count_occurrences (XEXP (x, i), find, count_dest);
618 for (j = 0; j < XVECLEN (x, i); j++)
619 count += count_occurrences (XVECEXP (x, i, j), find, count_dest);
627 /* Nonzero if register REG appears somewhere within IN.
628 Also works if REG is not a register; in this case it checks
629 for a subexpression of IN that is Lisp "equal" to REG. */
632 reg_mentioned_p (const_rtx reg, const_rtx in)
644 if (GET_CODE (in) == LABEL_REF)
645 return reg == XEXP (in, 0);
647 code = GET_CODE (in);
651 /* Compare registers by number. */
653 return REG_P (reg) && REGNO (in) == REGNO (reg);
655 /* These codes have no constituent expressions
666 /* These are kept unique for a given value. */
673 if (GET_CODE (reg) == code && rtx_equal_p (reg, in))
676 fmt = GET_RTX_FORMAT (code);
678 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
683 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
684 if (reg_mentioned_p (reg, XVECEXP (in, i, j)))
687 else if (fmt[i] == 'e'
688 && reg_mentioned_p (reg, XEXP (in, i)))
694 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
695 no CODE_LABEL insn. */
698 no_labels_between_p (const_rtx beg, const_rtx end)
703 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
709 /* Nonzero if register REG is used in an insn between
710 FROM_INSN and TO_INSN (exclusive of those two). */
713 reg_used_between_p (const_rtx reg, const_rtx from_insn, const_rtx to_insn)
717 if (from_insn == to_insn)
720 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
722 && (reg_overlap_mentioned_p (reg, PATTERN (insn))
723 || (CALL_P (insn) && find_reg_fusage (insn, USE, reg))))
728 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
729 is entirely replaced by a new value and the only use is as a SET_DEST,
730 we do not consider it a reference. */
733 reg_referenced_p (const_rtx x, const_rtx body)
737 switch (GET_CODE (body))
740 if (reg_overlap_mentioned_p (x, SET_SRC (body)))
743 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
744 of a REG that occupies all of the REG, the insn references X if
745 it is mentioned in the destination. */
746 if (GET_CODE (SET_DEST (body)) != CC0
747 && GET_CODE (SET_DEST (body)) != PC
748 && !REG_P (SET_DEST (body))
749 && ! (GET_CODE (SET_DEST (body)) == SUBREG
750 && REG_P (SUBREG_REG (SET_DEST (body)))
751 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body))))
752 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
753 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body)))
754 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
755 && reg_overlap_mentioned_p (x, SET_DEST (body)))
760 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
761 if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i)))
768 return reg_overlap_mentioned_p (x, body);
771 return reg_overlap_mentioned_p (x, TRAP_CONDITION (body));
774 return reg_overlap_mentioned_p (x, XEXP (body, 0));
777 case UNSPEC_VOLATILE:
778 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
779 if (reg_overlap_mentioned_p (x, XVECEXP (body, 0, i)))
784 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
785 if (reg_referenced_p (x, XVECEXP (body, 0, i)))
790 if (MEM_P (XEXP (body, 0)))
791 if (reg_overlap_mentioned_p (x, XEXP (XEXP (body, 0), 0)))
796 if (reg_overlap_mentioned_p (x, COND_EXEC_TEST (body)))
798 return reg_referenced_p (x, COND_EXEC_CODE (body));
805 /* Nonzero if register REG is set or clobbered in an insn between
806 FROM_INSN and TO_INSN (exclusive of those two). */
809 reg_set_between_p (const_rtx reg, const_rtx from_insn, const_rtx to_insn)
813 if (from_insn == to_insn)
816 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
817 if (INSN_P (insn) && reg_set_p (reg, insn))
822 /* Internals of reg_set_between_p. */
824 reg_set_p (const_rtx reg, const_rtx insn)
826 /* We can be passed an insn or part of one. If we are passed an insn,
827 check if a side-effect of the insn clobbers REG. */
829 && (FIND_REG_INC_NOTE (insn, reg)
832 && REGNO (reg) < FIRST_PSEUDO_REGISTER
833 && overlaps_hard_reg_set_p (regs_invalidated_by_call,
834 GET_MODE (reg), REGNO (reg)))
836 || find_reg_fusage (insn, CLOBBER, reg)))))
839 return set_of (reg, insn) != NULL_RTX;
842 /* Similar to reg_set_between_p, but check all registers in X. Return 0
843 only if none of them are modified between START and END. Return 1 if
844 X contains a MEM; this routine does usememory aliasing. */
847 modified_between_p (const_rtx x, const_rtx start, const_rtx end)
849 const enum rtx_code code = GET_CODE (x);
873 if (modified_between_p (XEXP (x, 0), start, end))
875 if (MEM_READONLY_P (x))
877 for (insn = NEXT_INSN (start); insn != end; insn = NEXT_INSN (insn))
878 if (memory_modified_in_insn_p (x, insn))
884 return reg_set_between_p (x, start, end);
890 fmt = GET_RTX_FORMAT (code);
891 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
893 if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end))
896 else if (fmt[i] == 'E')
897 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
898 if (modified_between_p (XVECEXP (x, i, j), start, end))
905 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
906 of them are modified in INSN. Return 1 if X contains a MEM; this routine
907 does use memory aliasing. */
910 modified_in_p (const_rtx x, const_rtx insn)
912 const enum rtx_code code = GET_CODE (x);
932 if (modified_in_p (XEXP (x, 0), insn))
934 if (MEM_READONLY_P (x))
936 if (memory_modified_in_insn_p (x, insn))
942 return reg_set_p (x, insn);
948 fmt = GET_RTX_FORMAT (code);
949 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
951 if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn))
954 else if (fmt[i] == 'E')
955 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
956 if (modified_in_p (XVECEXP (x, i, j), insn))
963 /* Helper function for set_of. */
971 set_of_1 (rtx x, const_rtx pat, void *data1)
973 struct set_of_data *const data = (struct set_of_data *) (data1);
974 if (rtx_equal_p (x, data->pat)
975 || (!MEM_P (x) && reg_overlap_mentioned_p (data->pat, x)))
979 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
980 (either directly or via STRICT_LOW_PART and similar modifiers). */
982 set_of (const_rtx pat, const_rtx insn)
984 struct set_of_data data;
985 data.found = NULL_RTX;
987 note_stores (INSN_P (insn) ? PATTERN (insn) : insn, set_of_1, &data);
991 /* Given an INSN, return a SET expression if this insn has only a single SET.
992 It may also have CLOBBERs, USEs, or SET whose output
993 will not be used, which we ignore. */
996 single_set_2 (const_rtx insn, const_rtx pat)
999 int set_verified = 1;
1002 if (GET_CODE (pat) == PARALLEL)
1004 for (i = 0; i < XVECLEN (pat, 0); i++)
1006 rtx sub = XVECEXP (pat, 0, i);
1007 switch (GET_CODE (sub))
1014 /* We can consider insns having multiple sets, where all
1015 but one are dead as single set insns. In common case
1016 only single set is present in the pattern so we want
1017 to avoid checking for REG_UNUSED notes unless necessary.
1019 When we reach set first time, we just expect this is
1020 the single set we are looking for and only when more
1021 sets are found in the insn, we check them. */
1024 if (find_reg_note (insn, REG_UNUSED, SET_DEST (set))
1025 && !side_effects_p (set))
1031 set = sub, set_verified = 0;
1032 else if (!find_reg_note (insn, REG_UNUSED, SET_DEST (sub))
1033 || side_effects_p (sub))
1045 /* Given an INSN, return nonzero if it has more than one SET, else return
1049 multiple_sets (const_rtx insn)
1054 /* INSN must be an insn. */
1055 if (! INSN_P (insn))
1058 /* Only a PARALLEL can have multiple SETs. */
1059 if (GET_CODE (PATTERN (insn)) == PARALLEL)
1061 for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1062 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
1064 /* If we have already found a SET, then return now. */
1072 /* Either zero or one SET. */
1076 /* Return nonzero if the destination of SET equals the source
1077 and there are no side effects. */
1080 set_noop_p (const_rtx set)
1082 rtx src = SET_SRC (set);
1083 rtx dst = SET_DEST (set);
1085 if (dst == pc_rtx && src == pc_rtx)
1088 if (MEM_P (dst) && MEM_P (src))
1089 return rtx_equal_p (dst, src) && !side_effects_p (dst);
1091 if (GET_CODE (dst) == ZERO_EXTRACT)
1092 return rtx_equal_p (XEXP (dst, 0), src)
1093 && ! BYTES_BIG_ENDIAN && XEXP (dst, 2) == const0_rtx
1094 && !side_effects_p (src);
1096 if (GET_CODE (dst) == STRICT_LOW_PART)
1097 dst = XEXP (dst, 0);
1099 if (GET_CODE (src) == SUBREG && GET_CODE (dst) == SUBREG)
1101 if (SUBREG_BYTE (src) != SUBREG_BYTE (dst))
1103 src = SUBREG_REG (src);
1104 dst = SUBREG_REG (dst);
1107 return (REG_P (src) && REG_P (dst)
1108 && REGNO (src) == REGNO (dst));
1111 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1115 noop_move_p (const_rtx insn)
1117 rtx pat = PATTERN (insn);
1119 if (INSN_CODE (insn) == NOOP_MOVE_INSN_CODE)
1122 /* Insns carrying these notes are useful later on. */
1123 if (find_reg_note (insn, REG_EQUAL, NULL_RTX))
1126 /* For now treat an insn with a REG_RETVAL note as a
1127 a special insn which should not be considered a no-op. */
1128 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
1131 if (GET_CODE (pat) == SET && set_noop_p (pat))
1134 if (GET_CODE (pat) == PARALLEL)
1137 /* If nothing but SETs of registers to themselves,
1138 this insn can also be deleted. */
1139 for (i = 0; i < XVECLEN (pat, 0); i++)
1141 rtx tem = XVECEXP (pat, 0, i);
1143 if (GET_CODE (tem) == USE
1144 || GET_CODE (tem) == CLOBBER)
1147 if (GET_CODE (tem) != SET || ! set_noop_p (tem))
1157 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1158 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1159 If the object was modified, if we hit a partial assignment to X, or hit a
1160 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1161 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1165 find_last_value (rtx x, rtx *pinsn, rtx valid_to, int allow_hwreg)
1169 for (p = PREV_INSN (*pinsn); p && !LABEL_P (p);
1173 rtx set = single_set (p);
1174 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
1176 if (set && rtx_equal_p (x, SET_DEST (set)))
1178 rtx src = SET_SRC (set);
1180 if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
1181 src = XEXP (note, 0);
1183 if ((valid_to == NULL_RTX
1184 || ! modified_between_p (src, PREV_INSN (p), valid_to))
1185 /* Reject hard registers because we don't usually want
1186 to use them; we'd rather use a pseudo. */
1188 && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg))
1195 /* If set in non-simple way, we don't have a value. */
1196 if (reg_set_p (x, p))
1203 /* Return nonzero if register in range [REGNO, ENDREGNO)
1204 appears either explicitly or implicitly in X
1205 other than being stored into.
1207 References contained within the substructure at LOC do not count.
1208 LOC may be zero, meaning don't ignore anything. */
1211 refers_to_regno_p (unsigned int regno, unsigned int endregno, const_rtx x,
1215 unsigned int x_regno;
1220 /* The contents of a REG_NONNEG note is always zero, so we must come here
1221 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1225 code = GET_CODE (x);
1230 x_regno = REGNO (x);
1232 /* If we modifying the stack, frame, or argument pointer, it will
1233 clobber a virtual register. In fact, we could be more precise,
1234 but it isn't worth it. */
1235 if ((x_regno == STACK_POINTER_REGNUM
1236 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1237 || x_regno == ARG_POINTER_REGNUM
1239 || x_regno == FRAME_POINTER_REGNUM)
1240 && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER)
1243 return endregno > x_regno && regno < END_REGNO (x);
1246 /* If this is a SUBREG of a hard reg, we can see exactly which
1247 registers are being modified. Otherwise, handle normally. */
1248 if (REG_P (SUBREG_REG (x))
1249 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
1251 unsigned int inner_regno = subreg_regno (x);
1252 unsigned int inner_endregno
1253 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
1254 ? subreg_nregs (x) : 1);
1256 return endregno > inner_regno && regno < inner_endregno;
1262 if (&SET_DEST (x) != loc
1263 /* Note setting a SUBREG counts as referring to the REG it is in for
1264 a pseudo but not for hard registers since we can
1265 treat each word individually. */
1266 && ((GET_CODE (SET_DEST (x)) == SUBREG
1267 && loc != &SUBREG_REG (SET_DEST (x))
1268 && REG_P (SUBREG_REG (SET_DEST (x)))
1269 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
1270 && refers_to_regno_p (regno, endregno,
1271 SUBREG_REG (SET_DEST (x)), loc))
1272 || (!REG_P (SET_DEST (x))
1273 && refers_to_regno_p (regno, endregno, SET_DEST (x), loc))))
1276 if (code == CLOBBER || loc == &SET_SRC (x))
1285 /* X does not match, so try its subexpressions. */
1287 fmt = GET_RTX_FORMAT (code);
1288 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1290 if (fmt[i] == 'e' && loc != &XEXP (x, i))
1298 if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc))
1301 else if (fmt[i] == 'E')
1304 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1305 if (loc != &XVECEXP (x, i, j)
1306 && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc))
1313 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1314 we check if any register number in X conflicts with the relevant register
1315 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1316 contains a MEM (we don't bother checking for memory addresses that can't
1317 conflict because we expect this to be a rare case. */
1320 reg_overlap_mentioned_p (const_rtx x, const_rtx in)
1322 unsigned int regno, endregno;
1324 /* If either argument is a constant, then modifying X can not
1325 affect IN. Here we look at IN, we can profitably combine
1326 CONSTANT_P (x) with the switch statement below. */
1327 if (CONSTANT_P (in))
1331 switch (GET_CODE (x))
1333 case STRICT_LOW_PART:
1336 /* Overly conservative. */
1341 regno = REGNO (SUBREG_REG (x));
1342 if (regno < FIRST_PSEUDO_REGISTER)
1343 regno = subreg_regno (x);
1344 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
1345 ? subreg_nregs (x) : 1);
1350 endregno = END_REGNO (x);
1352 return refers_to_regno_p (regno, endregno, in, (rtx*) 0);
1362 fmt = GET_RTX_FORMAT (GET_CODE (in));
1363 for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--)
1366 if (reg_overlap_mentioned_p (x, XEXP (in, i)))
1369 else if (fmt[i] == 'E')
1372 for (j = XVECLEN (in, i) - 1; j >= 0; --j)
1373 if (reg_overlap_mentioned_p (x, XVECEXP (in, i, j)))
1383 return reg_mentioned_p (x, in);
1389 /* If any register in here refers to it we return true. */
1390 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1391 if (XEXP (XVECEXP (x, 0, i), 0) != 0
1392 && reg_overlap_mentioned_p (XEXP (XVECEXP (x, 0, i), 0), in))
1398 gcc_assert (CONSTANT_P (x));
1403 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1404 (X would be the pattern of an insn). DATA is an arbitrary pointer,
1405 ignored by note_stores, but passed to FUN.
1407 FUN receives three arguments:
1408 1. the REG, MEM, CC0 or PC being stored in or clobbered,
1409 2. the SET or CLOBBER rtx that does the store,
1410 3. the pointer DATA provided to note_stores.
1412 If the item being stored in or clobbered is a SUBREG of a hard register,
1413 the SUBREG will be passed. */
1415 #define NOTE_STORES_BODY(NOTE_STORES_FN) do { \
1417 if (GET_CODE (x) == COND_EXEC) \
1418 x = COND_EXEC_CODE (x); \
1419 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) \
1421 rtx dest = SET_DEST (x); \
1422 while ((GET_CODE (dest) == SUBREG \
1423 && (!REG_P (SUBREG_REG (dest)) \
1424 || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER)) \
1425 || GET_CODE (dest) == ZERO_EXTRACT \
1426 || GET_CODE (dest) == STRICT_LOW_PART) \
1427 dest = XEXP (dest, 0); \
1428 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions, \
1429 each of whose first operand is a register. */ \
1430 if (GET_CODE (dest) == PARALLEL) \
1432 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--) \
1433 if (XEXP (XVECEXP (dest, 0, i), 0) != 0) \
1434 (*fun) (XEXP (XVECEXP (dest, 0, i), 0), x, data); \
1437 (*fun) (dest, x, data); \
1439 else if (GET_CODE (x) == PARALLEL) \
1440 for (i = XVECLEN (x, 0) - 1; i >= 0; i--) \
1441 NOTE_STORES_FN (XVECEXP (x, 0, i), fun, data); \
1445 note_stores (const_rtx x, void (*fun) (rtx, const_rtx, void *), void *data)
1447 NOTE_STORES_BODY(note_stores);
1451 const_note_stores (const_rtx x, void (*fun) (const_rtx, const_rtx, const void *), const void *data)
1453 NOTE_STORES_BODY(const_note_stores);
1456 #undef NOTE_STORES_BODY
1459 /* Like notes_stores, but call FUN for each expression that is being
1460 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1461 FUN for each expression, not any interior subexpressions. FUN receives a
1462 pointer to the expression and the DATA passed to this function.
1464 Note that this is not quite the same test as that done in reg_referenced_p
1465 since that considers something as being referenced if it is being
1466 partially set, while we do not. */
1469 note_uses (rtx *pbody, void (*fun) (rtx *, void *), void *data)
1474 switch (GET_CODE (body))
1477 (*fun) (&COND_EXEC_TEST (body), data);
1478 note_uses (&COND_EXEC_CODE (body), fun, data);
1482 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
1483 note_uses (&XVECEXP (body, 0, i), fun, data);
1487 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
1488 note_uses (&PATTERN (XVECEXP (body, 0, i)), fun, data);
1492 (*fun) (&XEXP (body, 0), data);
1496 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
1497 (*fun) (&ASM_OPERANDS_INPUT (body, i), data);
1501 (*fun) (&TRAP_CONDITION (body), data);
1505 (*fun) (&XEXP (body, 0), data);
1509 case UNSPEC_VOLATILE:
1510 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
1511 (*fun) (&XVECEXP (body, 0, i), data);
1515 if (MEM_P (XEXP (body, 0)))
1516 (*fun) (&XEXP (XEXP (body, 0), 0), data);
1521 rtx dest = SET_DEST (body);
1523 /* For sets we replace everything in source plus registers in memory
1524 expression in store and operands of a ZERO_EXTRACT. */
1525 (*fun) (&SET_SRC (body), data);
1527 if (GET_CODE (dest) == ZERO_EXTRACT)
1529 (*fun) (&XEXP (dest, 1), data);
1530 (*fun) (&XEXP (dest, 2), data);
1533 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART)
1534 dest = XEXP (dest, 0);
1537 (*fun) (&XEXP (dest, 0), data);
1542 /* All the other possibilities never store. */
1543 (*fun) (pbody, data);
1548 /* Return nonzero if X's old contents don't survive after INSN.
1549 This will be true if X is (cc0) or if X is a register and
1550 X dies in INSN or because INSN entirely sets X.
1552 "Entirely set" means set directly and not through a SUBREG, or
1553 ZERO_EXTRACT, so no trace of the old contents remains.
1554 Likewise, REG_INC does not count.
1556 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1557 but for this use that makes no difference, since regs don't overlap
1558 during their lifetimes. Therefore, this function may be used
1559 at any time after deaths have been computed.
1561 If REG is a hard reg that occupies multiple machine registers, this
1562 function will only return 1 if each of those registers will be replaced
1566 dead_or_set_p (const_rtx insn, const_rtx x)
1568 unsigned int regno, end_regno;
1571 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1572 if (GET_CODE (x) == CC0)
1575 gcc_assert (REG_P (x));
1578 end_regno = END_REGNO (x);
1579 for (i = regno; i < end_regno; i++)
1580 if (! dead_or_set_regno_p (insn, i))
1586 /* Return TRUE iff DEST is a register or subreg of a register and
1587 doesn't change the number of words of the inner register, and any
1588 part of the register is TEST_REGNO. */
1591 covers_regno_no_parallel_p (const_rtx dest, unsigned int test_regno)
1593 unsigned int regno, endregno;
1595 if (GET_CODE (dest) == SUBREG
1596 && (((GET_MODE_SIZE (GET_MODE (dest))
1597 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1598 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1599 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1600 dest = SUBREG_REG (dest);
1605 regno = REGNO (dest);
1606 endregno = END_REGNO (dest);
1607 return (test_regno >= regno && test_regno < endregno);
1610 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1611 any member matches the covers_regno_no_parallel_p criteria. */
1614 covers_regno_p (const_rtx dest, unsigned int test_regno)
1616 if (GET_CODE (dest) == PARALLEL)
1618 /* Some targets place small structures in registers for return
1619 values of functions, and those registers are wrapped in
1620 PARALLELs that we may see as the destination of a SET. */
1623 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1625 rtx inner = XEXP (XVECEXP (dest, 0, i), 0);
1626 if (inner != NULL_RTX
1627 && covers_regno_no_parallel_p (inner, test_regno))
1634 return covers_regno_no_parallel_p (dest, test_regno);
1637 /* Utility function for dead_or_set_p to check an individual register. */
1640 dead_or_set_regno_p (const_rtx insn, unsigned int test_regno)
1644 /* See if there is a death note for something that includes TEST_REGNO. */
1645 if (find_regno_note (insn, REG_DEAD, test_regno))
1649 && find_regno_fusage (insn, CLOBBER, test_regno))
1652 pattern = PATTERN (insn);
1654 if (GET_CODE (pattern) == COND_EXEC)
1655 pattern = COND_EXEC_CODE (pattern);
1657 if (GET_CODE (pattern) == SET)
1658 return covers_regno_p (SET_DEST (pattern), test_regno);
1659 else if (GET_CODE (pattern) == PARALLEL)
1663 for (i = XVECLEN (pattern, 0) - 1; i >= 0; i--)
1665 rtx body = XVECEXP (pattern, 0, i);
1667 if (GET_CODE (body) == COND_EXEC)
1668 body = COND_EXEC_CODE (body);
1670 if ((GET_CODE (body) == SET || GET_CODE (body) == CLOBBER)
1671 && covers_regno_p (SET_DEST (body), test_regno))
1679 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1680 If DATUM is nonzero, look for one whose datum is DATUM. */
1683 find_reg_note (const_rtx insn, enum reg_note kind, const_rtx datum)
1689 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1690 if (! INSN_P (insn))
1694 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1695 if (REG_NOTE_KIND (link) == kind)
1700 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1701 if (REG_NOTE_KIND (link) == kind && datum == XEXP (link, 0))
1706 /* Return the reg-note of kind KIND in insn INSN which applies to register
1707 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1708 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1709 it might be the case that the note overlaps REGNO. */
1712 find_regno_note (const_rtx insn, enum reg_note kind, unsigned int regno)
1716 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1717 if (! INSN_P (insn))
1720 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1721 if (REG_NOTE_KIND (link) == kind
1722 /* Verify that it is a register, so that scratch and MEM won't cause a
1724 && REG_P (XEXP (link, 0))
1725 && REGNO (XEXP (link, 0)) <= regno
1726 && END_REGNO (XEXP (link, 0)) > regno)
1731 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1735 find_reg_equal_equiv_note (const_rtx insn)
1742 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1743 if (REG_NOTE_KIND (link) == REG_EQUAL
1744 || REG_NOTE_KIND (link) == REG_EQUIV)
1746 /* FIXME: We should never have REG_EQUAL/REG_EQUIV notes on
1747 insns that have multiple sets. Checking single_set to
1748 make sure of this is not the proper check, as explained
1749 in the comment in set_unique_reg_note.
1751 This should be changed into an assert. */
1752 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
1759 /* Check whether INSN is a single_set whose source is known to be
1760 equivalent to a constant. Return that constant if so, otherwise
1764 find_constant_src (const_rtx insn)
1768 set = single_set (insn);
1771 x = avoid_constant_pool_reference (SET_SRC (set));
1776 note = find_reg_equal_equiv_note (insn);
1777 if (note && CONSTANT_P (XEXP (note, 0)))
1778 return XEXP (note, 0);
1783 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1784 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1787 find_reg_fusage (const_rtx insn, enum rtx_code code, const_rtx datum)
1789 /* If it's not a CALL_INSN, it can't possibly have a
1790 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1800 for (link = CALL_INSN_FUNCTION_USAGE (insn);
1802 link = XEXP (link, 1))
1803 if (GET_CODE (XEXP (link, 0)) == code
1804 && rtx_equal_p (datum, XEXP (XEXP (link, 0), 0)))
1809 unsigned int regno = REGNO (datum);
1811 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1812 to pseudo registers, so don't bother checking. */
1814 if (regno < FIRST_PSEUDO_REGISTER)
1816 unsigned int end_regno = END_HARD_REGNO (datum);
1819 for (i = regno; i < end_regno; i++)
1820 if (find_regno_fusage (insn, code, i))
1828 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1829 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1832 find_regno_fusage (const_rtx insn, enum rtx_code code, unsigned int regno)
1836 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1837 to pseudo registers, so don't bother checking. */
1839 if (regno >= FIRST_PSEUDO_REGISTER
1843 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1847 if (GET_CODE (op = XEXP (link, 0)) == code
1848 && REG_P (reg = XEXP (op, 0))
1849 && REGNO (reg) <= regno
1850 && END_HARD_REGNO (reg) > regno)
1857 /* Return true if INSN is a call to a pure function. */
1860 pure_call_p (const_rtx insn)
1864 if (!CALL_P (insn) || ! CONST_OR_PURE_CALL_P (insn))
1867 /* Look for the note that differentiates const and pure functions. */
1868 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1872 if (GET_CODE (u = XEXP (link, 0)) == USE
1873 && MEM_P (m = XEXP (u, 0)) && GET_MODE (m) == BLKmode
1874 && GET_CODE (XEXP (m, 0)) == SCRATCH)
1881 /* Remove register note NOTE from the REG_NOTES of INSN. */
1884 remove_note (rtx insn, const_rtx note)
1888 if (note == NULL_RTX)
1891 if (REG_NOTES (insn) == note)
1892 REG_NOTES (insn) = XEXP (note, 1);
1894 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1895 if (XEXP (link, 1) == note)
1897 XEXP (link, 1) = XEXP (note, 1);
1901 switch (REG_NOTE_KIND (note))
1905 df_notes_rescan (insn);
1912 /* Remove REG_EQUAL and/or REG_EQUIV notes if INSN has such notes. */
1915 remove_reg_equal_equiv_notes (rtx insn)
1919 loc = ®_NOTES (insn);
1922 enum reg_note kind = REG_NOTE_KIND (*loc);
1923 if (kind == REG_EQUAL || kind == REG_EQUIV)
1924 *loc = XEXP (*loc, 1);
1926 loc = &XEXP (*loc, 1);
1930 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1931 return 1 if it is found. A simple equality test is used to determine if
1935 in_expr_list_p (const_rtx listp, const_rtx node)
1939 for (x = listp; x; x = XEXP (x, 1))
1940 if (node == XEXP (x, 0))
1946 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1947 remove that entry from the list if it is found.
1949 A simple equality test is used to determine if NODE matches. */
1952 remove_node_from_expr_list (const_rtx node, rtx *listp)
1955 rtx prev = NULL_RTX;
1959 if (node == XEXP (temp, 0))
1961 /* Splice the node out of the list. */
1963 XEXP (prev, 1) = XEXP (temp, 1);
1965 *listp = XEXP (temp, 1);
1971 temp = XEXP (temp, 1);
1975 /* Nonzero if X contains any volatile instructions. These are instructions
1976 which may cause unpredictable machine state instructions, and thus no
1977 instructions should be moved or combined across them. This includes
1978 only volatile asms and UNSPEC_VOLATILE instructions. */
1981 volatile_insn_p (const_rtx x)
1983 const RTX_CODE code = GET_CODE (x);
2004 case UNSPEC_VOLATILE:
2005 /* case TRAP_IF: This isn't clear yet. */
2010 if (MEM_VOLATILE_P (x))
2017 /* Recursively scan the operands of this expression. */
2020 const char *const fmt = GET_RTX_FORMAT (code);
2023 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2027 if (volatile_insn_p (XEXP (x, i)))
2030 else if (fmt[i] == 'E')
2033 for (j = 0; j < XVECLEN (x, i); j++)
2034 if (volatile_insn_p (XVECEXP (x, i, j)))
2042 /* Nonzero if X contains any volatile memory references
2043 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
2046 volatile_refs_p (const_rtx x)
2048 const RTX_CODE code = GET_CODE (x);
2067 case UNSPEC_VOLATILE:
2073 if (MEM_VOLATILE_P (x))
2080 /* Recursively scan the operands of this expression. */
2083 const char *const fmt = GET_RTX_FORMAT (code);
2086 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2090 if (volatile_refs_p (XEXP (x, i)))
2093 else if (fmt[i] == 'E')
2096 for (j = 0; j < XVECLEN (x, i); j++)
2097 if (volatile_refs_p (XVECEXP (x, i, j)))
2105 /* Similar to above, except that it also rejects register pre- and post-
2109 side_effects_p (const_rtx x)
2111 const RTX_CODE code = GET_CODE (x);
2130 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
2131 when some combination can't be done. If we see one, don't think
2132 that we can simplify the expression. */
2133 return (GET_MODE (x) != VOIDmode);
2142 case UNSPEC_VOLATILE:
2143 /* case TRAP_IF: This isn't clear yet. */
2149 if (MEM_VOLATILE_P (x))
2156 /* Recursively scan the operands of this expression. */
2159 const char *fmt = GET_RTX_FORMAT (code);
2162 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2166 if (side_effects_p (XEXP (x, i)))
2169 else if (fmt[i] == 'E')
2172 for (j = 0; j < XVECLEN (x, i); j++)
2173 if (side_effects_p (XVECEXP (x, i, j)))
2181 enum may_trap_p_flags
2183 MTP_UNALIGNED_MEMS = 1,
2186 /* Return nonzero if evaluating rtx X might cause a trap.
2187 (FLAGS & MTP_UNALIGNED_MEMS) controls whether nonzero is returned for
2188 unaligned memory accesses on strict alignment machines. If
2189 (FLAGS & AFTER_MOVE) is true, returns nonzero even in case the expression
2190 cannot trap at its current location, but it might become trapping if moved
2194 may_trap_p_1 (const_rtx x, unsigned flags)
2199 bool unaligned_mems = (flags & MTP_UNALIGNED_MEMS) != 0;
2203 code = GET_CODE (x);
2206 /* Handle these cases quickly. */
2221 case UNSPEC_VOLATILE:
2226 return MEM_VOLATILE_P (x);
2228 /* Memory ref can trap unless it's a static var or a stack slot. */
2230 if (/* MEM_NOTRAP_P only relates to the actual position of the memory
2231 reference; moving it out of condition might cause its address
2233 !(flags & MTP_AFTER_MOVE)
2235 && (!STRICT_ALIGNMENT || !unaligned_mems))
2238 rtx_addr_can_trap_p_1 (XEXP (x, 0), GET_MODE (x), unaligned_mems);
2240 /* Division by a non-constant might trap. */
2245 if (HONOR_SNANS (GET_MODE (x)))
2247 if (SCALAR_FLOAT_MODE_P (GET_MODE (x)))
2248 return flag_trapping_math;
2249 if (!CONSTANT_P (XEXP (x, 1)) || (XEXP (x, 1) == const0_rtx))
2254 /* An EXPR_LIST is used to represent a function call. This
2255 certainly may trap. */
2264 /* Some floating point comparisons may trap. */
2265 if (!flag_trapping_math)
2267 /* ??? There is no machine independent way to check for tests that trap
2268 when COMPARE is used, though many targets do make this distinction.
2269 For instance, sparc uses CCFPE for compares which generate exceptions
2270 and CCFP for compares which do not generate exceptions. */
2271 if (HONOR_NANS (GET_MODE (x)))
2273 /* But often the compare has some CC mode, so check operand
2275 if (HONOR_NANS (GET_MODE (XEXP (x, 0)))
2276 || HONOR_NANS (GET_MODE (XEXP (x, 1))))
2282 if (HONOR_SNANS (GET_MODE (x)))
2284 /* Often comparison is CC mode, so check operand modes. */
2285 if (HONOR_SNANS (GET_MODE (XEXP (x, 0)))
2286 || HONOR_SNANS (GET_MODE (XEXP (x, 1))))
2291 /* Conversion of floating point might trap. */
2292 if (flag_trapping_math && HONOR_NANS (GET_MODE (XEXP (x, 0))))
2299 /* These operations don't trap even with floating point. */
2303 /* Any floating arithmetic may trap. */
2304 if (SCALAR_FLOAT_MODE_P (GET_MODE (x))
2305 && flag_trapping_math)
2309 fmt = GET_RTX_FORMAT (code);
2310 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2314 if (may_trap_p_1 (XEXP (x, i), flags))
2317 else if (fmt[i] == 'E')
2320 for (j = 0; j < XVECLEN (x, i); j++)
2321 if (may_trap_p_1 (XVECEXP (x, i, j), flags))
2328 /* Return nonzero if evaluating rtx X might cause a trap. */
2331 may_trap_p (const_rtx x)
2333 return may_trap_p_1 (x, 0);
2336 /* Return nonzero if evaluating rtx X might cause a trap, when the expression
2337 is moved from its current location by some optimization. */
2340 may_trap_after_code_motion_p (const_rtx x)
2342 return may_trap_p_1 (x, MTP_AFTER_MOVE);
2345 /* Same as above, but additionally return nonzero if evaluating rtx X might
2346 cause a fault. We define a fault for the purpose of this function as a
2347 erroneous execution condition that cannot be encountered during the normal
2348 execution of a valid program; the typical example is an unaligned memory
2349 access on a strict alignment machine. The compiler guarantees that it
2350 doesn't generate code that will fault from a valid program, but this
2351 guarantee doesn't mean anything for individual instructions. Consider
2352 the following example:
2354 struct S { int d; union { char *cp; int *ip; }; };
2356 int foo(struct S *s)
2364 on a strict alignment machine. In a valid program, foo will never be
2365 invoked on a structure for which d is equal to 1 and the underlying
2366 unique field of the union not aligned on a 4-byte boundary, but the
2367 expression *s->ip might cause a fault if considered individually.
2369 At the RTL level, potentially problematic expressions will almost always
2370 verify may_trap_p; for example, the above dereference can be emitted as
2371 (mem:SI (reg:P)) and this expression is may_trap_p for a generic register.
2372 However, suppose that foo is inlined in a caller that causes s->cp to
2373 point to a local character variable and guarantees that s->d is not set
2374 to 1; foo may have been effectively translated into pseudo-RTL as:
2377 (set (reg:SI) (mem:SI (%fp - 7)))
2379 (set (reg:QI) (mem:QI (%fp - 7)))
2381 Now (mem:SI (%fp - 7)) is considered as not may_trap_p since it is a
2382 memory reference to a stack slot, but it will certainly cause a fault
2383 on a strict alignment machine. */
2386 may_trap_or_fault_p (const_rtx x)
2388 return may_trap_p_1 (x, MTP_UNALIGNED_MEMS);
2391 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2392 i.e., an inequality. */
2395 inequality_comparisons_p (const_rtx x)
2399 const enum rtx_code code = GET_CODE (x);
2430 len = GET_RTX_LENGTH (code);
2431 fmt = GET_RTX_FORMAT (code);
2433 for (i = 0; i < len; i++)
2437 if (inequality_comparisons_p (XEXP (x, i)))
2440 else if (fmt[i] == 'E')
2443 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2444 if (inequality_comparisons_p (XVECEXP (x, i, j)))
2452 /* Replace any occurrence of FROM in X with TO. The function does
2453 not enter into CONST_DOUBLE for the replace.
2455 Note that copying is not done so X must not be shared unless all copies
2456 are to be modified. */
2459 replace_rtx (rtx x, rtx from, rtx to)
2464 /* The following prevents loops occurrence when we change MEM in
2465 CONST_DOUBLE onto the same CONST_DOUBLE. */
2466 if (x != 0 && GET_CODE (x) == CONST_DOUBLE)
2472 /* Allow this function to make replacements in EXPR_LISTs. */
2476 if (GET_CODE (x) == SUBREG)
2478 rtx new = replace_rtx (SUBREG_REG (x), from, to);
2480 if (GET_CODE (new) == CONST_INT)
2482 x = simplify_subreg (GET_MODE (x), new,
2483 GET_MODE (SUBREG_REG (x)),
2488 SUBREG_REG (x) = new;
2492 else if (GET_CODE (x) == ZERO_EXTEND)
2494 rtx new = replace_rtx (XEXP (x, 0), from, to);
2496 if (GET_CODE (new) == CONST_INT)
2498 x = simplify_unary_operation (ZERO_EXTEND, GET_MODE (x),
2499 new, GET_MODE (XEXP (x, 0)));
2508 fmt = GET_RTX_FORMAT (GET_CODE (x));
2509 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2512 XEXP (x, i) = replace_rtx (XEXP (x, i), from, to);
2513 else if (fmt[i] == 'E')
2514 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2515 XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to);
2521 /* Replace occurrences of the old label in *X with the new one.
2522 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2525 replace_label (rtx *x, void *data)
2528 rtx old_label = ((replace_label_data *) data)->r1;
2529 rtx new_label = ((replace_label_data *) data)->r2;
2530 bool update_label_nuses = ((replace_label_data *) data)->update_label_nuses;
2535 if (GET_CODE (l) == SYMBOL_REF
2536 && CONSTANT_POOL_ADDRESS_P (l))
2538 rtx c = get_pool_constant (l);
2539 if (rtx_referenced_p (old_label, c))
2542 replace_label_data *d = (replace_label_data *) data;
2544 /* Create a copy of constant C; replace the label inside
2545 but do not update LABEL_NUSES because uses in constant pool
2547 new_c = copy_rtx (c);
2548 d->update_label_nuses = false;
2549 for_each_rtx (&new_c, replace_label, data);
2550 d->update_label_nuses = update_label_nuses;
2552 /* Add the new constant NEW_C to constant pool and replace
2553 the old reference to constant by new reference. */
2554 new_l = XEXP (force_const_mem (get_pool_mode (l), new_c), 0);
2555 *x = replace_rtx (l, l, new_l);
2560 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2561 field. This is not handled by for_each_rtx because it doesn't
2562 handle unprinted ('0') fields. */
2563 if (JUMP_P (l) && JUMP_LABEL (l) == old_label)
2564 JUMP_LABEL (l) = new_label;
2566 if ((GET_CODE (l) == LABEL_REF
2567 || GET_CODE (l) == INSN_LIST)
2568 && XEXP (l, 0) == old_label)
2570 XEXP (l, 0) = new_label;
2571 if (update_label_nuses)
2573 ++LABEL_NUSES (new_label);
2574 --LABEL_NUSES (old_label);
2582 /* When *BODY is equal to X or X is directly referenced by *BODY
2583 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2584 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2587 rtx_referenced_p_1 (rtx *body, void *x)
2591 if (*body == NULL_RTX)
2592 return y == NULL_RTX;
2594 /* Return true if a label_ref *BODY refers to label Y. */
2595 if (GET_CODE (*body) == LABEL_REF && LABEL_P (y))
2596 return XEXP (*body, 0) == y;
2598 /* If *BODY is a reference to pool constant traverse the constant. */
2599 if (GET_CODE (*body) == SYMBOL_REF
2600 && CONSTANT_POOL_ADDRESS_P (*body))
2601 return rtx_referenced_p (y, get_pool_constant (*body));
2603 /* By default, compare the RTL expressions. */
2604 return rtx_equal_p (*body, y);
2607 /* Return true if X is referenced in BODY. */
2610 rtx_referenced_p (rtx x, rtx body)
2612 return for_each_rtx (&body, rtx_referenced_p_1, x);
2615 /* If INSN is a tablejump return true and store the label (before jump table) to
2616 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2619 tablejump_p (const_rtx insn, rtx *labelp, rtx *tablep)
2624 && (label = JUMP_LABEL (insn)) != NULL_RTX
2625 && (table = next_active_insn (label)) != NULL_RTX
2627 && (GET_CODE (PATTERN (table)) == ADDR_VEC
2628 || GET_CODE (PATTERN (table)) == ADDR_DIFF_VEC))
2639 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2640 constant that is not in the constant pool and not in the condition
2641 of an IF_THEN_ELSE. */
2644 computed_jump_p_1 (const_rtx x)
2646 const enum rtx_code code = GET_CODE (x);
2666 return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
2667 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)));
2670 return (computed_jump_p_1 (XEXP (x, 1))
2671 || computed_jump_p_1 (XEXP (x, 2)));
2677 fmt = GET_RTX_FORMAT (code);
2678 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2681 && computed_jump_p_1 (XEXP (x, i)))
2684 else if (fmt[i] == 'E')
2685 for (j = 0; j < XVECLEN (x, i); j++)
2686 if (computed_jump_p_1 (XVECEXP (x, i, j)))
2693 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2695 Tablejumps and casesi insns are not considered indirect jumps;
2696 we can recognize them by a (use (label_ref)). */
2699 computed_jump_p (const_rtx insn)
2704 rtx pat = PATTERN (insn);
2706 /* If we have a JUMP_LABEL set, we're not a computed jump. */
2707 if (JUMP_LABEL (insn) != NULL)
2710 if (GET_CODE (pat) == PARALLEL)
2712 int len = XVECLEN (pat, 0);
2713 int has_use_labelref = 0;
2715 for (i = len - 1; i >= 0; i--)
2716 if (GET_CODE (XVECEXP (pat, 0, i)) == USE
2717 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0))
2719 has_use_labelref = 1;
2721 if (! has_use_labelref)
2722 for (i = len - 1; i >= 0; i--)
2723 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
2724 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
2725 && computed_jump_p_1 (SET_SRC (XVECEXP (pat, 0, i))))
2728 else if (GET_CODE (pat) == SET
2729 && SET_DEST (pat) == pc_rtx
2730 && computed_jump_p_1 (SET_SRC (pat)))
2736 /* Optimized loop of for_each_rtx, trying to avoid useless recursive
2737 calls. Processes the subexpressions of EXP and passes them to F. */
2739 for_each_rtx_1 (rtx exp, int n, rtx_function f, void *data)
2742 const char *format = GET_RTX_FORMAT (GET_CODE (exp));
2745 for (; format[n] != '\0'; n++)
2752 result = (*f) (x, data);
2754 /* Do not traverse sub-expressions. */
2756 else if (result != 0)
2757 /* Stop the traversal. */
2761 /* There are no sub-expressions. */
2764 i = non_rtx_starting_operands[GET_CODE (*x)];
2767 result = for_each_rtx_1 (*x, i, f, data);
2775 if (XVEC (exp, n) == 0)
2777 for (j = 0; j < XVECLEN (exp, n); ++j)
2780 x = &XVECEXP (exp, n, j);
2781 result = (*f) (x, data);
2783 /* Do not traverse sub-expressions. */
2785 else if (result != 0)
2786 /* Stop the traversal. */
2790 /* There are no sub-expressions. */
2793 i = non_rtx_starting_operands[GET_CODE (*x)];
2796 result = for_each_rtx_1 (*x, i, f, data);
2804 /* Nothing to do. */
2812 /* Traverse X via depth-first search, calling F for each
2813 sub-expression (including X itself). F is also passed the DATA.
2814 If F returns -1, do not traverse sub-expressions, but continue
2815 traversing the rest of the tree. If F ever returns any other
2816 nonzero value, stop the traversal, and return the value returned
2817 by F. Otherwise, return 0. This function does not traverse inside
2818 tree structure that contains RTX_EXPRs, or into sub-expressions
2819 whose format code is `0' since it is not known whether or not those
2820 codes are actually RTL.
2822 This routine is very general, and could (should?) be used to
2823 implement many of the other routines in this file. */
2826 for_each_rtx (rtx *x, rtx_function f, void *data)
2832 result = (*f) (x, data);
2834 /* Do not traverse sub-expressions. */
2836 else if (result != 0)
2837 /* Stop the traversal. */
2841 /* There are no sub-expressions. */
2844 i = non_rtx_starting_operands[GET_CODE (*x)];
2848 return for_each_rtx_1 (*x, i, f, data);
2852 /* Searches X for any reference to REGNO, returning the rtx of the
2853 reference found if any. Otherwise, returns NULL_RTX. */
2856 regno_use_in (unsigned int regno, rtx x)
2862 if (REG_P (x) && REGNO (x) == regno)
2865 fmt = GET_RTX_FORMAT (GET_CODE (x));
2866 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2870 if ((tem = regno_use_in (regno, XEXP (x, i))))
2873 else if (fmt[i] == 'E')
2874 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2875 if ((tem = regno_use_in (regno , XVECEXP (x, i, j))))
2882 /* Return a value indicating whether OP, an operand of a commutative
2883 operation, is preferred as the first or second operand. The higher
2884 the value, the stronger the preference for being the first operand.
2885 We use negative values to indicate a preference for the first operand
2886 and positive values for the second operand. */
2889 commutative_operand_precedence (rtx op)
2891 enum rtx_code code = GET_CODE (op);
2893 /* Constants always come the second operand. Prefer "nice" constants. */
2894 if (code == CONST_INT)
2896 if (code == CONST_DOUBLE)
2898 if (code == CONST_FIXED)
2900 op = avoid_constant_pool_reference (op);
2901 code = GET_CODE (op);
2903 switch (GET_RTX_CLASS (code))
2906 if (code == CONST_INT)
2908 if (code == CONST_DOUBLE)
2910 if (code == CONST_FIXED)
2915 /* SUBREGs of objects should come second. */
2916 if (code == SUBREG && OBJECT_P (SUBREG_REG (op)))
2921 /* Complex expressions should be the first, so decrease priority
2922 of objects. Prefer pointer objects over non pointer objects. */
2923 if ((REG_P (op) && REG_POINTER (op))
2924 || (MEM_P (op) && MEM_POINTER (op)))
2928 case RTX_COMM_ARITH:
2929 /* Prefer operands that are themselves commutative to be first.
2930 This helps to make things linear. In particular,
2931 (and (and (reg) (reg)) (not (reg))) is canonical. */
2935 /* If only one operand is a binary expression, it will be the first
2936 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
2937 is canonical, although it will usually be further simplified. */
2941 /* Then prefer NEG and NOT. */
2942 if (code == NEG || code == NOT)
2950 /* Return 1 iff it is necessary to swap operands of commutative operation
2951 in order to canonicalize expression. */
2954 swap_commutative_operands_p (rtx x, rtx y)
2956 return (commutative_operand_precedence (x)
2957 < commutative_operand_precedence (y));
2960 /* Return 1 if X is an autoincrement side effect and the register is
2961 not the stack pointer. */
2963 auto_inc_p (const_rtx x)
2965 switch (GET_CODE (x))
2973 /* There are no REG_INC notes for SP. */
2974 if (XEXP (x, 0) != stack_pointer_rtx)
2982 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
2984 loc_mentioned_in_p (rtx *loc, const_rtx in)
2993 code = GET_CODE (in);
2994 fmt = GET_RTX_FORMAT (code);
2995 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2997 if (loc == &in->u.fld[i].rt_rtx)
3001 if (loc_mentioned_in_p (loc, XEXP (in, i)))
3004 else if (fmt[i] == 'E')
3005 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
3006 if (loc_mentioned_in_p (loc, XVECEXP (in, i, j)))
3012 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
3013 and SUBREG_BYTE, return the bit offset where the subreg begins
3014 (counting from the least significant bit of the operand). */
3017 subreg_lsb_1 (enum machine_mode outer_mode,
3018 enum machine_mode inner_mode,
3019 unsigned int subreg_byte)
3021 unsigned int bitpos;
3025 /* A paradoxical subreg begins at bit position 0. */
3026 if (GET_MODE_BITSIZE (outer_mode) > GET_MODE_BITSIZE (inner_mode))
3029 if (WORDS_BIG_ENDIAN != BYTES_BIG_ENDIAN)
3030 /* If the subreg crosses a word boundary ensure that
3031 it also begins and ends on a word boundary. */
3032 gcc_assert (!((subreg_byte % UNITS_PER_WORD
3033 + GET_MODE_SIZE (outer_mode)) > UNITS_PER_WORD
3034 && (subreg_byte % UNITS_PER_WORD
3035 || GET_MODE_SIZE (outer_mode) % UNITS_PER_WORD)));
3037 if (WORDS_BIG_ENDIAN)
3038 word = (GET_MODE_SIZE (inner_mode)
3039 - (subreg_byte + GET_MODE_SIZE (outer_mode))) / UNITS_PER_WORD;
3041 word = subreg_byte / UNITS_PER_WORD;
3042 bitpos = word * BITS_PER_WORD;
3044 if (BYTES_BIG_ENDIAN)
3045 byte = (GET_MODE_SIZE (inner_mode)
3046 - (subreg_byte + GET_MODE_SIZE (outer_mode))) % UNITS_PER_WORD;
3048 byte = subreg_byte % UNITS_PER_WORD;
3049 bitpos += byte * BITS_PER_UNIT;
3054 /* Given a subreg X, return the bit offset where the subreg begins
3055 (counting from the least significant bit of the reg). */
3058 subreg_lsb (const_rtx x)
3060 return subreg_lsb_1 (GET_MODE (x), GET_MODE (SUBREG_REG (x)),
3064 /* Fill in information about a subreg of a hard register.
3065 xregno - A regno of an inner hard subreg_reg (or what will become one).
3066 xmode - The mode of xregno.
3067 offset - The byte offset.
3068 ymode - The mode of a top level SUBREG (or what may become one).
3069 info - Pointer to structure to fill in. */
3071 subreg_get_info (unsigned int xregno, enum machine_mode xmode,
3072 unsigned int offset, enum machine_mode ymode,
3073 struct subreg_info *info)
3075 int nregs_xmode, nregs_ymode;
3076 int mode_multiple, nregs_multiple;
3077 int offset_adj, y_offset, y_offset_adj;
3078 int regsize_xmode, regsize_ymode;
3081 gcc_assert (xregno < FIRST_PSEUDO_REGISTER);
3085 /* If there are holes in a non-scalar mode in registers, we expect
3086 that it is made up of its units concatenated together. */
3087 if (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode))
3089 enum machine_mode xmode_unit;
3091 nregs_xmode = HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode);
3092 if (GET_MODE_INNER (xmode) == VOIDmode)
3095 xmode_unit = GET_MODE_INNER (xmode);
3096 gcc_assert (HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode_unit));
3097 gcc_assert (nregs_xmode
3098 == (GET_MODE_NUNITS (xmode)
3099 * HARD_REGNO_NREGS_WITH_PADDING (xregno, xmode_unit)));
3100 gcc_assert (hard_regno_nregs[xregno][xmode]
3101 == (hard_regno_nregs[xregno][xmode_unit]
3102 * GET_MODE_NUNITS (xmode)));
3104 /* You can only ask for a SUBREG of a value with holes in the middle
3105 if you don't cross the holes. (Such a SUBREG should be done by
3106 picking a different register class, or doing it in memory if
3107 necessary.) An example of a value with holes is XCmode on 32-bit
3108 x86 with -m128bit-long-double; it's represented in 6 32-bit registers,
3109 3 for each part, but in memory it's two 128-bit parts.
3110 Padding is assumed to be at the end (not necessarily the 'high part')
3112 if ((offset / GET_MODE_SIZE (xmode_unit) + 1
3113 < GET_MODE_NUNITS (xmode))
3114 && (offset / GET_MODE_SIZE (xmode_unit)
3115 != ((offset + GET_MODE_SIZE (ymode) - 1)
3116 / GET_MODE_SIZE (xmode_unit))))
3118 info->representable_p = false;
3123 nregs_xmode = hard_regno_nregs[xregno][xmode];
3125 nregs_ymode = hard_regno_nregs[xregno][ymode];
3127 /* Paradoxical subregs are otherwise valid. */
3130 && GET_MODE_SIZE (ymode) > GET_MODE_SIZE (xmode))
3132 info->representable_p = true;
3133 /* If this is a big endian paradoxical subreg, which uses more
3134 actual hard registers than the original register, we must
3135 return a negative offset so that we find the proper highpart
3137 if (GET_MODE_SIZE (ymode) > UNITS_PER_WORD
3138 ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN)
3139 info->offset = nregs_xmode - nregs_ymode;
3142 info->nregs = nregs_ymode;
3146 /* If registers store different numbers of bits in the different
3147 modes, we cannot generally form this subreg. */
3148 if (!HARD_REGNO_NREGS_HAS_PADDING (xregno, xmode)
3149 && !HARD_REGNO_NREGS_HAS_PADDING (xregno, ymode)
3150 && (GET_MODE_SIZE (xmode) % nregs_xmode) == 0
3151 && (GET_MODE_SIZE (ymode) % nregs_ymode) == 0)
3153 regsize_xmode = GET_MODE_SIZE (xmode) / nregs_xmode;
3154 regsize_ymode = GET_MODE_SIZE (ymode) / nregs_ymode;
3155 if (!rknown && regsize_xmode > regsize_ymode && nregs_ymode > 1)
3157 info->representable_p = false;
3159 = (GET_MODE_SIZE (ymode) + regsize_xmode - 1) / regsize_xmode;
3160 info->offset = offset / regsize_xmode;
3163 if (!rknown && regsize_ymode > regsize_xmode && nregs_xmode > 1)
3165 info->representable_p = false;
3167 = (GET_MODE_SIZE (ymode) + regsize_xmode - 1) / regsize_xmode;
3168 info->offset = offset / regsize_xmode;
3173 /* Lowpart subregs are otherwise valid. */
3174 if (!rknown && offset == subreg_lowpart_offset (ymode, xmode))
3176 info->representable_p = true;
3179 if (offset == 0 || nregs_xmode == nregs_ymode)
3182 info->nregs = nregs_ymode;
3187 /* This should always pass, otherwise we don't know how to verify
3188 the constraint. These conditions may be relaxed but
3189 subreg_regno_offset would need to be redesigned. */
3190 gcc_assert ((GET_MODE_SIZE (xmode) % GET_MODE_SIZE (ymode)) == 0);
3191 gcc_assert ((nregs_xmode % nregs_ymode) == 0);
3193 /* The XMODE value can be seen as a vector of NREGS_XMODE
3194 values. The subreg must represent a lowpart of given field.
3195 Compute what field it is. */
3196 offset_adj = offset;
3197 offset_adj -= subreg_lowpart_offset (ymode,
3198 mode_for_size (GET_MODE_BITSIZE (xmode)
3202 /* Size of ymode must not be greater than the size of xmode. */
3203 mode_multiple = GET_MODE_SIZE (xmode) / GET_MODE_SIZE (ymode);
3204 gcc_assert (mode_multiple != 0);
3206 y_offset = offset / GET_MODE_SIZE (ymode);
3207 y_offset_adj = offset_adj / GET_MODE_SIZE (ymode);
3208 nregs_multiple = nregs_xmode / nregs_ymode;
3210 gcc_assert ((offset_adj % GET_MODE_SIZE (ymode)) == 0);
3211 gcc_assert ((mode_multiple % nregs_multiple) == 0);
3215 info->representable_p = (!(y_offset_adj % (mode_multiple / nregs_multiple)));
3218 info->offset = (y_offset / (mode_multiple / nregs_multiple)) * nregs_ymode;
3219 info->nregs = nregs_ymode;
3222 /* This function returns the regno offset of a subreg expression.
3223 xregno - A regno of an inner hard subreg_reg (or what will become one).
3224 xmode - The mode of xregno.
3225 offset - The byte offset.
3226 ymode - The mode of a top level SUBREG (or what may become one).
3227 RETURN - The regno offset which would be used. */
3229 subreg_regno_offset (unsigned int xregno, enum machine_mode xmode,
3230 unsigned int offset, enum machine_mode ymode)
3232 struct subreg_info info;
3233 subreg_get_info (xregno, xmode, offset, ymode, &info);
3237 /* This function returns true when the offset is representable via
3238 subreg_offset in the given regno.
3239 xregno - A regno of an inner hard subreg_reg (or what will become one).
3240 xmode - The mode of xregno.
3241 offset - The byte offset.
3242 ymode - The mode of a top level SUBREG (or what may become one).
3243 RETURN - Whether the offset is representable. */
3245 subreg_offset_representable_p (unsigned int xregno, enum machine_mode xmode,
3246 unsigned int offset, enum machine_mode ymode)
3248 struct subreg_info info;
3249 subreg_get_info (xregno, xmode, offset, ymode, &info);
3250 return info.representable_p;
3253 /* Return the final regno that a subreg expression refers to. */
3255 subreg_regno (const_rtx x)
3258 rtx subreg = SUBREG_REG (x);
3259 int regno = REGNO (subreg);
3261 ret = regno + subreg_regno_offset (regno,
3269 /* Return the number of registers that a subreg expression refers
3272 subreg_nregs (const_rtx x)
3274 struct subreg_info info;
3275 rtx subreg = SUBREG_REG (x);
3276 int regno = REGNO (subreg);
3278 subreg_get_info (regno, GET_MODE (subreg), SUBREG_BYTE (x), GET_MODE (x),
3283 struct parms_set_data
3289 /* Helper function for noticing stores to parameter registers. */
3291 parms_set (rtx x, const_rtx pat ATTRIBUTE_UNUSED, void *data)
3293 struct parms_set_data *d = data;
3294 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3295 && TEST_HARD_REG_BIT (d->regs, REGNO (x)))
3297 CLEAR_HARD_REG_BIT (d->regs, REGNO (x));
3302 /* Look backward for first parameter to be loaded.
3303 Note that loads of all parameters will not necessarily be
3304 found if CSE has eliminated some of them (e.g., an argument
3305 to the outer function is passed down as a parameter).
3306 Do not skip BOUNDARY. */
3308 find_first_parameter_load (rtx call_insn, rtx boundary)
3310 struct parms_set_data parm;
3311 rtx p, before, first_set;
3313 /* Since different machines initialize their parameter registers
3314 in different orders, assume nothing. Collect the set of all
3315 parameter registers. */
3316 CLEAR_HARD_REG_SET (parm.regs);
3318 for (p = CALL_INSN_FUNCTION_USAGE (call_insn); p; p = XEXP (p, 1))
3319 if (GET_CODE (XEXP (p, 0)) == USE
3320 && REG_P (XEXP (XEXP (p, 0), 0)))
3322 gcc_assert (REGNO (XEXP (XEXP (p, 0), 0)) < FIRST_PSEUDO_REGISTER);
3324 /* We only care about registers which can hold function
3326 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p, 0), 0))))
3329 SET_HARD_REG_BIT (parm.regs, REGNO (XEXP (XEXP (p, 0), 0)));
3333 first_set = call_insn;
3335 /* Search backward for the first set of a register in this set. */
3336 while (parm.nregs && before != boundary)
3338 before = PREV_INSN (before);
3340 /* It is possible that some loads got CSEed from one call to
3341 another. Stop in that case. */
3342 if (CALL_P (before))
3345 /* Our caller needs either ensure that we will find all sets
3346 (in case code has not been optimized yet), or take care
3347 for possible labels in a way by setting boundary to preceding
3349 if (LABEL_P (before))
3351 gcc_assert (before == boundary);
3355 if (INSN_P (before))
3357 int nregs_old = parm.nregs;
3358 note_stores (PATTERN (before), parms_set, &parm);
3359 /* If we found something that did not set a parameter reg,
3360 we're done. Do not keep going, as that might result
3361 in hoisting an insn before the setting of a pseudo
3362 that is used by the hoisted insn. */
3363 if (nregs_old != parm.nregs)
3372 /* Return true if we should avoid inserting code between INSN and preceding
3373 call instruction. */
3376 keep_with_call_p (const_rtx insn)
3380 if (INSN_P (insn) && (set = single_set (insn)) != NULL)
3382 if (REG_P (SET_DEST (set))
3383 && REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
3384 && fixed_regs[REGNO (SET_DEST (set))]
3385 && general_operand (SET_SRC (set), VOIDmode))
3387 if (REG_P (SET_SRC (set))
3388 && FUNCTION_VALUE_REGNO_P (REGNO (SET_SRC (set)))
3389 && REG_P (SET_DEST (set))
3390 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
3392 /* There may be a stack pop just after the call and before the store
3393 of the return register. Search for the actual store when deciding
3394 if we can break or not. */
3395 if (SET_DEST (set) == stack_pointer_rtx)
3397 /* This CONST_CAST is okay because next_nonnote_insn just
3398 returns it's argument and we assign it to a const_rtx
3400 const_rtx i2 = next_nonnote_insn (CONST_CAST_RTX(insn));
3401 if (i2 && keep_with_call_p (i2))
3408 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3409 to non-complex jumps. That is, direct unconditional, conditional,
3410 and tablejumps, but not computed jumps or returns. It also does
3411 not apply to the fallthru case of a conditional jump. */
3414 label_is_jump_target_p (const_rtx label, const_rtx jump_insn)
3416 rtx tmp = JUMP_LABEL (jump_insn);
3421 if (tablejump_p (jump_insn, NULL, &tmp))
3423 rtvec vec = XVEC (PATTERN (tmp),
3424 GET_CODE (PATTERN (tmp)) == ADDR_DIFF_VEC);
3425 int i, veclen = GET_NUM_ELEM (vec);
3427 for (i = 0; i < veclen; ++i)
3428 if (XEXP (RTVEC_ELT (vec, i), 0) == label)
3436 /* Return an estimate of the cost of computing rtx X.
3437 One use is in cse, to decide which expression to keep in the hash table.
3438 Another is in rtl generation, to pick the cheapest way to multiply.
3439 Other uses like the latter are expected in the future. */
3442 rtx_cost (rtx x, enum rtx_code outer_code ATTRIBUTE_UNUSED)
3452 /* Compute the default costs of certain things.
3453 Note that targetm.rtx_costs can override the defaults. */
3455 code = GET_CODE (x);
3459 total = COSTS_N_INSNS (5);
3465 total = COSTS_N_INSNS (7);
3468 /* Used in combine.c as a marker. */
3472 total = COSTS_N_INSNS (1);
3482 /* If we can't tie these modes, make this expensive. The larger
3483 the mode, the more expensive it is. */
3484 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
3485 return COSTS_N_INSNS (2
3486 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
3490 if (targetm.rtx_costs (x, code, outer_code, &total))
3495 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3496 which is already in total. */
3498 fmt = GET_RTX_FORMAT (code);
3499 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3501 total += rtx_cost (XEXP (x, i), code);
3502 else if (fmt[i] == 'E')
3503 for (j = 0; j < XVECLEN (x, i); j++)
3504 total += rtx_cost (XVECEXP (x, i, j), code);
3509 /* Return cost of address expression X.
3510 Expect that X is properly formed address reference. */
3513 address_cost (rtx x, enum machine_mode mode)
3515 /* We may be asked for cost of various unusual addresses, such as operands
3516 of push instruction. It is not worthwhile to complicate writing
3517 of the target hook by such cases. */
3519 if (!memory_address_p (mode, x))
3522 return targetm.address_cost (x);
3525 /* If the target doesn't override, compute the cost as with arithmetic. */
3528 default_address_cost (rtx x)
3530 return rtx_cost (x, MEM);
3534 unsigned HOST_WIDE_INT
3535 nonzero_bits (const_rtx x, enum machine_mode mode)
3537 return cached_nonzero_bits (x, mode, NULL_RTX, VOIDmode, 0);
3541 num_sign_bit_copies (const_rtx x, enum machine_mode mode)
3543 return cached_num_sign_bit_copies (x, mode, NULL_RTX, VOIDmode, 0);
3546 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3547 It avoids exponential behavior in nonzero_bits1 when X has
3548 identical subexpressions on the first or the second level. */
3550 static unsigned HOST_WIDE_INT
3551 cached_nonzero_bits (const_rtx x, enum machine_mode mode, const_rtx known_x,
3552 enum machine_mode known_mode,
3553 unsigned HOST_WIDE_INT known_ret)
3555 if (x == known_x && mode == known_mode)
3558 /* Try to find identical subexpressions. If found call
3559 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3560 precomputed value for the subexpression as KNOWN_RET. */
3562 if (ARITHMETIC_P (x))
3564 rtx x0 = XEXP (x, 0);
3565 rtx x1 = XEXP (x, 1);
3567 /* Check the first level. */
3569 return nonzero_bits1 (x, mode, x0, mode,
3570 cached_nonzero_bits (x0, mode, known_x,
3571 known_mode, known_ret));
3573 /* Check the second level. */
3574 if (ARITHMETIC_P (x0)
3575 && (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1)))
3576 return nonzero_bits1 (x, mode, x1, mode,
3577 cached_nonzero_bits (x1, mode, known_x,
3578 known_mode, known_ret));
3580 if (ARITHMETIC_P (x1)
3581 && (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1)))
3582 return nonzero_bits1 (x, mode, x0, mode,
3583 cached_nonzero_bits (x0, mode, known_x,
3584 known_mode, known_ret));
3587 return nonzero_bits1 (x, mode, known_x, known_mode, known_ret);
3590 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3591 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3592 is less useful. We can't allow both, because that results in exponential
3593 run time recursion. There is a nullstone testcase that triggered
3594 this. This macro avoids accidental uses of num_sign_bit_copies. */
3595 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3597 /* Given an expression, X, compute which bits in X can be nonzero.
3598 We don't care about bits outside of those defined in MODE.
3600 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3601 an arithmetic operation, we can do better. */
3603 static unsigned HOST_WIDE_INT
3604 nonzero_bits1 (const_rtx x, enum machine_mode mode, const_rtx known_x,
3605 enum machine_mode known_mode,
3606 unsigned HOST_WIDE_INT known_ret)
3608 unsigned HOST_WIDE_INT nonzero = GET_MODE_MASK (mode);
3609 unsigned HOST_WIDE_INT inner_nz;
3611 unsigned int mode_width = GET_MODE_BITSIZE (mode);
3613 /* For floating-point values, assume all bits are needed. */
3614 if (FLOAT_MODE_P (GET_MODE (x)) || FLOAT_MODE_P (mode))
3617 /* If X is wider than MODE, use its mode instead. */
3618 if (GET_MODE_BITSIZE (GET_MODE (x)) > mode_width)
3620 mode = GET_MODE (x);
3621 nonzero = GET_MODE_MASK (mode);
3622 mode_width = GET_MODE_BITSIZE (mode);
3625 if (mode_width > HOST_BITS_PER_WIDE_INT)
3626 /* Our only callers in this case look for single bit values. So
3627 just return the mode mask. Those tests will then be false. */
3630 #ifndef WORD_REGISTER_OPERATIONS
3631 /* If MODE is wider than X, but both are a single word for both the host
3632 and target machines, we can compute this from which bits of the
3633 object might be nonzero in its own mode, taking into account the fact
3634 that on many CISC machines, accessing an object in a wider mode
3635 causes the high-order bits to become undefined. So they are
3636 not known to be zero. */
3638 if (GET_MODE (x) != VOIDmode && GET_MODE (x) != mode
3639 && GET_MODE_BITSIZE (GET_MODE (x)) <= BITS_PER_WORD
3640 && GET_MODE_BITSIZE (GET_MODE (x)) <= HOST_BITS_PER_WIDE_INT
3641 && GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (GET_MODE (x)))
3643 nonzero &= cached_nonzero_bits (x, GET_MODE (x),
3644 known_x, known_mode, known_ret);
3645 nonzero |= GET_MODE_MASK (mode) & ~GET_MODE_MASK (GET_MODE (x));
3650 code = GET_CODE (x);
3654 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3655 /* If pointers extend unsigned and this is a pointer in Pmode, say that
3656 all the bits above ptr_mode are known to be zero. */
3657 if (POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode
3659 nonzero &= GET_MODE_MASK (ptr_mode);
3662 /* Include declared information about alignment of pointers. */
3663 /* ??? We don't properly preserve REG_POINTER changes across
3664 pointer-to-integer casts, so we can't trust it except for
3665 things that we know must be pointers. See execute/960116-1.c. */
3666 if ((x == stack_pointer_rtx
3667 || x == frame_pointer_rtx
3668 || x == arg_pointer_rtx)
3669 && REGNO_POINTER_ALIGN (REGNO (x)))
3671 unsigned HOST_WIDE_INT alignment
3672 = REGNO_POINTER_ALIGN (REGNO (x)) / BITS_PER_UNIT;
3674 #ifdef PUSH_ROUNDING
3675 /* If PUSH_ROUNDING is defined, it is possible for the
3676 stack to be momentarily aligned only to that amount,
3677 so we pick the least alignment. */
3678 if (x == stack_pointer_rtx && PUSH_ARGS)
3679 alignment = MIN ((unsigned HOST_WIDE_INT) PUSH_ROUNDING (1),
3683 nonzero &= ~(alignment - 1);
3687 unsigned HOST_WIDE_INT nonzero_for_hook = nonzero;
3688 rtx new = rtl_hooks.reg_nonzero_bits (x, mode, known_x,
3689 known_mode, known_ret,
3693 nonzero_for_hook &= cached_nonzero_bits (new, mode, known_x,
3694 known_mode, known_ret);
3696 return nonzero_for_hook;
3700 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
3701 /* If X is negative in MODE, sign-extend the value. */
3702 if (INTVAL (x) > 0 && mode_width < BITS_PER_WORD
3703 && 0 != (INTVAL (x) & ((HOST_WIDE_INT) 1 << (mode_width - 1))))
3704 return (INTVAL (x) | ((HOST_WIDE_INT) (-1) << mode_width));
3710 #ifdef LOAD_EXTEND_OP
3711 /* In many, if not most, RISC machines, reading a byte from memory
3712 zeros the rest of the register. Noticing that fact saves a lot
3713 of extra zero-extends. */
3714 if (LOAD_EXTEND_OP (GET_MODE (x)) == ZERO_EXTEND)
3715 nonzero &= GET_MODE_MASK (GET_MODE (x));
3720 case UNEQ: case LTGT:
3721 case GT: case GTU: case UNGT:
3722 case LT: case LTU: case UNLT:
3723 case GE: case GEU: case UNGE:
3724 case LE: case LEU: case UNLE:
3725 case UNORDERED: case ORDERED:
3726 /* If this produces an integer result, we know which bits are set.
3727 Code here used to clear bits outside the mode of X, but that is
3729 /* Mind that MODE is the mode the caller wants to look at this
3730 operation in, and not the actual operation mode. We can wind
3731 up with (subreg:DI (gt:V4HI x y)), and we don't have anything
3732 that describes the results of a vector compare. */
3733 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
3734 && mode_width <= HOST_BITS_PER_WIDE_INT)
3735 nonzero = STORE_FLAG_VALUE;
3740 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3741 and num_sign_bit_copies. */
3742 if (num_sign_bit_copies (XEXP (x, 0), GET_MODE (x))
3743 == GET_MODE_BITSIZE (GET_MODE (x)))
3747 if (GET_MODE_SIZE (GET_MODE (x)) < mode_width)
3748 nonzero |= (GET_MODE_MASK (mode) & ~GET_MODE_MASK (GET_MODE (x)));
3753 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3754 and num_sign_bit_copies. */
3755 if (num_sign_bit_copies (XEXP (x, 0), GET_MODE (x))
3756 == GET_MODE_BITSIZE (GET_MODE (x)))
3762 nonzero &= (cached_nonzero_bits (XEXP (x, 0), mode,
3763 known_x, known_mode, known_ret)
3764 & GET_MODE_MASK (mode));
3768 nonzero &= cached_nonzero_bits (XEXP (x, 0), mode,
3769 known_x, known_mode, known_ret);
3770 if (GET_MODE (XEXP (x, 0)) != VOIDmode)
3771 nonzero &= GET_MODE_MASK (GET_MODE (XEXP (x, 0)));
3775 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
3776 Otherwise, show all the bits in the outer mode but not the inner
3778 inner_nz = cached_nonzero_bits (XEXP (x, 0), mode,
3779 known_x, known_mode, known_ret);
3780 if (GET_MODE (XEXP (x, 0)) != VOIDmode)
3782 inner_nz &= GET_MODE_MASK (GET_MODE (XEXP (x, 0)));
3784 & (((HOST_WIDE_INT) 1
3785 << (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))) - 1))))
3786 inner_nz |= (GET_MODE_MASK (mode)
3787 & ~GET_MODE_MASK (GET_MODE (XEXP (x, 0))));
3790 nonzero &= inner_nz;
3794 nonzero &= cached_nonzero_bits (XEXP (x, 0), mode,
3795 known_x, known_mode, known_ret)
3796 & cached_nonzero_bits (XEXP (x, 1), mode,
3797 known_x, known_mode, known_ret);
3801 case UMIN: case UMAX: case SMIN: case SMAX:
3803 unsigned HOST_WIDE_INT nonzero0 =
3804 cached_nonzero_bits (XEXP (x, 0), mode,
3805 known_x, known_mode, known_ret);
3807 /* Don't call nonzero_bits for the second time if it cannot change
3809 if ((nonzero & nonzero0) != nonzero)
3811 | cached_nonzero_bits (XEXP (x, 1), mode,
3812 known_x, known_mode, known_ret);
3816 case PLUS: case MINUS:
3818 case DIV: case UDIV:
3819 case MOD: case UMOD:
3820 /* We can apply the rules of arithmetic to compute the number of
3821 high- and low-order zero bits of these operations. We start by
3822 computing the width (position of the highest-order nonzero bit)
3823 and the number of low-order zero bits for each value. */
3825 unsigned HOST_WIDE_INT nz0 =
3826 cached_nonzero_bits (XEXP (x, 0), mode,
3827 known_x, known_mode, known_ret);
3828 unsigned HOST_WIDE_INT nz1 =
3829 cached_nonzero_bits (XEXP (x, 1), mode,
3830 known_x, known_mode, known_ret);
3831 int sign_index = GET_MODE_BITSIZE (GET_MODE (x)) - 1;
3832 int width0 = floor_log2 (nz0) + 1;
3833 int width1 = floor_log2 (nz1) + 1;
3834 int low0 = floor_log2 (nz0 & -nz0);
3835 int low1 = floor_log2 (nz1 & -nz1);
3836 HOST_WIDE_INT op0_maybe_minusp
3837 = (nz0 & ((HOST_WIDE_INT) 1 << sign_index));
3838 HOST_WIDE_INT op1_maybe_minusp
3839 = (nz1 & ((HOST_WIDE_INT) 1 << sign_index));
3840 unsigned int result_width = mode_width;
3846 result_width = MAX (width0, width1) + 1;
3847 result_low = MIN (low0, low1);
3850 result_low = MIN (low0, low1);
3853 result_width = width0 + width1;
3854 result_low = low0 + low1;
3859 if (! op0_maybe_minusp && ! op1_maybe_minusp)
3860 result_width = width0;
3865 result_width = width0;
3870 if (! op0_maybe_minusp && ! op1_maybe_minusp)
3871 result_width = MIN (width0, width1);
3872 result_low = MIN (low0, low1);
3877 result_width = MIN (width0, width1);
3878 result_low = MIN (low0, low1);
3884 if (result_width < mode_width)
3885 nonzero &= ((HOST_WIDE_INT) 1 << result_width) - 1;
3888 nonzero &= ~(((HOST_WIDE_INT) 1 << result_low) - 1);
3890 #ifdef POINTERS_EXTEND_UNSIGNED
3891 /* If pointers extend unsigned and this is an addition or subtraction
3892 to a pointer in Pmode, all the bits above ptr_mode are known to be
3894 if (POINTERS_EXTEND_UNSIGNED > 0 && GET_MODE (x) == Pmode
3895 && (code == PLUS || code == MINUS)
3896 && REG_P (XEXP (x, 0)) && REG_POINTER (XEXP (x, 0)))
3897 nonzero &= GET_MODE_MASK (ptr_mode);
3903 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3904 && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT)
3905 nonzero &= ((HOST_WIDE_INT) 1 << INTVAL (XEXP (x, 1))) - 1;
3909 /* If this is a SUBREG formed for a promoted variable that has
3910 been zero-extended, we know that at least the high-order bits
3911 are zero, though others might be too. */
3913 if (SUBREG_PROMOTED_VAR_P (x) && SUBREG_PROMOTED_UNSIGNED_P (x) > 0)
3914 nonzero = GET_MODE_MASK (GET_MODE (x))
3915 & cached_nonzero_bits (SUBREG_REG (x), GET_MODE (x),
3916 known_x, known_mode, known_ret);
3918 /* If the inner mode is a single word for both the host and target
3919 machines, we can compute this from which bits of the inner
3920 object might be nonzero. */
3921 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) <= BITS_PER_WORD
3922 && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
3923 <= HOST_BITS_PER_WIDE_INT))
3925 nonzero &= cached_nonzero_bits (SUBREG_REG (x), mode,
3926 known_x, known_mode, known_ret);
3928 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
3929 /* If this is a typical RISC machine, we only have to worry
3930 about the way loads are extended. */
3931 if ((LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND
3933 & (((unsigned HOST_WIDE_INT) 1
3934 << (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) - 1))))
3936 : LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) != ZERO_EXTEND)
3937 || !MEM_P (SUBREG_REG (x)))
3940 /* On many CISC machines, accessing an object in a wider mode
3941 causes the high-order bits to become undefined. So they are
3942 not known to be zero. */
3943 if (GET_MODE_SIZE (GET_MODE (x))
3944 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3945 nonzero |= (GET_MODE_MASK (GET_MODE (x))
3946 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (x))));
3955 /* The nonzero bits are in two classes: any bits within MODE
3956 that aren't in GET_MODE (x) are always significant. The rest of the
3957 nonzero bits are those that are significant in the operand of
3958 the shift when shifted the appropriate number of bits. This
3959 shows that high-order bits are cleared by the right shift and
3960 low-order bits by left shifts. */
3961 if (GET_CODE (XEXP (x, 1)) == CONST_INT
3962 && INTVAL (XEXP (x, 1)) >= 0
3963 && INTVAL (XEXP (x, 1)) < HOST_BITS_PER_WIDE_INT)
3965 enum machine_mode inner_mode = GET_MODE (x);
3966 unsigned int width = GET_MODE_BITSIZE (inner_mode);
3967 int count = INTVAL (XEXP (x, 1));
3968 unsigned HOST_WIDE_INT mode_mask = GET_MODE_MASK (inner_mode);
3969 unsigned HOST_WIDE_INT op_nonzero =
3970 cached_nonzero_bits (XEXP (x, 0), mode,
3971 known_x, known_mode, known_ret);
3972 unsigned HOST_WIDE_INT inner = op_nonzero & mode_mask;
3973 unsigned HOST_WIDE_INT outer = 0;
3975 if (mode_width > width)
3976 outer = (op_nonzero & nonzero & ~mode_mask);
3978 if (code == LSHIFTRT)
3980 else if (code == ASHIFTRT)
3984 /* If the sign bit may have been nonzero before the shift, we
3985 need to mark all the places it could have been copied to
3986 by the shift as possibly nonzero. */
3987 if (inner & ((HOST_WIDE_INT) 1 << (width - 1 - count)))
3988 inner |= (((HOST_WIDE_INT) 1 << count) - 1) << (width - count);
3990 else if (code == ASHIFT)
3993 inner = ((inner << (count % width)
3994 | (inner >> (width - (count % width)))) & mode_mask);
3996 nonzero &= (outer | inner);
4002 /* This is at most the number of bits in the mode. */
4003 nonzero = ((HOST_WIDE_INT) 2 << (floor_log2 (mode_width))) - 1;
4007 /* If CLZ has a known value at zero, then the nonzero bits are
4008 that value, plus the number of bits in the mode minus one. */
4009 if (CLZ_DEFINED_VALUE_AT_ZERO (mode, nonzero))
4010 nonzero |= ((HOST_WIDE_INT) 1 << (floor_log2 (mode_width))) - 1;
4016 /* If CTZ has a known value at zero, then the nonzero bits are
4017 that value, plus the number of bits in the mode minus one. */
4018 if (CTZ_DEFINED_VALUE_AT_ZERO (mode, nonzero))
4019 nonzero |= ((HOST_WIDE_INT) 1 << (floor_log2 (mode_width))) - 1;
4030 unsigned HOST_WIDE_INT nonzero_true =
4031 cached_nonzero_bits (XEXP (x, 1), mode,
4032 known_x, known_mode, known_ret);
4034 /* Don't call nonzero_bits for the second time if it cannot change
4036 if ((nonzero & nonzero_true) != nonzero)
4037 nonzero &= nonzero_true
4038 | cached_nonzero_bits (XEXP (x, 2), mode,
4039 known_x, known_mode, known_ret);
4050 /* See the macro definition above. */
4051 #undef cached_num_sign_bit_copies
4054 /* The function cached_num_sign_bit_copies is a wrapper around
4055 num_sign_bit_copies1. It avoids exponential behavior in
4056 num_sign_bit_copies1 when X has identical subexpressions on the
4057 first or the second level. */
4060 cached_num_sign_bit_copies (const_rtx x, enum machine_mode mode, const_rtx known_x,
4061 enum machine_mode known_mode,
4062 unsigned int known_ret)
4064 if (x == known_x && mode == known_mode)
4067 /* Try to find identical subexpressions. If found call
4068 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
4069 the precomputed value for the subexpression as KNOWN_RET. */
4071 if (ARITHMETIC_P (x))
4073 rtx x0 = XEXP (x, 0);
4074 rtx x1 = XEXP (x, 1);
4076 /* Check the first level. */
4079 num_sign_bit_copies1 (x, mode, x0, mode,
4080 cached_num_sign_bit_copies (x0, mode, known_x,
4084 /* Check the second level. */
4085 if (ARITHMETIC_P (x0)
4086 && (x1 == XEXP (x0, 0) || x1 == XEXP (x0, 1)))
4088 num_sign_bit_copies1 (x, mode, x1, mode,
4089 cached_num_sign_bit_copies (x1, mode, known_x,
4093 if (ARITHMETIC_P (x1)
4094 && (x0 == XEXP (x1, 0) || x0 == XEXP (x1, 1)))
4096 num_sign_bit_copies1 (x, mode, x0, mode,
4097 cached_num_sign_bit_copies (x0, mode, known_x,
4102 return num_sign_bit_copies1 (x, mode, known_x, known_mode, known_ret);
4105 /* Return the number of bits at the high-order end of X that are known to
4106 be equal to the sign bit. X will be used in mode MODE; if MODE is
4107 VOIDmode, X will be used in its own mode. The returned value will always
4108 be between 1 and the number of bits in MODE. */
4111 num_sign_bit_copies1 (const_rtx x, enum machine_mode mode, const_rtx known_x,
4112 enum machine_mode known_mode,
4113 unsigned int known_ret)
4115 enum rtx_code code = GET_CODE (x);
4116 unsigned int bitwidth = GET_MODE_BITSIZE (mode);
4117 int num0, num1, result;
4118 unsigned HOST_WIDE_INT nonzero;
4120 /* If we weren't given a mode, use the mode of X. If the mode is still
4121 VOIDmode, we don't know anything. Likewise if one of the modes is
4124 if (mode == VOIDmode)
4125 mode = GET_MODE (x);
4127 if (mode == VOIDmode || FLOAT_MODE_P (mode) || FLOAT_MODE_P (GET_MODE (x)))
4130 /* For a smaller object, just ignore the high bits. */
4131 if (bitwidth < GET_MODE_BITSIZE (GET_MODE (x)))
4133 num0 = cached_num_sign_bit_copies (x, GET_MODE (x),
4134 known_x, known_mode, known_ret);
4136 num0 - (int) (GET_MODE_BITSIZE (GET_MODE (x)) - bitwidth));
4139 if (GET_MODE (x) != VOIDmode && bitwidth > GET_MODE_BITSIZE (GET_MODE (x)))
4141 #ifndef WORD_REGISTER_OPERATIONS
4142 /* If this machine does not do all register operations on the entire
4143 register and MODE is wider than the mode of X, we can say nothing
4144 at all about the high-order bits. */
4147 /* Likewise on machines that do, if the mode of the object is smaller
4148 than a word and loads of that size don't sign extend, we can say
4149 nothing about the high order bits. */
4150 if (GET_MODE_BITSIZE (GET_MODE (x)) < BITS_PER_WORD
4151 #ifdef LOAD_EXTEND_OP
4152 && LOAD_EXTEND_OP (GET_MODE (x)) != SIGN_EXTEND
4163 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4164 /* If pointers extend signed and this is a pointer in Pmode, say that
4165 all the bits above ptr_mode are known to be sign bit copies. */
4166 if (! POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode && mode == Pmode
4168 return GET_MODE_BITSIZE (Pmode) - GET_MODE_BITSIZE (ptr_mode) + 1;
4172 unsigned int copies_for_hook = 1, copies = 1;
4173 rtx new = rtl_hooks.reg_num_sign_bit_copies (x, mode, known_x,
4174 known_mode, known_ret,
4178 copies = cached_num_sign_bit_copies (new, mode, known_x,
4179 known_mode, known_ret);
4181 if (copies > 1 || copies_for_hook > 1)
4182 return MAX (copies, copies_for_hook);
4184 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
4189 #ifdef LOAD_EXTEND_OP
4190 /* Some RISC machines sign-extend all loads of smaller than a word. */
4191 if (LOAD_EXTEND_OP (GET_MODE (x)) == SIGN_EXTEND)
4192 return MAX (1, ((int) bitwidth
4193 - (int) GET_MODE_BITSIZE (GET_MODE (x)) + 1));
4198 /* If the constant is negative, take its 1's complement and remask.
4199 Then see how many zero bits we have. */
4200 nonzero = INTVAL (x) & GET_MODE_MASK (mode);
4201 if (bitwidth <= HOST_BITS_PER_WIDE_INT
4202 && (nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4203 nonzero = (~nonzero) & GET_MODE_MASK (mode);
4205 return (nonzero == 0 ? bitwidth : bitwidth - floor_log2 (nonzero) - 1);
4208 /* If this is a SUBREG for a promoted object that is sign-extended
4209 and we are looking at it in a wider mode, we know that at least the
4210 high-order bits are known to be sign bit copies. */
4212 if (SUBREG_PROMOTED_VAR_P (x) && ! SUBREG_PROMOTED_UNSIGNED_P (x))
4214 num0 = cached_num_sign_bit_copies (SUBREG_REG (x), mode,
4215 known_x, known_mode, known_ret);
4216 return MAX ((int) bitwidth
4217 - (int) GET_MODE_BITSIZE (GET_MODE (x)) + 1,
4221 /* For a smaller object, just ignore the high bits. */
4222 if (bitwidth <= GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))))
4224 num0 = cached_num_sign_bit_copies (SUBREG_REG (x), VOIDmode,
4225 known_x, known_mode, known_ret);
4226 return MAX (1, (num0
4227 - (int) (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4231 #ifdef WORD_REGISTER_OPERATIONS
4232 #ifdef LOAD_EXTEND_OP
4233 /* For paradoxical SUBREGs on machines where all register operations
4234 affect the entire register, just look inside. Note that we are
4235 passing MODE to the recursive call, so the number of sign bit copies
4236 will remain relative to that mode, not the inner mode. */
4238 /* This works only if loads sign extend. Otherwise, if we get a
4239 reload for the inner part, it may be loaded from the stack, and
4240 then we lose all sign bit copies that existed before the store
4243 if ((GET_MODE_SIZE (GET_MODE (x))
4244 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4245 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x))) == SIGN_EXTEND
4246 && MEM_P (SUBREG_REG (x)))
4247 return cached_num_sign_bit_copies (SUBREG_REG (x), mode,
4248 known_x, known_mode, known_ret);
4254 if (GET_CODE (XEXP (x, 1)) == CONST_INT)
4255 return MAX (1, (int) bitwidth - INTVAL (XEXP (x, 1)));
4259 return (bitwidth - GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
4260 + cached_num_sign_bit_copies (XEXP (x, 0), VOIDmode,
4261 known_x, known_mode, known_ret));
4264 /* For a smaller object, just ignore the high bits. */
4265 num0 = cached_num_sign_bit_copies (XEXP (x, 0), VOIDmode,
4266 known_x, known_mode, known_ret);
4267 return MAX (1, (num0 - (int) (GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0)))
4271 return cached_num_sign_bit_copies (XEXP (x, 0), mode,
4272 known_x, known_mode, known_ret);
4274 case ROTATE: case ROTATERT:
4275 /* If we are rotating left by a number of bits less than the number
4276 of sign bit copies, we can just subtract that amount from the
4278 if (GET_CODE (XEXP (x, 1)) == CONST_INT
4279 && INTVAL (XEXP (x, 1)) >= 0
4280 && INTVAL (XEXP (x, 1)) < (int) bitwidth)
4282 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4283 known_x, known_mode, known_ret);
4284 return MAX (1, num0 - (code == ROTATE ? INTVAL (XEXP (x, 1))
4285 : (int) bitwidth - INTVAL (XEXP (x, 1))));
4290 /* In general, this subtracts one sign bit copy. But if the value
4291 is known to be positive, the number of sign bit copies is the
4292 same as that of the input. Finally, if the input has just one bit
4293 that might be nonzero, all the bits are copies of the sign bit. */
4294 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4295 known_x, known_mode, known_ret);
4296 if (bitwidth > HOST_BITS_PER_WIDE_INT)
4297 return num0 > 1 ? num0 - 1 : 1;
4299 nonzero = nonzero_bits (XEXP (x, 0), mode);
4304 && (((HOST_WIDE_INT) 1 << (bitwidth - 1)) & nonzero))
4309 case IOR: case AND: case XOR:
4310 case SMIN: case SMAX: case UMIN: case UMAX:
4311 /* Logical operations will preserve the number of sign-bit copies.
4312 MIN and MAX operations always return one of the operands. */
4313 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4314 known_x, known_mode, known_ret);
4315 num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4316 known_x, known_mode, known_ret);
4318 /* If num1 is clearing some of the top bits then regardless of
4319 the other term, we are guaranteed to have at least that many
4320 high-order zero bits. */
4323 && bitwidth <= HOST_BITS_PER_WIDE_INT
4324 && GET_CODE (XEXP (x, 1)) == CONST_INT
4325 && !(INTVAL (XEXP (x, 1)) & ((HOST_WIDE_INT) 1 << (bitwidth - 1))))
4328 /* Similarly for IOR when setting high-order bits. */
4331 && bitwidth <= HOST_BITS_PER_WIDE_INT
4332 && GET_CODE (XEXP (x, 1)) == CONST_INT
4333 && (INTVAL (XEXP (x, 1)) & ((HOST_WIDE_INT) 1 << (bitwidth - 1))))
4336 return MIN (num0, num1);
4338 case PLUS: case MINUS:
4339 /* For addition and subtraction, we can have a 1-bit carry. However,
4340 if we are subtracting 1 from a positive number, there will not
4341 be such a carry. Furthermore, if the positive number is known to
4342 be 0 or 1, we know the result is either -1 or 0. */
4344 if (code == PLUS && XEXP (x, 1) == constm1_rtx
4345 && bitwidth <= HOST_BITS_PER_WIDE_INT)
4347 nonzero = nonzero_bits (XEXP (x, 0), mode);
4348 if ((((HOST_WIDE_INT) 1 << (bitwidth - 1)) & nonzero) == 0)
4349 return (nonzero == 1 || nonzero == 0 ? bitwidth
4350 : bitwidth - floor_log2 (nonzero) - 1);
4353 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4354 known_x, known_mode, known_ret);
4355 num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4356 known_x, known_mode, known_ret);
4357 result = MAX (1, MIN (num0, num1) - 1);
4359 #ifdef POINTERS_EXTEND_UNSIGNED
4360 /* If pointers extend signed and this is an addition or subtraction
4361 to a pointer in Pmode, all the bits above ptr_mode are known to be
4363 if (! POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode
4364 && (code == PLUS || code == MINUS)
4365 && REG_P (XEXP (x, 0)) && REG_POINTER (XEXP (x, 0)))
4366 result = MAX ((int) (GET_MODE_BITSIZE (Pmode)
4367 - GET_MODE_BITSIZE (ptr_mode) + 1),
4373 /* The number of bits of the product is the sum of the number of
4374 bits of both terms. However, unless one of the terms if known
4375 to be positive, we must allow for an additional bit since negating
4376 a negative number can remove one sign bit copy. */
4378 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4379 known_x, known_mode, known_ret);
4380 num1 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4381 known_x, known_mode, known_ret);
4383 result = bitwidth - (bitwidth - num0) - (bitwidth - num1);
4385 && (bitwidth > HOST_BITS_PER_WIDE_INT
4386 || (((nonzero_bits (XEXP (x, 0), mode)
4387 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4388 && ((nonzero_bits (XEXP (x, 1), mode)
4389 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0))))
4392 return MAX (1, result);
4395 /* The result must be <= the first operand. If the first operand
4396 has the high bit set, we know nothing about the number of sign
4398 if (bitwidth > HOST_BITS_PER_WIDE_INT)
4400 else if ((nonzero_bits (XEXP (x, 0), mode)
4401 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4404 return cached_num_sign_bit_copies (XEXP (x, 0), mode,
4405 known_x, known_mode, known_ret);
4408 /* The result must be <= the second operand. */
4409 return cached_num_sign_bit_copies (XEXP (x, 1), mode,
4410 known_x, known_mode, known_ret);
4413 /* Similar to unsigned division, except that we have to worry about
4414 the case where the divisor is negative, in which case we have
4416 result = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4417 known_x, known_mode, known_ret);
4419 && (bitwidth > HOST_BITS_PER_WIDE_INT
4420 || (nonzero_bits (XEXP (x, 1), mode)
4421 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0))
4427 result = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4428 known_x, known_mode, known_ret);
4430 && (bitwidth > HOST_BITS_PER_WIDE_INT
4431 || (nonzero_bits (XEXP (x, 1), mode)
4432 & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0))
4438 /* Shifts by a constant add to the number of bits equal to the
4440 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4441 known_x, known_mode, known_ret);
4442 if (GET_CODE (XEXP (x, 1)) == CONST_INT
4443 && INTVAL (XEXP (x, 1)) > 0)
4444 num0 = MIN ((int) bitwidth, num0 + INTVAL (XEXP (x, 1)));
4449 /* Left shifts destroy copies. */
4450 if (GET_CODE (XEXP (x, 1)) != CONST_INT
4451 || INTVAL (XEXP (x, 1)) < 0
4452 || INTVAL (XEXP (x, 1)) >= (int) bitwidth)
4455 num0 = cached_num_sign_bit_copies (XEXP (x, 0), mode,
4456 known_x, known_mode, known_ret);
4457 return MAX (1, num0 - INTVAL (XEXP (x, 1)));
4460 num0 = cached_num_sign_bit_copies (XEXP (x, 1), mode,
4461 known_x, known_mode, known_ret);
4462 num1 = cached_num_sign_bit_copies (XEXP (x, 2), mode,
4463 known_x, known_mode, known_ret);
4464 return MIN (num0, num1);
4466 case EQ: case NE: case GE: case GT: case LE: case LT:
4467 case UNEQ: case LTGT: case UNGE: case UNGT: case UNLE: case UNLT:
4468 case GEU: case GTU: case LEU: case LTU:
4469 case UNORDERED: case ORDERED:
4470 /* If the constant is negative, take its 1's complement and remask.
4471 Then see how many zero bits we have. */
4472 nonzero = STORE_FLAG_VALUE;
4473 if (bitwidth <= HOST_BITS_PER_WIDE_INT
4474 && (nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))) != 0)
4475 nonzero = (~nonzero) & GET_MODE_MASK (mode);
4477 return (nonzero == 0 ? bitwidth : bitwidth - floor_log2 (nonzero) - 1);
4483 /* If we haven't been able to figure it out by one of the above rules,
4484 see if some of the high-order bits are known to be zero. If so,
4485 count those bits and return one less than that amount. If we can't
4486 safely compute the mask for this mode, always return BITWIDTH. */
4488 bitwidth = GET_MODE_BITSIZE (mode);
4489 if (bitwidth > HOST_BITS_PER_WIDE_INT)
4492 nonzero = nonzero_bits (x, mode);
4493 return nonzero & ((HOST_WIDE_INT) 1 << (bitwidth - 1))
4494 ? 1 : bitwidth - floor_log2 (nonzero) - 1;
4497 /* Calculate the rtx_cost of a single instruction. A return value of
4498 zero indicates an instruction pattern without a known cost. */
4501 insn_rtx_cost (rtx pat)
4506 /* Extract the single set rtx from the instruction pattern.
4507 We can't use single_set since we only have the pattern. */
4508 if (GET_CODE (pat) == SET)
4510 else if (GET_CODE (pat) == PARALLEL)
4513 for (i = 0; i < XVECLEN (pat, 0); i++)
4515 rtx x = XVECEXP (pat, 0, i);
4516 if (GET_CODE (x) == SET)
4529 cost = rtx_cost (SET_SRC (set), SET);
4530 return cost > 0 ? cost : COSTS_N_INSNS (1);
4533 /* Given an insn INSN and condition COND, return the condition in a
4534 canonical form to simplify testing by callers. Specifically:
4536 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4537 (2) Both operands will be machine operands; (cc0) will have been replaced.
4538 (3) If an operand is a constant, it will be the second operand.
4539 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4540 for GE, GEU, and LEU.
4542 If the condition cannot be understood, or is an inequality floating-point
4543 comparison which needs to be reversed, 0 will be returned.
4545 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4547 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4548 insn used in locating the condition was found. If a replacement test
4549 of the condition is desired, it should be placed in front of that
4550 insn and we will be sure that the inputs are still valid.
4552 If WANT_REG is nonzero, we wish the condition to be relative to that
4553 register, if possible. Therefore, do not canonicalize the condition
4554 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4555 to be a compare to a CC mode register.
4557 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4561 canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
4562 rtx want_reg, int allow_cc_mode, int valid_at_insn_p)
4569 int reverse_code = 0;
4570 enum machine_mode mode;
4571 basic_block bb = BLOCK_FOR_INSN (insn);
4573 code = GET_CODE (cond);
4574 mode = GET_MODE (cond);
4575 op0 = XEXP (cond, 0);
4576 op1 = XEXP (cond, 1);
4579 code = reversed_comparison_code (cond, insn);
4580 if (code == UNKNOWN)
4586 /* If we are comparing a register with zero, see if the register is set
4587 in the previous insn to a COMPARE or a comparison operation. Perform
4588 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4591 while ((GET_RTX_CLASS (code) == RTX_COMPARE
4592 || GET_RTX_CLASS (code) == RTX_COMM_COMPARE)
4593 && op1 == CONST0_RTX (GET_MODE (op0))
4596 /* Set nonzero when we find something of interest. */
4600 /* If comparison with cc0, import actual comparison from compare
4604 if ((prev = prev_nonnote_insn (prev)) == 0
4605 || !NONJUMP_INSN_P (prev)
4606 || (set = single_set (prev)) == 0
4607 || SET_DEST (set) != cc0_rtx)
4610 op0 = SET_SRC (set);
4611 op1 = CONST0_RTX (GET_MODE (op0));
4617 /* If this is a COMPARE, pick up the two things being compared. */
4618 if (GET_CODE (op0) == COMPARE)
4620 op1 = XEXP (op0, 1);
4621 op0 = XEXP (op0, 0);
4624 else if (!REG_P (op0))
4627 /* Go back to the previous insn. Stop if it is not an INSN. We also
4628 stop if it isn't a single set or if it has a REG_INC note because
4629 we don't want to bother dealing with it. */
4631 if ((prev = prev_nonnote_insn (prev)) == 0
4632 || !NONJUMP_INSN_P (prev)
4633 || FIND_REG_INC_NOTE (prev, NULL_RTX)
4634 /* In cfglayout mode, there do not have to be labels at the
4635 beginning of a block, or jumps at the end, so the previous
4636 conditions would not stop us when we reach bb boundary. */
4637 || BLOCK_FOR_INSN (prev) != bb)
4640 set = set_of (op0, prev);
4643 && (GET_CODE (set) != SET
4644 || !rtx_equal_p (SET_DEST (set), op0)))
4647 /* If this is setting OP0, get what it sets it to if it looks
4651 enum machine_mode inner_mode = GET_MODE (SET_DEST (set));
4652 #ifdef FLOAT_STORE_FLAG_VALUE
4653 REAL_VALUE_TYPE fsfv;
4656 /* ??? We may not combine comparisons done in a CCmode with
4657 comparisons not done in a CCmode. This is to aid targets
4658 like Alpha that have an IEEE compliant EQ instruction, and
4659 a non-IEEE compliant BEQ instruction. The use of CCmode is
4660 actually artificial, simply to prevent the combination, but
4661 should not affect other platforms.
4663 However, we must allow VOIDmode comparisons to match either
4664 CCmode or non-CCmode comparison, because some ports have
4665 modeless comparisons inside branch patterns.
4667 ??? This mode check should perhaps look more like the mode check
4668 in simplify_comparison in combine. */
4670 if ((GET_CODE (SET_SRC (set)) == COMPARE
4673 && GET_MODE_CLASS (inner_mode) == MODE_INT
4674 && (GET_MODE_BITSIZE (inner_mode)
4675 <= HOST_BITS_PER_WIDE_INT)
4676 && (STORE_FLAG_VALUE
4677 & ((HOST_WIDE_INT) 1
4678 << (GET_MODE_BITSIZE (inner_mode) - 1))))
4679 #ifdef FLOAT_STORE_FLAG_VALUE
4681 && SCALAR_FLOAT_MODE_P (inner_mode)
4682 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
4683 REAL_VALUE_NEGATIVE (fsfv)))
4686 && COMPARISON_P (SET_SRC (set))))
4687 && (((GET_MODE_CLASS (mode) == MODE_CC)
4688 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
4689 || mode == VOIDmode || inner_mode == VOIDmode))
4691 else if (((code == EQ
4693 && (GET_MODE_BITSIZE (inner_mode)
4694 <= HOST_BITS_PER_WIDE_INT)
4695 && GET_MODE_CLASS (inner_mode) == MODE_INT
4696 && (STORE_FLAG_VALUE
4697 & ((HOST_WIDE_INT) 1
4698 << (GET_MODE_BITSIZE (inner_mode) - 1))))
4699 #ifdef FLOAT_STORE_FLAG_VALUE
4701 && SCALAR_FLOAT_MODE_P (inner_mode)
4702 && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
4703 REAL_VALUE_NEGATIVE (fsfv)))
4706 && COMPARISON_P (SET_SRC (set))
4707 && (((GET_MODE_CLASS (mode) == MODE_CC)
4708 == (GET_MODE_CLASS (inner_mode) == MODE_CC))
4709 || mode == VOIDmode || inner_mode == VOIDmode))
4719 else if (reg_set_p (op0, prev))
4720 /* If this sets OP0, but not directly, we have to give up. */
4725 /* If the caller is expecting the condition to be valid at INSN,
4726 make sure X doesn't change before INSN. */
4727 if (valid_at_insn_p)
4728 if (modified_in_p (x, prev) || modified_between_p (x, prev, insn))
4730 if (COMPARISON_P (x))
4731 code = GET_CODE (x);
4734 code = reversed_comparison_code (x, prev);
4735 if (code == UNKNOWN)
4740 op0 = XEXP (x, 0), op1 = XEXP (x, 1);
4746 /* If constant is first, put it last. */
4747 if (CONSTANT_P (op0))
4748 code = swap_condition (code), tem = op0, op0 = op1, op1 = tem;
4750 /* If OP0 is the result of a comparison, we weren't able to find what
4751 was really being compared, so fail. */
4753 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
4756 /* Canonicalize any ordered comparison with integers involving equality
4757 if we can do computations in the relevant mode and we do not
4760 if (GET_MODE_CLASS (GET_MODE (op0)) != MODE_CC
4761 && GET_CODE (op1) == CONST_INT
4762 && GET_MODE (op0) != VOIDmode
4763 && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT)
4765 HOST_WIDE_INT const_val = INTVAL (op1);
4766 unsigned HOST_WIDE_INT uconst_val = const_val;
4767 unsigned HOST_WIDE_INT max_val
4768 = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0));
4773 if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1)
4774 code = LT, op1 = gen_int_mode (const_val + 1, GET_MODE (op0));
4777 /* When cross-compiling, const_val might be sign-extended from
4778 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
4780 if ((HOST_WIDE_INT) (const_val & max_val)
4781 != (((HOST_WIDE_INT) 1
4782 << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1))))
4783 code = GT, op1 = gen_int_mode (const_val - 1, GET_MODE (op0));
4787 if (uconst_val < max_val)
4788 code = LTU, op1 = gen_int_mode (uconst_val + 1, GET_MODE (op0));
4792 if (uconst_val != 0)
4793 code = GTU, op1 = gen_int_mode (uconst_val - 1, GET_MODE (op0));
4801 /* Never return CC0; return zero instead. */
4805 return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
4808 /* Given a jump insn JUMP, return the condition that will cause it to branch
4809 to its JUMP_LABEL. If the condition cannot be understood, or is an
4810 inequality floating-point comparison which needs to be reversed, 0 will
4813 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4814 insn used in locating the condition was found. If a replacement test
4815 of the condition is desired, it should be placed in front of that
4816 insn and we will be sure that the inputs are still valid. If EARLIEST
4817 is null, the returned condition will be valid at INSN.
4819 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
4820 compare CC mode register.
4822 VALID_AT_INSN_P is the same as for canonicalize_condition. */
4825 get_condition (rtx jump, rtx *earliest, int allow_cc_mode, int valid_at_insn_p)
4831 /* If this is not a standard conditional jump, we can't parse it. */
4833 || ! any_condjump_p (jump))
4835 set = pc_set (jump);
4837 cond = XEXP (SET_SRC (set), 0);
4839 /* If this branches to JUMP_LABEL when the condition is false, reverse
4842 = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF
4843 && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump);
4845 return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX,
4846 allow_cc_mode, valid_at_insn_p);
4849 /* Initialize the table NUM_SIGN_BIT_COPIES_IN_REP based on
4850 TARGET_MODE_REP_EXTENDED.
4852 Note that we assume that the property of
4853 TARGET_MODE_REP_EXTENDED(B, C) is sticky to the integral modes
4854 narrower than mode B. I.e., if A is a mode narrower than B then in
4855 order to be able to operate on it in mode B, mode A needs to
4856 satisfy the requirements set by the representation of mode B. */
4859 init_num_sign_bit_copies_in_rep (void)
4861 enum machine_mode mode, in_mode;
4863 for (in_mode = GET_CLASS_NARROWEST_MODE (MODE_INT); in_mode != VOIDmode;
4864 in_mode = GET_MODE_WIDER_MODE (mode))
4865 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != in_mode;
4866 mode = GET_MODE_WIDER_MODE (mode))
4868 enum machine_mode i;
4870 /* Currently, it is assumed that TARGET_MODE_REP_EXTENDED
4871 extends to the next widest mode. */
4872 gcc_assert (targetm.mode_rep_extended (mode, in_mode) == UNKNOWN
4873 || GET_MODE_WIDER_MODE (mode) == in_mode);
4875 /* We are in in_mode. Count how many bits outside of mode
4876 have to be copies of the sign-bit. */
4877 for (i = mode; i != in_mode; i = GET_MODE_WIDER_MODE (i))
4879 enum machine_mode wider = GET_MODE_WIDER_MODE (i);
4881 if (targetm.mode_rep_extended (i, wider) == SIGN_EXTEND
4882 /* We can only check sign-bit copies starting from the
4883 top-bit. In order to be able to check the bits we
4884 have already seen we pretend that subsequent bits
4885 have to be sign-bit copies too. */
4886 || num_sign_bit_copies_in_rep [in_mode][mode])
4887 num_sign_bit_copies_in_rep [in_mode][mode]
4888 += GET_MODE_BITSIZE (wider) - GET_MODE_BITSIZE (i);
4893 /* Suppose that truncation from the machine mode of X to MODE is not a
4894 no-op. See if there is anything special about X so that we can
4895 assume it already contains a truncated value of MODE. */
4898 truncated_to_mode (enum machine_mode mode, const_rtx x)
4900 /* This register has already been used in MODE without explicit
4902 if (REG_P (x) && rtl_hooks.reg_truncated_to_mode (mode, x))
4905 /* See if we already satisfy the requirements of MODE. If yes we
4906 can just switch to MODE. */
4907 if (num_sign_bit_copies_in_rep[GET_MODE (x)][mode]
4908 && (num_sign_bit_copies (x, GET_MODE (x))
4909 >= num_sign_bit_copies_in_rep[GET_MODE (x)][mode] + 1))
4915 /* Initialize non_rtx_starting_operands, which is used to speed up
4921 for (i = 0; i < NUM_RTX_CODE; i++)
4923 const char *format = GET_RTX_FORMAT (i);
4924 const char *first = strpbrk (format, "eEV");
4925 non_rtx_starting_operands[i] = first ? first - format : -1;
4928 init_num_sign_bit_copies_in_rep ();
4931 /* Check whether this is a constant pool constant. */
4933 constant_pool_constant_p (rtx x)
4935 x = avoid_constant_pool_reference (x);
4936 return GET_CODE (x) == CONST_DOUBLE;