1 /* Reload pseudo regs into hard regs for insns that require hard regs.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
25 #include "coretypes.h"
29 #include "hard-reg-set.h"
33 #include "insn-config.h"
39 #include "addresses.h"
40 #include "basic-block.h"
50 /* This file contains the reload pass of the compiler, which is
51 run after register allocation has been done. It checks that
52 each insn is valid (operands required to be in registers really
53 are in registers of the proper class) and fixes up invalid ones
54 by copying values temporarily into registers for the insns
57 The results of register allocation are described by the vector
58 reg_renumber; the insns still contain pseudo regs, but reg_renumber
59 can be used to find which hard reg, if any, a pseudo reg is in.
61 The technique we always use is to free up a few hard regs that are
62 called ``reload regs'', and for each place where a pseudo reg
63 must be in a hard reg, copy it temporarily into one of the reload regs.
65 Reload regs are allocated locally for every instruction that needs
66 reloads. When there are pseudos which are allocated to a register that
67 has been chosen as a reload reg, such pseudos must be ``spilled''.
68 This means that they go to other hard regs, or to stack slots if no other
69 available hard regs can be found. Spilling can invalidate more
70 insns, requiring additional need for reloads, so we must keep checking
71 until the process stabilizes.
73 For machines with different classes of registers, we must keep track
74 of the register class needed for each reload, and make sure that
75 we allocate enough reload registers of each class.
77 The file reload.c contains the code that checks one insn for
78 validity and reports the reloads that it needs. This file
79 is in charge of scanning the entire rtl code, accumulating the
80 reload needs, spilling, assigning reload registers to use for
81 fixing up each insn, and generating the new insns to copy values
82 into the reload registers. */
84 /* During reload_as_needed, element N contains a REG rtx for the hard reg
85 into which reg N has been reloaded (perhaps for a previous insn). */
86 static rtx *reg_last_reload_reg;
88 /* Elt N nonzero if reg_last_reload_reg[N] has been set in this insn
89 for an output reload that stores into reg N. */
90 static regset_head reg_has_output_reload;
92 /* Indicates which hard regs are reload-registers for an output reload
93 in the current insn. */
94 static HARD_REG_SET reg_is_output_reload;
96 /* Element N is the constant value to which pseudo reg N is equivalent,
97 or zero if pseudo reg N is not equivalent to a constant.
98 find_reloads looks at this in order to replace pseudo reg N
99 with the constant it stands for. */
100 rtx *reg_equiv_constant;
102 /* Element N is an invariant value to which pseudo reg N is equivalent.
103 eliminate_regs_in_insn uses this to replace pseudos in particular
105 rtx *reg_equiv_invariant;
107 /* Element N is a memory location to which pseudo reg N is equivalent,
108 prior to any register elimination (such as frame pointer to stack
109 pointer). Depending on whether or not it is a valid address, this value
110 is transferred to either reg_equiv_address or reg_equiv_mem. */
111 rtx *reg_equiv_memory_loc;
113 /* We allocate reg_equiv_memory_loc inside a varray so that the garbage
114 collector can keep track of what is inside. */
115 VEC(rtx,gc) *reg_equiv_memory_loc_vec;
117 /* Element N is the address of stack slot to which pseudo reg N is equivalent.
118 This is used when the address is not valid as a memory address
119 (because its displacement is too big for the machine.) */
120 rtx *reg_equiv_address;
122 /* Element N is the memory slot to which pseudo reg N is equivalent,
123 or zero if pseudo reg N is not equivalent to a memory slot. */
126 /* Element N is an EXPR_LIST of REG_EQUIVs containing MEMs with
127 alternate representations of the location of pseudo reg N. */
128 rtx *reg_equiv_alt_mem_list;
130 /* Widest width in which each pseudo reg is referred to (via subreg). */
131 static unsigned int *reg_max_ref_width;
133 /* Element N is the list of insns that initialized reg N from its equivalent
134 constant or memory slot. */
136 int reg_equiv_init_size;
138 /* Vector to remember old contents of reg_renumber before spilling. */
139 static short *reg_old_renumber;
141 /* During reload_as_needed, element N contains the last pseudo regno reloaded
142 into hard register N. If that pseudo reg occupied more than one register,
143 reg_reloaded_contents points to that pseudo for each spill register in
144 use; all of these must remain set for an inheritance to occur. */
145 static int reg_reloaded_contents[FIRST_PSEUDO_REGISTER];
147 /* During reload_as_needed, element N contains the insn for which
148 hard register N was last used. Its contents are significant only
149 when reg_reloaded_valid is set for this register. */
150 static rtx reg_reloaded_insn[FIRST_PSEUDO_REGISTER];
152 /* Indicate if reg_reloaded_insn / reg_reloaded_contents is valid. */
153 static HARD_REG_SET reg_reloaded_valid;
154 /* Indicate if the register was dead at the end of the reload.
155 This is only valid if reg_reloaded_contents is set and valid. */
156 static HARD_REG_SET reg_reloaded_dead;
158 /* Indicate whether the register's current value is one that is not
159 safe to retain across a call, even for registers that are normally
161 static HARD_REG_SET reg_reloaded_call_part_clobbered;
163 /* Number of spill-regs so far; number of valid elements of spill_regs. */
166 /* In parallel with spill_regs, contains REG rtx's for those regs.
167 Holds the last rtx used for any given reg, or 0 if it has never
168 been used for spilling yet. This rtx is reused, provided it has
170 static rtx spill_reg_rtx[FIRST_PSEUDO_REGISTER];
172 /* In parallel with spill_regs, contains nonzero for a spill reg
173 that was stored after the last time it was used.
174 The precise value is the insn generated to do the store. */
175 static rtx spill_reg_store[FIRST_PSEUDO_REGISTER];
177 /* This is the register that was stored with spill_reg_store. This is a
178 copy of reload_out / reload_out_reg when the value was stored; if
179 reload_out is a MEM, spill_reg_stored_to will be set to reload_out_reg. */
180 static rtx spill_reg_stored_to[FIRST_PSEUDO_REGISTER];
182 /* This table is the inverse mapping of spill_regs:
183 indexed by hard reg number,
184 it contains the position of that reg in spill_regs,
185 or -1 for something that is not in spill_regs.
187 ?!? This is no longer accurate. */
188 static short spill_reg_order[FIRST_PSEUDO_REGISTER];
190 /* This reg set indicates registers that can't be used as spill registers for
191 the currently processed insn. These are the hard registers which are live
192 during the insn, but not allocated to pseudos, as well as fixed
194 static HARD_REG_SET bad_spill_regs;
196 /* These are the hard registers that can't be used as spill register for any
197 insn. This includes registers used for user variables and registers that
198 we can't eliminate. A register that appears in this set also can't be used
199 to retry register allocation. */
200 static HARD_REG_SET bad_spill_regs_global;
202 /* Describes order of use of registers for reloading
203 of spilled pseudo-registers. `n_spills' is the number of
204 elements that are actually valid; new ones are added at the end.
206 Both spill_regs and spill_reg_order are used on two occasions:
207 once during find_reload_regs, where they keep track of the spill registers
208 for a single insn, but also during reload_as_needed where they show all
209 the registers ever used by reload. For the latter case, the information
210 is calculated during finish_spills. */
211 static short spill_regs[FIRST_PSEUDO_REGISTER];
213 /* This vector of reg sets indicates, for each pseudo, which hard registers
214 may not be used for retrying global allocation because the register was
215 formerly spilled from one of them. If we allowed reallocating a pseudo to
216 a register that it was already allocated to, reload might not
218 static HARD_REG_SET *pseudo_previous_regs;
220 /* This vector of reg sets indicates, for each pseudo, which hard
221 registers may not be used for retrying global allocation because they
222 are used as spill registers during one of the insns in which the
224 static HARD_REG_SET *pseudo_forbidden_regs;
226 /* All hard regs that have been used as spill registers for any insn are
227 marked in this set. */
228 static HARD_REG_SET used_spill_regs;
230 /* Index of last register assigned as a spill register. We allocate in
231 a round-robin fashion. */
232 static int last_spill_reg;
234 /* Nonzero if indirect addressing is supported on the machine; this means
235 that spilling (REG n) does not require reloading it into a register in
236 order to do (MEM (REG n)) or (MEM (PLUS (REG n) (CONST_INT c))). The
237 value indicates the level of indirect addressing supported, e.g., two
238 means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
240 static char spill_indirect_levels;
242 /* Nonzero if indirect addressing is supported when the innermost MEM is
243 of the form (MEM (SYMBOL_REF sym)). It is assumed that the level to
244 which these are valid is the same as spill_indirect_levels, above. */
245 char indirect_symref_ok;
247 /* Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid. */
248 char double_reg_address_ok;
250 /* Record the stack slot for each spilled hard register. */
251 static rtx spill_stack_slot[FIRST_PSEUDO_REGISTER];
253 /* Width allocated so far for that stack slot. */
254 static unsigned int spill_stack_slot_width[FIRST_PSEUDO_REGISTER];
256 /* Record which pseudos needed to be spilled. */
257 static regset_head spilled_pseudos;
259 /* Used for communication between order_regs_for_reload and count_pseudo.
260 Used to avoid counting one pseudo twice. */
261 static regset_head pseudos_counted;
263 /* First uid used by insns created by reload in this function.
264 Used in find_equiv_reg. */
265 int reload_first_uid;
267 /* Flag set by local-alloc or global-alloc if anything is live in
268 a call-clobbered reg across calls. */
269 int caller_save_needed;
271 /* Set to 1 while reload_as_needed is operating.
272 Required by some machines to handle any generated moves differently. */
273 int reload_in_progress = 0;
275 /* These arrays record the insn_code of insns that may be needed to
276 perform input and output reloads of special objects. They provide a
277 place to pass a scratch register. */
278 enum insn_code reload_in_optab[NUM_MACHINE_MODES];
279 enum insn_code reload_out_optab[NUM_MACHINE_MODES];
281 /* This obstack is used for allocation of rtl during register elimination.
282 The allocated storage can be freed once find_reloads has processed the
284 static struct obstack reload_obstack;
286 /* Points to the beginning of the reload_obstack. All insn_chain structures
287 are allocated first. */
288 static char *reload_startobj;
290 /* The point after all insn_chain structures. Used to quickly deallocate
291 memory allocated in copy_reloads during calculate_needs_all_insns. */
292 static char *reload_firstobj;
294 /* This points before all local rtl generated by register elimination.
295 Used to quickly free all memory after processing one insn. */
296 static char *reload_insn_firstobj;
298 /* List of insn_chain instructions, one for every insn that reload needs to
300 struct insn_chain *reload_insn_chain;
302 /* List of all insns needing reloads. */
303 static struct insn_chain *insns_need_reload;
305 /* This structure is used to record information about register eliminations.
306 Each array entry describes one possible way of eliminating a register
307 in favor of another. If there is more than one way of eliminating a
308 particular register, the most preferred should be specified first. */
312 int from; /* Register number to be eliminated. */
313 int to; /* Register number used as replacement. */
314 HOST_WIDE_INT initial_offset; /* Initial difference between values. */
315 int can_eliminate; /* Nonzero if this elimination can be done. */
316 int can_eliminate_previous; /* Value of CAN_ELIMINATE in previous scan over
317 insns made by reload. */
318 HOST_WIDE_INT offset; /* Current offset between the two regs. */
319 HOST_WIDE_INT previous_offset;/* Offset at end of previous insn. */
320 int ref_outside_mem; /* "to" has been referenced outside a MEM. */
321 rtx from_rtx; /* REG rtx for the register to be eliminated.
322 We cannot simply compare the number since
323 we might then spuriously replace a hard
324 register corresponding to a pseudo
325 assigned to the reg to be eliminated. */
326 rtx to_rtx; /* REG rtx for the replacement. */
329 static struct elim_table *reg_eliminate = 0;
331 /* This is an intermediate structure to initialize the table. It has
332 exactly the members provided by ELIMINABLE_REGS. */
333 static const struct elim_table_1
337 } reg_eliminate_1[] =
339 /* If a set of eliminable registers was specified, define the table from it.
340 Otherwise, default to the normal case of the frame pointer being
341 replaced by the stack pointer. */
343 #ifdef ELIMINABLE_REGS
346 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}};
349 #define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
351 /* Record the number of pending eliminations that have an offset not equal
352 to their initial offset. If nonzero, we use a new copy of each
353 replacement result in any insns encountered. */
354 int num_not_at_initial_offset;
356 /* Count the number of registers that we may be able to eliminate. */
357 static int num_eliminable;
358 /* And the number of registers that are equivalent to a constant that
359 can be eliminated to frame_pointer / arg_pointer + constant. */
360 static int num_eliminable_invariants;
362 /* For each label, we record the offset of each elimination. If we reach
363 a label by more than one path and an offset differs, we cannot do the
364 elimination. This information is indexed by the difference of the
365 number of the label and the first label number. We can't offset the
366 pointer itself as this can cause problems on machines with segmented
367 memory. The first table is an array of flags that records whether we
368 have yet encountered a label and the second table is an array of arrays,
369 one entry in the latter array for each elimination. */
371 static int first_label_num;
372 static char *offsets_known_at;
373 static HOST_WIDE_INT (*offsets_at)[NUM_ELIMINABLE_REGS];
375 /* Number of labels in the current function. */
377 static int num_labels;
379 static void replace_pseudos_in (rtx *, enum machine_mode, rtx);
380 static void maybe_fix_stack_asms (void);
381 static void copy_reloads (struct insn_chain *);
382 static void calculate_needs_all_insns (int);
383 static int find_reg (struct insn_chain *, int);
384 static void find_reload_regs (struct insn_chain *);
385 static void select_reload_regs (void);
386 static void delete_caller_save_insns (void);
388 static void spill_failure (rtx, enum reg_class);
389 static void count_spilled_pseudo (int, int, int);
390 static void delete_dead_insn (rtx);
391 static void alter_reg (int, int);
392 static void set_label_offsets (rtx, rtx, int);
393 static void check_eliminable_occurrences (rtx);
394 static void elimination_effects (rtx, enum machine_mode);
395 static int eliminate_regs_in_insn (rtx, int);
396 static void update_eliminable_offsets (void);
397 static void mark_not_eliminable (rtx, rtx, void *);
398 static void set_initial_elim_offsets (void);
399 static bool verify_initial_elim_offsets (void);
400 static void set_initial_label_offsets (void);
401 static void set_offsets_for_label (rtx);
402 static void init_elim_table (void);
403 static void update_eliminables (HARD_REG_SET *);
404 static void spill_hard_reg (unsigned int, int);
405 static int finish_spills (int);
406 static void scan_paradoxical_subregs (rtx);
407 static void count_pseudo (int);
408 static void order_regs_for_reload (struct insn_chain *);
409 static void reload_as_needed (int);
410 static void forget_old_reloads_1 (rtx, rtx, void *);
411 static void forget_marked_reloads (regset);
412 static int reload_reg_class_lower (const void *, const void *);
413 static void mark_reload_reg_in_use (unsigned int, int, enum reload_type,
415 static void clear_reload_reg_in_use (unsigned int, int, enum reload_type,
417 static int reload_reg_free_p (unsigned int, int, enum reload_type);
418 static int reload_reg_free_for_value_p (int, int, int, enum reload_type,
420 static int free_for_value_p (int, enum machine_mode, int, enum reload_type,
422 static int reload_reg_reaches_end_p (unsigned int, int, enum reload_type);
423 static int allocate_reload_reg (struct insn_chain *, int, int);
424 static int conflicts_with_override (rtx);
425 static void failed_reload (rtx, int);
426 static int set_reload_reg (int, int);
427 static void choose_reload_regs_init (struct insn_chain *, rtx *);
428 static void choose_reload_regs (struct insn_chain *);
429 static void merge_assigned_reloads (rtx);
430 static void emit_input_reload_insns (struct insn_chain *, struct reload *,
432 static void emit_output_reload_insns (struct insn_chain *, struct reload *,
434 static void do_input_reload (struct insn_chain *, struct reload *, int);
435 static void do_output_reload (struct insn_chain *, struct reload *, int);
436 static bool inherit_piecemeal_p (int, int);
437 static void emit_reload_insns (struct insn_chain *);
438 static void delete_output_reload (rtx, int, int);
439 static void delete_address_reloads (rtx, rtx);
440 static void delete_address_reloads_1 (rtx, rtx, rtx);
441 static rtx inc_for_reload (rtx, rtx, rtx, int);
443 static void add_auto_inc_notes (rtx, rtx);
445 static void copy_eh_notes (rtx, rtx);
446 static int reloads_conflict (int, int);
447 static rtx gen_reload (rtx, rtx, int, enum reload_type);
448 static rtx emit_insn_if_valid_for_reload (rtx);
450 /* Initialize the reload pass once per compilation. */
457 /* Often (MEM (REG n)) is still valid even if (REG n) is put on the stack.
458 Set spill_indirect_levels to the number of levels such addressing is
459 permitted, zero if it is not permitted at all. */
462 = gen_rtx_MEM (Pmode,
465 LAST_VIRTUAL_REGISTER + 1),
467 spill_indirect_levels = 0;
469 while (memory_address_p (QImode, tem))
471 spill_indirect_levels++;
472 tem = gen_rtx_MEM (Pmode, tem);
475 /* See if indirect addressing is valid for (MEM (SYMBOL_REF ...)). */
477 tem = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (Pmode, "foo"));
478 indirect_symref_ok = memory_address_p (QImode, tem);
480 /* See if reg+reg is a valid (and offsettable) address. */
482 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
484 tem = gen_rtx_PLUS (Pmode,
485 gen_rtx_REG (Pmode, HARD_FRAME_POINTER_REGNUM),
486 gen_rtx_REG (Pmode, i));
488 /* This way, we make sure that reg+reg is an offsettable address. */
489 tem = plus_constant (tem, 4);
491 if (memory_address_p (QImode, tem))
493 double_reg_address_ok = 1;
498 /* Initialize obstack for our rtl allocation. */
499 gcc_obstack_init (&reload_obstack);
500 reload_startobj = obstack_alloc (&reload_obstack, 0);
502 INIT_REG_SET (&spilled_pseudos);
503 INIT_REG_SET (&pseudos_counted);
506 /* List of insn chains that are currently unused. */
507 static struct insn_chain *unused_insn_chains = 0;
509 /* Allocate an empty insn_chain structure. */
511 new_insn_chain (void)
513 struct insn_chain *c;
515 if (unused_insn_chains == 0)
517 c = obstack_alloc (&reload_obstack, sizeof (struct insn_chain));
518 INIT_REG_SET (&c->live_throughout);
519 INIT_REG_SET (&c->dead_or_set);
523 c = unused_insn_chains;
524 unused_insn_chains = c->next;
526 c->is_caller_save_insn = 0;
527 c->need_operand_change = 0;
533 /* Small utility function to set all regs in hard reg set TO which are
534 allocated to pseudos in regset FROM. */
537 compute_use_by_pseudos (HARD_REG_SET *to, regset from)
540 reg_set_iterator rsi;
542 EXECUTE_IF_SET_IN_REG_SET (from, FIRST_PSEUDO_REGISTER, regno, rsi)
544 int r = reg_renumber[regno];
549 /* reload_combine uses the information from
550 BASIC_BLOCK->global_live_at_start, which might still
551 contain registers that have not actually been allocated
552 since they have an equivalence. */
553 gcc_assert (reload_completed);
557 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
559 SET_HARD_REG_BIT (*to, r + nregs);
564 /* Replace all pseudos found in LOC with their corresponding
568 replace_pseudos_in (rtx *loc, enum machine_mode mem_mode, rtx usage)
581 unsigned int regno = REGNO (x);
583 if (regno < FIRST_PSEUDO_REGISTER)
586 x = eliminate_regs (x, mem_mode, usage);
590 replace_pseudos_in (loc, mem_mode, usage);
594 if (reg_equiv_constant[regno])
595 *loc = reg_equiv_constant[regno];
596 else if (reg_equiv_mem[regno])
597 *loc = reg_equiv_mem[regno];
598 else if (reg_equiv_address[regno])
599 *loc = gen_rtx_MEM (GET_MODE (x), reg_equiv_address[regno]);
602 gcc_assert (!REG_P (regno_reg_rtx[regno])
603 || REGNO (regno_reg_rtx[regno]) != regno);
604 *loc = regno_reg_rtx[regno];
609 else if (code == MEM)
611 replace_pseudos_in (& XEXP (x, 0), GET_MODE (x), usage);
615 /* Process each of our operands recursively. */
616 fmt = GET_RTX_FORMAT (code);
617 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
619 replace_pseudos_in (&XEXP (x, i), mem_mode, usage);
620 else if (*fmt == 'E')
621 for (j = 0; j < XVECLEN (x, i); j++)
622 replace_pseudos_in (& XVECEXP (x, i, j), mem_mode, usage);
626 /* Global variables used by reload and its subroutines. */
628 /* Set during calculate_needs if an insn needs register elimination. */
629 static int something_needs_elimination;
630 /* Set during calculate_needs if an insn needs an operand changed. */
631 static int something_needs_operands_changed;
633 /* Nonzero means we couldn't get enough spill regs. */
636 /* Main entry point for the reload pass.
638 FIRST is the first insn of the function being compiled.
640 GLOBAL nonzero means we were called from global_alloc
641 and should attempt to reallocate any pseudoregs that we
642 displace from hard regs we will use for reloads.
643 If GLOBAL is zero, we do not have enough information to do that,
644 so any pseudo reg that is spilled must go to the stack.
646 Return value is nonzero if reload failed
647 and we must not do any more for this function. */
650 reload (rtx first, int global)
654 struct elim_table *ep;
657 /* Make sure even insns with volatile mem refs are recognizable. */
662 reload_firstobj = obstack_alloc (&reload_obstack, 0);
664 /* Make sure that the last insn in the chain
665 is not something that needs reloading. */
666 emit_note (NOTE_INSN_DELETED);
668 /* Enable find_equiv_reg to distinguish insns made by reload. */
669 reload_first_uid = get_max_uid ();
671 #ifdef SECONDARY_MEMORY_NEEDED
672 /* Initialize the secondary memory table. */
673 clear_secondary_mem ();
676 /* We don't have a stack slot for any spill reg yet. */
677 memset (spill_stack_slot, 0, sizeof spill_stack_slot);
678 memset (spill_stack_slot_width, 0, sizeof spill_stack_slot_width);
680 /* Initialize the save area information for caller-save, in case some
684 /* Compute which hard registers are now in use
685 as homes for pseudo registers.
686 This is done here rather than (eg) in global_alloc
687 because this point is reached even if not optimizing. */
688 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
691 /* A function that receives a nonlocal goto must save all call-saved
693 if (current_function_has_nonlocal_label)
694 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
695 if (! call_used_regs[i] && ! fixed_regs[i] && ! LOCAL_REGNO (i))
696 regs_ever_live[i] = 1;
698 /* Find all the pseudo registers that didn't get hard regs
699 but do have known equivalent constants or memory slots.
700 These include parameters (known equivalent to parameter slots)
701 and cse'd or loop-moved constant memory addresses.
703 Record constant equivalents in reg_equiv_constant
704 so they will be substituted by find_reloads.
705 Record memory equivalents in reg_mem_equiv so they can
706 be substituted eventually by altering the REG-rtx's. */
708 reg_equiv_constant = XCNEWVEC (rtx, max_regno);
709 reg_equiv_invariant = XCNEWVEC (rtx, max_regno);
710 reg_equiv_mem = XCNEWVEC (rtx, max_regno);
711 reg_equiv_alt_mem_list = XCNEWVEC (rtx, max_regno);
712 reg_equiv_address = XCNEWVEC (rtx, max_regno);
713 reg_max_ref_width = XCNEWVEC (unsigned int, max_regno);
714 reg_old_renumber = XCNEWVEC (short, max_regno);
715 memcpy (reg_old_renumber, reg_renumber, max_regno * sizeof (short));
716 pseudo_forbidden_regs = XNEWVEC (HARD_REG_SET, max_regno);
717 pseudo_previous_regs = XCNEWVEC (HARD_REG_SET, max_regno);
719 CLEAR_HARD_REG_SET (bad_spill_regs_global);
721 /* Look for REG_EQUIV notes; record what each pseudo is equivalent
722 to. Also find all paradoxical subregs and find largest such for
725 num_eliminable_invariants = 0;
726 for (insn = first; insn; insn = NEXT_INSN (insn))
728 rtx set = single_set (insn);
730 /* We may introduce USEs that we want to remove at the end, so
731 we'll mark them with QImode. Make sure there are no
732 previously-marked insns left by say regmove. */
733 if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
734 && GET_MODE (insn) != VOIDmode)
735 PUT_MODE (insn, VOIDmode);
738 scan_paradoxical_subregs (PATTERN (insn));
740 if (set != 0 && REG_P (SET_DEST (set)))
742 rtx note = find_reg_note (insn, REG_EQUIV, NULL_RTX);
748 i = REGNO (SET_DEST (set));
751 if (i <= LAST_VIRTUAL_REGISTER)
754 if (! function_invariant_p (x)
756 /* A function invariant is often CONSTANT_P but may
757 include a register. We promise to only pass
758 CONSTANT_P objects to LEGITIMATE_PIC_OPERAND_P. */
760 && LEGITIMATE_PIC_OPERAND_P (x)))
762 /* It can happen that a REG_EQUIV note contains a MEM
763 that is not a legitimate memory operand. As later
764 stages of reload assume that all addresses found
765 in the reg_equiv_* arrays were originally legitimate,
766 we ignore such REG_EQUIV notes. */
767 if (memory_operand (x, VOIDmode))
769 /* Always unshare the equivalence, so we can
770 substitute into this insn without touching the
772 reg_equiv_memory_loc[i] = copy_rtx (x);
774 else if (function_invariant_p (x))
776 if (GET_CODE (x) == PLUS)
778 /* This is PLUS of frame pointer and a constant,
779 and might be shared. Unshare it. */
780 reg_equiv_invariant[i] = copy_rtx (x);
781 num_eliminable_invariants++;
783 else if (x == frame_pointer_rtx || x == arg_pointer_rtx)
785 reg_equiv_invariant[i] = x;
786 num_eliminable_invariants++;
788 else if (LEGITIMATE_CONSTANT_P (x))
789 reg_equiv_constant[i] = x;
792 reg_equiv_memory_loc[i]
793 = force_const_mem (GET_MODE (SET_DEST (set)), x);
794 if (! reg_equiv_memory_loc[i])
795 reg_equiv_init[i] = NULL_RTX;
800 reg_equiv_init[i] = NULL_RTX;
805 reg_equiv_init[i] = NULL_RTX;
810 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
811 if (reg_equiv_init[i])
813 fprintf (dump_file, "init_insns for %u: ", i);
814 print_inline_rtx (dump_file, reg_equiv_init[i], 20);
815 fprintf (dump_file, "\n");
820 first_label_num = get_first_label_num ();
821 num_labels = max_label_num () - first_label_num;
823 /* Allocate the tables used to store offset information at labels. */
824 /* We used to use alloca here, but the size of what it would try to
825 allocate would occasionally cause it to exceed the stack limit and
826 cause a core dump. */
827 offsets_known_at = XNEWVEC (char, num_labels);
828 offsets_at = (HOST_WIDE_INT (*)[NUM_ELIMINABLE_REGS]) xmalloc (num_labels * NUM_ELIMINABLE_REGS * sizeof (HOST_WIDE_INT));
830 /* Alter each pseudo-reg rtx to contain its hard reg number.
831 Assign stack slots to the pseudos that lack hard regs or equivalents.
832 Do not touch virtual registers. */
834 for (i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++)
837 /* If we have some registers we think can be eliminated, scan all insns to
838 see if there is an insn that sets one of these registers to something
839 other than itself plus a constant. If so, the register cannot be
840 eliminated. Doing this scan here eliminates an extra pass through the
841 main reload loop in the most common case where register elimination
843 for (insn = first; insn && num_eliminable; insn = NEXT_INSN (insn))
845 note_stores (PATTERN (insn), mark_not_eliminable, NULL);
847 maybe_fix_stack_asms ();
849 insns_need_reload = 0;
850 something_needs_elimination = 0;
852 /* Initialize to -1, which means take the first spill register. */
855 /* Spill any hard regs that we know we can't eliminate. */
856 CLEAR_HARD_REG_SET (used_spill_regs);
857 /* There can be multiple ways to eliminate a register;
858 they should be listed adjacently.
859 Elimination for any register fails only if all possible ways fail. */
860 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; )
863 int can_eliminate = 0;
866 can_eliminate |= ep->can_eliminate;
869 while (ep < ®_eliminate[NUM_ELIMINABLE_REGS] && ep->from == from);
871 spill_hard_reg (from, 1);
874 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
875 if (frame_pointer_needed)
876 spill_hard_reg (HARD_FRAME_POINTER_REGNUM, 1);
878 finish_spills (global);
880 /* From now on, we may need to generate moves differently. We may also
881 allow modifications of insns which cause them to not be recognized.
882 Any such modifications will be cleaned up during reload itself. */
883 reload_in_progress = 1;
885 /* This loop scans the entire function each go-round
886 and repeats until one repetition spills no additional hard regs. */
889 int something_changed;
891 HOST_WIDE_INT starting_frame_size;
893 starting_frame_size = get_frame_size ();
895 set_initial_elim_offsets ();
896 set_initial_label_offsets ();
898 /* For each pseudo register that has an equivalent location defined,
899 try to eliminate any eliminable registers (such as the frame pointer)
900 assuming initial offsets for the replacement register, which
903 If the resulting location is directly addressable, substitute
904 the MEM we just got directly for the old REG.
906 If it is not addressable but is a constant or the sum of a hard reg
907 and constant, it is probably not addressable because the constant is
908 out of range, in that case record the address; we will generate
909 hairy code to compute the address in a register each time it is
910 needed. Similarly if it is a hard register, but one that is not
911 valid as an address register.
913 If the location is not addressable, but does not have one of the
914 above forms, assign a stack slot. We have to do this to avoid the
915 potential of producing lots of reloads if, e.g., a location involves
916 a pseudo that didn't get a hard register and has an equivalent memory
917 location that also involves a pseudo that didn't get a hard register.
919 Perhaps at some point we will improve reload_when_needed handling
920 so this problem goes away. But that's very hairy. */
922 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
923 if (reg_renumber[i] < 0 && reg_equiv_memory_loc[i])
925 rtx x = eliminate_regs (reg_equiv_memory_loc[i], 0, NULL_RTX);
927 if (strict_memory_address_p (GET_MODE (regno_reg_rtx[i]),
929 reg_equiv_mem[i] = x, reg_equiv_address[i] = 0;
930 else if (CONSTANT_P (XEXP (x, 0))
931 || (REG_P (XEXP (x, 0))
932 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
933 || (GET_CODE (XEXP (x, 0)) == PLUS
934 && REG_P (XEXP (XEXP (x, 0), 0))
935 && (REGNO (XEXP (XEXP (x, 0), 0))
936 < FIRST_PSEUDO_REGISTER)
937 && CONSTANT_P (XEXP (XEXP (x, 0), 1))))
938 reg_equiv_address[i] = XEXP (x, 0), reg_equiv_mem[i] = 0;
941 /* Make a new stack slot. Then indicate that something
942 changed so we go back and recompute offsets for
943 eliminable registers because the allocation of memory
944 below might change some offset. reg_equiv_{mem,address}
945 will be set up for this pseudo on the next pass around
947 reg_equiv_memory_loc[i] = 0;
948 reg_equiv_init[i] = 0;
953 if (caller_save_needed)
956 /* If we allocated another stack slot, redo elimination bookkeeping. */
957 if (starting_frame_size != get_frame_size ())
959 if (starting_frame_size && cfun->stack_alignment_needed)
961 /* If we have a stack frame, we must align it now. The
962 stack size may be a part of the offset computation for
963 register elimination. So if this changes the stack size,
964 then repeat the elimination bookkeeping. We don't
965 realign when there is no stack, as that will cause a
966 stack frame when none is needed should
967 STARTING_FRAME_OFFSET not be already aligned to
969 assign_stack_local (BLKmode, 0, cfun->stack_alignment_needed);
970 if (starting_frame_size != get_frame_size ())
974 if (caller_save_needed)
976 save_call_clobbered_regs ();
977 /* That might have allocated new insn_chain structures. */
978 reload_firstobj = obstack_alloc (&reload_obstack, 0);
981 calculate_needs_all_insns (global);
983 CLEAR_REG_SET (&spilled_pseudos);
986 something_changed = 0;
988 /* If we allocated any new memory locations, make another pass
989 since it might have changed elimination offsets. */
990 if (starting_frame_size != get_frame_size ())
991 something_changed = 1;
993 /* Even if the frame size remained the same, we might still have
994 changed elimination offsets, e.g. if find_reloads called
995 force_const_mem requiring the back end to allocate a constant
996 pool base register that needs to be saved on the stack. */
997 else if (!verify_initial_elim_offsets ())
998 something_changed = 1;
1001 HARD_REG_SET to_spill;
1002 CLEAR_HARD_REG_SET (to_spill);
1003 update_eliminables (&to_spill);
1004 AND_COMPL_HARD_REG_SET (used_spill_regs, to_spill);
1006 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1007 if (TEST_HARD_REG_BIT (to_spill, i))
1009 spill_hard_reg (i, 1);
1012 /* Regardless of the state of spills, if we previously had
1013 a register that we thought we could eliminate, but now can
1014 not eliminate, we must run another pass.
1016 Consider pseudos which have an entry in reg_equiv_* which
1017 reference an eliminable register. We must make another pass
1018 to update reg_equiv_* so that we do not substitute in the
1019 old value from when we thought the elimination could be
1021 something_changed = 1;
1025 select_reload_regs ();
1029 if (insns_need_reload != 0 || did_spill)
1030 something_changed |= finish_spills (global);
1032 if (! something_changed)
1035 if (caller_save_needed)
1036 delete_caller_save_insns ();
1038 obstack_free (&reload_obstack, reload_firstobj);
1041 /* If global-alloc was run, notify it of any register eliminations we have
1044 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1045 if (ep->can_eliminate)
1046 mark_elimination (ep->from, ep->to);
1048 /* If a pseudo has no hard reg, delete the insns that made the equivalence.
1049 If that insn didn't set the register (i.e., it copied the register to
1050 memory), just delete that insn instead of the equivalencing insn plus
1051 anything now dead. If we call delete_dead_insn on that insn, we may
1052 delete the insn that actually sets the register if the register dies
1053 there and that is incorrect. */
1055 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1057 if (reg_renumber[i] < 0 && reg_equiv_init[i] != 0)
1060 for (list = reg_equiv_init[i]; list; list = XEXP (list, 1))
1062 rtx equiv_insn = XEXP (list, 0);
1064 /* If we already deleted the insn or if it may trap, we can't
1065 delete it. The latter case shouldn't happen, but can
1066 if an insn has a variable address, gets a REG_EH_REGION
1067 note added to it, and then gets converted into a load
1068 from a constant address. */
1069 if (NOTE_P (equiv_insn)
1070 || can_throw_internal (equiv_insn))
1072 else if (reg_set_p (regno_reg_rtx[i], PATTERN (equiv_insn)))
1073 delete_dead_insn (equiv_insn);
1075 SET_INSN_DELETED (equiv_insn);
1080 /* Use the reload registers where necessary
1081 by generating move instructions to move the must-be-register
1082 values into or out of the reload registers. */
1084 if (insns_need_reload != 0 || something_needs_elimination
1085 || something_needs_operands_changed)
1087 HOST_WIDE_INT old_frame_size = get_frame_size ();
1089 reload_as_needed (global);
1091 gcc_assert (old_frame_size == get_frame_size ());
1093 gcc_assert (verify_initial_elim_offsets ());
1096 /* If we were able to eliminate the frame pointer, show that it is no
1097 longer live at the start of any basic block. If it ls live by
1098 virtue of being in a pseudo, that pseudo will be marked live
1099 and hence the frame pointer will be known to be live via that
1102 if (! frame_pointer_needed)
1104 CLEAR_REGNO_REG_SET (bb->il.rtl->global_live_at_start,
1105 HARD_FRAME_POINTER_REGNUM);
1107 /* Come here (with failure set nonzero) if we can't get enough spill
1111 CLEAR_REG_SET (&spilled_pseudos);
1112 reload_in_progress = 0;
1114 /* Now eliminate all pseudo regs by modifying them into
1115 their equivalent memory references.
1116 The REG-rtx's for the pseudos are modified in place,
1117 so all insns that used to refer to them now refer to memory.
1119 For a reg that has a reg_equiv_address, all those insns
1120 were changed by reloading so that no insns refer to it any longer;
1121 but the DECL_RTL of a variable decl may refer to it,
1122 and if so this causes the debugging info to mention the variable. */
1124 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1128 if (reg_equiv_mem[i])
1129 addr = XEXP (reg_equiv_mem[i], 0);
1131 if (reg_equiv_address[i])
1132 addr = reg_equiv_address[i];
1136 if (reg_renumber[i] < 0)
1138 rtx reg = regno_reg_rtx[i];
1140 REG_USERVAR_P (reg) = 0;
1141 PUT_CODE (reg, MEM);
1142 XEXP (reg, 0) = addr;
1143 if (reg_equiv_memory_loc[i])
1144 MEM_COPY_ATTRIBUTES (reg, reg_equiv_memory_loc[i]);
1147 MEM_IN_STRUCT_P (reg) = MEM_SCALAR_P (reg) = 0;
1148 MEM_ATTRS (reg) = 0;
1150 MEM_NOTRAP_P (reg) = 1;
1152 else if (reg_equiv_mem[i])
1153 XEXP (reg_equiv_mem[i], 0) = addr;
1157 /* We must set reload_completed now since the cleanup_subreg_operands call
1158 below will re-recognize each insn and reload may have generated insns
1159 which are only valid during and after reload. */
1160 reload_completed = 1;
1162 /* Make a pass over all the insns and delete all USEs which we inserted
1163 only to tag a REG_EQUAL note on them. Remove all REG_DEAD and REG_UNUSED
1164 notes. Delete all CLOBBER insns, except those that refer to the return
1165 value and the special mem:BLK CLOBBERs added to prevent the scheduler
1166 from misarranging variable-array code, and simplify (subreg (reg))
1167 operands. Also remove all REG_RETVAL and REG_LIBCALL notes since they
1168 are no longer useful or accurate. Strip and regenerate REG_INC notes
1169 that may have been moved around. */
1171 for (insn = first; insn; insn = NEXT_INSN (insn))
1177 replace_pseudos_in (& CALL_INSN_FUNCTION_USAGE (insn),
1178 VOIDmode, CALL_INSN_FUNCTION_USAGE (insn));
1180 if ((GET_CODE (PATTERN (insn)) == USE
1181 /* We mark with QImode USEs introduced by reload itself. */
1182 && (GET_MODE (insn) == QImode
1183 || find_reg_note (insn, REG_EQUAL, NULL_RTX)))
1184 || (GET_CODE (PATTERN (insn)) == CLOBBER
1185 && (!MEM_P (XEXP (PATTERN (insn), 0))
1186 || GET_MODE (XEXP (PATTERN (insn), 0)) != BLKmode
1187 || (GET_CODE (XEXP (XEXP (PATTERN (insn), 0), 0)) != SCRATCH
1188 && XEXP (XEXP (PATTERN (insn), 0), 0)
1189 != stack_pointer_rtx))
1190 && (!REG_P (XEXP (PATTERN (insn), 0))
1191 || ! REG_FUNCTION_VALUE_P (XEXP (PATTERN (insn), 0)))))
1197 /* Some CLOBBERs may survive until here and still reference unassigned
1198 pseudos with const equivalent, which may in turn cause ICE in later
1199 passes if the reference remains in place. */
1200 if (GET_CODE (PATTERN (insn)) == CLOBBER)
1201 replace_pseudos_in (& XEXP (PATTERN (insn), 0),
1202 VOIDmode, PATTERN (insn));
1204 /* Discard obvious no-ops, even without -O. This optimization
1205 is fast and doesn't interfere with debugging. */
1206 if (NONJUMP_INSN_P (insn)
1207 && GET_CODE (PATTERN (insn)) == SET
1208 && REG_P (SET_SRC (PATTERN (insn)))
1209 && REG_P (SET_DEST (PATTERN (insn)))
1210 && (REGNO (SET_SRC (PATTERN (insn)))
1211 == REGNO (SET_DEST (PATTERN (insn)))))
1217 pnote = ®_NOTES (insn);
1220 if (REG_NOTE_KIND (*pnote) == REG_DEAD
1221 || REG_NOTE_KIND (*pnote) == REG_UNUSED
1222 || REG_NOTE_KIND (*pnote) == REG_INC
1223 || REG_NOTE_KIND (*pnote) == REG_RETVAL
1224 || REG_NOTE_KIND (*pnote) == REG_LIBCALL)
1225 *pnote = XEXP (*pnote, 1);
1227 pnote = &XEXP (*pnote, 1);
1231 add_auto_inc_notes (insn, PATTERN (insn));
1234 /* Simplify (subreg (reg)) if it appears as an operand. */
1235 cleanup_subreg_operands (insn);
1237 /* Clean up invalid ASMs so that they don't confuse later passes.
1239 if (asm_noperands (PATTERN (insn)) >= 0)
1241 extract_insn (insn);
1242 if (!constrain_operands (1))
1244 error_for_asm (insn,
1245 "%<asm%> operand has impossible constraints");
1252 /* If we are doing stack checking, give a warning if this function's
1253 frame size is larger than we expect. */
1254 if (flag_stack_check && ! STACK_CHECK_BUILTIN)
1256 HOST_WIDE_INT size = get_frame_size () + STACK_CHECK_FIXED_FRAME_SIZE;
1257 static int verbose_warned = 0;
1259 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1260 if (regs_ever_live[i] && ! fixed_regs[i] && call_used_regs[i])
1261 size += UNITS_PER_WORD;
1263 if (size > STACK_CHECK_MAX_FRAME_SIZE)
1265 warning (0, "frame size too large for reliable stack checking");
1266 if (! verbose_warned)
1268 warning (0, "try reducing the number of local variables");
1274 /* Indicate that we no longer have known memory locations or constants. */
1275 if (reg_equiv_constant)
1276 free (reg_equiv_constant);
1277 if (reg_equiv_invariant)
1278 free (reg_equiv_invariant);
1279 reg_equiv_constant = 0;
1280 reg_equiv_invariant = 0;
1281 VEC_free (rtx, gc, reg_equiv_memory_loc_vec);
1282 reg_equiv_memory_loc = 0;
1284 if (offsets_known_at)
1285 free (offsets_known_at);
1289 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1290 if (reg_equiv_alt_mem_list[i])
1291 free_EXPR_LIST_list (®_equiv_alt_mem_list[i]);
1292 free (reg_equiv_alt_mem_list);
1294 free (reg_equiv_mem);
1296 free (reg_equiv_address);
1297 free (reg_max_ref_width);
1298 free (reg_old_renumber);
1299 free (pseudo_previous_regs);
1300 free (pseudo_forbidden_regs);
1302 CLEAR_HARD_REG_SET (used_spill_regs);
1303 for (i = 0; i < n_spills; i++)
1304 SET_HARD_REG_BIT (used_spill_regs, spill_regs[i]);
1306 /* Free all the insn_chain structures at once. */
1307 obstack_free (&reload_obstack, reload_startobj);
1308 unused_insn_chains = 0;
1309 fixup_abnormal_edges ();
1311 /* Replacing pseudos with their memory equivalents might have
1312 created shared rtx. Subsequent passes would get confused
1313 by this, so unshare everything here. */
1314 unshare_all_rtl_again (first);
1316 #ifdef STACK_BOUNDARY
1317 /* init_emit has set the alignment of the hard frame pointer
1318 to STACK_BOUNDARY. It is very likely no longer valid if
1319 the hard frame pointer was used for register allocation. */
1320 if (!frame_pointer_needed)
1321 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = BITS_PER_UNIT;
1327 /* Yet another special case. Unfortunately, reg-stack forces people to
1328 write incorrect clobbers in asm statements. These clobbers must not
1329 cause the register to appear in bad_spill_regs, otherwise we'll call
1330 fatal_insn later. We clear the corresponding regnos in the live
1331 register sets to avoid this.
1332 The whole thing is rather sick, I'm afraid. */
1335 maybe_fix_stack_asms (void)
1338 const char *constraints[MAX_RECOG_OPERANDS];
1339 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
1340 struct insn_chain *chain;
1342 for (chain = reload_insn_chain; chain != 0; chain = chain->next)
1345 HARD_REG_SET clobbered, allowed;
1348 if (! INSN_P (chain->insn)
1349 || (noperands = asm_noperands (PATTERN (chain->insn))) < 0)
1351 pat = PATTERN (chain->insn);
1352 if (GET_CODE (pat) != PARALLEL)
1355 CLEAR_HARD_REG_SET (clobbered);
1356 CLEAR_HARD_REG_SET (allowed);
1358 /* First, make a mask of all stack regs that are clobbered. */
1359 for (i = 0; i < XVECLEN (pat, 0); i++)
1361 rtx t = XVECEXP (pat, 0, i);
1362 if (GET_CODE (t) == CLOBBER && STACK_REG_P (XEXP (t, 0)))
1363 SET_HARD_REG_BIT (clobbered, REGNO (XEXP (t, 0)));
1366 /* Get the operand values and constraints out of the insn. */
1367 decode_asm_operands (pat, recog_data.operand, recog_data.operand_loc,
1368 constraints, operand_mode, NULL);
1370 /* For every operand, see what registers are allowed. */
1371 for (i = 0; i < noperands; i++)
1373 const char *p = constraints[i];
1374 /* For every alternative, we compute the class of registers allowed
1375 for reloading in CLS, and merge its contents into the reg set
1377 int cls = (int) NO_REGS;
1383 if (c == '\0' || c == ',' || c == '#')
1385 /* End of one alternative - mark the regs in the current
1386 class, and reset the class. */
1387 IOR_HARD_REG_SET (allowed, reg_class_contents[cls]);
1393 } while (c != '\0' && c != ',');
1401 case '=': case '+': case '*': case '%': case '?': case '!':
1402 case '0': case '1': case '2': case '3': case '4': case 'm':
1403 case '<': case '>': case 'V': case 'o': case '&': case 'E':
1404 case 'F': case 's': case 'i': case 'n': case 'X': case 'I':
1405 case 'J': case 'K': case 'L': case 'M': case 'N': case 'O':
1410 cls = (int) reg_class_subunion[cls]
1411 [(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)];
1416 cls = (int) reg_class_subunion[cls][(int) GENERAL_REGS];
1420 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
1421 cls = (int) reg_class_subunion[cls]
1422 [(int) base_reg_class (VOIDmode, ADDRESS, SCRATCH)];
1424 cls = (int) reg_class_subunion[cls]
1425 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)];
1427 p += CONSTRAINT_LEN (c, p);
1430 /* Those of the registers which are clobbered, but allowed by the
1431 constraints, must be usable as reload registers. So clear them
1432 out of the life information. */
1433 AND_HARD_REG_SET (allowed, clobbered);
1434 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1435 if (TEST_HARD_REG_BIT (allowed, i))
1437 CLEAR_REGNO_REG_SET (&chain->live_throughout, i);
1438 CLEAR_REGNO_REG_SET (&chain->dead_or_set, i);
1445 /* Copy the global variables n_reloads and rld into the corresponding elts
1448 copy_reloads (struct insn_chain *chain)
1450 chain->n_reloads = n_reloads;
1451 chain->rld = obstack_alloc (&reload_obstack,
1452 n_reloads * sizeof (struct reload));
1453 memcpy (chain->rld, rld, n_reloads * sizeof (struct reload));
1454 reload_insn_firstobj = obstack_alloc (&reload_obstack, 0);
1457 /* Walk the chain of insns, and determine for each whether it needs reloads
1458 and/or eliminations. Build the corresponding insns_need_reload list, and
1459 set something_needs_elimination as appropriate. */
1461 calculate_needs_all_insns (int global)
1463 struct insn_chain **pprev_reload = &insns_need_reload;
1464 struct insn_chain *chain, *next = 0;
1466 something_needs_elimination = 0;
1468 reload_insn_firstobj = obstack_alloc (&reload_obstack, 0);
1469 for (chain = reload_insn_chain; chain != 0; chain = next)
1471 rtx insn = chain->insn;
1475 /* Clear out the shortcuts. */
1476 chain->n_reloads = 0;
1477 chain->need_elim = 0;
1478 chain->need_reload = 0;
1479 chain->need_operand_change = 0;
1481 /* If this is a label, a JUMP_INSN, or has REG_NOTES (which might
1482 include REG_LABEL), we need to see what effects this has on the
1483 known offsets at labels. */
1485 if (LABEL_P (insn) || JUMP_P (insn)
1486 || (INSN_P (insn) && REG_NOTES (insn) != 0))
1487 set_label_offsets (insn, insn, 0);
1491 rtx old_body = PATTERN (insn);
1492 int old_code = INSN_CODE (insn);
1493 rtx old_notes = REG_NOTES (insn);
1494 int did_elimination = 0;
1495 int operands_changed = 0;
1496 rtx set = single_set (insn);
1498 /* Skip insns that only set an equivalence. */
1499 if (set && REG_P (SET_DEST (set))
1500 && reg_renumber[REGNO (SET_DEST (set))] < 0
1501 && (reg_equiv_constant[REGNO (SET_DEST (set))]
1502 || (reg_equiv_invariant[REGNO (SET_DEST (set))]))
1503 && reg_equiv_init[REGNO (SET_DEST (set))])
1506 /* If needed, eliminate any eliminable registers. */
1507 if (num_eliminable || num_eliminable_invariants)
1508 did_elimination = eliminate_regs_in_insn (insn, 0);
1510 /* Analyze the instruction. */
1511 operands_changed = find_reloads (insn, 0, spill_indirect_levels,
1512 global, spill_reg_order);
1514 /* If a no-op set needs more than one reload, this is likely
1515 to be something that needs input address reloads. We
1516 can't get rid of this cleanly later, and it is of no use
1517 anyway, so discard it now.
1518 We only do this when expensive_optimizations is enabled,
1519 since this complements reload inheritance / output
1520 reload deletion, and it can make debugging harder. */
1521 if (flag_expensive_optimizations && n_reloads > 1)
1523 rtx set = single_set (insn);
1525 && SET_SRC (set) == SET_DEST (set)
1526 && REG_P (SET_SRC (set))
1527 && REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
1530 /* Delete it from the reload chain. */
1532 chain->prev->next = next;
1534 reload_insn_chain = next;
1536 next->prev = chain->prev;
1537 chain->next = unused_insn_chains;
1538 unused_insn_chains = chain;
1543 update_eliminable_offsets ();
1545 /* Remember for later shortcuts which insns had any reloads or
1546 register eliminations. */
1547 chain->need_elim = did_elimination;
1548 chain->need_reload = n_reloads > 0;
1549 chain->need_operand_change = operands_changed;
1551 /* Discard any register replacements done. */
1552 if (did_elimination)
1554 obstack_free (&reload_obstack, reload_insn_firstobj);
1555 PATTERN (insn) = old_body;
1556 INSN_CODE (insn) = old_code;
1557 REG_NOTES (insn) = old_notes;
1558 something_needs_elimination = 1;
1561 something_needs_operands_changed |= operands_changed;
1565 copy_reloads (chain);
1566 *pprev_reload = chain;
1567 pprev_reload = &chain->next_need_reload;
1574 /* Comparison function for qsort to decide which of two reloads
1575 should be handled first. *P1 and *P2 are the reload numbers. */
1578 reload_reg_class_lower (const void *r1p, const void *r2p)
1580 int r1 = *(const short *) r1p, r2 = *(const short *) r2p;
1583 /* Consider required reloads before optional ones. */
1584 t = rld[r1].optional - rld[r2].optional;
1588 /* Count all solitary classes before non-solitary ones. */
1589 t = ((reg_class_size[(int) rld[r2].class] == 1)
1590 - (reg_class_size[(int) rld[r1].class] == 1));
1594 /* Aside from solitaires, consider all multi-reg groups first. */
1595 t = rld[r2].nregs - rld[r1].nregs;
1599 /* Consider reloads in order of increasing reg-class number. */
1600 t = (int) rld[r1].class - (int) rld[r2].class;
1604 /* If reloads are equally urgent, sort by reload number,
1605 so that the results of qsort leave nothing to chance. */
1609 /* The cost of spilling each hard reg. */
1610 static int spill_cost[FIRST_PSEUDO_REGISTER];
1612 /* When spilling multiple hard registers, we use SPILL_COST for the first
1613 spilled hard reg and SPILL_ADD_COST for subsequent regs. SPILL_ADD_COST
1614 only the first hard reg for a multi-reg pseudo. */
1615 static int spill_add_cost[FIRST_PSEUDO_REGISTER];
1617 /* Update the spill cost arrays, considering that pseudo REG is live. */
1620 count_pseudo (int reg)
1622 int freq = REG_FREQ (reg);
1623 int r = reg_renumber[reg];
1626 if (REGNO_REG_SET_P (&pseudos_counted, reg)
1627 || REGNO_REG_SET_P (&spilled_pseudos, reg))
1630 SET_REGNO_REG_SET (&pseudos_counted, reg);
1632 gcc_assert (r >= 0);
1634 spill_add_cost[r] += freq;
1636 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (reg)];
1638 spill_cost[r + nregs] += freq;
1641 /* Calculate the SPILL_COST and SPILL_ADD_COST arrays and determine the
1642 contents of BAD_SPILL_REGS for the insn described by CHAIN. */
1645 order_regs_for_reload (struct insn_chain *chain)
1648 HARD_REG_SET used_by_pseudos;
1649 HARD_REG_SET used_by_pseudos2;
1650 reg_set_iterator rsi;
1652 COPY_HARD_REG_SET (bad_spill_regs, fixed_reg_set);
1654 memset (spill_cost, 0, sizeof spill_cost);
1655 memset (spill_add_cost, 0, sizeof spill_add_cost);
1657 /* Count number of uses of each hard reg by pseudo regs allocated to it
1658 and then order them by decreasing use. First exclude hard registers
1659 that are live in or across this insn. */
1661 REG_SET_TO_HARD_REG_SET (used_by_pseudos, &chain->live_throughout);
1662 REG_SET_TO_HARD_REG_SET (used_by_pseudos2, &chain->dead_or_set);
1663 IOR_HARD_REG_SET (bad_spill_regs, used_by_pseudos);
1664 IOR_HARD_REG_SET (bad_spill_regs, used_by_pseudos2);
1666 /* Now find out which pseudos are allocated to it, and update
1668 CLEAR_REG_SET (&pseudos_counted);
1670 EXECUTE_IF_SET_IN_REG_SET
1671 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, i, rsi)
1675 EXECUTE_IF_SET_IN_REG_SET
1676 (&chain->dead_or_set, FIRST_PSEUDO_REGISTER, i, rsi)
1680 CLEAR_REG_SET (&pseudos_counted);
1683 /* Vector of reload-numbers showing the order in which the reloads should
1685 static short reload_order[MAX_RELOADS];
1687 /* This is used to keep track of the spill regs used in one insn. */
1688 static HARD_REG_SET used_spill_regs_local;
1690 /* We decided to spill hard register SPILLED, which has a size of
1691 SPILLED_NREGS. Determine how pseudo REG, which is live during the insn,
1692 is affected. We will add it to SPILLED_PSEUDOS if necessary, and we will
1693 update SPILL_COST/SPILL_ADD_COST. */
1696 count_spilled_pseudo (int spilled, int spilled_nregs, int reg)
1698 int r = reg_renumber[reg];
1699 int nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (reg)];
1701 if (REGNO_REG_SET_P (&spilled_pseudos, reg)
1702 || spilled + spilled_nregs <= r || r + nregs <= spilled)
1705 SET_REGNO_REG_SET (&spilled_pseudos, reg);
1707 spill_add_cost[r] -= REG_FREQ (reg);
1709 spill_cost[r + nregs] -= REG_FREQ (reg);
1712 /* Find reload register to use for reload number ORDER. */
1715 find_reg (struct insn_chain *chain, int order)
1717 int rnum = reload_order[order];
1718 struct reload *rl = rld + rnum;
1719 int best_cost = INT_MAX;
1723 HARD_REG_SET not_usable;
1724 HARD_REG_SET used_by_other_reload;
1725 reg_set_iterator rsi;
1727 COPY_HARD_REG_SET (not_usable, bad_spill_regs);
1728 IOR_HARD_REG_SET (not_usable, bad_spill_regs_global);
1729 IOR_COMPL_HARD_REG_SET (not_usable, reg_class_contents[rl->class]);
1731 CLEAR_HARD_REG_SET (used_by_other_reload);
1732 for (k = 0; k < order; k++)
1734 int other = reload_order[k];
1736 if (rld[other].regno >= 0 && reloads_conflict (other, rnum))
1737 for (j = 0; j < rld[other].nregs; j++)
1738 SET_HARD_REG_BIT (used_by_other_reload, rld[other].regno + j);
1741 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1743 unsigned int regno = i;
1745 if (! TEST_HARD_REG_BIT (not_usable, regno)
1746 && ! TEST_HARD_REG_BIT (used_by_other_reload, regno)
1747 && HARD_REGNO_MODE_OK (regno, rl->mode))
1749 int this_cost = spill_cost[regno];
1751 unsigned int this_nregs = hard_regno_nregs[regno][rl->mode];
1753 for (j = 1; j < this_nregs; j++)
1755 this_cost += spill_add_cost[regno + j];
1756 if ((TEST_HARD_REG_BIT (not_usable, regno + j))
1757 || TEST_HARD_REG_BIT (used_by_other_reload, regno + j))
1762 if (rl->in && REG_P (rl->in) && REGNO (rl->in) == regno)
1764 if (rl->out && REG_P (rl->out) && REGNO (rl->out) == regno)
1766 if (this_cost < best_cost
1767 /* Among registers with equal cost, prefer caller-saved ones, or
1768 use REG_ALLOC_ORDER if it is defined. */
1769 || (this_cost == best_cost
1770 #ifdef REG_ALLOC_ORDER
1771 && (inv_reg_alloc_order[regno]
1772 < inv_reg_alloc_order[best_reg])
1774 && call_used_regs[regno]
1775 && ! call_used_regs[best_reg]
1780 best_cost = this_cost;
1788 fprintf (dump_file, "Using reg %d for reload %d\n", best_reg, rnum);
1790 rl->nregs = hard_regno_nregs[best_reg][rl->mode];
1791 rl->regno = best_reg;
1793 EXECUTE_IF_SET_IN_REG_SET
1794 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, j, rsi)
1796 count_spilled_pseudo (best_reg, rl->nregs, j);
1799 EXECUTE_IF_SET_IN_REG_SET
1800 (&chain->dead_or_set, FIRST_PSEUDO_REGISTER, j, rsi)
1802 count_spilled_pseudo (best_reg, rl->nregs, j);
1805 for (i = 0; i < rl->nregs; i++)
1807 gcc_assert (spill_cost[best_reg + i] == 0);
1808 gcc_assert (spill_add_cost[best_reg + i] == 0);
1809 SET_HARD_REG_BIT (used_spill_regs_local, best_reg + i);
1814 /* Find more reload regs to satisfy the remaining need of an insn, which
1816 Do it by ascending class number, since otherwise a reg
1817 might be spilled for a big class and might fail to count
1818 for a smaller class even though it belongs to that class. */
1821 find_reload_regs (struct insn_chain *chain)
1825 /* In order to be certain of getting the registers we need,
1826 we must sort the reloads into order of increasing register class.
1827 Then our grabbing of reload registers will parallel the process
1828 that provided the reload registers. */
1829 for (i = 0; i < chain->n_reloads; i++)
1831 /* Show whether this reload already has a hard reg. */
1832 if (chain->rld[i].reg_rtx)
1834 int regno = REGNO (chain->rld[i].reg_rtx);
1835 chain->rld[i].regno = regno;
1837 = hard_regno_nregs[regno][GET_MODE (chain->rld[i].reg_rtx)];
1840 chain->rld[i].regno = -1;
1841 reload_order[i] = i;
1844 n_reloads = chain->n_reloads;
1845 memcpy (rld, chain->rld, n_reloads * sizeof (struct reload));
1847 CLEAR_HARD_REG_SET (used_spill_regs_local);
1850 fprintf (dump_file, "Spilling for insn %d.\n", INSN_UID (chain->insn));
1852 qsort (reload_order, n_reloads, sizeof (short), reload_reg_class_lower);
1854 /* Compute the order of preference for hard registers to spill. */
1856 order_regs_for_reload (chain);
1858 for (i = 0; i < n_reloads; i++)
1860 int r = reload_order[i];
1862 /* Ignore reloads that got marked inoperative. */
1863 if ((rld[r].out != 0 || rld[r].in != 0 || rld[r].secondary_p)
1864 && ! rld[r].optional
1865 && rld[r].regno == -1)
1866 if (! find_reg (chain, i))
1869 fprintf (dump_file, "reload failure for reload %d\n", r);
1870 spill_failure (chain->insn, rld[r].class);
1876 COPY_HARD_REG_SET (chain->used_spill_regs, used_spill_regs_local);
1877 IOR_HARD_REG_SET (used_spill_regs, used_spill_regs_local);
1879 memcpy (chain->rld, rld, n_reloads * sizeof (struct reload));
1883 select_reload_regs (void)
1885 struct insn_chain *chain;
1887 /* Try to satisfy the needs for each insn. */
1888 for (chain = insns_need_reload; chain != 0;
1889 chain = chain->next_need_reload)
1890 find_reload_regs (chain);
1893 /* Delete all insns that were inserted by emit_caller_save_insns during
1896 delete_caller_save_insns (void)
1898 struct insn_chain *c = reload_insn_chain;
1902 while (c != 0 && c->is_caller_save_insn)
1904 struct insn_chain *next = c->next;
1907 if (c == reload_insn_chain)
1908 reload_insn_chain = next;
1912 next->prev = c->prev;
1914 c->prev->next = next;
1915 c->next = unused_insn_chains;
1916 unused_insn_chains = c;
1924 /* Handle the failure to find a register to spill.
1925 INSN should be one of the insns which needed this particular spill reg. */
1928 spill_failure (rtx insn, enum reg_class class)
1930 if (asm_noperands (PATTERN (insn)) >= 0)
1931 error_for_asm (insn, "can't find a register in class %qs while "
1932 "reloading %<asm%>",
1933 reg_class_names[class]);
1936 error ("unable to find a register to spill in class %qs",
1937 reg_class_names[class]);
1941 fprintf (dump_file, "\nReloads for insn # %d\n", INSN_UID (insn));
1942 debug_reload_to_stream (dump_file);
1944 fatal_insn ("this is the insn:", insn);
1948 /* Delete an unneeded INSN and any previous insns who sole purpose is loading
1949 data that is dead in INSN. */
1952 delete_dead_insn (rtx insn)
1954 rtx prev = prev_real_insn (insn);
1957 /* If the previous insn sets a register that dies in our insn, delete it
1959 if (prev && GET_CODE (PATTERN (prev)) == SET
1960 && (prev_dest = SET_DEST (PATTERN (prev)), REG_P (prev_dest))
1961 && reg_mentioned_p (prev_dest, PATTERN (insn))
1962 && find_regno_note (insn, REG_DEAD, REGNO (prev_dest))
1963 && ! side_effects_p (SET_SRC (PATTERN (prev))))
1964 delete_dead_insn (prev);
1966 SET_INSN_DELETED (insn);
1969 /* Modify the home of pseudo-reg I.
1970 The new home is present in reg_renumber[I].
1972 FROM_REG may be the hard reg that the pseudo-reg is being spilled from;
1973 or it may be -1, meaning there is none or it is not relevant.
1974 This is used so that all pseudos spilled from a given hard reg
1975 can share one stack slot. */
1978 alter_reg (int i, int from_reg)
1980 /* When outputting an inline function, this can happen
1981 for a reg that isn't actually used. */
1982 if (regno_reg_rtx[i] == 0)
1985 /* If the reg got changed to a MEM at rtl-generation time,
1987 if (!REG_P (regno_reg_rtx[i]))
1990 /* Modify the reg-rtx to contain the new hard reg
1991 number or else to contain its pseudo reg number. */
1992 REGNO (regno_reg_rtx[i])
1993 = reg_renumber[i] >= 0 ? reg_renumber[i] : i;
1995 /* If we have a pseudo that is needed but has no hard reg or equivalent,
1996 allocate a stack slot for it. */
1998 if (reg_renumber[i] < 0
1999 && REG_N_REFS (i) > 0
2000 && reg_equiv_constant[i] == 0
2001 && (reg_equiv_invariant[i] == 0 || reg_equiv_init[i] == 0)
2002 && reg_equiv_memory_loc[i] == 0)
2005 enum machine_mode mode = GET_MODE (regno_reg_rtx[i]);
2006 unsigned int inherent_size = PSEUDO_REGNO_BYTES (i);
2007 unsigned int inherent_align = GET_MODE_ALIGNMENT (mode);
2008 unsigned int total_size = MAX (inherent_size, reg_max_ref_width[i]);
2009 unsigned int min_align = reg_max_ref_width[i] * BITS_PER_UNIT;
2012 /* Each pseudo reg has an inherent size which comes from its own mode,
2013 and a total size which provides room for paradoxical subregs
2014 which refer to the pseudo reg in wider modes.
2016 We can use a slot already allocated if it provides both
2017 enough inherent space and enough total space.
2018 Otherwise, we allocate a new slot, making sure that it has no less
2019 inherent space, and no less total space, then the previous slot. */
2022 /* No known place to spill from => no slot to reuse. */
2023 x = assign_stack_local (mode, total_size,
2024 min_align > inherent_align
2025 || total_size > inherent_size ? -1 : 0);
2026 if (BYTES_BIG_ENDIAN)
2027 /* Cancel the big-endian correction done in assign_stack_local.
2028 Get the address of the beginning of the slot.
2029 This is so we can do a big-endian correction unconditionally
2031 adjust = inherent_size - total_size;
2033 /* Nothing can alias this slot except this pseudo. */
2034 set_mem_alias_set (x, new_alias_set ());
2037 /* Reuse a stack slot if possible. */
2038 else if (spill_stack_slot[from_reg] != 0
2039 && spill_stack_slot_width[from_reg] >= total_size
2040 && (GET_MODE_SIZE (GET_MODE (spill_stack_slot[from_reg]))
2042 && MEM_ALIGN (spill_stack_slot[from_reg]) >= min_align)
2043 x = spill_stack_slot[from_reg];
2045 /* Allocate a bigger slot. */
2048 /* Compute maximum size needed, both for inherent size
2049 and for total size. */
2052 if (spill_stack_slot[from_reg])
2054 if (GET_MODE_SIZE (GET_MODE (spill_stack_slot[from_reg]))
2056 mode = GET_MODE (spill_stack_slot[from_reg]);
2057 if (spill_stack_slot_width[from_reg] > total_size)
2058 total_size = spill_stack_slot_width[from_reg];
2059 if (MEM_ALIGN (spill_stack_slot[from_reg]) > min_align)
2060 min_align = MEM_ALIGN (spill_stack_slot[from_reg]);
2063 /* Make a slot with that size. */
2064 x = assign_stack_local (mode, total_size,
2065 min_align > inherent_align
2066 || total_size > inherent_size ? -1 : 0);
2069 /* All pseudos mapped to this slot can alias each other. */
2070 if (spill_stack_slot[from_reg])
2071 set_mem_alias_set (x, MEM_ALIAS_SET (spill_stack_slot[from_reg]));
2073 set_mem_alias_set (x, new_alias_set ());
2075 if (BYTES_BIG_ENDIAN)
2077 /* Cancel the big-endian correction done in assign_stack_local.
2078 Get the address of the beginning of the slot.
2079 This is so we can do a big-endian correction unconditionally
2081 adjust = GET_MODE_SIZE (mode) - total_size;
2084 = adjust_address_nv (x, mode_for_size (total_size
2090 spill_stack_slot[from_reg] = stack_slot;
2091 spill_stack_slot_width[from_reg] = total_size;
2094 /* On a big endian machine, the "address" of the slot
2095 is the address of the low part that fits its inherent mode. */
2096 if (BYTES_BIG_ENDIAN && inherent_size < total_size)
2097 adjust += (total_size - inherent_size);
2099 /* If we have any adjustment to make, or if the stack slot is the
2100 wrong mode, make a new stack slot. */
2101 x = adjust_address_nv (x, GET_MODE (regno_reg_rtx[i]), adjust);
2103 /* If we have a decl for the original register, set it for the
2104 memory. If this is a shared MEM, make a copy. */
2105 if (REG_EXPR (regno_reg_rtx[i])
2106 && DECL_P (REG_EXPR (regno_reg_rtx[i])))
2108 rtx decl = DECL_RTL_IF_SET (REG_EXPR (regno_reg_rtx[i]));
2110 /* We can do this only for the DECLs home pseudo, not for
2111 any copies of it, since otherwise when the stack slot
2112 is reused, nonoverlapping_memrefs_p might think they
2114 if (decl && REG_P (decl) && REGNO (decl) == (unsigned) i)
2116 if (from_reg != -1 && spill_stack_slot[from_reg] == x)
2119 set_mem_attrs_from_reg (x, regno_reg_rtx[i]);
2123 /* Save the stack slot for later. */
2124 reg_equiv_memory_loc[i] = x;
2128 /* Mark the slots in regs_ever_live for the hard regs
2129 used by pseudo-reg number REGNO. */
2132 mark_home_live (int regno)
2136 i = reg_renumber[regno];
2139 lim = i + hard_regno_nregs[i][PSEUDO_REGNO_MODE (regno)];
2141 regs_ever_live[i++] = 1;
2144 /* This function handles the tracking of elimination offsets around branches.
2146 X is a piece of RTL being scanned.
2148 INSN is the insn that it came from, if any.
2150 INITIAL_P is nonzero if we are to set the offset to be the initial
2151 offset and zero if we are setting the offset of the label to be the
2155 set_label_offsets (rtx x, rtx insn, int initial_p)
2157 enum rtx_code code = GET_CODE (x);
2160 struct elim_table *p;
2165 if (LABEL_REF_NONLOCAL_P (x))
2170 /* ... fall through ... */
2173 /* If we know nothing about this label, set the desired offsets. Note
2174 that this sets the offset at a label to be the offset before a label
2175 if we don't know anything about the label. This is not correct for
2176 the label after a BARRIER, but is the best guess we can make. If
2177 we guessed wrong, we will suppress an elimination that might have
2178 been possible had we been able to guess correctly. */
2180 if (! offsets_known_at[CODE_LABEL_NUMBER (x) - first_label_num])
2182 for (i = 0; i < NUM_ELIMINABLE_REGS; i++)
2183 offsets_at[CODE_LABEL_NUMBER (x) - first_label_num][i]
2184 = (initial_p ? reg_eliminate[i].initial_offset
2185 : reg_eliminate[i].offset);
2186 offsets_known_at[CODE_LABEL_NUMBER (x) - first_label_num] = 1;
2189 /* Otherwise, if this is the definition of a label and it is
2190 preceded by a BARRIER, set our offsets to the known offset of
2194 && (tem = prev_nonnote_insn (insn)) != 0
2196 set_offsets_for_label (insn);
2198 /* If neither of the above cases is true, compare each offset
2199 with those previously recorded and suppress any eliminations
2200 where the offsets disagree. */
2202 for (i = 0; i < NUM_ELIMINABLE_REGS; i++)
2203 if (offsets_at[CODE_LABEL_NUMBER (x) - first_label_num][i]
2204 != (initial_p ? reg_eliminate[i].initial_offset
2205 : reg_eliminate[i].offset))
2206 reg_eliminate[i].can_eliminate = 0;
2211 set_label_offsets (PATTERN (insn), insn, initial_p);
2213 /* ... fall through ... */
2217 /* Any labels mentioned in REG_LABEL notes can be branched to indirectly
2218 and hence must have all eliminations at their initial offsets. */
2219 for (tem = REG_NOTES (x); tem; tem = XEXP (tem, 1))
2220 if (REG_NOTE_KIND (tem) == REG_LABEL)
2221 set_label_offsets (XEXP (tem, 0), insn, 1);
2227 /* Each of the labels in the parallel or address vector must be
2228 at their initial offsets. We want the first field for PARALLEL
2229 and ADDR_VEC and the second field for ADDR_DIFF_VEC. */
2231 for (i = 0; i < (unsigned) XVECLEN (x, code == ADDR_DIFF_VEC); i++)
2232 set_label_offsets (XVECEXP (x, code == ADDR_DIFF_VEC, i),
2237 /* We only care about setting PC. If the source is not RETURN,
2238 IF_THEN_ELSE, or a label, disable any eliminations not at
2239 their initial offsets. Similarly if any arm of the IF_THEN_ELSE
2240 isn't one of those possibilities. For branches to a label,
2241 call ourselves recursively.
2243 Note that this can disable elimination unnecessarily when we have
2244 a non-local goto since it will look like a non-constant jump to
2245 someplace in the current function. This isn't a significant
2246 problem since such jumps will normally be when all elimination
2247 pairs are back to their initial offsets. */
2249 if (SET_DEST (x) != pc_rtx)
2252 switch (GET_CODE (SET_SRC (x)))
2259 set_label_offsets (SET_SRC (x), insn, initial_p);
2263 tem = XEXP (SET_SRC (x), 1);
2264 if (GET_CODE (tem) == LABEL_REF)
2265 set_label_offsets (XEXP (tem, 0), insn, initial_p);
2266 else if (GET_CODE (tem) != PC && GET_CODE (tem) != RETURN)
2269 tem = XEXP (SET_SRC (x), 2);
2270 if (GET_CODE (tem) == LABEL_REF)
2271 set_label_offsets (XEXP (tem, 0), insn, initial_p);
2272 else if (GET_CODE (tem) != PC && GET_CODE (tem) != RETURN)
2280 /* If we reach here, all eliminations must be at their initial
2281 offset because we are doing a jump to a variable address. */
2282 for (p = reg_eliminate; p < ®_eliminate[NUM_ELIMINABLE_REGS]; p++)
2283 if (p->offset != p->initial_offset)
2284 p->can_eliminate = 0;
2292 /* Scan X and replace any eliminable registers (such as fp) with a
2293 replacement (such as sp), plus an offset.
2295 MEM_MODE is the mode of an enclosing MEM. We need this to know how
2296 much to adjust a register for, e.g., PRE_DEC. Also, if we are inside a
2297 MEM, we are allowed to replace a sum of a register and the constant zero
2298 with the register, which we cannot do outside a MEM. In addition, we need
2299 to record the fact that a register is referenced outside a MEM.
2301 If INSN is an insn, it is the insn containing X. If we replace a REG
2302 in a SET_DEST with an equivalent MEM and INSN is nonzero, write a
2303 CLOBBER of the pseudo after INSN so find_equiv_regs will know that
2304 the REG is being modified.
2306 Alternatively, INSN may be a note (an EXPR_LIST or INSN_LIST).
2307 That's used when we eliminate in expressions stored in notes.
2308 This means, do not set ref_outside_mem even if the reference
2311 REG_EQUIV_MEM and REG_EQUIV_ADDRESS contain address that have had
2312 replacements done assuming all offsets are at their initial values. If
2313 they are not, or if REG_EQUIV_ADDRESS is nonzero for a pseudo we
2314 encounter, return the actual location so that find_reloads will do
2315 the proper thing. */
2318 eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
2319 bool may_use_invariant)
2321 enum rtx_code code = GET_CODE (x);
2322 struct elim_table *ep;
2329 if (! current_function_decl)
2351 /* First handle the case where we encounter a bare register that
2352 is eliminable. Replace it with a PLUS. */
2353 if (regno < FIRST_PSEUDO_REGISTER)
2355 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS];
2357 if (ep->from_rtx == x && ep->can_eliminate)
2358 return plus_constant (ep->to_rtx, ep->previous_offset);
2361 else if (reg_renumber && reg_renumber[regno] < 0
2362 && reg_equiv_invariant && reg_equiv_invariant[regno])
2364 if (may_use_invariant)
2365 return eliminate_regs_1 (copy_rtx (reg_equiv_invariant[regno]),
2366 mem_mode, insn, true);
2367 /* There exists at least one use of REGNO that cannot be
2368 eliminated. Prevent the defining insn from being deleted. */
2369 reg_equiv_init[regno] = NULL_RTX;
2370 alter_reg (regno, -1);
2374 /* You might think handling MINUS in a manner similar to PLUS is a
2375 good idea. It is not. It has been tried multiple times and every
2376 time the change has had to have been reverted.
2378 Other parts of reload know a PLUS is special (gen_reload for example)
2379 and require special code to handle code a reloaded PLUS operand.
2381 Also consider backends where the flags register is clobbered by a
2382 MINUS, but we can emit a PLUS that does not clobber flags (IA-32,
2383 lea instruction comes to mind). If we try to reload a MINUS, we
2384 may kill the flags register that was holding a useful value.
2386 So, please before trying to handle MINUS, consider reload as a
2387 whole instead of this little section as well as the backend issues. */
2389 /* If this is the sum of an eliminable register and a constant, rework
2391 if (REG_P (XEXP (x, 0))
2392 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
2393 && CONSTANT_P (XEXP (x, 1)))
2395 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS];
2397 if (ep->from_rtx == XEXP (x, 0) && ep->can_eliminate)
2399 /* The only time we want to replace a PLUS with a REG (this
2400 occurs when the constant operand of the PLUS is the negative
2401 of the offset) is when we are inside a MEM. We won't want
2402 to do so at other times because that would change the
2403 structure of the insn in a way that reload can't handle.
2404 We special-case the commonest situation in
2405 eliminate_regs_in_insn, so just replace a PLUS with a
2406 PLUS here, unless inside a MEM. */
2407 if (mem_mode != 0 && GET_CODE (XEXP (x, 1)) == CONST_INT
2408 && INTVAL (XEXP (x, 1)) == - ep->previous_offset)
2411 return gen_rtx_PLUS (Pmode, ep->to_rtx,
2412 plus_constant (XEXP (x, 1),
2413 ep->previous_offset));
2416 /* If the register is not eliminable, we are done since the other
2417 operand is a constant. */
2421 /* If this is part of an address, we want to bring any constant to the
2422 outermost PLUS. We will do this by doing register replacement in
2423 our operands and seeing if a constant shows up in one of them.
2425 Note that there is no risk of modifying the structure of the insn,
2426 since we only get called for its operands, thus we are either
2427 modifying the address inside a MEM, or something like an address
2428 operand of a load-address insn. */
2431 rtx new0 = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true);
2432 rtx new1 = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true);
2434 if (reg_renumber && (new0 != XEXP (x, 0) || new1 != XEXP (x, 1)))
2436 /* If one side is a PLUS and the other side is a pseudo that
2437 didn't get a hard register but has a reg_equiv_constant,
2438 we must replace the constant here since it may no longer
2439 be in the position of any operand. */
2440 if (GET_CODE (new0) == PLUS && REG_P (new1)
2441 && REGNO (new1) >= FIRST_PSEUDO_REGISTER
2442 && reg_renumber[REGNO (new1)] < 0
2443 && reg_equiv_constant != 0
2444 && reg_equiv_constant[REGNO (new1)] != 0)
2445 new1 = reg_equiv_constant[REGNO (new1)];
2446 else if (GET_CODE (new1) == PLUS && REG_P (new0)
2447 && REGNO (new0) >= FIRST_PSEUDO_REGISTER
2448 && reg_renumber[REGNO (new0)] < 0
2449 && reg_equiv_constant[REGNO (new0)] != 0)
2450 new0 = reg_equiv_constant[REGNO (new0)];
2452 new = form_sum (new0, new1);
2454 /* As above, if we are not inside a MEM we do not want to
2455 turn a PLUS into something else. We might try to do so here
2456 for an addition of 0 if we aren't optimizing. */
2457 if (! mem_mode && GET_CODE (new) != PLUS)
2458 return gen_rtx_PLUS (GET_MODE (x), new, const0_rtx);
2466 /* If this is the product of an eliminable register and a
2467 constant, apply the distribute law and move the constant out
2468 so that we have (plus (mult ..) ..). This is needed in order
2469 to keep load-address insns valid. This case is pathological.
2470 We ignore the possibility of overflow here. */
2471 if (REG_P (XEXP (x, 0))
2472 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
2473 && GET_CODE (XEXP (x, 1)) == CONST_INT)
2474 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS];
2476 if (ep->from_rtx == XEXP (x, 0) && ep->can_eliminate)
2479 /* Refs inside notes don't count for this purpose. */
2480 && ! (insn != 0 && (GET_CODE (insn) == EXPR_LIST
2481 || GET_CODE (insn) == INSN_LIST)))
2482 ep->ref_outside_mem = 1;
2485 plus_constant (gen_rtx_MULT (Pmode, ep->to_rtx, XEXP (x, 1)),
2486 ep->previous_offset * INTVAL (XEXP (x, 1)));
2489 /* ... fall through ... */
2493 /* See comments before PLUS about handling MINUS. */
2495 case DIV: case UDIV:
2496 case MOD: case UMOD:
2497 case AND: case IOR: case XOR:
2498 case ROTATERT: case ROTATE:
2499 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
2501 case GE: case GT: case GEU: case GTU:
2502 case LE: case LT: case LEU: case LTU:
2504 rtx new0 = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false);
2505 rtx new1 = XEXP (x, 1)
2506 ? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, false) : 0;
2508 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
2509 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
2514 /* If we have something in XEXP (x, 0), the usual case, eliminate it. */
2517 new = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true);
2518 if (new != XEXP (x, 0))
2520 /* If this is a REG_DEAD note, it is not valid anymore.
2521 Using the eliminated version could result in creating a
2522 REG_DEAD note for the stack or frame pointer. */
2523 if (GET_MODE (x) == REG_DEAD)
2525 ? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true)
2528 x = gen_rtx_EXPR_LIST (REG_NOTE_KIND (x), new, XEXP (x, 1));
2532 /* ... fall through ... */
2535 /* Now do eliminations in the rest of the chain. If this was
2536 an EXPR_LIST, this might result in allocating more memory than is
2537 strictly needed, but it simplifies the code. */
2540 new = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true);
2541 if (new != XEXP (x, 1))
2543 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x), XEXP (x, 0), new);
2551 /* We do not support elimination of a register that is modified.
2552 elimination_effects has already make sure that this does not
2558 /* We do not support elimination of a register that is modified.
2559 elimination_effects has already make sure that this does not
2560 happen. The only remaining case we need to consider here is
2561 that the increment value may be an eliminable register. */
2562 if (GET_CODE (XEXP (x, 1)) == PLUS
2563 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
2565 rtx new = eliminate_regs_1 (XEXP (XEXP (x, 1), 1), mem_mode,
2568 if (new != XEXP (XEXP (x, 1), 1))
2569 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
2570 gen_rtx_PLUS (GET_MODE (x),
2575 case STRICT_LOW_PART:
2577 case SIGN_EXTEND: case ZERO_EXTEND:
2578 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
2579 case FLOAT: case FIX:
2580 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
2589 new = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false);
2590 if (new != XEXP (x, 0))
2591 return gen_rtx_fmt_e (code, GET_MODE (x), new);
2595 /* Similar to above processing, but preserve SUBREG_BYTE.
2596 Convert (subreg (mem)) to (mem) if not paradoxical.
2597 Also, if we have a non-paradoxical (subreg (pseudo)) and the
2598 pseudo didn't get a hard reg, we must replace this with the
2599 eliminated version of the memory location because push_reload
2600 may do the replacement in certain circumstances. */
2601 if (REG_P (SUBREG_REG (x))
2602 && (GET_MODE_SIZE (GET_MODE (x))
2603 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
2604 && reg_equiv_memory_loc != 0
2605 && reg_equiv_memory_loc[REGNO (SUBREG_REG (x))] != 0)
2607 new = SUBREG_REG (x);
2610 new = eliminate_regs_1 (SUBREG_REG (x), mem_mode, insn, false);
2612 if (new != SUBREG_REG (x))
2614 int x_size = GET_MODE_SIZE (GET_MODE (x));
2615 int new_size = GET_MODE_SIZE (GET_MODE (new));
2618 && ((x_size < new_size
2619 #ifdef WORD_REGISTER_OPERATIONS
2620 /* On these machines, combine can create rtl of the form
2621 (set (subreg:m1 (reg:m2 R) 0) ...)
2622 where m1 < m2, and expects something interesting to
2623 happen to the entire word. Moreover, it will use the
2624 (reg:m2 R) later, expecting all bits to be preserved.
2625 So if the number of words is the same, preserve the
2626 subreg so that push_reload can see it. */
2627 && ! ((x_size - 1) / UNITS_PER_WORD
2628 == (new_size -1 ) / UNITS_PER_WORD)
2631 || x_size == new_size)
2633 return adjust_address_nv (new, GET_MODE (x), SUBREG_BYTE (x));
2635 return gen_rtx_SUBREG (GET_MODE (x), new, SUBREG_BYTE (x));
2641 /* Our only special processing is to pass the mode of the MEM to our
2642 recursive call and copy the flags. While we are here, handle this
2643 case more efficiently. */
2645 replace_equiv_address_nv (x,
2646 eliminate_regs_1 (XEXP (x, 0), GET_MODE (x),
2650 /* Handle insn_list USE that a call to a pure function may generate. */
2651 new = eliminate_regs_1 (XEXP (x, 0), 0, insn, false);
2652 if (new != XEXP (x, 0))
2653 return gen_rtx_USE (GET_MODE (x), new);
2665 /* Process each of our operands recursively. If any have changed, make a
2667 fmt = GET_RTX_FORMAT (code);
2668 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
2672 new = eliminate_regs_1 (XEXP (x, i), mem_mode, insn, false);
2673 if (new != XEXP (x, i) && ! copied)
2675 x = shallow_copy_rtx (x);
2680 else if (*fmt == 'E')
2683 for (j = 0; j < XVECLEN (x, i); j++)
2685 new = eliminate_regs_1 (XVECEXP (x, i, j), mem_mode, insn, false);
2686 if (new != XVECEXP (x, i, j) && ! copied_vec)
2688 rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
2692 x = shallow_copy_rtx (x);
2695 XVEC (x, i) = new_v;
2698 XVECEXP (x, i, j) = new;
2707 eliminate_regs (rtx x, enum machine_mode mem_mode, rtx insn)
2709 return eliminate_regs_1 (x, mem_mode, insn, false);
2712 /* Scan rtx X for modifications of elimination target registers. Update
2713 the table of eliminables to reflect the changed state. MEM_MODE is
2714 the mode of an enclosing MEM rtx, or VOIDmode if not within a MEM. */
2717 elimination_effects (rtx x, enum machine_mode mem_mode)
2719 enum rtx_code code = GET_CODE (x);
2720 struct elim_table *ep;
2744 /* First handle the case where we encounter a bare register that
2745 is eliminable. Replace it with a PLUS. */
2746 if (regno < FIRST_PSEUDO_REGISTER)
2748 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS];
2750 if (ep->from_rtx == x && ep->can_eliminate)
2753 ep->ref_outside_mem = 1;
2758 else if (reg_renumber[regno] < 0 && reg_equiv_constant
2759 && reg_equiv_constant[regno]
2760 && ! function_invariant_p (reg_equiv_constant[regno]))
2761 elimination_effects (reg_equiv_constant[regno], mem_mode);
2770 /* If we modify the source of an elimination rule, disable it. */
2771 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
2772 if (ep->from_rtx == XEXP (x, 0))
2773 ep->can_eliminate = 0;
2775 /* If we modify the target of an elimination rule by adding a constant,
2776 update its offset. If we modify the target in any other way, we'll
2777 have to disable the rule as well. */
2778 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
2779 if (ep->to_rtx == XEXP (x, 0))
2781 int size = GET_MODE_SIZE (mem_mode);
2783 /* If more bytes than MEM_MODE are pushed, account for them. */
2784 #ifdef PUSH_ROUNDING
2785 if (ep->to_rtx == stack_pointer_rtx)
2786 size = PUSH_ROUNDING (size);
2788 if (code == PRE_DEC || code == POST_DEC)
2790 else if (code == PRE_INC || code == POST_INC)
2792 else if (code == PRE_MODIFY || code == POST_MODIFY)
2794 if (GET_CODE (XEXP (x, 1)) == PLUS
2795 && XEXP (x, 0) == XEXP (XEXP (x, 1), 0)
2796 && CONST_INT_P (XEXP (XEXP (x, 1), 1)))
2797 ep->offset -= INTVAL (XEXP (XEXP (x, 1), 1));
2799 ep->can_eliminate = 0;
2803 /* These two aren't unary operators. */
2804 if (code == POST_MODIFY || code == PRE_MODIFY)
2807 /* Fall through to generic unary operation case. */
2808 case STRICT_LOW_PART:
2810 case SIGN_EXTEND: case ZERO_EXTEND:
2811 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
2812 case FLOAT: case FIX:
2813 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
2822 elimination_effects (XEXP (x, 0), mem_mode);
2826 if (REG_P (SUBREG_REG (x))
2827 && (GET_MODE_SIZE (GET_MODE (x))
2828 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
2829 && reg_equiv_memory_loc != 0
2830 && reg_equiv_memory_loc[REGNO (SUBREG_REG (x))] != 0)
2833 elimination_effects (SUBREG_REG (x), mem_mode);
2837 /* If using a register that is the source of an eliminate we still
2838 think can be performed, note it cannot be performed since we don't
2839 know how this register is used. */
2840 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
2841 if (ep->from_rtx == XEXP (x, 0))
2842 ep->can_eliminate = 0;
2844 elimination_effects (XEXP (x, 0), mem_mode);
2848 /* If clobbering a register that is the replacement register for an
2849 elimination we still think can be performed, note that it cannot
2850 be performed. Otherwise, we need not be concerned about it. */
2851 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
2852 if (ep->to_rtx == XEXP (x, 0))
2853 ep->can_eliminate = 0;
2855 elimination_effects (XEXP (x, 0), mem_mode);
2859 /* Check for setting a register that we know about. */
2860 if (REG_P (SET_DEST (x)))
2862 /* See if this is setting the replacement register for an
2865 If DEST is the hard frame pointer, we do nothing because we
2866 assume that all assignments to the frame pointer are for
2867 non-local gotos and are being done at a time when they are valid
2868 and do not disturb anything else. Some machines want to
2869 eliminate a fake argument pointer (or even a fake frame pointer)
2870 with either the real frame or the stack pointer. Assignments to
2871 the hard frame pointer must not prevent this elimination. */
2873 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS];
2875 if (ep->to_rtx == SET_DEST (x)
2876 && SET_DEST (x) != hard_frame_pointer_rtx)
2878 /* If it is being incremented, adjust the offset. Otherwise,
2879 this elimination can't be done. */
2880 rtx src = SET_SRC (x);
2882 if (GET_CODE (src) == PLUS
2883 && XEXP (src, 0) == SET_DEST (x)
2884 && GET_CODE (XEXP (src, 1)) == CONST_INT)
2885 ep->offset -= INTVAL (XEXP (src, 1));
2887 ep->can_eliminate = 0;
2891 elimination_effects (SET_DEST (x), 0);
2892 elimination_effects (SET_SRC (x), 0);
2896 /* Our only special processing is to pass the mode of the MEM to our
2898 elimination_effects (XEXP (x, 0), GET_MODE (x));
2905 fmt = GET_RTX_FORMAT (code);
2906 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
2909 elimination_effects (XEXP (x, i), mem_mode);
2910 else if (*fmt == 'E')
2911 for (j = 0; j < XVECLEN (x, i); j++)
2912 elimination_effects (XVECEXP (x, i, j), mem_mode);
2916 /* Descend through rtx X and verify that no references to eliminable registers
2917 remain. If any do remain, mark the involved register as not
2921 check_eliminable_occurrences (rtx x)
2930 code = GET_CODE (x);
2932 if (code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
2934 struct elim_table *ep;
2936 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
2937 if (ep->from_rtx == x)
2938 ep->can_eliminate = 0;
2942 fmt = GET_RTX_FORMAT (code);
2943 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
2946 check_eliminable_occurrences (XEXP (x, i));
2947 else if (*fmt == 'E')
2950 for (j = 0; j < XVECLEN (x, i); j++)
2951 check_eliminable_occurrences (XVECEXP (x, i, j));
2956 /* Scan INSN and eliminate all eliminable registers in it.
2958 If REPLACE is nonzero, do the replacement destructively. Also
2959 delete the insn as dead it if it is setting an eliminable register.
2961 If REPLACE is zero, do all our allocations in reload_obstack.
2963 If no eliminations were done and this insn doesn't require any elimination
2964 processing (these are not identical conditions: it might be updating sp,
2965 but not referencing fp; this needs to be seen during reload_as_needed so
2966 that the offset between fp and sp can be taken into consideration), zero
2967 is returned. Otherwise, 1 is returned. */
2970 eliminate_regs_in_insn (rtx insn, int replace)
2972 int icode = recog_memoized (insn);
2973 rtx old_body = PATTERN (insn);
2974 int insn_is_asm = asm_noperands (old_body) >= 0;
2975 rtx old_set = single_set (insn);
2979 rtx substed_operand[MAX_RECOG_OPERANDS];
2980 rtx orig_operand[MAX_RECOG_OPERANDS];
2981 struct elim_table *ep;
2982 rtx plus_src, plus_cst_src;
2984 if (! insn_is_asm && icode < 0)
2986 gcc_assert (GET_CODE (PATTERN (insn)) == USE
2987 || GET_CODE (PATTERN (insn)) == CLOBBER
2988 || GET_CODE (PATTERN (insn)) == ADDR_VEC
2989 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
2990 || GET_CODE (PATTERN (insn)) == ASM_INPUT);
2994 if (old_set != 0 && REG_P (SET_DEST (old_set))
2995 && REGNO (SET_DEST (old_set)) < FIRST_PSEUDO_REGISTER)
2997 /* Check for setting an eliminable register. */
2998 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
2999 if (ep->from_rtx == SET_DEST (old_set) && ep->can_eliminate)
3001 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3002 /* If this is setting the frame pointer register to the
3003 hardware frame pointer register and this is an elimination
3004 that will be done (tested above), this insn is really
3005 adjusting the frame pointer downward to compensate for
3006 the adjustment done before a nonlocal goto. */
3007 if (ep->from == FRAME_POINTER_REGNUM
3008 && ep->to == HARD_FRAME_POINTER_REGNUM)
3010 rtx base = SET_SRC (old_set);
3011 rtx base_insn = insn;
3012 HOST_WIDE_INT offset = 0;
3014 while (base != ep->to_rtx)
3016 rtx prev_insn, prev_set;
3018 if (GET_CODE (base) == PLUS
3019 && GET_CODE (XEXP (base, 1)) == CONST_INT)
3021 offset += INTVAL (XEXP (base, 1));
3022 base = XEXP (base, 0);
3024 else if ((prev_insn = prev_nonnote_insn (base_insn)) != 0
3025 && (prev_set = single_set (prev_insn)) != 0
3026 && rtx_equal_p (SET_DEST (prev_set), base))
3028 base = SET_SRC (prev_set);
3029 base_insn = prev_insn;
3035 if (base == ep->to_rtx)
3038 = plus_constant (ep->to_rtx, offset - ep->offset);
3040 new_body = old_body;
3043 new_body = copy_insn (old_body);
3044 if (REG_NOTES (insn))
3045 REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn));
3047 PATTERN (insn) = new_body;
3048 old_set = single_set (insn);
3050 /* First see if this insn remains valid when we
3051 make the change. If not, keep the INSN_CODE
3052 the same and let reload fit it up. */
3053 validate_change (insn, &SET_SRC (old_set), src, 1);
3054 validate_change (insn, &SET_DEST (old_set),
3056 if (! apply_change_group ())
3058 SET_SRC (old_set) = src;
3059 SET_DEST (old_set) = ep->to_rtx;
3068 /* In this case this insn isn't serving a useful purpose. We
3069 will delete it in reload_as_needed once we know that this
3070 elimination is, in fact, being done.
3072 If REPLACE isn't set, we can't delete this insn, but needn't
3073 process it since it won't be used unless something changes. */
3076 delete_dead_insn (insn);
3084 /* We allow one special case which happens to work on all machines we
3085 currently support: a single set with the source or a REG_EQUAL
3086 note being a PLUS of an eliminable register and a constant. */
3087 plus_src = plus_cst_src = 0;
3088 if (old_set && REG_P (SET_DEST (old_set)))
3090 if (GET_CODE (SET_SRC (old_set)) == PLUS)
3091 plus_src = SET_SRC (old_set);
3092 /* First see if the source is of the form (plus (...) CST). */
3094 && GET_CODE (XEXP (plus_src, 1)) == CONST_INT)
3095 plus_cst_src = plus_src;
3096 else if (REG_P (SET_SRC (old_set))
3099 /* Otherwise, see if we have a REG_EQUAL note of the form
3100 (plus (...) CST). */
3102 for (links = REG_NOTES (insn); links; links = XEXP (links, 1))
3104 if ((REG_NOTE_KIND (links) == REG_EQUAL
3105 || REG_NOTE_KIND (links) == REG_EQUIV)
3106 && GET_CODE (XEXP (links, 0)) == PLUS
3107 && GET_CODE (XEXP (XEXP (links, 0), 1)) == CONST_INT)
3109 plus_cst_src = XEXP (links, 0);
3115 /* Check that the first operand of the PLUS is a hard reg or
3116 the lowpart subreg of one. */
3119 rtx reg = XEXP (plus_cst_src, 0);
3120 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
3121 reg = SUBREG_REG (reg);
3123 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
3129 rtx reg = XEXP (plus_cst_src, 0);
3130 HOST_WIDE_INT offset = INTVAL (XEXP (plus_cst_src, 1));
3132 if (GET_CODE (reg) == SUBREG)
3133 reg = SUBREG_REG (reg);
3135 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
3136 if (ep->from_rtx == reg && ep->can_eliminate)
3138 rtx to_rtx = ep->to_rtx;
3139 offset += ep->offset;
3140 offset = trunc_int_for_mode (offset, GET_MODE (reg));
3142 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
3143 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)),
3145 /* If we have a nonzero offset, and the source is already
3146 a simple REG, the following transformation would
3147 increase the cost of the insn by replacing a simple REG
3148 with (plus (reg sp) CST). So try only when we already
3149 had a PLUS before. */
3150 if (offset == 0 || plus_src)
3152 rtx new_src = plus_constant (to_rtx, offset);
3154 new_body = old_body;
3157 new_body = copy_insn (old_body);
3158 if (REG_NOTES (insn))
3159 REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn));
3161 PATTERN (insn) = new_body;
3162 old_set = single_set (insn);
3164 /* First see if this insn remains valid when we make the
3165 change. If not, try to replace the whole pattern with
3166 a simple set (this may help if the original insn was a
3167 PARALLEL that was only recognized as single_set due to
3168 REG_UNUSED notes). If this isn't valid either, keep
3169 the INSN_CODE the same and let reload fix it up. */
3170 if (!validate_change (insn, &SET_SRC (old_set), new_src, 0))
3172 rtx new_pat = gen_rtx_SET (VOIDmode,
3173 SET_DEST (old_set), new_src);
3175 if (!validate_change (insn, &PATTERN (insn), new_pat, 0))
3176 SET_SRC (old_set) = new_src;
3183 /* This can't have an effect on elimination offsets, so skip right
3189 /* Determine the effects of this insn on elimination offsets. */
3190 elimination_effects (old_body, 0);
3192 /* Eliminate all eliminable registers occurring in operands that
3193 can be handled by reload. */
3194 extract_insn (insn);
3195 for (i = 0; i < recog_data.n_operands; i++)
3197 orig_operand[i] = recog_data.operand[i];
3198 substed_operand[i] = recog_data.operand[i];
3200 /* For an asm statement, every operand is eliminable. */
3201 if (insn_is_asm || insn_data[icode].operand[i].eliminable)
3203 bool is_set_src, in_plus;
3205 /* Check for setting a register that we know about. */
3206 if (recog_data.operand_type[i] != OP_IN
3207 && REG_P (orig_operand[i]))
3209 /* If we are assigning to a register that can be eliminated, it
3210 must be as part of a PARALLEL, since the code above handles
3211 single SETs. We must indicate that we can no longer
3212 eliminate this reg. */
3213 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS];
3215 if (ep->from_rtx == orig_operand[i])
3216 ep->can_eliminate = 0;
3219 /* Companion to the above plus substitution, we can allow
3220 invariants as the source of a plain move. */
3222 if (old_set && recog_data.operand_loc[i] == &SET_SRC (old_set))
3226 && (recog_data.operand_loc[i] == &XEXP (plus_src, 0)
3227 || recog_data.operand_loc[i] == &XEXP (plus_src, 1)))
3231 = eliminate_regs_1 (recog_data.operand[i], 0,
3232 replace ? insn : NULL_RTX,
3233 is_set_src || in_plus);
3234 if (substed_operand[i] != orig_operand[i])
3236 /* Terminate the search in check_eliminable_occurrences at
3238 *recog_data.operand_loc[i] = 0;
3240 /* If an output operand changed from a REG to a MEM and INSN is an
3241 insn, write a CLOBBER insn. */
3242 if (recog_data.operand_type[i] != OP_IN
3243 && REG_P (orig_operand[i])
3244 && MEM_P (substed_operand[i])
3246 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, orig_operand[i]),
3251 for (i = 0; i < recog_data.n_dups; i++)
3252 *recog_data.dup_loc[i]
3253 = *recog_data.operand_loc[(int) recog_data.dup_num[i]];
3255 /* If any eliminable remain, they aren't eliminable anymore. */
3256 check_eliminable_occurrences (old_body);
3258 /* Substitute the operands; the new values are in the substed_operand
3260 for (i = 0; i < recog_data.n_operands; i++)
3261 *recog_data.operand_loc[i] = substed_operand[i];
3262 for (i = 0; i < recog_data.n_dups; i++)
3263 *recog_data.dup_loc[i] = substed_operand[(int) recog_data.dup_num[i]];
3265 /* If we are replacing a body that was a (set X (plus Y Z)), try to
3266 re-recognize the insn. We do this in case we had a simple addition
3267 but now can do this as a load-address. This saves an insn in this
3269 If re-recognition fails, the old insn code number will still be used,
3270 and some register operands may have changed into PLUS expressions.
3271 These will be handled by find_reloads by loading them into a register
3276 /* If we aren't replacing things permanently and we changed something,
3277 make another copy to ensure that all the RTL is new. Otherwise
3278 things can go wrong if find_reload swaps commutative operands
3279 and one is inside RTL that has been copied while the other is not. */
3280 new_body = old_body;
3283 new_body = copy_insn (old_body);
3284 if (REG_NOTES (insn))
3285 REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn));
3287 PATTERN (insn) = new_body;
3289 /* If we had a move insn but now we don't, rerecognize it. This will
3290 cause spurious re-recognition if the old move had a PARALLEL since
3291 the new one still will, but we can't call single_set without
3292 having put NEW_BODY into the insn and the re-recognition won't
3293 hurt in this rare case. */
3294 /* ??? Why this huge if statement - why don't we just rerecognize the
3298 && ((REG_P (SET_SRC (old_set))
3299 && (GET_CODE (new_body) != SET
3300 || !REG_P (SET_SRC (new_body))))
3301 /* If this was a load from or store to memory, compare
3302 the MEM in recog_data.operand to the one in the insn.
3303 If they are not equal, then rerecognize the insn. */
3305 && ((MEM_P (SET_SRC (old_set))
3306 && SET_SRC (old_set) != recog_data.operand[1])
3307 || (MEM_P (SET_DEST (old_set))
3308 && SET_DEST (old_set) != recog_data.operand[0])))
3309 /* If this was an add insn before, rerecognize. */
3310 || GET_CODE (SET_SRC (old_set)) == PLUS))
3312 int new_icode = recog (PATTERN (insn), insn, 0);
3314 INSN_CODE (insn) = new_icode;
3318 /* Restore the old body. If there were any changes to it, we made a copy
3319 of it while the changes were still in place, so we'll correctly return
3320 a modified insn below. */
3323 /* Restore the old body. */
3324 for (i = 0; i < recog_data.n_operands; i++)
3325 *recog_data.operand_loc[i] = orig_operand[i];
3326 for (i = 0; i < recog_data.n_dups; i++)
3327 *recog_data.dup_loc[i] = orig_operand[(int) recog_data.dup_num[i]];
3330 /* Update all elimination pairs to reflect the status after the current
3331 insn. The changes we make were determined by the earlier call to
3332 elimination_effects.
3334 We also detect cases where register elimination cannot be done,
3335 namely, if a register would be both changed and referenced outside a MEM
3336 in the resulting insn since such an insn is often undefined and, even if
3337 not, we cannot know what meaning will be given to it. Note that it is
3338 valid to have a register used in an address in an insn that changes it
3339 (presumably with a pre- or post-increment or decrement).
3341 If anything changes, return nonzero. */
3343 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
3345 if (ep->previous_offset != ep->offset && ep->ref_outside_mem)
3346 ep->can_eliminate = 0;
3348 ep->ref_outside_mem = 0;
3350 if (ep->previous_offset != ep->offset)
3355 /* If we changed something, perform elimination in REG_NOTES. This is
3356 needed even when REPLACE is zero because a REG_DEAD note might refer
3357 to a register that we eliminate and could cause a different number
3358 of spill registers to be needed in the final reload pass than in
3360 if (val && REG_NOTES (insn) != 0)
3362 = eliminate_regs_1 (REG_NOTES (insn), 0, REG_NOTES (insn), true);
3367 /* Loop through all elimination pairs.
3368 Recalculate the number not at initial offset.
3370 Compute the maximum offset (minimum offset if the stack does not
3371 grow downward) for each elimination pair. */
3374 update_eliminable_offsets (void)
3376 struct elim_table *ep;
3378 num_not_at_initial_offset = 0;
3379 for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; ep++)
3381 ep->previous_offset = ep->offset;
3382 if (ep->can_eliminate && ep->offset != ep->initial_offset)
3383 num_not_at_initial_offset++;
3387 /* Given X, a SET or CLOBBER of DEST, if DEST is the target of a register
3388 replacement we currently believe is valid, mark it as not eliminable if X
3389 modifies DEST in any way other than by adding a constant integer to it.
3391 If DEST is the frame pointer, we do nothing because we assume that
3392 all assignments to the hard frame pointer are nonlocal gotos and are being
3393 done at a time when they are valid and do not disturb anything else.
3394 Some machines want to eliminate a fake argument pointer with either the
3395 frame or stack pointer. Assignments to the hard frame pointer must not
3396 prevent this elimination.
3398 Called via note_stores from reload before starting its passes to scan
3399 the insns of the function. */
3402 mark_not_eliminable (rtx dest, rtx x, void *data ATTRIBUTE_UNUSED)
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