1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation,
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
31 init_reload actually has to be called earlier anyway.
33 To scan an insn, call `find_reloads'. This does two things:
34 1. sets up tables describing which values must be reloaded
35 for this insn, and what kind of hard regs they must be reloaded into;
36 2. optionally record the locations where those values appear in
37 the data, so they can be replaced properly later.
38 This is done only if the second arg to `find_reloads' is nonzero.
40 The third arg to `find_reloads' specifies the number of levels
41 of indirect addressing supported by the machine. If it is zero,
42 indirect addressing is not valid. If it is one, (MEM (REG n))
43 is valid even if (REG n) did not get a hard register; if it is two,
44 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
45 hard register, and similarly for higher values.
47 Then you must choose the hard regs to reload those pseudo regs into,
48 and generate appropriate load insns before this insn and perhaps
49 also store insns after this insn. Set up the array `reload_reg_rtx'
50 to contain the REG rtx's for the registers you used. In some
51 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
52 for certain reloads. Then that tells you which register to use,
53 so you do not need to allocate one. But you still do need to add extra
54 instructions to copy the value into and out of that register.
56 Finally you must call `subst_reloads' to substitute the reload reg rtx's
57 into the locations already recorded.
61 find_reloads can alter the operands of the instruction it is called on.
63 1. Two operands of any sort may be interchanged, if they are in a
64 commutative instruction.
65 This happens only if find_reloads thinks the instruction will compile
68 2. Pseudo-registers that are equivalent to constants are replaced
69 with those constants if they are not in hard registers.
71 1 happens every time find_reloads is called.
72 2 happens only when REPLACE is 1, which is only when
73 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
93 #include "coretypes.h"
97 #include "insn-config.h"
103 #include "addresses.h"
104 #include "hard-reg-set.h"
108 #include "function.h"
113 /* True if X is a constant that can be forced into the constant pool. */
114 #define CONST_POOL_OK_P(X) \
116 && GET_CODE (X) != HIGH \
117 && !targetm.cannot_force_const_mem (X))
119 /* True if C is a non-empty register class that has too few registers
120 to be safely used as a reload target class. */
121 #define SMALL_REGISTER_CLASS_P(C) \
122 (reg_class_size [(C)] == 1 \
123 || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
126 /* All reloads of the current insn are recorded here. See reload.h for
129 struct reload rld[MAX_RELOADS];
131 /* All the "earlyclobber" operands of the current insn
132 are recorded here. */
134 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
136 int reload_n_operands;
138 /* Replacing reloads.
140 If `replace_reloads' is nonzero, then as each reload is recorded
141 an entry is made for it in the table `replacements'.
142 Then later `subst_reloads' can look through that table and
143 perform all the replacements needed. */
145 /* Nonzero means record the places to replace. */
146 static int replace_reloads;
148 /* Each replacement is recorded with a structure like this. */
151 rtx *where; /* Location to store in */
152 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
153 a SUBREG; 0 otherwise. */
154 int what; /* which reload this is for */
155 enum machine_mode mode; /* mode it must have */
158 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
160 /* Number of replacements currently recorded. */
161 static int n_replacements;
163 /* Used to track what is modified by an operand. */
166 int reg_flag; /* Nonzero if referencing a register. */
167 int safe; /* Nonzero if this can't conflict with anything. */
168 rtx base; /* Base address for MEM. */
169 HOST_WIDE_INT start; /* Starting offset or register number. */
170 HOST_WIDE_INT end; /* Ending offset or register number. */
173 #ifdef SECONDARY_MEMORY_NEEDED
175 /* Save MEMs needed to copy from one class of registers to another. One MEM
176 is used per mode, but normally only one or two modes are ever used.
178 We keep two versions, before and after register elimination. The one
179 after register elimination is record separately for each operand. This
180 is done in case the address is not valid to be sure that we separately
183 static rtx secondary_memlocs[NUM_MACHINE_MODES];
184 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
185 static int secondary_memlocs_elim_used = 0;
188 /* The instruction we are doing reloads for;
189 so we can test whether a register dies in it. */
190 static rtx this_insn;
192 /* Nonzero if this instruction is a user-specified asm with operands. */
193 static int this_insn_is_asm;
195 /* If hard_regs_live_known is nonzero,
196 we can tell which hard regs are currently live,
197 at least enough to succeed in choosing dummy reloads. */
198 static int hard_regs_live_known;
200 /* Indexed by hard reg number,
201 element is nonnegative if hard reg has been spilled.
202 This vector is passed to `find_reloads' as an argument
203 and is not changed here. */
204 static short *static_reload_reg_p;
206 /* Set to 1 in subst_reg_equivs if it changes anything. */
207 static int subst_reg_equivs_changed;
209 /* On return from push_reload, holds the reload-number for the OUT
210 operand, which can be different for that from the input operand. */
211 static int output_reloadnum;
213 /* Compare two RTX's. */
214 #define MATCHES(x, y) \
215 (x == y || (x != 0 && (REG_P (x) \
216 ? REG_P (y) && REGNO (x) == REGNO (y) \
217 : rtx_equal_p (x, y) && ! side_effects_p (x))))
219 /* Indicates if two reloads purposes are for similar enough things that we
220 can merge their reloads. */
221 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
222 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
223 || ((when1) == (when2) && (op1) == (op2)) \
224 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
225 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
226 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
227 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
228 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
230 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
231 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
232 ((when1) != (when2) \
233 || ! ((op1) == (op2) \
234 || (when1) == RELOAD_FOR_INPUT \
235 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
236 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
238 /* If we are going to reload an address, compute the reload type to
240 #define ADDR_TYPE(type) \
241 ((type) == RELOAD_FOR_INPUT_ADDRESS \
242 ? RELOAD_FOR_INPADDR_ADDRESS \
243 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
244 ? RELOAD_FOR_OUTADDR_ADDRESS \
247 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
248 enum machine_mode, enum reload_type,
249 enum insn_code *, secondary_reload_info *);
250 static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
252 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
253 static void push_replacement (rtx *, int, enum machine_mode);
254 static void dup_replacements (rtx *, rtx *);
255 static void combine_reloads (void);
256 static int find_reusable_reload (rtx *, rtx, enum reg_class,
257 enum reload_type, int, int);
258 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
259 enum machine_mode, enum reg_class, int, int);
260 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
261 static struct decomposition decompose (rtx);
262 static int immune_p (rtx, rtx, struct decomposition);
263 static int alternative_allows_memconst (const char *, int);
264 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
266 static rtx make_memloc (rtx, int);
267 static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
268 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
269 int, enum reload_type, int, rtx);
270 static rtx subst_reg_equivs (rtx, rtx);
271 static rtx subst_indexed_address (rtx);
272 static void update_auto_inc_notes (rtx, int, int);
273 static int find_reloads_address_1 (enum machine_mode, rtx, int,
274 enum rtx_code, enum rtx_code, rtx *,
275 int, enum reload_type,int, rtx);
276 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
277 enum machine_mode, int,
278 enum reload_type, int);
279 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
281 static void copy_replacements_1 (rtx *, rtx *, int);
282 static int find_inc_amount (rtx, rtx);
283 static int refers_to_mem_for_reload_p (rtx);
284 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
287 /* Determine if any secondary reloads are needed for loading (if IN_P is
288 nonzero) or storing (if IN_P is zero) X to or from a reload register of
289 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
290 are needed, push them.
292 Return the reload number of the secondary reload we made, or -1 if
293 we didn't need one. *PICODE is set to the insn_code to use if we do
294 need a secondary reload. */
297 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
298 enum reg_class reload_class,
299 enum machine_mode reload_mode, enum reload_type type,
300 enum insn_code *picode, secondary_reload_info *prev_sri)
302 enum reg_class class = NO_REGS;
303 enum reg_class scratch_class;
304 enum machine_mode mode = reload_mode;
305 enum insn_code icode = CODE_FOR_nothing;
306 enum insn_code t_icode = CODE_FOR_nothing;
307 enum reload_type secondary_type;
308 int s_reload, t_reload = -1;
309 const char *scratch_constraint;
311 secondary_reload_info sri;
313 if (type == RELOAD_FOR_INPUT_ADDRESS
314 || type == RELOAD_FOR_OUTPUT_ADDRESS
315 || type == RELOAD_FOR_INPADDR_ADDRESS
316 || type == RELOAD_FOR_OUTADDR_ADDRESS)
317 secondary_type = type;
319 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
321 *picode = CODE_FOR_nothing;
323 /* If X is a paradoxical SUBREG, use the inner value to determine both the
324 mode and object being reloaded. */
325 if (GET_CODE (x) == SUBREG
326 && (GET_MODE_SIZE (GET_MODE (x))
327 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
330 reload_mode = GET_MODE (x);
333 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
334 is still a pseudo-register by now, it *must* have an equivalent MEM
335 but we don't want to assume that), use that equivalent when seeing if
336 a secondary reload is needed since whether or not a reload is needed
337 might be sensitive to the form of the MEM. */
339 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
340 && reg_equiv_mem[REGNO (x)] != 0)
341 x = reg_equiv_mem[REGNO (x)];
343 sri.icode = CODE_FOR_nothing;
344 sri.prev_sri = prev_sri;
345 class = targetm.secondary_reload (in_p, x, reload_class, reload_mode, &sri);
348 /* If we don't need any secondary registers, done. */
349 if (class == NO_REGS && icode == CODE_FOR_nothing)
352 if (class != NO_REGS)
353 t_reload = push_secondary_reload (in_p, x, opnum, optional, class,
354 reload_mode, type, &t_icode, &sri);
356 /* If we will be using an insn, the secondary reload is for a
359 if (icode != CODE_FOR_nothing)
361 /* If IN_P is nonzero, the reload register will be the output in
362 operand 0. If IN_P is zero, the reload register will be the input
363 in operand 1. Outputs should have an initial "=", which we must
366 /* ??? It would be useful to be able to handle only two, or more than
367 three, operands, but for now we can only handle the case of having
368 exactly three: output, input and one temp/scratch. */
369 gcc_assert (insn_data[(int) icode].n_operands == 3);
371 /* ??? We currently have no way to represent a reload that needs
372 an icode to reload from an intermediate tertiary reload register.
373 We should probably have a new field in struct reload to tag a
374 chain of scratch operand reloads onto. */
375 gcc_assert (class == NO_REGS);
377 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
378 gcc_assert (*scratch_constraint == '=');
379 scratch_constraint++;
380 if (*scratch_constraint == '&')
381 scratch_constraint++;
382 letter = *scratch_constraint;
383 scratch_class = (letter == 'r' ? GENERAL_REGS
384 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
385 scratch_constraint));
387 class = scratch_class;
388 mode = insn_data[(int) icode].operand[2].mode;
391 /* This case isn't valid, so fail. Reload is allowed to use the same
392 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
393 in the case of a secondary register, we actually need two different
394 registers for correct code. We fail here to prevent the possibility of
395 silently generating incorrect code later.
397 The convention is that secondary input reloads are valid only if the
398 secondary_class is different from class. If you have such a case, you
399 can not use secondary reloads, you must work around the problem some
402 Allow this when a reload_in/out pattern is being used. I.e. assume
403 that the generated code handles this case. */
405 gcc_assert (!in_p || class != reload_class || icode != CODE_FOR_nothing
406 || t_icode != CODE_FOR_nothing);
408 /* See if we can reuse an existing secondary reload. */
409 for (s_reload = 0; s_reload < n_reloads; s_reload++)
410 if (rld[s_reload].secondary_p
411 && (reg_class_subset_p (class, rld[s_reload].class)
412 || reg_class_subset_p (rld[s_reload].class, class))
413 && ((in_p && rld[s_reload].inmode == mode)
414 || (! in_p && rld[s_reload].outmode == mode))
415 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
416 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
417 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
418 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
419 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
420 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
421 opnum, rld[s_reload].opnum))
424 rld[s_reload].inmode = mode;
426 rld[s_reload].outmode = mode;
428 if (reg_class_subset_p (class, rld[s_reload].class))
429 rld[s_reload].class = class;
431 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
432 rld[s_reload].optional &= optional;
433 rld[s_reload].secondary_p = 1;
434 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
435 opnum, rld[s_reload].opnum))
436 rld[s_reload].when_needed = RELOAD_OTHER;
439 if (s_reload == n_reloads)
441 #ifdef SECONDARY_MEMORY_NEEDED
442 /* If we need a memory location to copy between the two reload regs,
443 set it up now. Note that we do the input case before making
444 the reload and the output case after. This is due to the
445 way reloads are output. */
447 if (in_p && icode == CODE_FOR_nothing
448 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
450 get_secondary_mem (x, reload_mode, opnum, type);
452 /* We may have just added new reloads. Make sure we add
453 the new reload at the end. */
454 s_reload = n_reloads;
458 /* We need to make a new secondary reload for this register class. */
459 rld[s_reload].in = rld[s_reload].out = 0;
460 rld[s_reload].class = class;
462 rld[s_reload].inmode = in_p ? mode : VOIDmode;
463 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
464 rld[s_reload].reg_rtx = 0;
465 rld[s_reload].optional = optional;
466 rld[s_reload].inc = 0;
467 /* Maybe we could combine these, but it seems too tricky. */
468 rld[s_reload].nocombine = 1;
469 rld[s_reload].in_reg = 0;
470 rld[s_reload].out_reg = 0;
471 rld[s_reload].opnum = opnum;
472 rld[s_reload].when_needed = secondary_type;
473 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
474 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
475 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
476 rld[s_reload].secondary_out_icode
477 = ! in_p ? t_icode : CODE_FOR_nothing;
478 rld[s_reload].secondary_p = 1;
482 #ifdef SECONDARY_MEMORY_NEEDED
483 if (! in_p && icode == CODE_FOR_nothing
484 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
485 get_secondary_mem (x, mode, opnum, type);
493 /* If a secondary reload is needed, return its class. If both an intermediate
494 register and a scratch register is needed, we return the class of the
495 intermediate register. */
497 secondary_reload_class (bool in_p, enum reg_class class,
498 enum machine_mode mode, rtx x)
500 enum insn_code icode;
501 secondary_reload_info sri;
503 sri.icode = CODE_FOR_nothing;
505 class = targetm.secondary_reload (in_p, x, class, mode, &sri);
508 /* If there are no secondary reloads at all, we return NO_REGS.
509 If an intermediate register is needed, we return its class. */
510 if (icode == CODE_FOR_nothing || class != NO_REGS)
513 /* No intermediate register is needed, but we have a special reload
514 pattern, which we assume for now needs a scratch register. */
515 return scratch_reload_class (icode);
518 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
519 three operands, verify that operand 2 is an output operand, and return
521 ??? We'd like to be able to handle any pattern with at least 2 operands,
522 for zero or more scratch registers, but that needs more infrastructure. */
524 scratch_reload_class (enum insn_code icode)
526 const char *scratch_constraint;
528 enum reg_class class;
530 gcc_assert (insn_data[(int) icode].n_operands == 3);
531 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
532 gcc_assert (*scratch_constraint == '=');
533 scratch_constraint++;
534 if (*scratch_constraint == '&')
535 scratch_constraint++;
536 scratch_letter = *scratch_constraint;
537 if (scratch_letter == 'r')
539 class = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
541 gcc_assert (class != NO_REGS);
545 #ifdef SECONDARY_MEMORY_NEEDED
547 /* Return a memory location that will be used to copy X in mode MODE.
548 If we haven't already made a location for this mode in this insn,
549 call find_reloads_address on the location being returned. */
552 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
553 int opnum, enum reload_type type)
558 /* By default, if MODE is narrower than a word, widen it to a word.
559 This is required because most machines that require these memory
560 locations do not support short load and stores from all registers
561 (e.g., FP registers). */
563 #ifdef SECONDARY_MEMORY_NEEDED_MODE
564 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
566 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
567 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
570 /* If we already have made a MEM for this operand in MODE, return it. */
571 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
572 return secondary_memlocs_elim[(int) mode][opnum];
574 /* If this is the first time we've tried to get a MEM for this mode,
575 allocate a new one. `something_changed' in reload will get set
576 by noticing that the frame size has changed. */
578 if (secondary_memlocs[(int) mode] == 0)
580 #ifdef SECONDARY_MEMORY_NEEDED_RTX
581 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
583 secondary_memlocs[(int) mode]
584 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
588 /* Get a version of the address doing any eliminations needed. If that
589 didn't give us a new MEM, make a new one if it isn't valid. */
591 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
592 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
594 if (! mem_valid && loc == secondary_memlocs[(int) mode])
595 loc = copy_rtx (loc);
597 /* The only time the call below will do anything is if the stack
598 offset is too large. In that case IND_LEVELS doesn't matter, so we
599 can just pass a zero. Adjust the type to be the address of the
600 corresponding object. If the address was valid, save the eliminated
601 address. If it wasn't valid, we need to make a reload each time, so
606 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
607 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
610 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
614 secondary_memlocs_elim[(int) mode][opnum] = loc;
615 if (secondary_memlocs_elim_used <= (int)mode)
616 secondary_memlocs_elim_used = (int)mode + 1;
620 /* Clear any secondary memory locations we've made. */
623 clear_secondary_mem (void)
625 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
627 #endif /* SECONDARY_MEMORY_NEEDED */
630 /* Find the largest class which has at least one register valid in
631 mode INNER, and which for every such register, that register number
632 plus N is also valid in OUTER (if in range) and is cheap to move
633 into REGNO. Such a class must exist. */
635 static enum reg_class
636 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
637 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
638 unsigned int dest_regno ATTRIBUTE_UNUSED)
643 enum reg_class best_class = NO_REGS;
644 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
645 unsigned int best_size = 0;
648 for (class = 1; class < N_REG_CLASSES; class++)
652 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
653 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno))
655 if (HARD_REGNO_MODE_OK (regno, inner))
658 if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
659 || ! HARD_REGNO_MODE_OK (regno + n, outer))
666 cost = REGISTER_MOVE_COST (outer, class, dest_class);
668 if ((reg_class_size[class] > best_size
669 && (best_cost < 0 || best_cost >= cost))
673 best_size = reg_class_size[class];
674 best_cost = REGISTER_MOVE_COST (outer, class, dest_class);
678 gcc_assert (best_size != 0);
683 /* Return the number of a previously made reload that can be combined with
684 a new one, or n_reloads if none of the existing reloads can be used.
685 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
686 push_reload, they determine the kind of the new reload that we try to
687 combine. P_IN points to the corresponding value of IN, which can be
688 modified by this function.
689 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
692 find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
693 enum reload_type type, int opnum, int dont_share)
697 /* We can't merge two reloads if the output of either one is
700 if (earlyclobber_operand_p (out))
703 /* We can use an existing reload if the class is right
704 and at least one of IN and OUT is a match
705 and the other is at worst neutral.
706 (A zero compared against anything is neutral.)
708 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
709 for the same thing since that can cause us to need more reload registers
710 than we otherwise would. */
712 for (i = 0; i < n_reloads; i++)
713 if ((reg_class_subset_p (class, rld[i].class)
714 || reg_class_subset_p (rld[i].class, class))
715 /* If the existing reload has a register, it must fit our class. */
716 && (rld[i].reg_rtx == 0
717 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
718 true_regnum (rld[i].reg_rtx)))
719 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
720 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
721 || (out != 0 && MATCHES (rld[i].out, out)
722 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
723 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
724 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
725 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
728 /* Reloading a plain reg for input can match a reload to postincrement
729 that reg, since the postincrement's value is the right value.
730 Likewise, it can match a preincrement reload, since we regard
731 the preincrementation as happening before any ref in this insn
733 for (i = 0; i < n_reloads; i++)
734 if ((reg_class_subset_p (class, rld[i].class)
735 || reg_class_subset_p (rld[i].class, class))
736 /* If the existing reload has a register, it must fit our
738 && (rld[i].reg_rtx == 0
739 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
740 true_regnum (rld[i].reg_rtx)))
741 && out == 0 && rld[i].out == 0 && rld[i].in != 0
743 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
744 && MATCHES (XEXP (rld[i].in, 0), in))
745 || (REG_P (rld[i].in)
746 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
747 && MATCHES (XEXP (in, 0), rld[i].in)))
748 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
749 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
750 && MERGABLE_RELOADS (type, rld[i].when_needed,
751 opnum, rld[i].opnum))
753 /* Make sure reload_in ultimately has the increment,
754 not the plain register. */
762 /* Return nonzero if X is a SUBREG which will require reloading of its
763 SUBREG_REG expression. */
766 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
770 /* Only SUBREGs are problematical. */
771 if (GET_CODE (x) != SUBREG)
774 inner = SUBREG_REG (x);
776 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
777 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
780 /* If INNER is not a hard register, then INNER will not need to
783 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
786 /* If INNER is not ok for MODE, then INNER will need reloading. */
787 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
790 /* If the outer part is a word or smaller, INNER larger than a
791 word and the number of regs for INNER is not the same as the
792 number of words in INNER, then INNER will need reloading. */
793 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
795 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
796 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
797 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
800 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
801 requiring an extra reload register. The caller has already found that
802 IN contains some reference to REGNO, so check that we can produce the
803 new value in a single step. E.g. if we have
804 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
805 instruction that adds one to a register, this should succeed.
806 However, if we have something like
807 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
808 needs to be loaded into a register first, we need a separate reload
810 Such PLUS reloads are generated by find_reload_address_part.
811 The out-of-range PLUS expressions are usually introduced in the instruction
812 patterns by register elimination and substituting pseudos without a home
813 by their function-invariant equivalences. */
815 can_reload_into (rtx in, int regno, enum machine_mode mode)
819 struct recog_data save_recog_data;
821 /* For matching constraints, we often get notional input reloads where
822 we want to use the original register as the reload register. I.e.
823 technically this is a non-optional input-output reload, but IN is
824 already a valid register, and has been chosen as the reload register.
825 Speed this up, since it trivially works. */
829 /* To test MEMs properly, we'd have to take into account all the reloads
830 that are already scheduled, which can become quite complicated.
831 And since we've already handled address reloads for this MEM, it
832 should always succeed anyway. */
836 /* If we can make a simple SET insn that does the job, everything should
838 dst = gen_rtx_REG (mode, regno);
839 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
840 save_recog_data = recog_data;
841 if (recog_memoized (test_insn) >= 0)
843 extract_insn (test_insn);
844 r = constrain_operands (1);
846 recog_data = save_recog_data;
850 /* Record one reload that needs to be performed.
851 IN is an rtx saying where the data are to be found before this instruction.
852 OUT says where they must be stored after the instruction.
853 (IN is zero for data not read, and OUT is zero for data not written.)
854 INLOC and OUTLOC point to the places in the instructions where
855 IN and OUT were found.
856 If IN and OUT are both nonzero, it means the same register must be used
857 to reload both IN and OUT.
859 CLASS is a register class required for the reloaded data.
860 INMODE is the machine mode that the instruction requires
861 for the reg that replaces IN and OUTMODE is likewise for OUT.
863 If IN is zero, then OUT's location and mode should be passed as
866 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
868 OPTIONAL nonzero means this reload does not need to be performed:
869 it can be discarded if that is more convenient.
871 OPNUM and TYPE say what the purpose of this reload is.
873 The return value is the reload-number for this reload.
875 If both IN and OUT are nonzero, in some rare cases we might
876 want to make two separate reloads. (Actually we never do this now.)
877 Therefore, the reload-number for OUT is stored in
878 output_reloadnum when we return; the return value applies to IN.
879 Usually (presently always), when IN and OUT are nonzero,
880 the two reload-numbers are equal, but the caller should be careful to
884 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
885 enum reg_class class, enum machine_mode inmode,
886 enum machine_mode outmode, int strict_low, int optional,
887 int opnum, enum reload_type type)
891 int dont_remove_subreg = 0;
892 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
893 int secondary_in_reload = -1, secondary_out_reload = -1;
894 enum insn_code secondary_in_icode = CODE_FOR_nothing;
895 enum insn_code secondary_out_icode = CODE_FOR_nothing;
897 /* INMODE and/or OUTMODE could be VOIDmode if no mode
898 has been specified for the operand. In that case,
899 use the operand's mode as the mode to reload. */
900 if (inmode == VOIDmode && in != 0)
901 inmode = GET_MODE (in);
902 if (outmode == VOIDmode && out != 0)
903 outmode = GET_MODE (out);
905 /* If IN is a pseudo register everywhere-equivalent to a constant, and
906 it is not in a hard register, reload straight from the constant,
907 since we want to get rid of such pseudo registers.
908 Often this is done earlier, but not always in find_reloads_address. */
909 if (in != 0 && REG_P (in))
911 int regno = REGNO (in);
913 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
914 && reg_equiv_constant[regno] != 0)
915 in = reg_equiv_constant[regno];
918 /* Likewise for OUT. Of course, OUT will never be equivalent to
919 an actual constant, but it might be equivalent to a memory location
920 (in the case of a parameter). */
921 if (out != 0 && REG_P (out))
923 int regno = REGNO (out);
925 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
926 && reg_equiv_constant[regno] != 0)
927 out = reg_equiv_constant[regno];
930 /* If we have a read-write operand with an address side-effect,
931 change either IN or OUT so the side-effect happens only once. */
932 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
933 switch (GET_CODE (XEXP (in, 0)))
935 case POST_INC: case POST_DEC: case POST_MODIFY:
936 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
939 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
940 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
947 /* If we are reloading a (SUBREG constant ...), really reload just the
948 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
949 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
950 a pseudo and hence will become a MEM) with M1 wider than M2 and the
951 register is a pseudo, also reload the inside expression.
952 For machines that extend byte loads, do this for any SUBREG of a pseudo
953 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
954 M2 is an integral mode that gets extended when loaded.
955 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
956 either M1 is not valid for R or M2 is wider than a word but we only
957 need one word to store an M2-sized quantity in R.
958 (However, if OUT is nonzero, we need to reload the reg *and*
959 the subreg, so do nothing here, and let following statement handle it.)
961 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
962 we can't handle it here because CONST_INT does not indicate a mode.
964 Similarly, we must reload the inside expression if we have a
965 STRICT_LOW_PART (presumably, in == out in the cas).
967 Also reload the inner expression if it does not require a secondary
968 reload but the SUBREG does.
970 Finally, reload the inner expression if it is a register that is in
971 the class whose registers cannot be referenced in a different size
972 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
973 cannot reload just the inside since we might end up with the wrong
974 register class. But if it is inside a STRICT_LOW_PART, we have
975 no choice, so we hope we do get the right register class there. */
977 if (in != 0 && GET_CODE (in) == SUBREG
978 && (subreg_lowpart_p (in) || strict_low)
979 #ifdef CANNOT_CHANGE_MODE_CLASS
980 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
982 && (CONSTANT_P (SUBREG_REG (in))
983 || GET_CODE (SUBREG_REG (in)) == PLUS
985 || (((REG_P (SUBREG_REG (in))
986 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
987 || MEM_P (SUBREG_REG (in)))
988 && ((GET_MODE_SIZE (inmode)
989 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
990 #ifdef LOAD_EXTEND_OP
991 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
992 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
994 && (GET_MODE_SIZE (inmode)
995 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
996 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
997 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
999 #ifdef WORD_REGISTER_OPERATIONS
1000 || ((GET_MODE_SIZE (inmode)
1001 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1002 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1003 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1007 || (REG_P (SUBREG_REG (in))
1008 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1009 /* The case where out is nonzero
1010 is handled differently in the following statement. */
1011 && (out == 0 || subreg_lowpart_p (in))
1012 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1013 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1015 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1017 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1018 [GET_MODE (SUBREG_REG (in))]))
1019 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1020 || (secondary_reload_class (1, class, inmode, in) != NO_REGS
1021 && (secondary_reload_class (1, class, GET_MODE (SUBREG_REG (in)),
1024 #ifdef CANNOT_CHANGE_MODE_CLASS
1025 || (REG_P (SUBREG_REG (in))
1026 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1027 && REG_CANNOT_CHANGE_MODE_P
1028 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1032 in_subreg_loc = inloc;
1033 inloc = &SUBREG_REG (in);
1035 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1037 /* This is supposed to happen only for paradoxical subregs made by
1038 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1039 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1041 inmode = GET_MODE (in);
1044 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1045 either M1 is not valid for R or M2 is wider than a word but we only
1046 need one word to store an M2-sized quantity in R.
1048 However, we must reload the inner reg *as well as* the subreg in
1051 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1052 code above. This can happen if SUBREG_BYTE != 0. */
1054 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1056 enum reg_class in_class = class;
1058 if (REG_P (SUBREG_REG (in)))
1060 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1061 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1062 GET_MODE (SUBREG_REG (in)),
1065 REGNO (SUBREG_REG (in)));
1067 /* This relies on the fact that emit_reload_insns outputs the
1068 instructions for input reloads of type RELOAD_OTHER in the same
1069 order as the reloads. Thus if the outer reload is also of type
1070 RELOAD_OTHER, we are guaranteed that this inner reload will be
1071 output before the outer reload. */
1072 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1073 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1074 dont_remove_subreg = 1;
1077 /* Similarly for paradoxical and problematical SUBREGs on the output.
1078 Note that there is no reason we need worry about the previous value
1079 of SUBREG_REG (out); even if wider than out,
1080 storing in a subreg is entitled to clobber it all
1081 (except in the case of STRICT_LOW_PART,
1082 and in that case the constraint should label it input-output.) */
1083 if (out != 0 && GET_CODE (out) == SUBREG
1084 && (subreg_lowpart_p (out) || strict_low)
1085 #ifdef CANNOT_CHANGE_MODE_CLASS
1086 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1088 && (CONSTANT_P (SUBREG_REG (out))
1090 || (((REG_P (SUBREG_REG (out))
1091 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1092 || MEM_P (SUBREG_REG (out)))
1093 && ((GET_MODE_SIZE (outmode)
1094 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1095 #ifdef WORD_REGISTER_OPERATIONS
1096 || ((GET_MODE_SIZE (outmode)
1097 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1098 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1099 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1103 || (REG_P (SUBREG_REG (out))
1104 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1105 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1106 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1108 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1110 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1111 [GET_MODE (SUBREG_REG (out))]))
1112 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1113 || (secondary_reload_class (0, class, outmode, out) != NO_REGS
1114 && (secondary_reload_class (0, class, GET_MODE (SUBREG_REG (out)),
1117 #ifdef CANNOT_CHANGE_MODE_CLASS
1118 || (REG_P (SUBREG_REG (out))
1119 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1120 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1121 GET_MODE (SUBREG_REG (out)),
1126 out_subreg_loc = outloc;
1127 outloc = &SUBREG_REG (out);
1129 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1130 gcc_assert (!MEM_P (out)
1131 || GET_MODE_SIZE (GET_MODE (out))
1132 <= GET_MODE_SIZE (outmode));
1134 outmode = GET_MODE (out);
1137 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1138 either M1 is not valid for R or M2 is wider than a word but we only
1139 need one word to store an M2-sized quantity in R.
1141 However, we must reload the inner reg *as well as* the subreg in
1142 that case. In this case, the inner reg is an in-out reload. */
1144 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1146 /* This relies on the fact that emit_reload_insns outputs the
1147 instructions for output reloads of type RELOAD_OTHER in reverse
1148 order of the reloads. Thus if the outer reload is also of type
1149 RELOAD_OTHER, we are guaranteed that this inner reload will be
1150 output after the outer reload. */
1151 dont_remove_subreg = 1;
1152 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1154 find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1155 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1156 GET_MODE (SUBREG_REG (out)),
1159 REGNO (SUBREG_REG (out))),
1160 VOIDmode, VOIDmode, 0, 0,
1161 opnum, RELOAD_OTHER);
1164 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1165 if (in != 0 && out != 0 && MEM_P (out)
1166 && (REG_P (in) || MEM_P (in))
1167 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1170 /* If IN is a SUBREG of a hard register, make a new REG. This
1171 simplifies some of the cases below. */
1173 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1174 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1175 && ! dont_remove_subreg)
1176 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1178 /* Similarly for OUT. */
1179 if (out != 0 && GET_CODE (out) == SUBREG
1180 && REG_P (SUBREG_REG (out))
1181 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1182 && ! dont_remove_subreg)
1183 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1185 /* Narrow down the class of register wanted if that is
1186 desirable on this machine for efficiency. */
1188 enum reg_class preferred_class = class;
1191 preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1193 /* Output reloads may need analogous treatment, different in detail. */
1194 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1196 preferred_class = PREFERRED_OUTPUT_RELOAD_CLASS (out, preferred_class);
1199 /* Discard what the target said if we cannot do it. */
1200 if (preferred_class != NO_REGS
1201 || (optional && type == RELOAD_FOR_OUTPUT))
1202 class = preferred_class;
1205 /* Make sure we use a class that can handle the actual pseudo
1206 inside any subreg. For example, on the 386, QImode regs
1207 can appear within SImode subregs. Although GENERAL_REGS
1208 can handle SImode, QImode needs a smaller class. */
1209 #ifdef LIMIT_RELOAD_CLASS
1211 class = LIMIT_RELOAD_CLASS (inmode, class);
1212 else if (in != 0 && GET_CODE (in) == SUBREG)
1213 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1216 class = LIMIT_RELOAD_CLASS (outmode, class);
1217 if (out != 0 && GET_CODE (out) == SUBREG)
1218 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1221 /* Verify that this class is at least possible for the mode that
1223 if (this_insn_is_asm)
1225 enum machine_mode mode;
1226 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1230 if (mode == VOIDmode)
1232 error_for_asm (this_insn, "cannot reload integer constant "
1233 "operand in %<asm%>");
1238 outmode = word_mode;
1240 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1241 if (HARD_REGNO_MODE_OK (i, mode)
1242 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1244 int nregs = hard_regno_nregs[i][mode];
1247 for (j = 1; j < nregs; j++)
1248 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1253 if (i == FIRST_PSEUDO_REGISTER)
1255 error_for_asm (this_insn, "impossible register constraint "
1261 /* Optional output reloads are always OK even if we have no register class,
1262 since the function of these reloads is only to have spill_reg_store etc.
1263 set, so that the storing insn can be deleted later. */
1264 gcc_assert (class != NO_REGS
1265 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1267 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1271 /* See if we need a secondary reload register to move between CLASS
1272 and IN or CLASS and OUT. Get the icode and push any required reloads
1273 needed for each of them if so. */
1277 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1278 &secondary_in_icode, NULL);
1279 if (out != 0 && GET_CODE (out) != SCRATCH)
1280 secondary_out_reload
1281 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1282 type, &secondary_out_icode, NULL);
1284 /* We found no existing reload suitable for re-use.
1285 So add an additional reload. */
1287 #ifdef SECONDARY_MEMORY_NEEDED
1288 /* If a memory location is needed for the copy, make one. */
1289 if (in != 0 && (REG_P (in) || GET_CODE (in) == SUBREG)
1290 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1291 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1293 get_secondary_mem (in, inmode, opnum, type);
1299 rld[i].class = class;
1300 rld[i].inmode = inmode;
1301 rld[i].outmode = outmode;
1303 rld[i].optional = optional;
1305 rld[i].nocombine = 0;
1306 rld[i].in_reg = inloc ? *inloc : 0;
1307 rld[i].out_reg = outloc ? *outloc : 0;
1308 rld[i].opnum = opnum;
1309 rld[i].when_needed = type;
1310 rld[i].secondary_in_reload = secondary_in_reload;
1311 rld[i].secondary_out_reload = secondary_out_reload;
1312 rld[i].secondary_in_icode = secondary_in_icode;
1313 rld[i].secondary_out_icode = secondary_out_icode;
1314 rld[i].secondary_p = 0;
1318 #ifdef SECONDARY_MEMORY_NEEDED
1319 if (out != 0 && (REG_P (out) || GET_CODE (out) == SUBREG)
1320 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1321 && SECONDARY_MEMORY_NEEDED (class,
1322 REGNO_REG_CLASS (reg_or_subregno (out)),
1324 get_secondary_mem (out, outmode, opnum, type);
1329 /* We are reusing an existing reload,
1330 but we may have additional information for it.
1331 For example, we may now have both IN and OUT
1332 while the old one may have just one of them. */
1334 /* The modes can be different. If they are, we want to reload in
1335 the larger mode, so that the value is valid for both modes. */
1336 if (inmode != VOIDmode
1337 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1338 rld[i].inmode = inmode;
1339 if (outmode != VOIDmode
1340 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1341 rld[i].outmode = outmode;
1344 rtx in_reg = inloc ? *inloc : 0;
1345 /* If we merge reloads for two distinct rtl expressions that
1346 are identical in content, there might be duplicate address
1347 reloads. Remove the extra set now, so that if we later find
1348 that we can inherit this reload, we can get rid of the
1349 address reloads altogether.
1351 Do not do this if both reloads are optional since the result
1352 would be an optional reload which could potentially leave
1353 unresolved address replacements.
1355 It is not sufficient to call transfer_replacements since
1356 choose_reload_regs will remove the replacements for address
1357 reloads of inherited reloads which results in the same
1359 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1360 && ! (rld[i].optional && optional))
1362 /* We must keep the address reload with the lower operand
1364 if (opnum > rld[i].opnum)
1366 remove_address_replacements (in);
1368 in_reg = rld[i].in_reg;
1371 remove_address_replacements (rld[i].in);
1374 rld[i].in_reg = in_reg;
1379 rld[i].out_reg = outloc ? *outloc : 0;
1381 if (reg_class_subset_p (class, rld[i].class))
1382 rld[i].class = class;
1383 rld[i].optional &= optional;
1384 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1385 opnum, rld[i].opnum))
1386 rld[i].when_needed = RELOAD_OTHER;
1387 rld[i].opnum = MIN (rld[i].opnum, opnum);
1390 /* If the ostensible rtx being reloaded differs from the rtx found
1391 in the location to substitute, this reload is not safe to combine
1392 because we cannot reliably tell whether it appears in the insn. */
1394 if (in != 0 && in != *inloc)
1395 rld[i].nocombine = 1;
1398 /* This was replaced by changes in find_reloads_address_1 and the new
1399 function inc_for_reload, which go with a new meaning of reload_inc. */
1401 /* If this is an IN/OUT reload in an insn that sets the CC,
1402 it must be for an autoincrement. It doesn't work to store
1403 the incremented value after the insn because that would clobber the CC.
1404 So we must do the increment of the value reloaded from,
1405 increment it, store it back, then decrement again. */
1406 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1410 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1411 /* If we did not find a nonzero amount-to-increment-by,
1412 that contradicts the belief that IN is being incremented
1413 in an address in this insn. */
1414 gcc_assert (rld[i].inc != 0);
1418 /* If we will replace IN and OUT with the reload-reg,
1419 record where they are located so that substitution need
1420 not do a tree walk. */
1422 if (replace_reloads)
1426 struct replacement *r = &replacements[n_replacements++];
1428 r->subreg_loc = in_subreg_loc;
1432 if (outloc != 0 && outloc != inloc)
1434 struct replacement *r = &replacements[n_replacements++];
1437 r->subreg_loc = out_subreg_loc;
1442 /* If this reload is just being introduced and it has both
1443 an incoming quantity and an outgoing quantity that are
1444 supposed to be made to match, see if either one of the two
1445 can serve as the place to reload into.
1447 If one of them is acceptable, set rld[i].reg_rtx
1450 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1452 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1455 earlyclobber_operand_p (out));
1457 /* If the outgoing register already contains the same value
1458 as the incoming one, we can dispense with loading it.
1459 The easiest way to tell the caller that is to give a phony
1460 value for the incoming operand (same as outgoing one). */
1461 if (rld[i].reg_rtx == out
1462 && (REG_P (in) || CONSTANT_P (in))
1463 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1464 static_reload_reg_p, i, inmode))
1468 /* If this is an input reload and the operand contains a register that
1469 dies in this insn and is used nowhere else, see if it is the right class
1470 to be used for this reload. Use it if so. (This occurs most commonly
1471 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1472 this if it is also an output reload that mentions the register unless
1473 the output is a SUBREG that clobbers an entire register.
1475 Note that the operand might be one of the spill regs, if it is a
1476 pseudo reg and we are in a block where spilling has not taken place.
1477 But if there is no spilling in this block, that is OK.
1478 An explicitly used hard reg cannot be a spill reg. */
1480 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1484 enum machine_mode rel_mode = inmode;
1486 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1489 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1490 if (REG_NOTE_KIND (note) == REG_DEAD
1491 && REG_P (XEXP (note, 0))
1492 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1493 && reg_mentioned_p (XEXP (note, 0), in)
1494 /* Check that we don't use a hardreg for an uninitialized
1495 pseudo. See also find_dummy_reload(). */
1496 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1497 || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
1498 ORIGINAL_REGNO (XEXP (note, 0))))
1499 && ! refers_to_regno_for_reload_p (regno,
1501 + hard_regno_nregs[regno]
1503 PATTERN (this_insn), inloc)
1504 /* If this is also an output reload, IN cannot be used as
1505 the reload register if it is set in this insn unless IN
1507 && (out == 0 || in == out
1508 || ! hard_reg_set_here_p (regno,
1510 + hard_regno_nregs[regno]
1512 PATTERN (this_insn)))
1513 /* ??? Why is this code so different from the previous?
1514 Is there any simple coherent way to describe the two together?
1515 What's going on here. */
1517 || (GET_CODE (in) == SUBREG
1518 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1520 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1521 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1522 /* Make sure the operand fits in the reg that dies. */
1523 && (GET_MODE_SIZE (rel_mode)
1524 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1525 && HARD_REGNO_MODE_OK (regno, inmode)
1526 && HARD_REGNO_MODE_OK (regno, outmode))
1529 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1530 hard_regno_nregs[regno][outmode]);
1532 for (offs = 0; offs < nregs; offs++)
1533 if (fixed_regs[regno + offs]
1534 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1539 && (! (refers_to_regno_for_reload_p
1540 (regno, (regno + hard_regno_nregs[regno][inmode]),
1542 || can_reload_into (in, regno, inmode)))
1544 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1551 output_reloadnum = i;
1556 /* Record an additional place we must replace a value
1557 for which we have already recorded a reload.
1558 RELOADNUM is the value returned by push_reload
1559 when the reload was recorded.
1560 This is used in insn patterns that use match_dup. */
1563 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1565 if (replace_reloads)
1567 struct replacement *r = &replacements[n_replacements++];
1568 r->what = reloadnum;
1575 /* Duplicate any replacement we have recorded to apply at
1576 location ORIG_LOC to also be performed at DUP_LOC.
1577 This is used in insn patterns that use match_dup. */
1580 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1582 int i, n = n_replacements;
1584 for (i = 0; i < n; i++)
1586 struct replacement *r = &replacements[i];
1587 if (r->where == orig_loc)
1588 push_replacement (dup_loc, r->what, r->mode);
1592 /* Transfer all replacements that used to be in reload FROM to be in
1596 transfer_replacements (int to, int from)
1600 for (i = 0; i < n_replacements; i++)
1601 if (replacements[i].what == from)
1602 replacements[i].what = to;
1605 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1606 or a subpart of it. If we have any replacements registered for IN_RTX,
1607 cancel the reloads that were supposed to load them.
1608 Return nonzero if we canceled any reloads. */
1610 remove_address_replacements (rtx in_rtx)
1613 char reload_flags[MAX_RELOADS];
1614 int something_changed = 0;
1616 memset (reload_flags, 0, sizeof reload_flags);
1617 for (i = 0, j = 0; i < n_replacements; i++)
1619 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1620 reload_flags[replacements[i].what] |= 1;
1623 replacements[j++] = replacements[i];
1624 reload_flags[replacements[i].what] |= 2;
1627 /* Note that the following store must be done before the recursive calls. */
1630 for (i = n_reloads - 1; i >= 0; i--)
1632 if (reload_flags[i] == 1)
1634 deallocate_reload_reg (i);
1635 remove_address_replacements (rld[i].in);
1637 something_changed = 1;
1640 return something_changed;
1643 /* If there is only one output reload, and it is not for an earlyclobber
1644 operand, try to combine it with a (logically unrelated) input reload
1645 to reduce the number of reload registers needed.
1647 This is safe if the input reload does not appear in
1648 the value being output-reloaded, because this implies
1649 it is not needed any more once the original insn completes.
1651 If that doesn't work, see we can use any of the registers that
1652 die in this insn as a reload register. We can if it is of the right
1653 class and does not appear in the value being output-reloaded. */
1656 combine_reloads (void)
1659 int output_reload = -1;
1660 int secondary_out = -1;
1663 /* Find the output reload; return unless there is exactly one
1664 and that one is mandatory. */
1666 for (i = 0; i < n_reloads; i++)
1667 if (rld[i].out != 0)
1669 if (output_reload >= 0)
1674 if (output_reload < 0 || rld[output_reload].optional)
1677 /* An input-output reload isn't combinable. */
1679 if (rld[output_reload].in != 0)
1682 /* If this reload is for an earlyclobber operand, we can't do anything. */
1683 if (earlyclobber_operand_p (rld[output_reload].out))
1686 /* If there is a reload for part of the address of this operand, we would
1687 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1688 its life to the point where doing this combine would not lower the
1689 number of spill registers needed. */
1690 for (i = 0; i < n_reloads; i++)
1691 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1692 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1693 && rld[i].opnum == rld[output_reload].opnum)
1696 /* Check each input reload; can we combine it? */
1698 for (i = 0; i < n_reloads; i++)
1699 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1700 /* Life span of this reload must not extend past main insn. */
1701 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1702 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1703 && rld[i].when_needed != RELOAD_OTHER
1704 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1705 == CLASS_MAX_NREGS (rld[output_reload].class,
1706 rld[output_reload].outmode))
1708 && rld[i].reg_rtx == 0
1709 #ifdef SECONDARY_MEMORY_NEEDED
1710 /* Don't combine two reloads with different secondary
1711 memory locations. */
1712 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1713 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1714 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1715 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1717 && (SMALL_REGISTER_CLASSES
1718 ? (rld[i].class == rld[output_reload].class)
1719 : (reg_class_subset_p (rld[i].class,
1720 rld[output_reload].class)
1721 || reg_class_subset_p (rld[output_reload].class,
1723 && (MATCHES (rld[i].in, rld[output_reload].out)
1724 /* Args reversed because the first arg seems to be
1725 the one that we imagine being modified
1726 while the second is the one that might be affected. */
1727 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1729 /* However, if the input is a register that appears inside
1730 the output, then we also can't share.
1731 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1732 If the same reload reg is used for both reg 69 and the
1733 result to be stored in memory, then that result
1734 will clobber the address of the memory ref. */
1735 && ! (REG_P (rld[i].in)
1736 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1737 rld[output_reload].out))))
1738 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1739 rld[i].when_needed != RELOAD_FOR_INPUT)
1740 && (reg_class_size[(int) rld[i].class]
1741 || SMALL_REGISTER_CLASSES)
1742 /* We will allow making things slightly worse by combining an
1743 input and an output, but no worse than that. */
1744 && (rld[i].when_needed == RELOAD_FOR_INPUT
1745 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1749 /* We have found a reload to combine with! */
1750 rld[i].out = rld[output_reload].out;
1751 rld[i].out_reg = rld[output_reload].out_reg;
1752 rld[i].outmode = rld[output_reload].outmode;
1753 /* Mark the old output reload as inoperative. */
1754 rld[output_reload].out = 0;
1755 /* The combined reload is needed for the entire insn. */
1756 rld[i].when_needed = RELOAD_OTHER;
1757 /* If the output reload had a secondary reload, copy it. */
1758 if (rld[output_reload].secondary_out_reload != -1)
1760 rld[i].secondary_out_reload
1761 = rld[output_reload].secondary_out_reload;
1762 rld[i].secondary_out_icode
1763 = rld[output_reload].secondary_out_icode;
1766 #ifdef SECONDARY_MEMORY_NEEDED
1767 /* Copy any secondary MEM. */
1768 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1769 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1770 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1772 /* If required, minimize the register class. */
1773 if (reg_class_subset_p (rld[output_reload].class,
1775 rld[i].class = rld[output_reload].class;
1777 /* Transfer all replacements from the old reload to the combined. */
1778 for (j = 0; j < n_replacements; j++)
1779 if (replacements[j].what == output_reload)
1780 replacements[j].what = i;
1785 /* If this insn has only one operand that is modified or written (assumed
1786 to be the first), it must be the one corresponding to this reload. It
1787 is safe to use anything that dies in this insn for that output provided
1788 that it does not occur in the output (we already know it isn't an
1789 earlyclobber. If this is an asm insn, give up. */
1791 if (INSN_CODE (this_insn) == -1)
1794 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1795 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1796 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1799 /* See if some hard register that dies in this insn and is not used in
1800 the output is the right class. Only works if the register we pick
1801 up can fully hold our output reload. */
1802 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1803 if (REG_NOTE_KIND (note) == REG_DEAD
1804 && REG_P (XEXP (note, 0))
1805 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1806 rld[output_reload].out)
1807 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1808 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1809 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1810 REGNO (XEXP (note, 0)))
1811 && (hard_regno_nregs[REGNO (XEXP (note, 0))][rld[output_reload].outmode]
1812 <= hard_regno_nregs[REGNO (XEXP (note, 0))][GET_MODE (XEXP (note, 0))])
1813 /* Ensure that a secondary or tertiary reload for this output
1814 won't want this register. */
1815 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1816 || (! (TEST_HARD_REG_BIT
1817 (reg_class_contents[(int) rld[secondary_out].class],
1818 REGNO (XEXP (note, 0))))
1819 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1820 || ! (TEST_HARD_REG_BIT
1821 (reg_class_contents[(int) rld[secondary_out].class],
1822 REGNO (XEXP (note, 0)))))))
1823 && ! fixed_regs[REGNO (XEXP (note, 0))])
1825 rld[output_reload].reg_rtx
1826 = gen_rtx_REG (rld[output_reload].outmode,
1827 REGNO (XEXP (note, 0)));
1832 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1833 See if one of IN and OUT is a register that may be used;
1834 this is desirable since a spill-register won't be needed.
1835 If so, return the register rtx that proves acceptable.
1837 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1838 CLASS is the register class required for the reload.
1840 If FOR_REAL is >= 0, it is the number of the reload,
1841 and in some cases when it can be discovered that OUT doesn't need
1842 to be computed, clear out rld[FOR_REAL].out.
1844 If FOR_REAL is -1, this should not be done, because this call
1845 is just to see if a register can be found, not to find and install it.
1847 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1848 puts an additional constraint on being able to use IN for OUT since
1849 IN must not appear elsewhere in the insn (it is assumed that IN itself
1850 is safe from the earlyclobber). */
1853 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1854 enum machine_mode inmode, enum machine_mode outmode,
1855 enum reg_class class, int for_real, int earlyclobber)
1863 /* If operands exceed a word, we can't use either of them
1864 unless they have the same size. */
1865 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1866 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1867 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1870 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1871 respectively refers to a hard register. */
1873 /* Find the inside of any subregs. */
1874 while (GET_CODE (out) == SUBREG)
1876 if (REG_P (SUBREG_REG (out))
1877 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1878 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1879 GET_MODE (SUBREG_REG (out)),
1882 out = SUBREG_REG (out);
1884 while (GET_CODE (in) == SUBREG)
1886 if (REG_P (SUBREG_REG (in))
1887 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1888 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1889 GET_MODE (SUBREG_REG (in)),
1892 in = SUBREG_REG (in);
1895 /* Narrow down the reg class, the same way push_reload will;
1896 otherwise we might find a dummy now, but push_reload won't. */
1898 enum reg_class preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1899 if (class != NO_REGS)
1900 class = preferred_class;
1903 /* See if OUT will do. */
1905 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1907 unsigned int regno = REGNO (out) + out_offset;
1908 unsigned int nwords = hard_regno_nregs[regno][outmode];
1911 /* When we consider whether the insn uses OUT,
1912 ignore references within IN. They don't prevent us
1913 from copying IN into OUT, because those refs would
1914 move into the insn that reloads IN.
1916 However, we only ignore IN in its role as this reload.
1917 If the insn uses IN elsewhere and it contains OUT,
1918 that counts. We can't be sure it's the "same" operand
1919 so it might not go through this reload. */
1921 *inloc = const0_rtx;
1923 if (regno < FIRST_PSEUDO_REGISTER
1924 && HARD_REGNO_MODE_OK (regno, outmode)
1925 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1926 PATTERN (this_insn), outloc))
1930 for (i = 0; i < nwords; i++)
1931 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1937 if (REG_P (real_out))
1940 value = gen_rtx_REG (outmode, regno);
1947 /* Consider using IN if OUT was not acceptable
1948 or if OUT dies in this insn (like the quotient in a divmod insn).
1949 We can't use IN unless it is dies in this insn,
1950 which means we must know accurately which hard regs are live.
1951 Also, the result can't go in IN if IN is used within OUT,
1952 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1953 if (hard_regs_live_known
1955 && REGNO (in) < FIRST_PSEUDO_REGISTER
1957 || find_reg_note (this_insn, REG_UNUSED, real_out))
1958 && find_reg_note (this_insn, REG_DEAD, real_in)
1959 && !fixed_regs[REGNO (in)]
1960 && HARD_REGNO_MODE_OK (REGNO (in),
1961 /* The only case where out and real_out might
1962 have different modes is where real_out
1963 is a subreg, and in that case, out
1965 (GET_MODE (out) != VOIDmode
1966 ? GET_MODE (out) : outmode))
1967 /* But only do all this if we can be sure, that this input
1968 operand doesn't correspond with an uninitialized pseudoreg.
1969 global can assign some hardreg to it, which is the same as
1970 a different pseudo also currently live (as it can ignore the
1971 conflict). So we never must introduce writes to such hardregs,
1972 as they would clobber the other live pseudo using the same.
1973 See also PR20973. */
1974 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
1975 || ! bitmap_bit_p (ENTRY_BLOCK_PTR->il.rtl->global_live_at_end,
1976 ORIGINAL_REGNO (in))))
1978 unsigned int regno = REGNO (in) + in_offset;
1979 unsigned int nwords = hard_regno_nregs[regno][inmode];
1981 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1982 && ! hard_reg_set_here_p (regno, regno + nwords,
1983 PATTERN (this_insn))
1985 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1986 PATTERN (this_insn), inloc)))
1990 for (i = 0; i < nwords; i++)
1991 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1997 /* If we were going to use OUT as the reload reg
1998 and changed our mind, it means OUT is a dummy that
1999 dies here. So don't bother copying value to it. */
2000 if (for_real >= 0 && value == real_out)
2001 rld[for_real].out = 0;
2002 if (REG_P (real_in))
2005 value = gen_rtx_REG (inmode, regno);
2013 /* This page contains subroutines used mainly for determining
2014 whether the IN or an OUT of a reload can serve as the
2017 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2020 earlyclobber_operand_p (rtx x)
2024 for (i = 0; i < n_earlyclobbers; i++)
2025 if (reload_earlyclobbers[i] == x)
2031 /* Return 1 if expression X alters a hard reg in the range
2032 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2033 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2034 X should be the body of an instruction. */
2037 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2039 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2041 rtx op0 = SET_DEST (x);
2043 while (GET_CODE (op0) == SUBREG)
2044 op0 = SUBREG_REG (op0);
2047 unsigned int r = REGNO (op0);
2049 /* See if this reg overlaps range under consideration. */
2051 && r + hard_regno_nregs[r][GET_MODE (op0)] > beg_regno)
2055 else if (GET_CODE (x) == PARALLEL)
2057 int i = XVECLEN (x, 0) - 1;
2060 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2067 /* Return 1 if ADDR is a valid memory address for mode MODE,
2068 and check that each pseudo reg has the proper kind of
2072 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2074 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2081 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2082 if they are the same hard reg, and has special hacks for
2083 autoincrement and autodecrement.
2084 This is specifically intended for find_reloads to use
2085 in determining whether two operands match.
2086 X is the operand whose number is the lower of the two.
2088 The value is 2 if Y contains a pre-increment that matches
2089 a non-incrementing address in X. */
2091 /* ??? To be completely correct, we should arrange to pass
2092 for X the output operand and for Y the input operand.
2093 For now, we assume that the output operand has the lower number
2094 because that is natural in (SET output (... input ...)). */
2097 operands_match_p (rtx x, rtx y)
2100 RTX_CODE code = GET_CODE (x);
2106 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2107 && (REG_P (y) || (GET_CODE (y) == SUBREG
2108 && REG_P (SUBREG_REG (y)))))
2114 i = REGNO (SUBREG_REG (x));
2115 if (i >= FIRST_PSEUDO_REGISTER)
2117 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2118 GET_MODE (SUBREG_REG (x)),
2125 if (GET_CODE (y) == SUBREG)
2127 j = REGNO (SUBREG_REG (y));
2128 if (j >= FIRST_PSEUDO_REGISTER)
2130 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2131 GET_MODE (SUBREG_REG (y)),
2138 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2139 multiple hard register group of scalar integer registers, so that
2140 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2142 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2143 && SCALAR_INT_MODE_P (GET_MODE (x))
2144 && i < FIRST_PSEUDO_REGISTER)
2145 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2146 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2147 && SCALAR_INT_MODE_P (GET_MODE (y))
2148 && j < FIRST_PSEUDO_REGISTER)
2149 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2153 /* If two operands must match, because they are really a single
2154 operand of an assembler insn, then two postincrements are invalid
2155 because the assembler insn would increment only once.
2156 On the other hand, a postincrement matches ordinary indexing
2157 if the postincrement is the output operand. */
2158 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2159 return operands_match_p (XEXP (x, 0), y);
2160 /* Two preincrements are invalid
2161 because the assembler insn would increment only once.
2162 On the other hand, a preincrement matches ordinary indexing
2163 if the preincrement is the input operand.
2164 In this case, return 2, since some callers need to do special
2165 things when this happens. */
2166 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2167 || GET_CODE (y) == PRE_MODIFY)
2168 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2172 /* Now we have disposed of all the cases in which different rtx codes
2174 if (code != GET_CODE (y))
2177 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2178 if (GET_MODE (x) != GET_MODE (y))
2188 return XEXP (x, 0) == XEXP (y, 0);
2190 return XSTR (x, 0) == XSTR (y, 0);
2196 /* Compare the elements. If any pair of corresponding elements
2197 fail to match, return 0 for the whole things. */
2200 fmt = GET_RTX_FORMAT (code);
2201 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2207 if (XWINT (x, i) != XWINT (y, i))
2212 if (XINT (x, i) != XINT (y, i))
2217 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2220 /* If any subexpression returns 2,
2221 we should return 2 if we are successful. */
2230 if (XVECLEN (x, i) != XVECLEN (y, i))
2232 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2234 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2242 /* It is believed that rtx's at this level will never
2243 contain anything but integers and other rtx's,
2244 except for within LABEL_REFs and SYMBOL_REFs. */
2249 return 1 + success_2;
2252 /* Describe the range of registers or memory referenced by X.
2253 If X is a register, set REG_FLAG and put the first register
2254 number into START and the last plus one into END.
2255 If X is a memory reference, put a base address into BASE
2256 and a range of integer offsets into START and END.
2257 If X is pushing on the stack, we can assume it causes no trouble,
2258 so we set the SAFE field. */
2260 static struct decomposition
2263 struct decomposition val;
2266 memset (&val, 0, sizeof (val));
2268 switch (GET_CODE (x))
2272 rtx base = NULL_RTX, offset = 0;
2273 rtx addr = XEXP (x, 0);
2275 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2276 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2278 val.base = XEXP (addr, 0);
2279 val.start = -GET_MODE_SIZE (GET_MODE (x));
2280 val.end = GET_MODE_SIZE (GET_MODE (x));
2281 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2285 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2287 if (GET_CODE (XEXP (addr, 1)) == PLUS
2288 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2289 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2291 val.base = XEXP (addr, 0);
2292 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2293 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2294 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2299 if (GET_CODE (addr) == CONST)
2301 addr = XEXP (addr, 0);
2304 if (GET_CODE (addr) == PLUS)
2306 if (CONSTANT_P (XEXP (addr, 0)))
2308 base = XEXP (addr, 1);
2309 offset = XEXP (addr, 0);
2311 else if (CONSTANT_P (XEXP (addr, 1)))
2313 base = XEXP (addr, 0);
2314 offset = XEXP (addr, 1);
2321 offset = const0_rtx;
2323 if (GET_CODE (offset) == CONST)
2324 offset = XEXP (offset, 0);
2325 if (GET_CODE (offset) == PLUS)
2327 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2329 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2330 offset = XEXP (offset, 0);
2332 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2334 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2335 offset = XEXP (offset, 1);
2339 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2340 offset = const0_rtx;
2343 else if (GET_CODE (offset) != CONST_INT)
2345 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2346 offset = const0_rtx;
2349 if (all_const && GET_CODE (base) == PLUS)
2350 base = gen_rtx_CONST (GET_MODE (base), base);
2352 gcc_assert (GET_CODE (offset) == CONST_INT);
2354 val.start = INTVAL (offset);
2355 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2362 val.start = true_regnum (x);
2363 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2365 /* A pseudo with no hard reg. */
2366 val.start = REGNO (x);
2367 val.end = val.start + 1;
2371 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2375 if (!REG_P (SUBREG_REG (x)))
2376 /* This could be more precise, but it's good enough. */
2377 return decompose (SUBREG_REG (x));
2379 val.start = true_regnum (x);
2380 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2381 return decompose (SUBREG_REG (x));
2384 val.end = val.start + hard_regno_nregs[val.start][GET_MODE (x)];
2388 /* This hasn't been assigned yet, so it can't conflict yet. */
2393 gcc_assert (CONSTANT_P (x));
2400 /* Return 1 if altering Y will not modify the value of X.
2401 Y is also described by YDATA, which should be decompose (Y). */
2404 immune_p (rtx x, rtx y, struct decomposition ydata)
2406 struct decomposition xdata;
2409 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2413 gcc_assert (MEM_P (y));
2414 /* If Y is memory and X is not, Y can't affect X. */
2418 xdata = decompose (x);
2420 if (! rtx_equal_p (xdata.base, ydata.base))
2422 /* If bases are distinct symbolic constants, there is no overlap. */
2423 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2425 /* Constants and stack slots never overlap. */
2426 if (CONSTANT_P (xdata.base)
2427 && (ydata.base == frame_pointer_rtx
2428 || ydata.base == hard_frame_pointer_rtx
2429 || ydata.base == stack_pointer_rtx))
2431 if (CONSTANT_P (ydata.base)
2432 && (xdata.base == frame_pointer_rtx
2433 || xdata.base == hard_frame_pointer_rtx
2434 || xdata.base == stack_pointer_rtx))
2436 /* If either base is variable, we don't know anything. */
2440 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2443 /* Similar, but calls decompose. */
2446 safe_from_earlyclobber (rtx op, rtx clobber)
2448 struct decomposition early_data;
2450 early_data = decompose (clobber);
2451 return immune_p (op, clobber, early_data);
2454 /* Main entry point of this file: search the body of INSN
2455 for values that need reloading and record them with push_reload.
2456 REPLACE nonzero means record also where the values occur
2457 so that subst_reloads can be used.
2459 IND_LEVELS says how many levels of indirection are supported by this
2460 machine; a value of zero means that a memory reference is not a valid
2463 LIVE_KNOWN says we have valid information about which hard
2464 regs are live at each point in the program; this is true when
2465 we are called from global_alloc but false when stupid register
2466 allocation has been done.
2468 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2469 which is nonnegative if the reg has been commandeered for reloading into.
2470 It is copied into STATIC_RELOAD_REG_P and referenced from there
2471 by various subroutines.
2473 Return TRUE if some operands need to be changed, because of swapping
2474 commutative operands, reg_equiv_address substitution, or whatever. */
2477 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2478 short *reload_reg_p)
2480 int insn_code_number;
2483 /* These start out as the constraints for the insn
2484 and they are chewed up as we consider alternatives. */
2485 char *constraints[MAX_RECOG_OPERANDS];
2486 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2488 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2489 char pref_or_nothing[MAX_RECOG_OPERANDS];
2490 /* Nonzero for a MEM operand whose entire address needs a reload.
2491 May be -1 to indicate the entire address may or may not need a reload. */
2492 int address_reloaded[MAX_RECOG_OPERANDS];
2493 /* Nonzero for an address operand that needs to be completely reloaded.
2494 May be -1 to indicate the entire operand may or may not need a reload. */
2495 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2496 /* Value of enum reload_type to use for operand. */
2497 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2498 /* Value of enum reload_type to use within address of operand. */
2499 enum reload_type address_type[MAX_RECOG_OPERANDS];
2500 /* Save the usage of each operand. */
2501 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2502 int no_input_reloads = 0, no_output_reloads = 0;
2504 int this_alternative[MAX_RECOG_OPERANDS];
2505 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2506 char this_alternative_win[MAX_RECOG_OPERANDS];
2507 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2508 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2509 int this_alternative_matches[MAX_RECOG_OPERANDS];
2511 int goal_alternative[MAX_RECOG_OPERANDS];
2512 int this_alternative_number;
2513 int goal_alternative_number = 0;
2514 int operand_reloadnum[MAX_RECOG_OPERANDS];
2515 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2516 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2517 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2518 char goal_alternative_win[MAX_RECOG_OPERANDS];
2519 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2520 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2521 int goal_alternative_swapped;
2524 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2525 rtx substed_operand[MAX_RECOG_OPERANDS];
2526 rtx body = PATTERN (insn);
2527 rtx set = single_set (insn);
2528 int goal_earlyclobber = 0, this_earlyclobber;
2529 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2535 n_earlyclobbers = 0;
2536 replace_reloads = replace;
2537 hard_regs_live_known = live_known;
2538 static_reload_reg_p = reload_reg_p;
2540 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2541 neither are insns that SET cc0. Insns that use CC0 are not allowed
2542 to have any input reloads. */
2543 if (JUMP_P (insn) || CALL_P (insn))
2544 no_output_reloads = 1;
2547 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2548 no_input_reloads = 1;
2549 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2550 no_output_reloads = 1;
2553 #ifdef SECONDARY_MEMORY_NEEDED
2554 /* The eliminated forms of any secondary memory locations are per-insn, so
2555 clear them out here. */
2557 if (secondary_memlocs_elim_used)
2559 memset (secondary_memlocs_elim, 0,
2560 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2561 secondary_memlocs_elim_used = 0;
2565 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2566 is cheap to move between them. If it is not, there may not be an insn
2567 to do the copy, so we may need a reload. */
2568 if (GET_CODE (body) == SET
2569 && REG_P (SET_DEST (body))
2570 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2571 && REG_P (SET_SRC (body))
2572 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2573 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2574 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2575 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2578 extract_insn (insn);
2580 noperands = reload_n_operands = recog_data.n_operands;
2581 n_alternatives = recog_data.n_alternatives;
2583 /* Just return "no reloads" if insn has no operands with constraints. */
2584 if (noperands == 0 || n_alternatives == 0)
2587 insn_code_number = INSN_CODE (insn);
2588 this_insn_is_asm = insn_code_number < 0;
2590 memcpy (operand_mode, recog_data.operand_mode,
2591 noperands * sizeof (enum machine_mode));
2592 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2596 /* If we will need to know, later, whether some pair of operands
2597 are the same, we must compare them now and save the result.
2598 Reloading the base and index registers will clobber them
2599 and afterward they will fail to match. */
2601 for (i = 0; i < noperands; i++)
2606 substed_operand[i] = recog_data.operand[i];
2609 modified[i] = RELOAD_READ;
2611 /* Scan this operand's constraint to see if it is an output operand,
2612 an in-out operand, is commutative, or should match another. */
2616 p += CONSTRAINT_LEN (c, p);
2620 modified[i] = RELOAD_WRITE;
2623 modified[i] = RELOAD_READ_WRITE;
2627 /* The last operand should not be marked commutative. */
2628 gcc_assert (i != noperands - 1);
2630 /* We currently only support one commutative pair of
2631 operands. Some existing asm code currently uses more
2632 than one pair. Previously, that would usually work,
2633 but sometimes it would crash the compiler. We
2634 continue supporting that case as well as we can by
2635 silently ignoring all but the first pair. In the
2636 future we may handle it correctly. */
2637 if (commutative < 0)
2640 gcc_assert (this_insn_is_asm);
2643 /* Use of ISDIGIT is tempting here, but it may get expensive because
2644 of locale support we don't want. */
2645 case '0': case '1': case '2': case '3': case '4':
2646 case '5': case '6': case '7': case '8': case '9':
2648 c = strtoul (p - 1, &p, 10);
2650 operands_match[c][i]
2651 = operands_match_p (recog_data.operand[c],
2652 recog_data.operand[i]);
2654 /* An operand may not match itself. */
2655 gcc_assert (c != i);
2657 /* If C can be commuted with C+1, and C might need to match I,
2658 then C+1 might also need to match I. */
2659 if (commutative >= 0)
2661 if (c == commutative || c == commutative + 1)
2663 int other = c + (c == commutative ? 1 : -1);
2664 operands_match[other][i]
2665 = operands_match_p (recog_data.operand[other],
2666 recog_data.operand[i]);
2668 if (i == commutative || i == commutative + 1)
2670 int other = i + (i == commutative ? 1 : -1);
2671 operands_match[c][other]
2672 = operands_match_p (recog_data.operand[c],
2673 recog_data.operand[other]);
2675 /* Note that C is supposed to be less than I.
2676 No need to consider altering both C and I because in
2677 that case we would alter one into the other. */
2684 /* Examine each operand that is a memory reference or memory address
2685 and reload parts of the addresses into index registers.
2686 Also here any references to pseudo regs that didn't get hard regs
2687 but are equivalent to constants get replaced in the insn itself
2688 with those constants. Nobody will ever see them again.
2690 Finally, set up the preferred classes of each operand. */
2692 for (i = 0; i < noperands; i++)
2694 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2696 address_reloaded[i] = 0;
2697 address_operand_reloaded[i] = 0;
2698 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2699 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2702 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2703 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2706 if (*constraints[i] == 0)
2707 /* Ignore things like match_operator operands. */
2709 else if (constraints[i][0] == 'p'
2710 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2712 address_operand_reloaded[i]
2713 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2714 recog_data.operand[i],
2715 recog_data.operand_loc[i],
2716 i, operand_type[i], ind_levels, insn);
2718 /* If we now have a simple operand where we used to have a
2719 PLUS or MULT, re-recognize and try again. */
2720 if ((OBJECT_P (*recog_data.operand_loc[i])
2721 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2722 && (GET_CODE (recog_data.operand[i]) == MULT
2723 || GET_CODE (recog_data.operand[i]) == PLUS))
2725 INSN_CODE (insn) = -1;
2726 retval = find_reloads (insn, replace, ind_levels, live_known,
2731 recog_data.operand[i] = *recog_data.operand_loc[i];
2732 substed_operand[i] = recog_data.operand[i];
2734 /* Address operands are reloaded in their existing mode,
2735 no matter what is specified in the machine description. */
2736 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2738 else if (code == MEM)
2741 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2742 recog_data.operand_loc[i],
2743 XEXP (recog_data.operand[i], 0),
2744 &XEXP (recog_data.operand[i], 0),
2745 i, address_type[i], ind_levels, insn);
2746 recog_data.operand[i] = *recog_data.operand_loc[i];
2747 substed_operand[i] = recog_data.operand[i];
2749 else if (code == SUBREG)
2751 rtx reg = SUBREG_REG (recog_data.operand[i]);
2753 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2756 && &SET_DEST (set) == recog_data.operand_loc[i],
2758 &address_reloaded[i]);
2760 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2761 that didn't get a hard register, emit a USE with a REG_EQUAL
2762 note in front so that we might inherit a previous, possibly
2768 && (GET_MODE_SIZE (GET_MODE (reg))
2769 >= GET_MODE_SIZE (GET_MODE (op))))
2770 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2772 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2774 substed_operand[i] = recog_data.operand[i] = op;
2776 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2777 /* We can get a PLUS as an "operand" as a result of register
2778 elimination. See eliminate_regs and gen_reload. We handle
2779 a unary operator by reloading the operand. */
2780 substed_operand[i] = recog_data.operand[i]
2781 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2782 ind_levels, 0, insn,
2783 &address_reloaded[i]);
2784 else if (code == REG)
2786 /* This is equivalent to calling find_reloads_toplev.
2787 The code is duplicated for speed.
2788 When we find a pseudo always equivalent to a constant,
2789 we replace it by the constant. We must be sure, however,
2790 that we don't try to replace it in the insn in which it
2792 int regno = REGNO (recog_data.operand[i]);
2793 if (reg_equiv_constant[regno] != 0
2794 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2796 /* Record the existing mode so that the check if constants are
2797 allowed will work when operand_mode isn't specified. */
2799 if (operand_mode[i] == VOIDmode)
2800 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2802 substed_operand[i] = recog_data.operand[i]
2803 = reg_equiv_constant[regno];
2805 if (reg_equiv_memory_loc[regno] != 0
2806 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2807 /* We need not give a valid is_set_dest argument since the case
2808 of a constant equivalence was checked above. */
2809 substed_operand[i] = recog_data.operand[i]
2810 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2811 ind_levels, 0, insn,
2812 &address_reloaded[i]);
2814 /* If the operand is still a register (we didn't replace it with an
2815 equivalent), get the preferred class to reload it into. */
2816 code = GET_CODE (recog_data.operand[i]);
2818 = ((code == REG && REGNO (recog_data.operand[i])
2819 >= FIRST_PSEUDO_REGISTER)
2820 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2824 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2825 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2828 /* If this is simply a copy from operand 1 to operand 0, merge the
2829 preferred classes for the operands. */
2830 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2831 && recog_data.operand[1] == SET_SRC (set))
2833 preferred_class[0] = preferred_class[1]
2834 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2835 pref_or_nothing[0] |= pref_or_nothing[1];
2836 pref_or_nothing[1] |= pref_or_nothing[0];
2839 /* Now see what we need for pseudo-regs that didn't get hard regs
2840 or got the wrong kind of hard reg. For this, we must consider
2841 all the operands together against the register constraints. */
2843 best = MAX_RECOG_OPERANDS * 2 + 600;
2846 goal_alternative_swapped = 0;
2849 /* The constraints are made of several alternatives.
2850 Each operand's constraint looks like foo,bar,... with commas
2851 separating the alternatives. The first alternatives for all
2852 operands go together, the second alternatives go together, etc.
2854 First loop over alternatives. */
2856 for (this_alternative_number = 0;
2857 this_alternative_number < n_alternatives;
2858 this_alternative_number++)
2860 /* Loop over operands for one constraint alternative. */
2861 /* LOSERS counts those that don't fit this alternative
2862 and would require loading. */
2864 /* BAD is set to 1 if it some operand can't fit this alternative
2865 even after reloading. */
2867 /* REJECT is a count of how undesirable this alternative says it is
2868 if any reloading is required. If the alternative matches exactly
2869 then REJECT is ignored, but otherwise it gets this much
2870 counted against it in addition to the reloading needed. Each
2871 ? counts three times here since we want the disparaging caused by
2872 a bad register class to only count 1/3 as much. */
2875 this_earlyclobber = 0;
2877 for (i = 0; i < noperands; i++)
2879 char *p = constraints[i];
2884 /* 0 => this operand can be reloaded somehow for this alternative. */
2886 /* 0 => this operand can be reloaded if the alternative allows regs. */
2890 rtx operand = recog_data.operand[i];
2892 /* Nonzero means this is a MEM that must be reloaded into a reg
2893 regardless of what the constraint says. */
2894 int force_reload = 0;
2896 /* Nonzero if a constant forced into memory would be OK for this
2899 int earlyclobber = 0;
2901 /* If the predicate accepts a unary operator, it means that
2902 we need to reload the operand, but do not do this for
2903 match_operator and friends. */
2904 if (UNARY_P (operand) && *p != 0)
2905 operand = XEXP (operand, 0);
2907 /* If the operand is a SUBREG, extract
2908 the REG or MEM (or maybe even a constant) within.
2909 (Constants can occur as a result of reg_equiv_constant.) */
2911 while (GET_CODE (operand) == SUBREG)
2913 /* Offset only matters when operand is a REG and
2914 it is a hard reg. This is because it is passed
2915 to reg_fits_class_p if it is a REG and all pseudos
2916 return 0 from that function. */
2917 if (REG_P (SUBREG_REG (operand))
2918 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2920 if (!subreg_offset_representable_p
2921 (REGNO (SUBREG_REG (operand)),
2922 GET_MODE (SUBREG_REG (operand)),
2923 SUBREG_BYTE (operand),
2924 GET_MODE (operand)))
2926 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2927 GET_MODE (SUBREG_REG (operand)),
2928 SUBREG_BYTE (operand),
2929 GET_MODE (operand));
2931 operand = SUBREG_REG (operand);
2932 /* Force reload if this is a constant or PLUS or if there may
2933 be a problem accessing OPERAND in the outer mode. */
2934 if (CONSTANT_P (operand)
2935 || GET_CODE (operand) == PLUS
2936 /* We must force a reload of paradoxical SUBREGs
2937 of a MEM because the alignment of the inner value
2938 may not be enough to do the outer reference. On
2939 big-endian machines, it may also reference outside
2942 On machines that extend byte operations and we have a
2943 SUBREG where both the inner and outer modes are no wider
2944 than a word and the inner mode is narrower, is integral,
2945 and gets extended when loaded from memory, combine.c has
2946 made assumptions about the behavior of the machine in such
2947 register access. If the data is, in fact, in memory we
2948 must always load using the size assumed to be in the
2949 register and let the insn do the different-sized
2952 This is doubly true if WORD_REGISTER_OPERATIONS. In
2953 this case eliminate_regs has left non-paradoxical
2954 subregs for push_reload to see. Make sure it does
2955 by forcing the reload.
2957 ??? When is it right at this stage to have a subreg
2958 of a mem that is _not_ to be handled specially? IMO
2959 those should have been reduced to just a mem. */
2960 || ((MEM_P (operand)
2962 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2963 #ifndef WORD_REGISTER_OPERATIONS
2964 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2965 < BIGGEST_ALIGNMENT)
2966 && (GET_MODE_SIZE (operand_mode[i])
2967 > GET_MODE_SIZE (GET_MODE (operand))))
2969 #ifdef LOAD_EXTEND_OP
2970 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2971 && (GET_MODE_SIZE (GET_MODE (operand))
2973 && (GET_MODE_SIZE (operand_mode[i])
2974 > GET_MODE_SIZE (GET_MODE (operand)))
2975 && INTEGRAL_MODE_P (GET_MODE (operand))
2976 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
2985 this_alternative[i] = (int) NO_REGS;
2986 this_alternative_win[i] = 0;
2987 this_alternative_match_win[i] = 0;
2988 this_alternative_offmemok[i] = 0;
2989 this_alternative_earlyclobber[i] = 0;
2990 this_alternative_matches[i] = -1;
2992 /* An empty constraint or empty alternative
2993 allows anything which matched the pattern. */
2994 if (*p == 0 || *p == ',')
2997 /* Scan this alternative's specs for this operand;
2998 set WIN if the operand fits any letter in this alternative.
2999 Otherwise, clear BADOP if this operand could
3000 fit some letter after reloads,
3001 or set WINREG if this operand could fit after reloads
3002 provided the constraint allows some registers. */
3005 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3014 case '=': case '+': case '*':
3018 /* We only support one commutative marker, the first
3019 one. We already set commutative above. */
3031 /* Ignore rest of this alternative as far as
3032 reloading is concerned. */
3035 while (*p && *p != ',');
3039 case '0': case '1': case '2': case '3': case '4':
3040 case '5': case '6': case '7': case '8': case '9':
3041 m = strtoul (p, &end, 10);
3045 this_alternative_matches[i] = m;
3046 /* We are supposed to match a previous operand.
3047 If we do, we win if that one did.
3048 If we do not, count both of the operands as losers.
3049 (This is too conservative, since most of the time
3050 only a single reload insn will be needed to make
3051 the two operands win. As a result, this alternative
3052 may be rejected when it is actually desirable.) */
3053 if ((swapped && (m != commutative || i != commutative + 1))
3054 /* If we are matching as if two operands were swapped,
3055 also pretend that operands_match had been computed
3057 But if I is the second of those and C is the first,
3058 don't exchange them, because operands_match is valid
3059 only on one side of its diagonal. */
3061 [(m == commutative || m == commutative + 1)
3062 ? 2 * commutative + 1 - m : m]
3063 [(i == commutative || i == commutative + 1)
3064 ? 2 * commutative + 1 - i : i])
3065 : operands_match[m][i])
3067 /* If we are matching a non-offsettable address where an
3068 offsettable address was expected, then we must reject
3069 this combination, because we can't reload it. */
3070 if (this_alternative_offmemok[m]
3071 && MEM_P (recog_data.operand[m])
3072 && this_alternative[m] == (int) NO_REGS
3073 && ! this_alternative_win[m])
3076 did_match = this_alternative_win[m];
3080 /* Operands don't match. */
3083 /* Retroactively mark the operand we had to match
3084 as a loser, if it wasn't already. */
3085 if (this_alternative_win[m])
3087 this_alternative_win[m] = 0;
3088 if (this_alternative[m] == (int) NO_REGS)
3090 /* But count the pair only once in the total badness of
3091 this alternative, if the pair can be a dummy reload.
3092 The pointers in operand_loc are not swapped; swap
3093 them by hand if necessary. */
3094 if (swapped && i == commutative)
3095 loc1 = commutative + 1;
3096 else if (swapped && i == commutative + 1)
3100 if (swapped && m == commutative)
3101 loc2 = commutative + 1;
3102 else if (swapped && m == commutative + 1)
3107 = find_dummy_reload (recog_data.operand[i],
3108 recog_data.operand[m],
3109 recog_data.operand_loc[loc1],
3110 recog_data.operand_loc[loc2],
3111 operand_mode[i], operand_mode[m],
3112 this_alternative[m], -1,
3113 this_alternative_earlyclobber[m]);
3118 /* This can be fixed with reloads if the operand
3119 we are supposed to match can be fixed with reloads. */
3121 this_alternative[i] = this_alternative[m];
3123 /* If we have to reload this operand and some previous
3124 operand also had to match the same thing as this
3125 operand, we don't know how to do that. So reject this
3127 if (! did_match || force_reload)
3128 for (j = 0; j < i; j++)
3129 if (this_alternative_matches[j]
3130 == this_alternative_matches[i])
3135 /* All necessary reloads for an address_operand
3136 were handled in find_reloads_address. */
3138 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3148 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3149 && reg_renumber[REGNO (operand)] < 0))
3151 if (CONST_POOL_OK_P (operand))
3158 && ! address_reloaded[i]
3159 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3160 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3166 && ! address_reloaded[i]
3167 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3168 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3172 /* Memory operand whose address is not offsettable. */
3177 && ! (ind_levels ? offsettable_memref_p (operand)
3178 : offsettable_nonstrict_memref_p (operand))
3179 /* Certain mem addresses will become offsettable
3180 after they themselves are reloaded. This is important;
3181 we don't want our own handling of unoffsettables
3182 to override the handling of reg_equiv_address. */
3183 && !(REG_P (XEXP (operand, 0))
3185 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3189 /* Memory operand whose address is offsettable. */
3193 if ((MEM_P (operand)
3194 /* If IND_LEVELS, find_reloads_address won't reload a
3195 pseudo that didn't get a hard reg, so we have to
3196 reject that case. */
3197 && ((ind_levels ? offsettable_memref_p (operand)
3198 : offsettable_nonstrict_memref_p (operand))
3199 /* A reloaded address is offsettable because it is now
3200 just a simple register indirect. */
3201 || address_reloaded[i] == 1))
3203 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3204 && reg_renumber[REGNO (operand)] < 0
3205 /* If reg_equiv_address is nonzero, we will be
3206 loading it into a register; hence it will be
3207 offsettable, but we cannot say that reg_equiv_mem
3208 is offsettable without checking. */
3209 && ((reg_equiv_mem[REGNO (operand)] != 0
3210 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3211 || (reg_equiv_address[REGNO (operand)] != 0))))
3213 if (CONST_POOL_OK_P (operand)
3221 /* Output operand that is stored before the need for the
3222 input operands (and their index registers) is over. */
3223 earlyclobber = 1, this_earlyclobber = 1;
3228 if (GET_CODE (operand) == CONST_DOUBLE
3229 || (GET_CODE (operand) == CONST_VECTOR
3230 && (GET_MODE_CLASS (GET_MODE (operand))
3231 == MODE_VECTOR_FLOAT)))
3237 if (GET_CODE (operand) == CONST_DOUBLE
3238 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3243 if (GET_CODE (operand) == CONST_INT
3244 || (GET_CODE (operand) == CONST_DOUBLE
3245 && GET_MODE (operand) == VOIDmode))
3248 if (CONSTANT_P (operand)
3249 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3254 if (GET_CODE (operand) == CONST_INT
3255 || (GET_CODE (operand) == CONST_DOUBLE
3256 && GET_MODE (operand) == VOIDmode))
3268 if (GET_CODE (operand) == CONST_INT
3269 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3279 /* A PLUS is never a valid operand, but reload can make
3280 it from a register when eliminating registers. */
3281 && GET_CODE (operand) != PLUS
3282 /* A SCRATCH is not a valid operand. */
3283 && GET_CODE (operand) != SCRATCH
3284 && (! CONSTANT_P (operand)
3286 || LEGITIMATE_PIC_OPERAND_P (operand))
3287 && (GENERAL_REGS == ALL_REGS
3289 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3290 && reg_renumber[REGNO (operand)] < 0)))
3292 /* Drop through into 'r' case. */
3296 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3300 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3302 #ifdef EXTRA_CONSTRAINT_STR
3303 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3307 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3309 /* If the address was already reloaded,
3311 else if (MEM_P (operand)
3312 && address_reloaded[i] == 1)
3314 /* Likewise if the address will be reloaded because
3315 reg_equiv_address is nonzero. For reg_equiv_mem
3316 we have to check. */
3317 else if (REG_P (operand)
3318 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3319 && reg_renumber[REGNO (operand)] < 0
3320 && ((reg_equiv_mem[REGNO (operand)] != 0
3321 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3322 || (reg_equiv_address[REGNO (operand)] != 0)))
3325 /* If we didn't already win, we can reload
3326 constants via force_const_mem, and other
3327 MEMs by reloading the address like for 'o'. */
3328 if (CONST_POOL_OK_P (operand)
3335 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3337 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3340 /* If we didn't already win, we can reload
3341 the address into a base register. */
3343 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3348 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3355 = (int) (reg_class_subunion
3356 [this_alternative[i]]
3357 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3359 if (GET_MODE (operand) == BLKmode)
3363 && reg_fits_class_p (operand, this_alternative[i],
3364 offset, GET_MODE (recog_data.operand[i])))
3368 while ((p += len), c);
3372 /* If this operand could be handled with a reg,
3373 and some reg is allowed, then this operand can be handled. */
3374 if (winreg && this_alternative[i] != (int) NO_REGS)
3377 /* Record which operands fit this alternative. */
3378 this_alternative_earlyclobber[i] = earlyclobber;
3379 if (win && ! force_reload)
3380 this_alternative_win[i] = 1;
3381 else if (did_match && ! force_reload)
3382 this_alternative_match_win[i] = 1;
3385 int const_to_mem = 0;
3387 this_alternative_offmemok[i] = offmemok;
3391 /* Alternative loses if it has no regs for a reg operand. */
3393 && this_alternative[i] == (int) NO_REGS
3394 && this_alternative_matches[i] < 0)
3397 /* If this is a constant that is reloaded into the desired
3398 class by copying it to memory first, count that as another
3399 reload. This is consistent with other code and is
3400 required to avoid choosing another alternative when
3401 the constant is moved into memory by this function on
3402 an early reload pass. Note that the test here is
3403 precisely the same as in the code below that calls
3405 if (CONST_POOL_OK_P (operand)
3406 && ((PREFERRED_RELOAD_CLASS (operand,
3407 (enum reg_class) this_alternative[i])
3409 || no_input_reloads)
3410 && operand_mode[i] != VOIDmode)
3413 if (this_alternative[i] != (int) NO_REGS)
3417 /* Alternative loses if it requires a type of reload not
3418 permitted for this insn. We can always reload SCRATCH
3419 and objects with a REG_UNUSED note. */
3420 if (GET_CODE (operand) != SCRATCH
3421 && modified[i] != RELOAD_READ && no_output_reloads
3422 && ! find_reg_note (insn, REG_UNUSED, operand))
3424 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3428 /* If we can't reload this value at all, reject this
3429 alternative. Note that we could also lose due to
3430 LIMIT_RELOAD_CLASS, but we don't check that
3433 if (! CONSTANT_P (operand)
3434 && (enum reg_class) this_alternative[i] != NO_REGS)
3436 if (PREFERRED_RELOAD_CLASS
3437 (operand, (enum reg_class) this_alternative[i])
3441 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3442 if (operand_type[i] == RELOAD_FOR_OUTPUT
3443 && PREFERRED_OUTPUT_RELOAD_CLASS
3444 (operand, (enum reg_class) this_alternative[i])
3450 /* We prefer to reload pseudos over reloading other things,
3451 since such reloads may be able to be eliminated later.
3452 If we are reloading a SCRATCH, we won't be generating any
3453 insns, just using a register, so it is also preferred.
3454 So bump REJECT in other cases. Don't do this in the
3455 case where we are forcing a constant into memory and
3456 it will then win since we don't want to have a different
3457 alternative match then. */
3458 if (! (REG_P (operand)
3459 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3460 && GET_CODE (operand) != SCRATCH
3461 && ! (const_to_mem && constmemok))
3464 /* Input reloads can be inherited more often than output
3465 reloads can be removed, so penalize output reloads. */
3466 if (operand_type[i] != RELOAD_FOR_INPUT
3467 && GET_CODE (operand) != SCRATCH)
3471 /* If this operand is a pseudo register that didn't get a hard
3472 reg and this alternative accepts some register, see if the
3473 class that we want is a subset of the preferred class for this
3474 register. If not, but it intersects that class, use the
3475 preferred class instead. If it does not intersect the preferred
3476 class, show that usage of this alternative should be discouraged;
3477 it will be discouraged more still if the register is `preferred
3478 or nothing'. We do this because it increases the chance of
3479 reusing our spill register in a later insn and avoiding a pair
3480 of memory stores and loads.
3482 Don't bother with this if this alternative will accept this
3485 Don't do this for a multiword operand, since it is only a
3486 small win and has the risk of requiring more spill registers,
3487 which could cause a large loss.
3489 Don't do this if the preferred class has only one register
3490 because we might otherwise exhaust the class. */
3492 if (! win && ! did_match
3493 && this_alternative[i] != (int) NO_REGS
3494 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3495 && reg_class_size [(int) preferred_class[i]] > 0
3496 && ! SMALL_REGISTER_CLASS_P (preferred_class[i]))
3498 if (! reg_class_subset_p (this_alternative[i],
3499 preferred_class[i]))
3501 /* Since we don't have a way of forming the intersection,
3502 we just do something special if the preferred class
3503 is a subset of the class we have; that's the most
3504 common case anyway. */
3505 if (reg_class_subset_p (preferred_class[i],
3506 this_alternative[i]))
3507 this_alternative[i] = (int) preferred_class[i];
3509 reject += (2 + 2 * pref_or_nothing[i]);
3514 /* Now see if any output operands that are marked "earlyclobber"
3515 in this alternative conflict with any input operands
3516 or any memory addresses. */
3518 for (i = 0; i < noperands; i++)
3519 if (this_alternative_earlyclobber[i]
3520 && (this_alternative_win[i] || this_alternative_match_win[i]))
3522 struct decomposition early_data;
3524 early_data = decompose (recog_data.operand[i]);
3526 gcc_assert (modified[i] != RELOAD_READ);
3528 if (this_alternative[i] == NO_REGS)
3530 this_alternative_earlyclobber[i] = 0;
3531 gcc_assert (this_insn_is_asm);
3532 error_for_asm (this_insn,
3533 "%<&%> constraint used with no register class");
3536 for (j = 0; j < noperands; j++)
3537 /* Is this an input operand or a memory ref? */
3538 if ((MEM_P (recog_data.operand[j])
3539 || modified[j] != RELOAD_WRITE)
3541 /* Ignore things like match_operator operands. */
3542 && *recog_data.constraints[j] != 0
3543 /* Don't count an input operand that is constrained to match
3544 the early clobber operand. */
3545 && ! (this_alternative_matches[j] == i
3546 && rtx_equal_p (recog_data.operand[i],
3547 recog_data.operand[j]))
3548 /* Is it altered by storing the earlyclobber operand? */
3549 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3552 /* If the output is in a non-empty few-regs class,
3553 it's costly to reload it, so reload the input instead. */
3554 if (SMALL_REGISTER_CLASS_P (this_alternative[i])
3555 && (REG_P (recog_data.operand[j])
3556 || GET_CODE (recog_data.operand[j]) == SUBREG))
3559 this_alternative_win[j] = 0;
3560 this_alternative_match_win[j] = 0;
3565 /* If an earlyclobber operand conflicts with something,
3566 it must be reloaded, so request this and count the cost. */
3570 this_alternative_win[i] = 0;
3571 this_alternative_match_win[j] = 0;
3572 for (j = 0; j < noperands; j++)
3573 if (this_alternative_matches[j] == i
3574 && this_alternative_match_win[j])
3576 this_alternative_win[j] = 0;
3577 this_alternative_match_win[j] = 0;
3583 /* If one alternative accepts all the operands, no reload required,
3584 choose that alternative; don't consider the remaining ones. */
3587 /* Unswap these so that they are never swapped at `finish'. */
3588 if (commutative >= 0)
3590 recog_data.operand[commutative] = substed_operand[commutative];
3591 recog_data.operand[commutative + 1]
3592 = substed_operand[commutative + 1];
3594 for (i = 0; i < noperands; i++)
3596 goal_alternative_win[i] = this_alternative_win[i];
3597 goal_alternative_match_win[i] = this_alternative_match_win[i];
3598 goal_alternative[i] = this_alternative[i];
3599 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3600 goal_alternative_matches[i] = this_alternative_matches[i];
3601 goal_alternative_earlyclobber[i]
3602 = this_alternative_earlyclobber[i];
3604 goal_alternative_number = this_alternative_number;
3605 goal_alternative_swapped = swapped;
3606 goal_earlyclobber = this_earlyclobber;
3610 /* REJECT, set by the ! and ? constraint characters and when a register
3611 would be reloaded into a non-preferred class, discourages the use of
3612 this alternative for a reload goal. REJECT is incremented by six
3613 for each ? and two for each non-preferred class. */
3614 losers = losers * 6 + reject;
3616 /* If this alternative can be made to work by reloading,
3617 and it needs less reloading than the others checked so far,
3618 record it as the chosen goal for reloading. */
3619 if (! bad && best > losers)
3621 for (i = 0; i < noperands; i++)
3623 goal_alternative[i] = this_alternative[i];
3624 goal_alternative_win[i] = this_alternative_win[i];
3625 goal_alternative_match_win[i] = this_alternative_match_win[i];
3626 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3627 goal_alternative_matches[i] = this_alternative_matches[i];
3628 goal_alternative_earlyclobber[i]
3629 = this_alternative_earlyclobber[i];
3631 goal_alternative_swapped = swapped;
3633 goal_alternative_number = this_alternative_number;
3634 goal_earlyclobber = this_earlyclobber;
3638 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3639 then we need to try each alternative twice,
3640 the second time matching those two operands
3641 as if we had exchanged them.
3642 To do this, really exchange them in operands.
3644 If we have just tried the alternatives the second time,
3645 return operands to normal and drop through. */
3647 if (commutative >= 0)
3652 enum reg_class tclass;
3655 recog_data.operand[commutative] = substed_operand[commutative + 1];
3656 recog_data.operand[commutative + 1] = substed_operand[commutative];
3657 /* Swap the duplicates too. */
3658 for (i = 0; i < recog_data.n_dups; i++)
3659 if (recog_data.dup_num[i] == commutative
3660 || recog_data.dup_num[i] == commutative + 1)
3661 *recog_data.dup_loc[i]
3662 = recog_data.operand[(int) recog_data.dup_num[i]];
3664 tclass = preferred_class[commutative];
3665 preferred_class[commutative] = preferred_class[commutative + 1];
3666 preferred_class[commutative + 1] = tclass;
3668 t = pref_or_nothing[commutative];
3669 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3670 pref_or_nothing[commutative + 1] = t;
3672 t = address_reloaded[commutative];
3673 address_reloaded[commutative] = address_reloaded[commutative + 1];
3674 address_reloaded[commutative + 1] = t;
3676 memcpy (constraints, recog_data.constraints,
3677 noperands * sizeof (char *));
3682 recog_data.operand[commutative] = substed_operand[commutative];
3683 recog_data.operand[commutative + 1]
3684 = substed_operand[commutative + 1];
3685 /* Unswap the duplicates too. */
3686 for (i = 0; i < recog_data.n_dups; i++)
3687 if (recog_data.dup_num[i] == commutative
3688 || recog_data.dup_num[i] == commutative + 1)
3689 *recog_data.dup_loc[i]
3690 = recog_data.operand[(int) recog_data.dup_num[i]];
3694 /* The operands don't meet the constraints.
3695 goal_alternative describes the alternative
3696 that we could reach by reloading the fewest operands.
3697 Reload so as to fit it. */
3699 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3701 /* No alternative works with reloads?? */
3702 if (insn_code_number >= 0)
3703 fatal_insn ("unable to generate reloads for:", insn);
3704 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3705 /* Avoid further trouble with this insn. */
3706 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3711 /* Jump to `finish' from above if all operands are valid already.
3712 In that case, goal_alternative_win is all 1. */
3715 /* Right now, for any pair of operands I and J that are required to match,
3717 goal_alternative_matches[J] is I.
3718 Set up goal_alternative_matched as the inverse function:
3719 goal_alternative_matched[I] = J. */
3721 for (i = 0; i < noperands; i++)
3722 goal_alternative_matched[i] = -1;
3724 for (i = 0; i < noperands; i++)
3725 if (! goal_alternative_win[i]
3726 && goal_alternative_matches[i] >= 0)
3727 goal_alternative_matched[goal_alternative_matches[i]] = i;
3729 for (i = 0; i < noperands; i++)
3730 goal_alternative_win[i] |= goal_alternative_match_win[i];
3732 /* If the best alternative is with operands 1 and 2 swapped,
3733 consider them swapped before reporting the reloads. Update the
3734 operand numbers of any reloads already pushed. */
3736 if (goal_alternative_swapped)
3740 tem = substed_operand[commutative];
3741 substed_operand[commutative] = substed_operand[commutative + 1];
3742 substed_operand[commutative + 1] = tem;
3743 tem = recog_data.operand[commutative];
3744 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3745 recog_data.operand[commutative + 1] = tem;
3746 tem = *recog_data.operand_loc[commutative];
3747 *recog_data.operand_loc[commutative]
3748 = *recog_data.operand_loc[commutative + 1];
3749 *recog_data.operand_loc[commutative + 1] = tem;
3751 for (i = 0; i < n_reloads; i++)
3753 if (rld[i].opnum == commutative)
3754 rld[i].opnum = commutative + 1;
3755 else if (rld[i].opnum == commutative + 1)
3756 rld[i].opnum = commutative;
3760 for (i = 0; i < noperands; i++)
3762 operand_reloadnum[i] = -1;
3764 /* If this is an earlyclobber operand, we need to widen the scope.
3765 The reload must remain valid from the start of the insn being
3766 reloaded until after the operand is stored into its destination.
3767 We approximate this with RELOAD_OTHER even though we know that we
3768 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3770 One special case that is worth checking is when we have an
3771 output that is earlyclobber but isn't used past the insn (typically
3772 a SCRATCH). In this case, we only need have the reload live
3773 through the insn itself, but not for any of our input or output
3775 But we must not accidentally narrow the scope of an existing
3776 RELOAD_OTHER reload - leave these alone.
3778 In any case, anything needed to address this operand can remain
3779 however they were previously categorized. */
3781 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3783 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3784 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3787 /* Any constants that aren't allowed and can't be reloaded
3788 into registers are here changed into memory references. */
3789 for (i = 0; i < noperands; i++)
3790 if (! goal_alternative_win[i]
3791 && CONST_POOL_OK_P (recog_data.operand[i])
3792 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3793 (enum reg_class) goal_alternative[i])
3795 || no_input_reloads)
3796 && operand_mode[i] != VOIDmode)
3798 substed_operand[i] = recog_data.operand[i]
3799 = find_reloads_toplev (force_const_mem (operand_mode[i],
3800 recog_data.operand[i]),
3801 i, address_type[i], ind_levels, 0, insn,
3803 if (alternative_allows_memconst (recog_data.constraints[i],
3804 goal_alternative_number))
3805 goal_alternative_win[i] = 1;
3808 /* Likewise any invalid constants appearing as operand of a PLUS
3809 that is to be reloaded. */
3810 for (i = 0; i < noperands; i++)
3811 if (! goal_alternative_win[i]
3812 && GET_CODE (recog_data.operand[i]) == PLUS
3813 && CONST_POOL_OK_P (XEXP (recog_data.operand[i], 1))
3814 && (PREFERRED_RELOAD_CLASS (XEXP (recog_data.operand[i], 1),
3815 (enum reg_class) goal_alternative[i])
3817 && operand_mode[i] != VOIDmode)
3819 rtx tem = force_const_mem (operand_mode[i],
3820 XEXP (recog_data.operand[i], 1));
3821 tem = gen_rtx_PLUS (operand_mode[i],
3822 XEXP (recog_data.operand[i], 0), tem);
3824 substed_operand[i] = recog_data.operand[i]
3825 = find_reloads_toplev (tem, i, address_type[i],
3826 ind_levels, 0, insn, NULL);
3829 /* Record the values of the earlyclobber operands for the caller. */
3830 if (goal_earlyclobber)
3831 for (i = 0; i < noperands; i++)
3832 if (goal_alternative_earlyclobber[i])
3833 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3835 /* Now record reloads for all the operands that need them. */
3836 for (i = 0; i < noperands; i++)
3837 if (! goal_alternative_win[i])
3839 /* Operands that match previous ones have already been handled. */
3840 if (goal_alternative_matches[i] >= 0)
3842 /* Handle an operand with a nonoffsettable address
3843 appearing where an offsettable address will do
3844 by reloading the address into a base register.
3846 ??? We can also do this when the operand is a register and
3847 reg_equiv_mem is not offsettable, but this is a bit tricky,
3848 so we don't bother with it. It may not be worth doing. */
3849 else if (goal_alternative_matched[i] == -1
3850 && goal_alternative_offmemok[i]
3851 && MEM_P (recog_data.operand[i]))
3853 operand_reloadnum[i]
3854 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3855 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3856 base_reg_class (VOIDmode, MEM, SCRATCH),
3857 GET_MODE (XEXP (recog_data.operand[i], 0)),
3858 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3859 rld[operand_reloadnum[i]].inc
3860 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3862 /* If this operand is an output, we will have made any
3863 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3864 now we are treating part of the operand as an input, so
3865 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3867 if (modified[i] == RELOAD_WRITE)
3869 for (j = 0; j < n_reloads; j++)
3871 if (rld[j].opnum == i)
3873 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3874 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3875 else if (rld[j].when_needed
3876 == RELOAD_FOR_OUTADDR_ADDRESS)
3877 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3882 else if (goal_alternative_matched[i] == -1)
3884 operand_reloadnum[i]
3885 = push_reload ((modified[i] != RELOAD_WRITE
3886 ? recog_data.operand[i] : 0),
3887 (modified[i] != RELOAD_READ
3888 ? recog_data.operand[i] : 0),
3889 (modified[i] != RELOAD_WRITE
3890 ? recog_data.operand_loc[i] : 0),
3891 (modified[i] != RELOAD_READ
3892 ? recog_data.operand_loc[i] : 0),
3893 (enum reg_class) goal_alternative[i],
3894 (modified[i] == RELOAD_WRITE
3895 ? VOIDmode : operand_mode[i]),
3896 (modified[i] == RELOAD_READ
3897 ? VOIDmode : operand_mode[i]),
3898 (insn_code_number < 0 ? 0
3899 : insn_data[insn_code_number].operand[i].strict_low),
3900 0, i, operand_type[i]);
3902 /* In a matching pair of operands, one must be input only
3903 and the other must be output only.
3904 Pass the input operand as IN and the other as OUT. */
3905 else if (modified[i] == RELOAD_READ
3906 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3908 operand_reloadnum[i]
3909 = push_reload (recog_data.operand[i],
3910 recog_data.operand[goal_alternative_matched[i]],
3911 recog_data.operand_loc[i],
3912 recog_data.operand_loc[goal_alternative_matched[i]],
3913 (enum reg_class) goal_alternative[i],
3915 operand_mode[goal_alternative_matched[i]],
3916 0, 0, i, RELOAD_OTHER);
3917 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3919 else if (modified[i] == RELOAD_WRITE
3920 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3922 operand_reloadnum[goal_alternative_matched[i]]
3923 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3924 recog_data.operand[i],
3925 recog_data.operand_loc[goal_alternative_matched[i]],
3926 recog_data.operand_loc[i],
3927 (enum reg_class) goal_alternative[i],
3928 operand_mode[goal_alternative_matched[i]],
3930 0, 0, i, RELOAD_OTHER);
3931 operand_reloadnum[i] = output_reloadnum;
3935 gcc_assert (insn_code_number < 0);
3936 error_for_asm (insn, "inconsistent operand constraints "
3938 /* Avoid further trouble with this insn. */
3939 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3944 else if (goal_alternative_matched[i] < 0
3945 && goal_alternative_matches[i] < 0
3946 && address_operand_reloaded[i] != 1
3949 /* For each non-matching operand that's a MEM or a pseudo-register
3950 that didn't get a hard register, make an optional reload.
3951 This may get done even if the insn needs no reloads otherwise. */
3953 rtx operand = recog_data.operand[i];
3955 while (GET_CODE (operand) == SUBREG)
3956 operand = SUBREG_REG (operand);
3957 if ((MEM_P (operand)
3959 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3960 /* If this is only for an output, the optional reload would not
3961 actually cause us to use a register now, just note that
3962 something is stored here. */
3963 && ((enum reg_class) goal_alternative[i] != NO_REGS
3964 || modified[i] == RELOAD_WRITE)
3965 && ! no_input_reloads
3966 /* An optional output reload might allow to delete INSN later.
3967 We mustn't make in-out reloads on insns that are not permitted
3969 If this is an asm, we can't delete it; we must not even call
3970 push_reload for an optional output reload in this case,
3971 because we can't be sure that the constraint allows a register,
3972 and push_reload verifies the constraints for asms. */
3973 && (modified[i] == RELOAD_READ
3974 || (! no_output_reloads && ! this_insn_is_asm)))
3975 operand_reloadnum[i]
3976 = push_reload ((modified[i] != RELOAD_WRITE
3977 ? recog_data.operand[i] : 0),
3978 (modified[i] != RELOAD_READ
3979 ? recog_data.operand[i] : 0),
3980 (modified[i] != RELOAD_WRITE
3981 ? recog_data.operand_loc[i] : 0),
3982 (modified[i] != RELOAD_READ
3983 ? recog_data.operand_loc[i] : 0),
3984 (enum reg_class) goal_alternative[i],
3985 (modified[i] == RELOAD_WRITE
3986 ? VOIDmode : operand_mode[i]),
3987 (modified[i] == RELOAD_READ
3988 ? VOIDmode : operand_mode[i]),
3989 (insn_code_number < 0 ? 0
3990 : insn_data[insn_code_number].operand[i].strict_low),
3991 1, i, operand_type[i]);
3992 /* If a memory reference remains (either as a MEM or a pseudo that
3993 did not get a hard register), yet we can't make an optional
3994 reload, check if this is actually a pseudo register reference;
3995 we then need to emit a USE and/or a CLOBBER so that reload
3996 inheritance will do the right thing. */
4000 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4001 && reg_renumber [REGNO (operand)] < 0)))
4003 operand = *recog_data.operand_loc[i];
4005 while (GET_CODE (operand) == SUBREG)
4006 operand = SUBREG_REG (operand);
4007 if (REG_P (operand))
4009 if (modified[i] != RELOAD_WRITE)
4010 /* We mark the USE with QImode so that we recognize
4011 it as one that can be safely deleted at the end
4013 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4015 if (modified[i] != RELOAD_READ)
4016 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
4020 else if (goal_alternative_matches[i] >= 0
4021 && goal_alternative_win[goal_alternative_matches[i]]
4022 && modified[i] == RELOAD_READ
4023 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4024 && ! no_input_reloads && ! no_output_reloads
4027 /* Similarly, make an optional reload for a pair of matching
4028 objects that are in MEM or a pseudo that didn't get a hard reg. */
4030 rtx operand = recog_data.operand[i];
4032 while (GET_CODE (operand) == SUBREG)
4033 operand = SUBREG_REG (operand);
4034 if ((MEM_P (operand)
4036 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4037 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4039 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4040 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4041 recog_data.operand[i],
4042 recog_data.operand_loc[goal_alternative_matches[i]],
4043 recog_data.operand_loc[i],
4044 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4045 operand_mode[goal_alternative_matches[i]],
4047 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4050 /* Perform whatever substitutions on the operands we are supposed
4051 to make due to commutativity or replacement of registers
4052 with equivalent constants or memory slots. */
4054 for (i = 0; i < noperands; i++)
4056 /* We only do this on the last pass through reload, because it is
4057 possible for some data (like reg_equiv_address) to be changed during
4058 later passes. Moreover, we lose the opportunity to get a useful
4059 reload_{in,out}_reg when we do these replacements. */
4063 rtx substitution = substed_operand[i];
4065 *recog_data.operand_loc[i] = substitution;
4067 /* If we're replacing an operand with a LABEL_REF, we need
4068 to make sure that there's a REG_LABEL note attached to
4069 this instruction. */
4071 && GET_CODE (substitution) == LABEL_REF
4072 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4073 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4074 XEXP (substitution, 0),
4078 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4081 /* If this insn pattern contains any MATCH_DUP's, make sure that
4082 they will be substituted if the operands they match are substituted.
4083 Also do now any substitutions we already did on the operands.
4085 Don't do this if we aren't making replacements because we might be
4086 propagating things allocated by frame pointer elimination into places
4087 it doesn't expect. */
4089 if (insn_code_number >= 0 && replace)
4090 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4092 int opno = recog_data.dup_num[i];
4093 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4094 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4098 /* This loses because reloading of prior insns can invalidate the equivalence
4099 (or at least find_equiv_reg isn't smart enough to find it any more),
4100 causing this insn to need more reload regs than it needed before.
4101 It may be too late to make the reload regs available.
4102 Now this optimization is done safely in choose_reload_regs. */
4104 /* For each reload of a reg into some other class of reg,
4105 search for an existing equivalent reg (same value now) in the right class.
4106 We can use it as long as we don't need to change its contents. */
4107 for (i = 0; i < n_reloads; i++)
4108 if (rld[i].reg_rtx == 0
4110 && REG_P (rld[i].in)
4114 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4115 static_reload_reg_p, 0, rld[i].inmode);
4116 /* Prevent generation of insn to load the value
4117 because the one we found already has the value. */
4119 rld[i].in = rld[i].reg_rtx;
4123 /* Perhaps an output reload can be combined with another
4124 to reduce needs by one. */
4125 if (!goal_earlyclobber)
4128 /* If we have a pair of reloads for parts of an address, they are reloading
4129 the same object, the operands themselves were not reloaded, and they
4130 are for two operands that are supposed to match, merge the reloads and
4131 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4133 for (i = 0; i < n_reloads; i++)
4137 for (j = i + 1; j < n_reloads; j++)
4138 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4139 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4140 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4141 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4142 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4143 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4144 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4145 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4146 && rtx_equal_p (rld[i].in, rld[j].in)
4147 && (operand_reloadnum[rld[i].opnum] < 0
4148 || rld[operand_reloadnum[rld[i].opnum]].optional)
4149 && (operand_reloadnum[rld[j].opnum] < 0
4150 || rld[operand_reloadnum[rld[j].opnum]].optional)
4151 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4152 || (goal_alternative_matches[rld[j].opnum]
4155 for (k = 0; k < n_replacements; k++)
4156 if (replacements[k].what == j)
4157 replacements[k].what = i;
4159 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4160 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4161 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4163 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4168 /* Scan all the reloads and update their type.
4169 If a reload is for the address of an operand and we didn't reload
4170 that operand, change the type. Similarly, change the operand number
4171 of a reload when two operands match. If a reload is optional, treat it
4172 as though the operand isn't reloaded.
4174 ??? This latter case is somewhat odd because if we do the optional
4175 reload, it means the object is hanging around. Thus we need only
4176 do the address reload if the optional reload was NOT done.
4178 Change secondary reloads to be the address type of their operand, not
4181 If an operand's reload is now RELOAD_OTHER, change any
4182 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4183 RELOAD_FOR_OTHER_ADDRESS. */
4185 for (i = 0; i < n_reloads; i++)
4187 if (rld[i].secondary_p
4188 && rld[i].when_needed == operand_type[rld[i].opnum])
4189 rld[i].when_needed = address_type[rld[i].opnum];
4191 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4192 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4193 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4194 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4195 && (operand_reloadnum[rld[i].opnum] < 0
4196 || rld[operand_reloadnum[rld[i].opnum]].optional))
4198 /* If we have a secondary reload to go along with this reload,
4199 change its type to RELOAD_FOR_OPADDR_ADDR. */
4201 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4202 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4203 && rld[i].secondary_in_reload != -1)
4205 int secondary_in_reload = rld[i].secondary_in_reload;
4207 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4209 /* If there's a tertiary reload we have to change it also. */
4210 if (secondary_in_reload > 0
4211 && rld[secondary_in_reload].secondary_in_reload != -1)
4212 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4213 = RELOAD_FOR_OPADDR_ADDR;
4216 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4217 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4218 && rld[i].secondary_out_reload != -1)
4220 int secondary_out_reload = rld[i].secondary_out_reload;
4222 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4224 /* If there's a tertiary reload we have to change it also. */
4225 if (secondary_out_reload
4226 && rld[secondary_out_reload].secondary_out_reload != -1)
4227 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4228 = RELOAD_FOR_OPADDR_ADDR;
4231 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4232 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4233 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4235 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4238 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4239 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4240 && operand_reloadnum[rld[i].opnum] >= 0
4241 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4243 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4245 if (goal_alternative_matches[rld[i].opnum] >= 0)
4246 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4249 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4250 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4251 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4253 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4254 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4255 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4256 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4257 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4258 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4259 This is complicated by the fact that a single operand can have more
4260 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4261 choose_reload_regs without affecting code quality, and cases that
4262 actually fail are extremely rare, so it turns out to be better to fix
4263 the problem here by not generating cases that choose_reload_regs will
4265 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4266 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4268 We can reduce the register pressure by exploiting that a
4269 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4270 does not conflict with any of them, if it is only used for the first of
4271 the RELOAD_FOR_X_ADDRESS reloads. */
4273 int first_op_addr_num = -2;
4274 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4275 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4276 int need_change = 0;
4277 /* We use last_op_addr_reload and the contents of the above arrays
4278 first as flags - -2 means no instance encountered, -1 means exactly
4279 one instance encountered.
4280 If more than one instance has been encountered, we store the reload
4281 number of the first reload of the kind in question; reload numbers
4282 are known to be non-negative. */
4283 for (i = 0; i < noperands; i++)
4284 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4285 for (i = n_reloads - 1; i >= 0; i--)
4287 switch (rld[i].when_needed)
4289 case RELOAD_FOR_OPERAND_ADDRESS:
4290 if (++first_op_addr_num >= 0)
4292 first_op_addr_num = i;
4296 case RELOAD_FOR_INPUT_ADDRESS:
4297 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4299 first_inpaddr_num[rld[i].opnum] = i;
4303 case RELOAD_FOR_OUTPUT_ADDRESS:
4304 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4306 first_outpaddr_num[rld[i].opnum] = i;
4317 for (i = 0; i < n_reloads; i++)
4320 enum reload_type type;
4322 switch (rld[i].when_needed)
4324 case RELOAD_FOR_OPADDR_ADDR:
4325 first_num = first_op_addr_num;
4326 type = RELOAD_FOR_OPERAND_ADDRESS;
4328 case RELOAD_FOR_INPADDR_ADDRESS:
4329 first_num = first_inpaddr_num[rld[i].opnum];
4330 type = RELOAD_FOR_INPUT_ADDRESS;
4332 case RELOAD_FOR_OUTADDR_ADDRESS:
4333 first_num = first_outpaddr_num[rld[i].opnum];
4334 type = RELOAD_FOR_OUTPUT_ADDRESS;
4341 else if (i > first_num)
4342 rld[i].when_needed = type;
4345 /* Check if the only TYPE reload that uses reload I is
4346 reload FIRST_NUM. */
4347 for (j = n_reloads - 1; j > first_num; j--)
4349 if (rld[j].when_needed == type
4350 && (rld[i].secondary_p
4351 ? rld[j].secondary_in_reload == i
4352 : reg_mentioned_p (rld[i].in, rld[j].in)))
4354 rld[i].when_needed = type;
4363 /* See if we have any reloads that are now allowed to be merged
4364 because we've changed when the reload is needed to
4365 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4366 check for the most common cases. */
4368 for (i = 0; i < n_reloads; i++)
4369 if (rld[i].in != 0 && rld[i].out == 0
4370 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4371 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4372 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4373 for (j = 0; j < n_reloads; j++)
4374 if (i != j && rld[j].in != 0 && rld[j].out == 0
4375 && rld[j].when_needed == rld[i].when_needed
4376 && MATCHES (rld[i].in, rld[j].in)
4377 && rld[i].class == rld[j].class
4378 && !rld[i].nocombine && !rld[j].nocombine
4379 && rld[i].reg_rtx == rld[j].reg_rtx)
4381 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4382 transfer_replacements (i, j);
4387 /* If we made any reloads for addresses, see if they violate a
4388 "no input reloads" requirement for this insn. But loads that we
4389 do after the insn (such as for output addresses) are fine. */
4390 if (no_input_reloads)
4391 for (i = 0; i < n_reloads; i++)
4392 gcc_assert (rld[i].in == 0
4393 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4394 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4397 /* Compute reload_mode and reload_nregs. */
4398 for (i = 0; i < n_reloads; i++)
4401 = (rld[i].inmode == VOIDmode
4402 || (GET_MODE_SIZE (rld[i].outmode)
4403 > GET_MODE_SIZE (rld[i].inmode)))
4404 ? rld[i].outmode : rld[i].inmode;
4406 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4409 /* Special case a simple move with an input reload and a
4410 destination of a hard reg, if the hard reg is ok, use it. */
4411 for (i = 0; i < n_reloads; i++)
4412 if (rld[i].when_needed == RELOAD_FOR_INPUT
4413 && GET_CODE (PATTERN (insn)) == SET
4414 && REG_P (SET_DEST (PATTERN (insn)))
4415 && SET_SRC (PATTERN (insn)) == rld[i].in)
4417 rtx dest = SET_DEST (PATTERN (insn));
4418 unsigned int regno = REGNO (dest);
4420 if (regno < FIRST_PSEUDO_REGISTER
4421 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4422 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4424 int nr = hard_regno_nregs[regno][rld[i].mode];
4427 for (nri = 1; nri < nr; nri ++)
4428 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4432 rld[i].reg_rtx = dest;
4439 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4440 accepts a memory operand with constant address. */
4443 alternative_allows_memconst (const char *constraint, int altnum)
4446 /* Skip alternatives before the one requested. */
4449 while (*constraint++ != ',');
4452 /* Scan the requested alternative for 'm' or 'o'.
4453 If one of them is present, this alternative accepts memory constants. */
4454 for (; (c = *constraint) && c != ',' && c != '#';
4455 constraint += CONSTRAINT_LEN (c, constraint))
4456 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4461 /* Scan X for memory references and scan the addresses for reloading.
4462 Also checks for references to "constant" regs that we want to eliminate
4463 and replaces them with the values they stand for.
4464 We may alter X destructively if it contains a reference to such.
4465 If X is just a constant reg, we return the equivalent value
4468 IND_LEVELS says how many levels of indirect addressing this machine
4471 OPNUM and TYPE identify the purpose of the reload.
4473 IS_SET_DEST is true if X is the destination of a SET, which is not
4474 appropriate to be replaced by a constant.
4476 INSN, if nonzero, is the insn in which we do the reload. It is used
4477 to determine if we may generate output reloads, and where to put USEs
4478 for pseudos that we have to replace with stack slots.
4480 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4481 result of find_reloads_address. */
4484 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4485 int ind_levels, int is_set_dest, rtx insn,
4486 int *address_reloaded)
4488 RTX_CODE code = GET_CODE (x);
4490 const char *fmt = GET_RTX_FORMAT (code);
4496 /* This code is duplicated for speed in find_reloads. */
4497 int regno = REGNO (x);
4498 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4499 x = reg_equiv_constant[regno];
4501 /* This creates (subreg (mem...)) which would cause an unnecessary
4502 reload of the mem. */
4503 else if (reg_equiv_mem[regno] != 0)
4504 x = reg_equiv_mem[regno];
4506 else if (reg_equiv_memory_loc[regno]
4507 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4509 rtx mem = make_memloc (x, regno);
4510 if (reg_equiv_address[regno]
4511 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4513 /* If this is not a toplevel operand, find_reloads doesn't see
4514 this substitution. We have to emit a USE of the pseudo so
4515 that delete_output_reload can see it. */
4516 if (replace_reloads && recog_data.operand[opnum] != x)
4517 /* We mark the USE with QImode so that we recognize it
4518 as one that can be safely deleted at the end of
4520 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4523 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4524 opnum, type, ind_levels, insn);
4525 if (address_reloaded)
4526 *address_reloaded = i;
4535 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4536 opnum, type, ind_levels, insn);
4537 if (address_reloaded)
4538 *address_reloaded = i;
4543 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4545 /* Check for SUBREG containing a REG that's equivalent to a
4546 constant. If the constant has a known value, truncate it
4547 right now. Similarly if we are extracting a single-word of a
4548 multi-word constant. If the constant is symbolic, allow it
4549 to be substituted normally. push_reload will strip the
4550 subreg later. The constant must not be VOIDmode, because we
4551 will lose the mode of the register (this should never happen
4552 because one of the cases above should handle it). */
4554 int regno = REGNO (SUBREG_REG (x));
4557 if (subreg_lowpart_p (x)
4558 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4559 && reg_equiv_constant[regno] != 0
4560 && (tem = gen_lowpart_common (GET_MODE (x),
4561 reg_equiv_constant[regno])) != 0)
4564 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4565 && reg_equiv_constant[regno] != 0)
4568 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4569 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4574 /* If the subreg contains a reg that will be converted to a mem,
4575 convert the subreg to a narrower memref now.
4576 Otherwise, we would get (subreg (mem ...) ...),
4577 which would force reload of the mem.
4579 We also need to do this if there is an equivalent MEM that is
4580 not offsettable. In that case, alter_subreg would produce an
4581 invalid address on big-endian machines.
4583 For machines that extend byte loads, we must not reload using
4584 a wider mode if we have a paradoxical SUBREG. find_reloads will
4585 force a reload in that case. So we should not do anything here. */
4587 else if (regno >= FIRST_PSEUDO_REGISTER
4588 #ifdef LOAD_EXTEND_OP
4589 && (GET_MODE_SIZE (GET_MODE (x))
4590 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4592 && (reg_equiv_address[regno] != 0
4593 || (reg_equiv_mem[regno] != 0
4594 && (! strict_memory_address_p (GET_MODE (x),
4595 XEXP (reg_equiv_mem[regno], 0))
4596 || ! offsettable_memref_p (reg_equiv_mem[regno])
4597 || num_not_at_initial_offset))))
4598 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4602 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4606 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4607 ind_levels, is_set_dest, insn,
4609 /* If we have replaced a reg with it's equivalent memory loc -
4610 that can still be handled here e.g. if it's in a paradoxical
4611 subreg - we must make the change in a copy, rather than using
4612 a destructive change. This way, find_reloads can still elect
4613 not to do the change. */
4614 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4616 x = shallow_copy_rtx (x);
4619 XEXP (x, i) = new_part;
4625 /* Return a mem ref for the memory equivalent of reg REGNO.
4626 This mem ref is not shared with anything. */
4629 make_memloc (rtx ad, int regno)
4631 /* We must rerun eliminate_regs, in case the elimination
4632 offsets have changed. */
4634 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4636 /* If TEM might contain a pseudo, we must copy it to avoid
4637 modifying it when we do the substitution for the reload. */
4638 if (rtx_varies_p (tem, 0))
4639 tem = copy_rtx (tem);
4641 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4642 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4644 /* Copy the result if it's still the same as the equivalence, to avoid
4645 modifying it when we do the substitution for the reload. */
4646 if (tem == reg_equiv_memory_loc[regno])
4647 tem = copy_rtx (tem);
4651 /* Returns true if AD could be turned into a valid memory reference
4652 to mode MODE by reloading the part pointed to by PART into a
4656 maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4660 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4663 retv = memory_address_p (mode, ad);
4669 /* Record all reloads needed for handling memory address AD
4670 which appears in *LOC in a memory reference to mode MODE
4671 which itself is found in location *MEMREFLOC.
4672 Note that we take shortcuts assuming that no multi-reg machine mode
4673 occurs as part of an address.
4675 OPNUM and TYPE specify the purpose of this reload.
4677 IND_LEVELS says how many levels of indirect addressing this machine
4680 INSN, if nonzero, is the insn in which we do the reload. It is used
4681 to determine if we may generate output reloads, and where to put USEs
4682 for pseudos that we have to replace with stack slots.
4684 Value is one if this address is reloaded or replaced as a whole; it is
4685 zero if the top level of this address was not reloaded or replaced, and
4686 it is -1 if it may or may not have been reloaded or replaced.
4688 Note that there is no verification that the address will be valid after
4689 this routine does its work. Instead, we rely on the fact that the address
4690 was valid when reload started. So we need only undo things that reload
4691 could have broken. These are wrong register types, pseudos not allocated
4692 to a hard register, and frame pointer elimination. */
4695 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4696 rtx *loc, int opnum, enum reload_type type,
4697 int ind_levels, rtx insn)
4700 int removed_and = 0;
4704 /* If the address is a register, see if it is a legitimate address and
4705 reload if not. We first handle the cases where we need not reload
4706 or where we must reload in a non-standard way. */
4712 /* If the register is equivalent to an invariant expression, substitute
4713 the invariant, and eliminate any eliminable register references. */
4714 tem = reg_equiv_constant[regno];
4716 && (tem = eliminate_regs (tem, mode, insn))
4717 && strict_memory_address_p (mode, tem))
4723 tem = reg_equiv_memory_loc[regno];
4726 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4728 tem = make_memloc (ad, regno);
4729 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4731 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4732 &XEXP (tem, 0), opnum,
4733 ADDR_TYPE (type), ind_levels, insn);
4735 /* We can avoid a reload if the register's equivalent memory
4736 expression is valid as an indirect memory address.
4737 But not all addresses are valid in a mem used as an indirect
4738 address: only reg or reg+constant. */
4741 && strict_memory_address_p (mode, tem)
4742 && (REG_P (XEXP (tem, 0))
4743 || (GET_CODE (XEXP (tem, 0)) == PLUS
4744 && REG_P (XEXP (XEXP (tem, 0), 0))
4745 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4747 /* TEM is not the same as what we'll be replacing the
4748 pseudo with after reload, put a USE in front of INSN
4749 in the final reload pass. */
4751 && num_not_at_initial_offset
4752 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4755 /* We mark the USE with QImode so that we
4756 recognize it as one that can be safely
4757 deleted at the end of reload. */
4758 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4761 /* This doesn't really count as replacing the address
4762 as a whole, since it is still a memory access. */
4770 /* The only remaining case where we can avoid a reload is if this is a
4771 hard register that is valid as a base register and which is not the
4772 subject of a CLOBBER in this insn. */
4774 else if (regno < FIRST_PSEUDO_REGISTER
4775 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4776 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4779 /* If we do not have one of the cases above, we must do the reload. */
4780 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4781 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4785 if (strict_memory_address_p (mode, ad))
4787 /* The address appears valid, so reloads are not needed.
4788 But the address may contain an eliminable register.
4789 This can happen because a machine with indirect addressing
4790 may consider a pseudo register by itself a valid address even when
4791 it has failed to get a hard reg.
4792 So do a tree-walk to find and eliminate all such regs. */
4794 /* But first quickly dispose of a common case. */
4795 if (GET_CODE (ad) == PLUS
4796 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4797 && REG_P (XEXP (ad, 0))
4798 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4801 subst_reg_equivs_changed = 0;
4802 *loc = subst_reg_equivs (ad, insn);
4804 if (! subst_reg_equivs_changed)
4807 /* Check result for validity after substitution. */
4808 if (strict_memory_address_p (mode, ad))
4812 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4817 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4822 *memrefloc = copy_rtx (*memrefloc);
4823 XEXP (*memrefloc, 0) = ad;
4824 move_replacements (&ad, &XEXP (*memrefloc, 0));
4830 /* The address is not valid. We have to figure out why. First see if
4831 we have an outer AND and remove it if so. Then analyze what's inside. */
4833 if (GET_CODE (ad) == AND)
4836 loc = &XEXP (ad, 0);
4840 /* One possibility for why the address is invalid is that it is itself
4841 a MEM. This can happen when the frame pointer is being eliminated, a
4842 pseudo is not allocated to a hard register, and the offset between the
4843 frame and stack pointers is not its initial value. In that case the
4844 pseudo will have been replaced by a MEM referring to the
4848 /* First ensure that the address in this MEM is valid. Then, unless
4849 indirect addresses are valid, reload the MEM into a register. */
4851 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4852 opnum, ADDR_TYPE (type),
4853 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4855 /* If tem was changed, then we must create a new memory reference to
4856 hold it and store it back into memrefloc. */
4857 if (tem != ad && memrefloc)
4859 *memrefloc = copy_rtx (*memrefloc);
4860 copy_replacements (tem, XEXP (*memrefloc, 0));
4861 loc = &XEXP (*memrefloc, 0);
4863 loc = &XEXP (*loc, 0);
4866 /* Check similar cases as for indirect addresses as above except
4867 that we can allow pseudos and a MEM since they should have been
4868 taken care of above. */
4871 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4872 || MEM_P (XEXP (tem, 0))
4873 || ! (REG_P (XEXP (tem, 0))
4874 || (GET_CODE (XEXP (tem, 0)) == PLUS
4875 && REG_P (XEXP (XEXP (tem, 0), 0))
4876 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4878 /* Must use TEM here, not AD, since it is the one that will
4879 have any subexpressions reloaded, if needed. */
4880 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4881 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
4884 return ! removed_and;
4890 /* If we have address of a stack slot but it's not valid because the
4891 displacement is too large, compute the sum in a register.
4892 Handle all base registers here, not just fp/ap/sp, because on some
4893 targets (namely SH) we can also get too large displacements from
4894 big-endian corrections. */
4895 else if (GET_CODE (ad) == PLUS
4896 && REG_P (XEXP (ad, 0))
4897 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4898 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4899 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
4903 /* Unshare the MEM rtx so we can safely alter it. */
4906 *memrefloc = copy_rtx (*memrefloc);
4907 loc = &XEXP (*memrefloc, 0);
4909 loc = &XEXP (*loc, 0);
4912 if (double_reg_address_ok)
4914 /* Unshare the sum as well. */
4915 *loc = ad = copy_rtx (ad);
4917 /* Reload the displacement into an index reg.
4918 We assume the frame pointer or arg pointer is a base reg. */
4919 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4920 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4926 /* If the sum of two regs is not necessarily valid,
4927 reload the sum into a base reg.
4928 That will at least work. */
4929 find_reloads_address_part (ad, loc,
4930 base_reg_class (mode, MEM, SCRATCH),
4931 Pmode, opnum, type, ind_levels);
4933 return ! removed_and;
4936 /* If we have an indexed stack slot, there are three possible reasons why
4937 it might be invalid: The index might need to be reloaded, the address
4938 might have been made by frame pointer elimination and hence have a
4939 constant out of range, or both reasons might apply.
4941 We can easily check for an index needing reload, but even if that is the
4942 case, we might also have an invalid constant. To avoid making the
4943 conservative assumption and requiring two reloads, we see if this address
4944 is valid when not interpreted strictly. If it is, the only problem is
4945 that the index needs a reload and find_reloads_address_1 will take care
4948 Handle all base registers here, not just fp/ap/sp, because on some
4949 targets (namely SPARC) we can also get invalid addresses from preventive
4950 subreg big-endian corrections made by find_reloads_toplev. We
4951 can also get expressions involving LO_SUM (rather than PLUS) from
4952 find_reloads_subreg_address.
4954 If we decide to do something, it must be that `double_reg_address_ok'
4955 is true. We generate a reload of the base register + constant and
4956 rework the sum so that the reload register will be added to the index.
4957 This is safe because we know the address isn't shared.
4959 We check for the base register as both the first and second operand of
4960 the innermost PLUS and/or LO_SUM. */
4962 for (op_index = 0; op_index < 2; ++op_index)
4964 rtx operand, addend;
4965 enum rtx_code inner_code;
4967 if (GET_CODE (ad) != PLUS)
4970 inner_code = GET_CODE (XEXP (ad, 0));
4971 if (!(GET_CODE (ad) == PLUS
4972 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4973 && (inner_code == PLUS || inner_code == LO_SUM)))
4976 operand = XEXP (XEXP (ad, 0), op_index);
4977 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
4980 addend = XEXP (XEXP (ad, 0), 1 - op_index);
4982 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
4984 || operand == frame_pointer_rtx
4985 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4986 || operand == hard_frame_pointer_rtx
4988 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4989 || operand == arg_pointer_rtx
4991 || operand == stack_pointer_rtx)
4992 && ! maybe_memory_address_p (mode, ad,
4993 &XEXP (XEXP (ad, 0), 1 - op_index)))
4998 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5000 /* Form the adjusted address. */
5001 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5002 ad = gen_rtx_PLUS (GET_MODE (ad),
5003 op_index == 0 ? offset_reg : addend,
5004 op_index == 0 ? addend : offset_reg);
5006 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5007 op_index == 0 ? offset_reg : addend,
5008 op_index == 0 ? addend : offset_reg);
5011 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5012 find_reloads_address_part (XEXP (ad, op_index),
5013 &XEXP (ad, op_index), cls,
5014 GET_MODE (ad), opnum, type, ind_levels);
5015 find_reloads_address_1 (mode,
5016 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5017 GET_CODE (XEXP (ad, op_index)),
5018 &XEXP (ad, 1 - op_index), opnum,
5025 /* See if address becomes valid when an eliminable register
5026 in a sum is replaced. */
5029 if (GET_CODE (ad) == PLUS)
5030 tem = subst_indexed_address (ad);
5031 if (tem != ad && strict_memory_address_p (mode, tem))
5033 /* Ok, we win that way. Replace any additional eliminable
5036 subst_reg_equivs_changed = 0;
5037 tem = subst_reg_equivs (tem, insn);
5039 /* Make sure that didn't make the address invalid again. */
5041 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
5048 /* If constants aren't valid addresses, reload the constant address
5050 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
5052 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5053 Unshare it so we can safely alter it. */
5054 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5055 && CONSTANT_POOL_ADDRESS_P (ad))
5057 *memrefloc = copy_rtx (*memrefloc);
5058 loc = &XEXP (*memrefloc, 0);
5060 loc = &XEXP (*loc, 0);
5063 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5064 Pmode, opnum, type, ind_levels);
5065 return ! removed_and;
5068 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5072 /* Find all pseudo regs appearing in AD
5073 that are eliminable in favor of equivalent values
5074 and do not have hard regs; replace them by their equivalents.
5075 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5076 front of it for pseudos that we have to replace with stack slots. */
5079 subst_reg_equivs (rtx ad, rtx insn)
5081 RTX_CODE code = GET_CODE (ad);
5100 int regno = REGNO (ad);
5102 if (reg_equiv_constant[regno] != 0)
5104 subst_reg_equivs_changed = 1;
5105 return reg_equiv_constant[regno];
5107 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5109 rtx mem = make_memloc (ad, regno);
5110 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5112 subst_reg_equivs_changed = 1;
5113 /* We mark the USE with QImode so that we recognize it
5114 as one that can be safely deleted at the end of
5116 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5125 /* Quickly dispose of a common case. */
5126 if (XEXP (ad, 0) == frame_pointer_rtx
5127 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5135 fmt = GET_RTX_FORMAT (code);
5136 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5138 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5142 /* Compute the sum of X and Y, making canonicalizations assumed in an
5143 address, namely: sum constant integers, surround the sum of two
5144 constants with a CONST, put the constant as the second operand, and
5145 group the constant on the outermost sum.
5147 This routine assumes both inputs are already in canonical form. */
5150 form_sum (rtx x, rtx y)
5153 enum machine_mode mode = GET_MODE (x);
5155 if (mode == VOIDmode)
5156 mode = GET_MODE (y);
5158 if (mode == VOIDmode)
5161 if (GET_CODE (x) == CONST_INT)
5162 return plus_constant (y, INTVAL (x));
5163 else if (GET_CODE (y) == CONST_INT)
5164 return plus_constant (x, INTVAL (y));
5165 else if (CONSTANT_P (x))
5166 tem = x, x = y, y = tem;
5168 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5169 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5171 /* Note that if the operands of Y are specified in the opposite
5172 order in the recursive calls below, infinite recursion will occur. */
5173 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5174 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5176 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5177 constant will have been placed second. */
5178 if (CONSTANT_P (x) && CONSTANT_P (y))
5180 if (GET_CODE (x) == CONST)
5182 if (GET_CODE (y) == CONST)
5185 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5188 return gen_rtx_PLUS (mode, x, y);
5191 /* If ADDR is a sum containing a pseudo register that should be
5192 replaced with a constant (from reg_equiv_constant),
5193 return the result of doing so, and also apply the associative
5194 law so that the result is more likely to be a valid address.
5195 (But it is not guaranteed to be one.)
5197 Note that at most one register is replaced, even if more are
5198 replaceable. Also, we try to put the result into a canonical form
5199 so it is more likely to be a valid address.
5201 In all other cases, return ADDR. */
5204 subst_indexed_address (rtx addr)
5206 rtx op0 = 0, op1 = 0, op2 = 0;
5210 if (GET_CODE (addr) == PLUS)
5212 /* Try to find a register to replace. */
5213 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5215 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5216 && reg_renumber[regno] < 0
5217 && reg_equiv_constant[regno] != 0)
5218 op0 = reg_equiv_constant[regno];
5219 else if (REG_P (op1)
5220 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5221 && reg_renumber[regno] < 0
5222 && reg_equiv_constant[regno] != 0)
5223 op1 = reg_equiv_constant[regno];
5224 else if (GET_CODE (op0) == PLUS
5225 && (tem = subst_indexed_address (op0)) != op0)
5227 else if (GET_CODE (op1) == PLUS
5228 && (tem = subst_indexed_address (op1)) != op1)
5233 /* Pick out up to three things to add. */
5234 if (GET_CODE (op1) == PLUS)
5235 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5236 else if (GET_CODE (op0) == PLUS)
5237 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5239 /* Compute the sum. */
5241 op1 = form_sum (op1, op2);
5243 op0 = form_sum (op0, op1);
5250 /* Update the REG_INC notes for an insn. It updates all REG_INC
5251 notes for the instruction which refer to REGNO the to refer
5252 to the reload number.
5254 INSN is the insn for which any REG_INC notes need updating.
5256 REGNO is the register number which has been reloaded.
5258 RELOADNUM is the reload number. */
5261 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5262 int reloadnum ATTRIBUTE_UNUSED)
5267 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5268 if (REG_NOTE_KIND (link) == REG_INC
5269 && (int) REGNO (XEXP (link, 0)) == regno)
5270 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5274 /* Record the pseudo registers we must reload into hard registers in a
5275 subexpression of a would-be memory address, X referring to a value
5276 in mode MODE. (This function is not called if the address we find
5279 CONTEXT = 1 means we are considering regs as index regs,
5280 = 0 means we are considering them as base regs.
5281 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5283 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5284 is the code of the index part of the address. Otherwise, pass SCRATCH
5286 OPNUM and TYPE specify the purpose of any reloads made.
5288 IND_LEVELS says how many levels of indirect addressing are
5289 supported at this point in the address.
5291 INSN, if nonzero, is the insn in which we do the reload. It is used
5292 to determine if we may generate output reloads.
5294 We return nonzero if X, as a whole, is reloaded or replaced. */
5296 /* Note that we take shortcuts assuming that no multi-reg machine mode
5297 occurs as part of an address.
5298 Also, this is not fully machine-customizable; it works for machines
5299 such as VAXen and 68000's and 32000's, but other possible machines
5300 could have addressing modes that this does not handle right.
5301 If you add push_reload calls here, you need to make sure gen_reload
5302 handles those cases gracefully. */
5305 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5306 enum rtx_code outer_code, enum rtx_code index_code,
5307 rtx *loc, int opnum, enum reload_type type,
5308 int ind_levels, rtx insn)
5310 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5312 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5313 : REGNO_OK_FOR_INDEX_P (REGNO))
5315 enum reg_class context_reg_class;
5316 RTX_CODE code = GET_CODE (x);
5319 context_reg_class = INDEX_REG_CLASS;
5321 context_reg_class = base_reg_class (mode, outer_code, index_code);
5327 rtx orig_op0 = XEXP (x, 0);
5328 rtx orig_op1 = XEXP (x, 1);
5329 RTX_CODE code0 = GET_CODE (orig_op0);
5330 RTX_CODE code1 = GET_CODE (orig_op1);
5334 if (GET_CODE (op0) == SUBREG)
5336 op0 = SUBREG_REG (op0);
5337 code0 = GET_CODE (op0);
5338 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5339 op0 = gen_rtx_REG (word_mode,
5341 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5342 GET_MODE (SUBREG_REG (orig_op0)),
5343 SUBREG_BYTE (orig_op0),
5344 GET_MODE (orig_op0))));
5347 if (GET_CODE (op1) == SUBREG)
5349 op1 = SUBREG_REG (op1);
5350 code1 = GET_CODE (op1);
5351 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5352 /* ??? Why is this given op1's mode and above for
5353 ??? op0 SUBREGs we use word_mode? */
5354 op1 = gen_rtx_REG (GET_MODE (op1),
5356 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5357 GET_MODE (SUBREG_REG (orig_op1)),
5358 SUBREG_BYTE (orig_op1),
5359 GET_MODE (orig_op1))));
5361 /* Plus in the index register may be created only as a result of
5362 register remateralization for expression like &localvar*4. Reload it.
5363 It may be possible to combine the displacement on the outer level,
5364 but it is probably not worthwhile to do so. */
5367 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5368 opnum, ADDR_TYPE (type), ind_levels, insn);
5369 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5371 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5375 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5376 || code0 == ZERO_EXTEND || code1 == MEM)
5378 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5379 &XEXP (x, 0), opnum, type, ind_levels,
5381 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5382 &XEXP (x, 1), opnum, type, ind_levels,
5386 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5387 || code1 == ZERO_EXTEND || code0 == MEM)
5389 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5390 &XEXP (x, 0), opnum, type, ind_levels,
5392 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5393 &XEXP (x, 1), opnum, type, ind_levels,
5397 else if (code0 == CONST_INT || code0 == CONST
5398 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5399 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5400 &XEXP (x, 1), opnum, type, ind_levels,
5403 else if (code1 == CONST_INT || code1 == CONST
5404 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5405 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5406 &XEXP (x, 0), opnum, type, ind_levels,
5409 else if (code0 == REG && code1 == REG)
5411 if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5412 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5414 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5415 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5417 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5418 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5419 &XEXP (x, 0), opnum, type, ind_levels,
5421 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5422 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5423 &XEXP (x, 1), opnum, type, ind_levels,
5425 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5426 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5427 &XEXP (x, 0), opnum, type, ind_levels,
5429 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5430 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5431 &XEXP (x, 1), opnum, type, ind_levels,
5435 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5436 &XEXP (x, 0), opnum, type, ind_levels,
5438 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5439 &XEXP (x, 1), opnum, type, ind_levels,
5444 else if (code0 == REG)
5446 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5447 &XEXP (x, 0), opnum, type, ind_levels,
5449 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5450 &XEXP (x, 1), opnum, type, ind_levels,
5454 else if (code1 == REG)
5456 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5457 &XEXP (x, 1), opnum, type, ind_levels,
5459 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5460 &XEXP (x, 0), opnum, type, ind_levels,
5470 rtx op0 = XEXP (x, 0);
5471 rtx op1 = XEXP (x, 1);
5472 enum rtx_code index_code;
5476 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5479 /* Currently, we only support {PRE,POST}_MODIFY constructs
5480 where a base register is {inc,dec}remented by the contents
5481 of another register or by a constant value. Thus, these
5482 operands must match. */
5483 gcc_assert (op0 == XEXP (op1, 0));
5485 /* Require index register (or constant). Let's just handle the
5486 register case in the meantime... If the target allows
5487 auto-modify by a constant then we could try replacing a pseudo
5488 register with its equivalent constant where applicable. */
5489 if (REG_P (XEXP (op1, 1)))
5490 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5491 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5492 &XEXP (op1, 1), opnum, type, ind_levels,
5495 gcc_assert (REG_P (XEXP (op1, 0)));
5497 regno = REGNO (XEXP (op1, 0));
5498 index_code = GET_CODE (XEXP (op1, 1));
5500 /* A register that is incremented cannot be constant! */
5501 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5502 || reg_equiv_constant[regno] == 0);
5504 /* Handle a register that is equivalent to a memory location
5505 which cannot be addressed directly. */
5506 if (reg_equiv_memory_loc[regno] != 0
5507 && (reg_equiv_address[regno] != 0
5508 || num_not_at_initial_offset))
5510 rtx tem = make_memloc (XEXP (x, 0), regno);
5512 if (reg_equiv_address[regno]
5513 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5515 /* First reload the memory location's address.
5516 We can't use ADDR_TYPE (type) here, because we need to
5517 write back the value after reading it, hence we actually
5518 need two registers. */
5519 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5520 &XEXP (tem, 0), opnum,
5524 /* Then reload the memory location into a base
5526 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5528 base_reg_class (mode, code,
5530 GET_MODE (x), GET_MODE (x), 0,
5531 0, opnum, RELOAD_OTHER);
5533 update_auto_inc_notes (this_insn, regno, reloadnum);
5538 if (reg_renumber[regno] >= 0)
5539 regno = reg_renumber[regno];
5541 /* We require a base register here... */
5542 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5544 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5545 &XEXP (op1, 0), &XEXP (x, 0),
5546 base_reg_class (mode, code, index_code),
5547 GET_MODE (x), GET_MODE (x), 0, 0,
5548 opnum, RELOAD_OTHER);
5550 update_auto_inc_notes (this_insn, regno, reloadnum);
5560 if (REG_P (XEXP (x, 0)))
5562 int regno = REGNO (XEXP (x, 0));
5566 /* A register that is incremented cannot be constant! */
5567 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5568 || reg_equiv_constant[regno] == 0);
5570 /* Handle a register that is equivalent to a memory location
5571 which cannot be addressed directly. */
5572 if (reg_equiv_memory_loc[regno] != 0
5573 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5575 rtx tem = make_memloc (XEXP (x, 0), regno);
5576 if (reg_equiv_address[regno]
5577 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5579 /* First reload the memory location's address.
5580 We can't use ADDR_TYPE (type) here, because we need to
5581 write back the value after reading it, hence we actually
5582 need two registers. */
5583 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5584 &XEXP (tem, 0), opnum, type,
5586 /* Put this inside a new increment-expression. */
5587 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5588 /* Proceed to reload that, as if it contained a register. */
5592 /* If we have a hard register that is ok as an index,
5593 don't make a reload. If an autoincrement of a nice register
5594 isn't "valid", it must be that no autoincrement is "valid".
5595 If that is true and something made an autoincrement anyway,
5596 this must be a special context where one is allowed.
5597 (For example, a "push" instruction.)
5598 We can't improve this address, so leave it alone. */
5600 /* Otherwise, reload the autoincrement into a suitable hard reg
5601 and record how much to increment by. */
5603 if (reg_renumber[regno] >= 0)
5604 regno = reg_renumber[regno];
5605 if (regno >= FIRST_PSEUDO_REGISTER
5606 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5611 /* If we can output the register afterwards, do so, this
5612 saves the extra update.
5613 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5614 CALL_INSN - and it does not set CC0.
5615 But don't do this if we cannot directly address the
5616 memory location, since this will make it harder to
5617 reuse address reloads, and increases register pressure.
5618 Also don't do this if we can probably update x directly. */
5619 rtx equiv = (MEM_P (XEXP (x, 0))
5621 : reg_equiv_mem[regno]);
5622 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5623 if (insn && NONJUMP_INSN_P (insn) && equiv
5624 && memory_operand (equiv, GET_MODE (equiv))
5626 && ! sets_cc0_p (PATTERN (insn))
5628 && ! (icode != CODE_FOR_nothing
5629 && ((*insn_data[icode].operand[0].predicate)
5631 && ((*insn_data[icode].operand[1].predicate)
5634 /* We use the original pseudo for loc, so that
5635 emit_reload_insns() knows which pseudo this
5636 reload refers to and updates the pseudo rtx, not
5637 its equivalent memory location, as well as the
5638 corresponding entry in reg_last_reload_reg. */
5639 loc = &XEXP (x_orig, 0);
5642 = push_reload (x, x, loc, loc,
5644 GET_MODE (x), GET_MODE (x), 0, 0,
5645 opnum, RELOAD_OTHER);
5650 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5652 GET_MODE (x), GET_MODE (x), 0, 0,
5655 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5660 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5666 else if (MEM_P (XEXP (x, 0)))
5668 /* This is probably the result of a substitution, by eliminate_regs,
5669 of an equivalent address for a pseudo that was not allocated to a
5670 hard register. Verify that the specified address is valid and
5671 reload it into a register. */
5672 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5673 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5677 /* Since we know we are going to reload this item, don't decrement
5678 for the indirection level.
5680 Note that this is actually conservative: it would be slightly
5681 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5683 /* We can't use ADDR_TYPE (type) here, because we need to
5684 write back the value after reading it, hence we actually
5685 need two registers. */
5686 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5687 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5688 opnum, type, ind_levels, insn);
5690 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5692 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5694 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5696 link = FIND_REG_INC_NOTE (this_insn, tem);
5698 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5707 /* Look for parts to reload in the inner expression and reload them
5708 too, in addition to this operation. Reloading all inner parts in
5709 addition to this one shouldn't be necessary, but at this point,
5710 we don't know if we can possibly omit any part that *can* be
5711 reloaded. Targets that are better off reloading just either part
5712 (or perhaps even a different part of an outer expression), should
5713 define LEGITIMIZE_RELOAD_ADDRESS. */
5714 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5715 context, code, SCRATCH, &XEXP (x, 0), opnum,
5716 type, ind_levels, insn);
5717 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5719 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5723 /* This is probably the result of a substitution, by eliminate_regs, of
5724 an equivalent address for a pseudo that was not allocated to a hard
5725 register. Verify that the specified address is valid and reload it
5728 Since we know we are going to reload this item, don't decrement for
5729 the indirection level.
5731 Note that this is actually conservative: it would be slightly more
5732 efficient to use the value of SPILL_INDIRECT_LEVELS from
5735 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5736 opnum, ADDR_TYPE (type), ind_levels, insn);
5737 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5739 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5744 int regno = REGNO (x);
5746 if (reg_equiv_constant[regno] != 0)
5748 find_reloads_address_part (reg_equiv_constant[regno], loc,
5750 GET_MODE (x), opnum, type, ind_levels);
5754 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5755 that feeds this insn. */
5756 if (reg_equiv_mem[regno] != 0)
5758 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5760 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5765 if (reg_equiv_memory_loc[regno]
5766 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5768 rtx tem = make_memloc (x, regno);
5769 if (reg_equiv_address[regno] != 0
5770 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5773 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5774 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5779 if (reg_renumber[regno] >= 0)
5780 regno = reg_renumber[regno];
5782 if (regno >= FIRST_PSEUDO_REGISTER
5783 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5786 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5788 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5792 /* If a register appearing in an address is the subject of a CLOBBER
5793 in this insn, reload it into some other register to be safe.
5794 The CLOBBER is supposed to make the register unavailable
5795 from before this insn to after it. */
5796 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5798 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5800 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5807 if (REG_P (SUBREG_REG (x)))
5809 /* If this is a SUBREG of a hard register and the resulting register
5810 is of the wrong class, reload the whole SUBREG. This avoids
5811 needless copies if SUBREG_REG is multi-word. */
5812 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5814 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5816 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5819 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5821 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5825 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5826 is larger than the class size, then reload the whole SUBREG. */
5829 enum reg_class class = context_reg_class;
5830 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5831 > reg_class_size[class])
5833 x = find_reloads_subreg_address (x, 0, opnum,
5836 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5837 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5849 const char *fmt = GET_RTX_FORMAT (code);
5852 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5855 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
5857 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
5858 &XEXP (x, i), opnum, type, ind_levels, insn);
5862 #undef REG_OK_FOR_CONTEXT
5866 /* X, which is found at *LOC, is a part of an address that needs to be
5867 reloaded into a register of class CLASS. If X is a constant, or if
5868 X is a PLUS that contains a constant, check that the constant is a
5869 legitimate operand and that we are supposed to be able to load
5870 it into the register.
5872 If not, force the constant into memory and reload the MEM instead.
5874 MODE is the mode to use, in case X is an integer constant.
5876 OPNUM and TYPE describe the purpose of any reloads made.
5878 IND_LEVELS says how many levels of indirect addressing this machine
5882 find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5883 enum machine_mode mode, int opnum,
5884 enum reload_type type, int ind_levels)
5887 && (! LEGITIMATE_CONSTANT_P (x)
5888 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5892 tem = x = force_const_mem (mode, x);
5893 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5894 opnum, type, ind_levels, 0);
5897 else if (GET_CODE (x) == PLUS
5898 && CONSTANT_P (XEXP (x, 1))
5899 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5900 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5904 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5905 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5906 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5907 opnum, type, ind_levels, 0);
5910 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5911 mode, VOIDmode, 0, 0, opnum, type);
5914 /* X, a subreg of a pseudo, is a part of an address that needs to be
5917 If the pseudo is equivalent to a memory location that cannot be directly
5918 addressed, make the necessary address reloads.
5920 If address reloads have been necessary, or if the address is changed
5921 by register elimination, return the rtx of the memory location;
5922 otherwise, return X.
5924 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5927 OPNUM and TYPE identify the purpose of the reload.
5929 IND_LEVELS says how many levels of indirect addressing are
5930 supported at this point in the address.
5932 INSN, if nonzero, is the insn in which we do the reload. It is used
5933 to determine where to put USEs for pseudos that we have to replace with
5937 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5938 enum reload_type type, int ind_levels, rtx insn)
5940 int regno = REGNO (SUBREG_REG (x));
5942 if (reg_equiv_memory_loc[regno])
5944 /* If the address is not directly addressable, or if the address is not
5945 offsettable, then it must be replaced. */
5947 && (reg_equiv_address[regno]
5948 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5951 if (force_replace || num_not_at_initial_offset)
5953 rtx tem = make_memloc (SUBREG_REG (x), regno);
5955 /* If the address changes because of register elimination, then
5956 it must be replaced. */
5958 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5960 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5961 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5964 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
5965 hold the correct (negative) byte offset. */
5966 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
5967 offset = inner_size - outer_size;
5969 offset = SUBREG_BYTE (x);
5971 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5972 PUT_MODE (tem, GET_MODE (x));
5974 /* If this was a paradoxical subreg that we replaced, the
5975 resulting memory must be sufficiently aligned to allow
5976 us to widen the mode of the memory. */
5977 if (outer_size > inner_size)
5981 base = XEXP (tem, 0);
5982 if (GET_CODE (base) == PLUS)
5984 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5985 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5987 base = XEXP (base, 0);
5990 || (REGNO_POINTER_ALIGN (REGNO (base))
5991 < outer_size * BITS_PER_UNIT))
5995 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5996 &XEXP (tem, 0), opnum, type,
5999 /* If this is not a toplevel operand, find_reloads doesn't see
6000 this substitution. We have to emit a USE of the pseudo so
6001 that delete_output_reload can see it. */
6002 if (replace_reloads && recog_data.operand[opnum] != x)
6003 /* We mark the USE with QImode so that we recognize it
6004 as one that can be safely deleted at the end of
6006 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6016 /* Substitute into the current INSN the registers into which we have reloaded
6017 the things that need reloading. The array `replacements'
6018 contains the locations of all pointers that must be changed
6019 and says what to replace them with.
6021 Return the rtx that X translates into; usually X, but modified. */
6024 subst_reloads (rtx insn)
6028 for (i = 0; i < n_replacements; i++)
6030 struct replacement *r = &replacements[i];
6031 rtx reloadreg = rld[r->what].reg_rtx;
6034 #ifdef ENABLE_CHECKING
6035 /* Internal consistency test. Check that we don't modify
6036 anything in the equivalence arrays. Whenever something from
6037 those arrays needs to be reloaded, it must be unshared before
6038 being substituted into; the equivalence must not be modified.
6039 Otherwise, if the equivalence is used after that, it will
6040 have been modified, and the thing substituted (probably a
6041 register) is likely overwritten and not a usable equivalence. */
6044 for (check_regno = 0; check_regno < max_regno; check_regno++)
6046 #define CHECK_MODF(ARRAY) \
6047 gcc_assert (!ARRAY[check_regno] \
6048 || !loc_mentioned_in_p (r->where, \
6049 ARRAY[check_regno]))
6051 CHECK_MODF (reg_equiv_constant);
6052 CHECK_MODF (reg_equiv_memory_loc);
6053 CHECK_MODF (reg_equiv_address);
6054 CHECK_MODF (reg_equiv_mem);
6057 #endif /* ENABLE_CHECKING */
6059 /* If we're replacing a LABEL_REF with a register, add a
6060 REG_LABEL note to indicate to flow which label this
6061 register refers to. */
6062 if (GET_CODE (*r->where) == LABEL_REF
6065 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
6066 XEXP (*r->where, 0),
6068 JUMP_LABEL (insn) = XEXP (*r->where, 0);
6071 /* Encapsulate RELOADREG so its machine mode matches what
6072 used to be there. Note that gen_lowpart_common will
6073 do the wrong thing if RELOADREG is multi-word. RELOADREG
6074 will always be a REG here. */
6075 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6076 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6078 /* If we are putting this into a SUBREG and RELOADREG is a
6079 SUBREG, we would be making nested SUBREGs, so we have to fix
6080 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6082 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6084 if (GET_MODE (*r->subreg_loc)
6085 == GET_MODE (SUBREG_REG (reloadreg)))
6086 *r->subreg_loc = SUBREG_REG (reloadreg);
6090 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6092 /* When working with SUBREGs the rule is that the byte
6093 offset must be a multiple of the SUBREG's mode. */
6094 final_offset = (final_offset /
6095 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6096 final_offset = (final_offset *
6097 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6099 *r->where = SUBREG_REG (reloadreg);
6100 SUBREG_BYTE (*r->subreg_loc) = final_offset;
6104 *r->where = reloadreg;
6106 /* If reload got no reg and isn't optional, something's wrong. */
6108 gcc_assert (rld[r->what].optional);
6112 /* Make a copy of any replacements being done into X and move those
6113 copies to locations in Y, a copy of X. */
6116 copy_replacements (rtx x, rtx y)
6118 /* We can't support X being a SUBREG because we might then need to know its
6119 location if something inside it was replaced. */
6120 gcc_assert (GET_CODE (x) != SUBREG);
6122 copy_replacements_1 (&x, &y, n_replacements);
6126 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6130 struct replacement *r;
6134 for (j = 0; j < orig_replacements; j++)
6136 if (replacements[j].subreg_loc == px)
6138 r = &replacements[n_replacements++];
6139 r->where = replacements[j].where;
6141 r->what = replacements[j].what;
6142 r->mode = replacements[j].mode;
6144 else if (replacements[j].where == px)
6146 r = &replacements[n_replacements++];
6149 r->what = replacements[j].what;
6150 r->mode = replacements[j].mode;
6156 code = GET_CODE (x);
6157 fmt = GET_RTX_FORMAT (code);
6159 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6162 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6163 else if (fmt[i] == 'E')
6164 for (j = XVECLEN (x, i); --j >= 0; )
6165 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6170 /* Change any replacements being done to *X to be done to *Y. */
6173 move_replacements (rtx *x, rtx *y)
6177 for (i = 0; i < n_replacements; i++)
6178 if (replacements[i].subreg_loc == x)
6179 replacements[i].subreg_loc = y;
6180 else if (replacements[i].where == x)
6182 replacements[i].where = y;
6183 replacements[i].subreg_loc = 0;
6187 /* If LOC was scheduled to be replaced by something, return the replacement.
6188 Otherwise, return *LOC. */
6191 find_replacement (rtx *loc)
6193 struct replacement *r;
6195 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6197 rtx reloadreg = rld[r->what].reg_rtx;
6199 if (reloadreg && r->where == loc)
6201 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6202 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6206 else if (reloadreg && r->subreg_loc == loc)
6208 /* RELOADREG must be either a REG or a SUBREG.
6210 ??? Is it actually still ever a SUBREG? If so, why? */
6212 if (REG_P (reloadreg))
6213 return gen_rtx_REG (GET_MODE (*loc),
6214 (REGNO (reloadreg) +
6215 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6216 GET_MODE (SUBREG_REG (*loc)),
6219 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6223 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6225 /* When working with SUBREGs the rule is that the byte
6226 offset must be a multiple of the SUBREG's mode. */
6227 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6228 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6229 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6235 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6236 what's inside and make a new rtl if so. */
6237 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6238 || GET_CODE (*loc) == MULT)
6240 rtx x = find_replacement (&XEXP (*loc, 0));
6241 rtx y = find_replacement (&XEXP (*loc, 1));
6243 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6244 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6250 /* Return nonzero if register in range [REGNO, ENDREGNO)
6251 appears either explicitly or implicitly in X
6252 other than being stored into (except for earlyclobber operands).
6254 References contained within the substructure at LOC do not count.
6255 LOC may be zero, meaning don't ignore anything.
6257 This is similar to refers_to_regno_p in rtlanal.c except that we
6258 look at equivalences for pseudos that didn't get hard registers. */
6261 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6273 code = GET_CODE (x);
6280 /* If this is a pseudo, a hard register must not have been allocated.
6281 X must therefore either be a constant or be in memory. */
6282 if (r >= FIRST_PSEUDO_REGISTER)
6284 if (reg_equiv_memory_loc[r])
6285 return refers_to_regno_for_reload_p (regno, endregno,
6286 reg_equiv_memory_loc[r],
6289 gcc_assert (reg_equiv_constant[r] || reg_equiv_invariant[r]);
6293 return (endregno > r
6294 && regno < r + (r < FIRST_PSEUDO_REGISTER
6295 ? hard_regno_nregs[r][GET_MODE (x)]
6299 /* If this is a SUBREG of a hard reg, we can see exactly which
6300 registers are being modified. Otherwise, handle normally. */
6301 if (REG_P (SUBREG_REG (x))
6302 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6304 unsigned int inner_regno = subreg_regno (x);
6305 unsigned int inner_endregno
6306 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6307 ? hard_regno_nregs[inner_regno][GET_MODE (x)] : 1);
6309 return endregno > inner_regno && regno < inner_endregno;
6315 if (&SET_DEST (x) != loc
6316 /* Note setting a SUBREG counts as referring to the REG it is in for
6317 a pseudo but not for hard registers since we can
6318 treat each word individually. */
6319 && ((GET_CODE (SET_DEST (x)) == SUBREG
6320 && loc != &SUBREG_REG (SET_DEST (x))
6321 && REG_P (SUBREG_REG (SET_DEST (x)))
6322 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6323 && refers_to_regno_for_reload_p (regno, endregno,
6324 SUBREG_REG (SET_DEST (x)),
6326 /* If the output is an earlyclobber operand, this is
6328 || ((!REG_P (SET_DEST (x))
6329 || earlyclobber_operand_p (SET_DEST (x)))
6330 && refers_to_regno_for_reload_p (regno, endregno,
6331 SET_DEST (x), loc))))
6334 if (code == CLOBBER || loc == &SET_SRC (x))
6343 /* X does not match, so try its subexpressions. */
6345 fmt = GET_RTX_FORMAT (code);
6346 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6348 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6356 if (refers_to_regno_for_reload_p (regno, endregno,
6360 else if (fmt[i] == 'E')
6363 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6364 if (loc != &XVECEXP (x, i, j)
6365 && refers_to_regno_for_reload_p (regno, endregno,
6366 XVECEXP (x, i, j), loc))
6373 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6374 we check if any register number in X conflicts with the relevant register
6375 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6376 contains a MEM (we don't bother checking for memory addresses that can't
6377 conflict because we expect this to be a rare case.
6379 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6380 that we look at equivalences for pseudos that didn't get hard registers. */
6383 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6385 int regno, endregno;
6387 /* Overly conservative. */
6388 if (GET_CODE (x) == STRICT_LOW_PART
6389 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6392 /* If either argument is a constant, then modifying X can not affect IN. */
6393 if (CONSTANT_P (x) || CONSTANT_P (in))
6395 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM)
6396 return refers_to_mem_for_reload_p (in);
6397 else if (GET_CODE (x) == SUBREG)
6399 regno = REGNO (SUBREG_REG (x));
6400 if (regno < FIRST_PSEUDO_REGISTER)
6401 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6402 GET_MODE (SUBREG_REG (x)),
6410 /* If this is a pseudo, it must not have been assigned a hard register.
6411 Therefore, it must either be in memory or be a constant. */
6413 if (regno >= FIRST_PSEUDO_REGISTER)
6415 if (reg_equiv_memory_loc[regno])
6416 return refers_to_mem_for_reload_p (in);
6417 gcc_assert (reg_equiv_constant[regno]);
6422 return refers_to_mem_for_reload_p (in);
6423 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6424 || GET_CODE (x) == CC0)
6425 return reg_mentioned_p (x, in);
6428 gcc_assert (GET_CODE (x) == PLUS);
6430 /* We actually want to know if X is mentioned somewhere inside IN.
6431 We must not say that (plus (sp) (const_int 124)) is in
6432 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6433 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6434 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6439 else if (GET_CODE (in) == PLUS)
6440 return (reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6441 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6442 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6443 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6446 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6447 ? hard_regno_nregs[regno][GET_MODE (x)] : 1);
6449 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6452 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6456 refers_to_mem_for_reload_p (rtx x)
6465 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6466 && reg_equiv_memory_loc[REGNO (x)]);
6468 fmt = GET_RTX_FORMAT (GET_CODE (x));
6469 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6471 && (MEM_P (XEXP (x, i))
6472 || refers_to_mem_for_reload_p (XEXP (x, i))))
6478 /* Check the insns before INSN to see if there is a suitable register
6479 containing the same value as GOAL.
6480 If OTHER is -1, look for a register in class CLASS.
6481 Otherwise, just see if register number OTHER shares GOAL's value.
6483 Return an rtx for the register found, or zero if none is found.
6485 If RELOAD_REG_P is (short *)1,
6486 we reject any hard reg that appears in reload_reg_rtx
6487 because such a hard reg is also needed coming into this insn.
6489 If RELOAD_REG_P is any other nonzero value,
6490 it is a vector indexed by hard reg number
6491 and we reject any hard reg whose element in the vector is nonnegative
6492 as well as any that appears in reload_reg_rtx.
6494 If GOAL is zero, then GOALREG is a register number; we look
6495 for an equivalent for that register.
6497 MODE is the machine mode of the value we want an equivalence for.
6498 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6500 This function is used by jump.c as well as in the reload pass.
6502 If GOAL is the sum of the stack pointer and a constant, we treat it
6503 as if it were a constant except that sp is required to be unchanging. */
6506 find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6507 short *reload_reg_p, int goalreg, enum machine_mode mode)
6510 rtx goaltry, valtry, value, where;
6516 int goal_mem_addr_varies = 0;
6517 int need_stable_sp = 0;
6524 else if (REG_P (goal))
6525 regno = REGNO (goal);
6526 else if (MEM_P (goal))
6528 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6529 if (MEM_VOLATILE_P (goal))
6531 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6533 /* An address with side effects must be reexecuted. */
6548 else if (CONSTANT_P (goal))
6550 else if (GET_CODE (goal) == PLUS
6551 && XEXP (goal, 0) == stack_pointer_rtx
6552 && CONSTANT_P (XEXP (goal, 1)))
6553 goal_const = need_stable_sp = 1;
6554 else if (GET_CODE (goal) == PLUS
6555 && XEXP (goal, 0) == frame_pointer_rtx
6556 && CONSTANT_P (XEXP (goal, 1)))
6562 /* Scan insns back from INSN, looking for one that copies
6563 a value into or out of GOAL.
6564 Stop and give up if we reach a label. */
6570 if (p == 0 || LABEL_P (p)
6571 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6574 if (NONJUMP_INSN_P (p)
6575 /* If we don't want spill regs ... */
6576 && (! (reload_reg_p != 0
6577 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6578 /* ... then ignore insns introduced by reload; they aren't
6579 useful and can cause results in reload_as_needed to be
6580 different from what they were when calculating the need for
6581 spills. If we notice an input-reload insn here, we will
6582 reject it below, but it might hide a usable equivalent.
6583 That makes bad code. It may even fail: perhaps no reg was
6584 spilled for this insn because it was assumed we would find
6586 || INSN_UID (p) < reload_first_uid))
6589 pat = single_set (p);
6591 /* First check for something that sets some reg equal to GOAL. */
6594 && true_regnum (SET_SRC (pat)) == regno
6595 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6598 && true_regnum (SET_DEST (pat)) == regno
6599 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6601 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6602 /* When looking for stack pointer + const,
6603 make sure we don't use a stack adjust. */
6604 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6605 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6607 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6608 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6610 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6611 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6612 /* If we are looking for a constant,
6613 and something equivalent to that constant was copied
6614 into a reg, we can use that reg. */
6615 || (goal_const && REG_NOTES (p) != 0
6616 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6617 && ((rtx_equal_p (XEXP (tem, 0), goal)
6619 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6620 || (REG_P (SET_DEST (pat))
6621 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6622 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6623 && GET_CODE (goal) == CONST_INT
6625 = operand_subword (XEXP (tem, 0), 0, 0,
6627 && rtx_equal_p (goal, goaltry)
6629 = operand_subword (SET_DEST (pat), 0, 0,
6631 && (valueno = true_regnum (valtry)) >= 0)))
6632 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6634 && REG_P (SET_DEST (pat))
6635 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6636 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6637 && GET_CODE (goal) == CONST_INT
6638 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6640 && rtx_equal_p (goal, goaltry)
6642 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6643 && (valueno = true_regnum (valtry)) >= 0)))
6647 if (valueno != other)
6650 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6656 for (i = hard_regno_nregs[valueno][mode] - 1; i >= 0; i--)
6657 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6670 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6671 (or copying VALUE into GOAL, if GOAL is also a register).
6672 Now verify that VALUE is really valid. */
6674 /* VALUENO is the register number of VALUE; a hard register. */
6676 /* Don't try to re-use something that is killed in this insn. We want
6677 to be able to trust REG_UNUSED notes. */
6678 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6681 /* If we propose to get the value from the stack pointer or if GOAL is
6682 a MEM based on the stack pointer, we need a stable SP. */
6683 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6684 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6688 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6689 if (GET_MODE (value) != mode)
6692 /* Reject VALUE if it was loaded from GOAL
6693 and is also a register that appears in the address of GOAL. */
6695 if (goal_mem && value == SET_DEST (single_set (where))
6696 && refers_to_regno_for_reload_p (valueno,
6698 + hard_regno_nregs[valueno][mode]),
6702 /* Reject registers that overlap GOAL. */
6704 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6705 nregs = hard_regno_nregs[regno][mode];
6708 valuenregs = hard_regno_nregs[valueno][mode];
6710 if (!goal_mem && !goal_const
6711 && regno + nregs > valueno && regno < valueno + valuenregs)
6714 /* Reject VALUE if it is one of the regs reserved for reloads.
6715 Reload1 knows how to reuse them anyway, and it would get
6716 confused if we allocated one without its knowledge.
6717 (Now that insns introduced by reload are ignored above,
6718 this case shouldn't happen, but I'm not positive.) */
6720 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6723 for (i = 0; i < valuenregs; ++i)
6724 if (reload_reg_p[valueno + i] >= 0)
6728 /* Reject VALUE if it is a register being used for an input reload
6729 even if it is not one of those reserved. */
6731 if (reload_reg_p != 0)
6734 for (i = 0; i < n_reloads; i++)
6735 if (rld[i].reg_rtx != 0 && rld[i].in)
6737 int regno1 = REGNO (rld[i].reg_rtx);
6738 int nregs1 = hard_regno_nregs[regno1]
6739 [GET_MODE (rld[i].reg_rtx)];
6740 if (regno1 < valueno + valuenregs
6741 && regno1 + nregs1 > valueno)
6747 /* We must treat frame pointer as varying here,
6748 since it can vary--in a nonlocal goto as generated by expand_goto. */
6749 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6751 /* Now verify that the values of GOAL and VALUE remain unaltered
6752 until INSN is reached. */
6761 /* Don't trust the conversion past a function call
6762 if either of the two is in a call-clobbered register, or memory. */
6767 if (goal_mem || need_stable_sp)
6770 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6771 for (i = 0; i < nregs; ++i)
6772 if (call_used_regs[regno + i]
6773 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6776 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6777 for (i = 0; i < valuenregs; ++i)
6778 if (call_used_regs[valueno + i]
6779 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
6787 /* Watch out for unspec_volatile, and volatile asms. */
6788 if (volatile_insn_p (pat))
6791 /* If this insn P stores in either GOAL or VALUE, return 0.
6792 If GOAL is a memory ref and this insn writes memory, return 0.
6793 If GOAL is a memory ref and its address is not constant,
6794 and this insn P changes a register used in GOAL, return 0. */
6796 if (GET_CODE (pat) == COND_EXEC)
6797 pat = COND_EXEC_CODE (pat);
6798 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6800 rtx dest = SET_DEST (pat);
6801 while (GET_CODE (dest) == SUBREG
6802 || GET_CODE (dest) == ZERO_EXTRACT
6803 || GET_CODE (dest) == STRICT_LOW_PART)
6804 dest = XEXP (dest, 0);
6807 int xregno = REGNO (dest);
6809 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6810 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6813 if (xregno < regno + nregs && xregno + xnregs > regno)
6815 if (xregno < valueno + valuenregs
6816 && xregno + xnregs > valueno)
6818 if (goal_mem_addr_varies
6819 && reg_overlap_mentioned_for_reload_p (dest, goal))
6821 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6824 else if (goal_mem && MEM_P (dest)
6825 && ! push_operand (dest, GET_MODE (dest)))
6827 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6828 && reg_equiv_memory_loc[regno] != 0)
6830 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6833 else if (GET_CODE (pat) == PARALLEL)
6836 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6838 rtx v1 = XVECEXP (pat, 0, i);
6839 if (GET_CODE (v1) == COND_EXEC)
6840 v1 = COND_EXEC_CODE (v1);
6841 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6843 rtx dest = SET_DEST (v1);
6844 while (GET_CODE (dest) == SUBREG
6845 || GET_CODE (dest) == ZERO_EXTRACT
6846 || GET_CODE (dest) == STRICT_LOW_PART)
6847 dest = XEXP (dest, 0);
6850 int xregno = REGNO (dest);
6852 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6853 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6856 if (xregno < regno + nregs
6857 && xregno + xnregs > regno)
6859 if (xregno < valueno + valuenregs
6860 && xregno + xnregs > valueno)
6862 if (goal_mem_addr_varies
6863 && reg_overlap_mentioned_for_reload_p (dest,
6866 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6869 else if (goal_mem && MEM_P (dest)
6870 && ! push_operand (dest, GET_MODE (dest)))
6872 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6873 && reg_equiv_memory_loc[regno] != 0)
6875 else if (need_stable_sp
6876 && push_operand (dest, GET_MODE (dest)))
6882 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
6886 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6887 link = XEXP (link, 1))
6889 pat = XEXP (link, 0);
6890 if (GET_CODE (pat) == CLOBBER)
6892 rtx dest = SET_DEST (pat);
6896 int xregno = REGNO (dest);
6898 = hard_regno_nregs[xregno][GET_MODE (dest)];
6900 if (xregno < regno + nregs
6901 && xregno + xnregs > regno)
6903 else if (xregno < valueno + valuenregs
6904 && xregno + xnregs > valueno)
6906 else if (goal_mem_addr_varies
6907 && reg_overlap_mentioned_for_reload_p (dest,
6912 else if (goal_mem && MEM_P (dest)
6913 && ! push_operand (dest, GET_MODE (dest)))
6915 else if (need_stable_sp
6916 && push_operand (dest, GET_MODE (dest)))
6923 /* If this insn auto-increments or auto-decrements
6924 either regno or valueno, return 0 now.
6925 If GOAL is a memory ref and its address is not constant,
6926 and this insn P increments a register used in GOAL, return 0. */
6930 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6931 if (REG_NOTE_KIND (link) == REG_INC
6932 && REG_P (XEXP (link, 0)))
6934 int incno = REGNO (XEXP (link, 0));
6935 if (incno < regno + nregs && incno >= regno)
6937 if (incno < valueno + valuenregs && incno >= valueno)
6939 if (goal_mem_addr_varies
6940 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6950 /* Find a place where INCED appears in an increment or decrement operator
6951 within X, and return the amount INCED is incremented or decremented by.
6952 The value is always positive. */
6955 find_inc_amount (rtx x, rtx inced)
6957 enum rtx_code code = GET_CODE (x);
6963 rtx addr = XEXP (x, 0);
6964 if ((GET_CODE (addr) == PRE_DEC
6965 || GET_CODE (addr) == POST_DEC
6966 || GET_CODE (addr) == PRE_INC
6967 || GET_CODE (addr) == POST_INC)
6968 && XEXP (addr, 0) == inced)
6969 return GET_MODE_SIZE (GET_MODE (x));
6970 else if ((GET_CODE (addr) == PRE_MODIFY
6971 || GET_CODE (addr) == POST_MODIFY)
6972 && GET_CODE (XEXP (addr, 1)) == PLUS
6973 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6974 && XEXP (addr, 0) == inced
6975 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6977 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6978 return i < 0 ? -i : i;
6982 fmt = GET_RTX_FORMAT (code);
6983 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6987 int tem = find_inc_amount (XEXP (x, i), inced);
6994 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6996 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7006 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7007 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7011 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7018 if (! INSN_P (insn))
7021 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7022 if (REG_NOTE_KIND (link) == REG_INC)
7024 unsigned int test = (int) REGNO (XEXP (link, 0));
7025 if (test >= regno && test < endregno)
7032 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7036 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7037 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7038 REG_INC. REGNO must refer to a hard register. */
7041 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7044 unsigned int nregs, endregno;
7046 /* regno must be a hard register. */
7047 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7049 nregs = hard_regno_nregs[regno][mode];
7050 endregno = regno + nregs;
7052 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7053 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7054 && REG_P (XEXP (PATTERN (insn), 0)))
7056 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7058 return test >= regno && test < endregno;
7061 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7064 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7066 int i = XVECLEN (PATTERN (insn), 0) - 1;
7070 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7071 if ((GET_CODE (elt) == CLOBBER
7072 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7073 && REG_P (XEXP (elt, 0)))
7075 unsigned int test = REGNO (XEXP (elt, 0));
7077 if (test >= regno && test < endregno)
7081 && reg_inc_found_and_valid_p (regno, endregno, elt))
7089 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7091 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7095 if (GET_MODE (reloadreg) == mode)
7098 regno = REGNO (reloadreg);
7100 if (WORDS_BIG_ENDIAN)
7101 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7102 - (int) hard_regno_nregs[regno][mode];
7104 return gen_rtx_REG (mode, regno);
7107 static const char *const reload_when_needed_name[] =
7110 "RELOAD_FOR_OUTPUT",
7112 "RELOAD_FOR_INPUT_ADDRESS",
7113 "RELOAD_FOR_INPADDR_ADDRESS",
7114 "RELOAD_FOR_OUTPUT_ADDRESS",
7115 "RELOAD_FOR_OUTADDR_ADDRESS",
7116 "RELOAD_FOR_OPERAND_ADDRESS",
7117 "RELOAD_FOR_OPADDR_ADDR",
7119 "RELOAD_FOR_OTHER_ADDRESS"
7122 /* These functions are used to print the variables set by 'find_reloads' */
7125 debug_reload_to_stream (FILE *f)
7132 for (r = 0; r < n_reloads; r++)
7134 fprintf (f, "Reload %d: ", r);
7138 fprintf (f, "reload_in (%s) = ",
7139 GET_MODE_NAME (rld[r].inmode));
7140 print_inline_rtx (f, rld[r].in, 24);
7141 fprintf (f, "\n\t");
7144 if (rld[r].out != 0)
7146 fprintf (f, "reload_out (%s) = ",
7147 GET_MODE_NAME (rld[r].outmode));
7148 print_inline_rtx (f, rld[r].out, 24);
7149 fprintf (f, "\n\t");
7152 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7154 fprintf (f, "%s (opnum = %d)",
7155 reload_when_needed_name[(int) rld[r].when_needed],
7158 if (rld[r].optional)
7159 fprintf (f, ", optional");
7161 if (rld[r].nongroup)
7162 fprintf (f, ", nongroup");
7164 if (rld[r].inc != 0)
7165 fprintf (f, ", inc by %d", rld[r].inc);
7167 if (rld[r].nocombine)
7168 fprintf (f, ", can't combine");
7170 if (rld[r].secondary_p)
7171 fprintf (f, ", secondary_reload_p");
7173 if (rld[r].in_reg != 0)
7175 fprintf (f, "\n\treload_in_reg: ");
7176 print_inline_rtx (f, rld[r].in_reg, 24);
7179 if (rld[r].out_reg != 0)
7181 fprintf (f, "\n\treload_out_reg: ");
7182 print_inline_rtx (f, rld[r].out_reg, 24);
7185 if (rld[r].reg_rtx != 0)
7187 fprintf (f, "\n\treload_reg_rtx: ");
7188 print_inline_rtx (f, rld[r].reg_rtx, 24);
7192 if (rld[r].secondary_in_reload != -1)
7194 fprintf (f, "%ssecondary_in_reload = %d",
7195 prefix, rld[r].secondary_in_reload);
7199 if (rld[r].secondary_out_reload != -1)
7200 fprintf (f, "%ssecondary_out_reload = %d\n",
7201 prefix, rld[r].secondary_out_reload);
7204 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7206 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7207 insn_data[rld[r].secondary_in_icode].name);
7211 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7212 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7213 insn_data[rld[r].secondary_out_icode].name);
7222 debug_reload_to_stream (stderr);