1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
31 init_reload actually has to be called earlier anyway.
33 To scan an insn, call `find_reloads'. This does two things:
34 1. sets up tables describing which values must be reloaded
35 for this insn, and what kind of hard regs they must be reloaded into;
36 2. optionally record the locations where those values appear in
37 the data, so they can be replaced properly later.
38 This is done only if the second arg to `find_reloads' is nonzero.
40 The third arg to `find_reloads' specifies the number of levels
41 of indirect addressing supported by the machine. If it is zero,
42 indirect addressing is not valid. If it is one, (MEM (REG n))
43 is valid even if (REG n) did not get a hard register; if it is two,
44 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
45 hard register, and similarly for higher values.
47 Then you must choose the hard regs to reload those pseudo regs into,
48 and generate appropriate load insns before this insn and perhaps
49 also store insns after this insn. Set up the array `reload_reg_rtx'
50 to contain the REG rtx's for the registers you used. In some
51 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
52 for certain reloads. Then that tells you which register to use,
53 so you do not need to allocate one. But you still do need to add extra
54 instructions to copy the value into and out of that register.
56 Finally you must call `subst_reloads' to substitute the reload reg rtx's
57 into the locations already recorded.
61 find_reloads can alter the operands of the instruction it is called on.
63 1. Two operands of any sort may be interchanged, if they are in a
64 commutative instruction.
65 This happens only if find_reloads thinks the instruction will compile
68 2. Pseudo-registers that are equivalent to constants are replaced
69 with those constants if they are not in hard registers.
71 1 happens every time find_reloads is called.
72 2 happens only when REPLACE is 1, which is only when
73 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
91 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
96 #include "coretypes.h"
100 #include "insn-config.h"
106 #include "addresses.h"
107 #include "hard-reg-set.h"
111 #include "function.h"
117 /* True if X is a constant that can be forced into the constant pool. */
118 #define CONST_POOL_OK_P(X) \
120 && GET_CODE (X) != HIGH \
121 && !targetm.cannot_force_const_mem (X))
123 /* True if C is a non-empty register class that has too few registers
124 to be safely used as a reload target class. */
125 #define SMALL_REGISTER_CLASS_P(C) \
126 (reg_class_size [(C)] == 1 \
127 || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
130 /* All reloads of the current insn are recorded here. See reload.h for
133 struct reload rld[MAX_RELOADS];
135 /* All the "earlyclobber" operands of the current insn
136 are recorded here. */
138 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
140 int reload_n_operands;
142 /* Replacing reloads.
144 If `replace_reloads' is nonzero, then as each reload is recorded
145 an entry is made for it in the table `replacements'.
146 Then later `subst_reloads' can look through that table and
147 perform all the replacements needed. */
149 /* Nonzero means record the places to replace. */
150 static int replace_reloads;
152 /* Each replacement is recorded with a structure like this. */
155 rtx *where; /* Location to store in */
156 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
157 a SUBREG; 0 otherwise. */
158 int what; /* which reload this is for */
159 enum machine_mode mode; /* mode it must have */
162 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
164 /* Number of replacements currently recorded. */
165 static int n_replacements;
167 /* Used to track what is modified by an operand. */
170 int reg_flag; /* Nonzero if referencing a register. */
171 int safe; /* Nonzero if this can't conflict with anything. */
172 rtx base; /* Base address for MEM. */
173 HOST_WIDE_INT start; /* Starting offset or register number. */
174 HOST_WIDE_INT end; /* Ending offset or register number. */
177 #ifdef SECONDARY_MEMORY_NEEDED
179 /* Save MEMs needed to copy from one class of registers to another. One MEM
180 is used per mode, but normally only one or two modes are ever used.
182 We keep two versions, before and after register elimination. The one
183 after register elimination is record separately for each operand. This
184 is done in case the address is not valid to be sure that we separately
187 static rtx secondary_memlocs[NUM_MACHINE_MODES];
188 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
189 static int secondary_memlocs_elim_used = 0;
192 /* The instruction we are doing reloads for;
193 so we can test whether a register dies in it. */
194 static rtx this_insn;
196 /* Nonzero if this instruction is a user-specified asm with operands. */
197 static int this_insn_is_asm;
199 /* If hard_regs_live_known is nonzero,
200 we can tell which hard regs are currently live,
201 at least enough to succeed in choosing dummy reloads. */
202 static int hard_regs_live_known;
204 /* Indexed by hard reg number,
205 element is nonnegative if hard reg has been spilled.
206 This vector is passed to `find_reloads' as an argument
207 and is not changed here. */
208 static short *static_reload_reg_p;
210 /* Set to 1 in subst_reg_equivs if it changes anything. */
211 static int subst_reg_equivs_changed;
213 /* On return from push_reload, holds the reload-number for the OUT
214 operand, which can be different for that from the input operand. */
215 static int output_reloadnum;
217 /* Compare two RTX's. */
218 #define MATCHES(x, y) \
219 (x == y || (x != 0 && (REG_P (x) \
220 ? REG_P (y) && REGNO (x) == REGNO (y) \
221 : rtx_equal_p (x, y) && ! side_effects_p (x))))
223 /* Indicates if two reloads purposes are for similar enough things that we
224 can merge their reloads. */
225 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
226 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
227 || ((when1) == (when2) && (op1) == (op2)) \
228 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
229 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
230 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
231 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
232 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
234 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
235 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
236 ((when1) != (when2) \
237 || ! ((op1) == (op2) \
238 || (when1) == RELOAD_FOR_INPUT \
239 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
240 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
242 /* If we are going to reload an address, compute the reload type to
244 #define ADDR_TYPE(type) \
245 ((type) == RELOAD_FOR_INPUT_ADDRESS \
246 ? RELOAD_FOR_INPADDR_ADDRESS \
247 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
248 ? RELOAD_FOR_OUTADDR_ADDRESS \
251 static int push_secondary_reload (int, rtx, int, int, enum reg_class,
252 enum machine_mode, enum reload_type,
253 enum insn_code *, secondary_reload_info *);
254 static enum reg_class find_valid_class (enum machine_mode, enum machine_mode,
256 static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
257 static void push_replacement (rtx *, int, enum machine_mode);
258 static void dup_replacements (rtx *, rtx *);
259 static void combine_reloads (void);
260 static int find_reusable_reload (rtx *, rtx, enum reg_class,
261 enum reload_type, int, int);
262 static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
263 enum machine_mode, enum reg_class, int, int);
264 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
265 static struct decomposition decompose (rtx);
266 static int immune_p (rtx, rtx, struct decomposition);
267 static int alternative_allows_memconst (const char *, int);
268 static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
270 static rtx make_memloc (rtx, int);
271 static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
272 static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
273 int, enum reload_type, int, rtx);
274 static rtx subst_reg_equivs (rtx, rtx);
275 static rtx subst_indexed_address (rtx);
276 static void update_auto_inc_notes (rtx, int, int);
277 static int find_reloads_address_1 (enum machine_mode, rtx, int,
278 enum rtx_code, enum rtx_code, rtx *,
279 int, enum reload_type,int, rtx);
280 static void find_reloads_address_part (rtx, rtx *, enum reg_class,
281 enum machine_mode, int,
282 enum reload_type, int);
283 static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
285 static void copy_replacements_1 (rtx *, rtx *, int);
286 static int find_inc_amount (rtx, rtx);
287 static int refers_to_mem_for_reload_p (rtx);
288 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
291 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
295 push_reg_equiv_alt_mem (int regno, rtx mem)
299 for (it = reg_equiv_alt_mem_list [regno]; it; it = XEXP (it, 1))
300 if (rtx_equal_p (XEXP (it, 0), mem))
303 reg_equiv_alt_mem_list [regno]
304 = alloc_EXPR_LIST (REG_EQUIV, mem,
305 reg_equiv_alt_mem_list [regno]);
308 /* Determine if any secondary reloads are needed for loading (if IN_P is
309 nonzero) or storing (if IN_P is zero) X to or from a reload register of
310 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
311 are needed, push them.
313 Return the reload number of the secondary reload we made, or -1 if
314 we didn't need one. *PICODE is set to the insn_code to use if we do
315 need a secondary reload. */
318 push_secondary_reload (int in_p, rtx x, int opnum, int optional,
319 enum reg_class reload_class,
320 enum machine_mode reload_mode, enum reload_type type,
321 enum insn_code *picode, secondary_reload_info *prev_sri)
323 enum reg_class class = NO_REGS;
324 enum reg_class scratch_class;
325 enum machine_mode mode = reload_mode;
326 enum insn_code icode = CODE_FOR_nothing;
327 enum insn_code t_icode = CODE_FOR_nothing;
328 enum reload_type secondary_type;
329 int s_reload, t_reload = -1;
330 const char *scratch_constraint;
332 secondary_reload_info sri;
334 if (type == RELOAD_FOR_INPUT_ADDRESS
335 || type == RELOAD_FOR_OUTPUT_ADDRESS
336 || type == RELOAD_FOR_INPADDR_ADDRESS
337 || type == RELOAD_FOR_OUTADDR_ADDRESS)
338 secondary_type = type;
340 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
342 *picode = CODE_FOR_nothing;
344 /* If X is a paradoxical SUBREG, use the inner value to determine both the
345 mode and object being reloaded. */
346 if (GET_CODE (x) == SUBREG
347 && (GET_MODE_SIZE (GET_MODE (x))
348 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
351 reload_mode = GET_MODE (x);
354 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
355 is still a pseudo-register by now, it *must* have an equivalent MEM
356 but we don't want to assume that), use that equivalent when seeing if
357 a secondary reload is needed since whether or not a reload is needed
358 might be sensitive to the form of the MEM. */
360 if (REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER
361 && reg_equiv_mem[REGNO (x)] != 0)
362 x = reg_equiv_mem[REGNO (x)];
364 sri.icode = CODE_FOR_nothing;
365 sri.prev_sri = prev_sri;
366 class = targetm.secondary_reload (in_p, x, reload_class, reload_mode, &sri);
369 /* If we don't need any secondary registers, done. */
370 if (class == NO_REGS && icode == CODE_FOR_nothing)
373 if (class != NO_REGS)
374 t_reload = push_secondary_reload (in_p, x, opnum, optional, class,
375 reload_mode, type, &t_icode, &sri);
377 /* If we will be using an insn, the secondary reload is for a
380 if (icode != CODE_FOR_nothing)
382 /* If IN_P is nonzero, the reload register will be the output in
383 operand 0. If IN_P is zero, the reload register will be the input
384 in operand 1. Outputs should have an initial "=", which we must
387 /* ??? It would be useful to be able to handle only two, or more than
388 three, operands, but for now we can only handle the case of having
389 exactly three: output, input and one temp/scratch. */
390 gcc_assert (insn_data[(int) icode].n_operands == 3);
392 /* ??? We currently have no way to represent a reload that needs
393 an icode to reload from an intermediate tertiary reload register.
394 We should probably have a new field in struct reload to tag a
395 chain of scratch operand reloads onto. */
396 gcc_assert (class == NO_REGS);
398 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
399 gcc_assert (*scratch_constraint == '=');
400 scratch_constraint++;
401 if (*scratch_constraint == '&')
402 scratch_constraint++;
403 letter = *scratch_constraint;
404 scratch_class = (letter == 'r' ? GENERAL_REGS
405 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter,
406 scratch_constraint));
408 class = scratch_class;
409 mode = insn_data[(int) icode].operand[2].mode;
412 /* This case isn't valid, so fail. Reload is allowed to use the same
413 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
414 in the case of a secondary register, we actually need two different
415 registers for correct code. We fail here to prevent the possibility of
416 silently generating incorrect code later.
418 The convention is that secondary input reloads are valid only if the
419 secondary_class is different from class. If you have such a case, you
420 can not use secondary reloads, you must work around the problem some
423 Allow this when a reload_in/out pattern is being used. I.e. assume
424 that the generated code handles this case. */
426 gcc_assert (!in_p || class != reload_class || icode != CODE_FOR_nothing
427 || t_icode != CODE_FOR_nothing);
429 /* See if we can reuse an existing secondary reload. */
430 for (s_reload = 0; s_reload < n_reloads; s_reload++)
431 if (rld[s_reload].secondary_p
432 && (reg_class_subset_p (class, rld[s_reload].class)
433 || reg_class_subset_p (rld[s_reload].class, class))
434 && ((in_p && rld[s_reload].inmode == mode)
435 || (! in_p && rld[s_reload].outmode == mode))
436 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
437 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
438 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
439 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
440 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
441 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
442 opnum, rld[s_reload].opnum))
445 rld[s_reload].inmode = mode;
447 rld[s_reload].outmode = mode;
449 if (reg_class_subset_p (class, rld[s_reload].class))
450 rld[s_reload].class = class;
452 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
453 rld[s_reload].optional &= optional;
454 rld[s_reload].secondary_p = 1;
455 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
456 opnum, rld[s_reload].opnum))
457 rld[s_reload].when_needed = RELOAD_OTHER;
460 if (s_reload == n_reloads)
462 #ifdef SECONDARY_MEMORY_NEEDED
463 /* If we need a memory location to copy between the two reload regs,
464 set it up now. Note that we do the input case before making
465 the reload and the output case after. This is due to the
466 way reloads are output. */
468 if (in_p && icode == CODE_FOR_nothing
469 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
471 get_secondary_mem (x, reload_mode, opnum, type);
473 /* We may have just added new reloads. Make sure we add
474 the new reload at the end. */
475 s_reload = n_reloads;
479 /* We need to make a new secondary reload for this register class. */
480 rld[s_reload].in = rld[s_reload].out = 0;
481 rld[s_reload].class = class;
483 rld[s_reload].inmode = in_p ? mode : VOIDmode;
484 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
485 rld[s_reload].reg_rtx = 0;
486 rld[s_reload].optional = optional;
487 rld[s_reload].inc = 0;
488 /* Maybe we could combine these, but it seems too tricky. */
489 rld[s_reload].nocombine = 1;
490 rld[s_reload].in_reg = 0;
491 rld[s_reload].out_reg = 0;
492 rld[s_reload].opnum = opnum;
493 rld[s_reload].when_needed = secondary_type;
494 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
495 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
496 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
497 rld[s_reload].secondary_out_icode
498 = ! in_p ? t_icode : CODE_FOR_nothing;
499 rld[s_reload].secondary_p = 1;
503 #ifdef SECONDARY_MEMORY_NEEDED
504 if (! in_p && icode == CODE_FOR_nothing
505 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
506 get_secondary_mem (x, mode, opnum, type);
514 /* If a secondary reload is needed, return its class. If both an intermediate
515 register and a scratch register is needed, we return the class of the
516 intermediate register. */
518 secondary_reload_class (bool in_p, enum reg_class class,
519 enum machine_mode mode, rtx x)
521 enum insn_code icode;
522 secondary_reload_info sri;
524 sri.icode = CODE_FOR_nothing;
526 class = targetm.secondary_reload (in_p, x, class, mode, &sri);
529 /* If there are no secondary reloads at all, we return NO_REGS.
530 If an intermediate register is needed, we return its class. */
531 if (icode == CODE_FOR_nothing || class != NO_REGS)
534 /* No intermediate register is needed, but we have a special reload
535 pattern, which we assume for now needs a scratch register. */
536 return scratch_reload_class (icode);
539 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
540 three operands, verify that operand 2 is an output operand, and return
542 ??? We'd like to be able to handle any pattern with at least 2 operands,
543 for zero or more scratch registers, but that needs more infrastructure. */
545 scratch_reload_class (enum insn_code icode)
547 const char *scratch_constraint;
549 enum reg_class class;
551 gcc_assert (insn_data[(int) icode].n_operands == 3);
552 scratch_constraint = insn_data[(int) icode].operand[2].constraint;
553 gcc_assert (*scratch_constraint == '=');
554 scratch_constraint++;
555 if (*scratch_constraint == '&')
556 scratch_constraint++;
557 scratch_letter = *scratch_constraint;
558 if (scratch_letter == 'r')
560 class = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter,
562 gcc_assert (class != NO_REGS);
566 #ifdef SECONDARY_MEMORY_NEEDED
568 /* Return a memory location that will be used to copy X in mode MODE.
569 If we haven't already made a location for this mode in this insn,
570 call find_reloads_address on the location being returned. */
573 get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
574 int opnum, enum reload_type type)
579 /* By default, if MODE is narrower than a word, widen it to a word.
580 This is required because most machines that require these memory
581 locations do not support short load and stores from all registers
582 (e.g., FP registers). */
584 #ifdef SECONDARY_MEMORY_NEEDED_MODE
585 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
587 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
588 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
591 /* If we already have made a MEM for this operand in MODE, return it. */
592 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
593 return secondary_memlocs_elim[(int) mode][opnum];
595 /* If this is the first time we've tried to get a MEM for this mode,
596 allocate a new one. `something_changed' in reload will get set
597 by noticing that the frame size has changed. */
599 if (secondary_memlocs[(int) mode] == 0)
601 #ifdef SECONDARY_MEMORY_NEEDED_RTX
602 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
604 secondary_memlocs[(int) mode]
605 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
609 /* Get a version of the address doing any eliminations needed. If that
610 didn't give us a new MEM, make a new one if it isn't valid. */
612 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
613 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
615 if (! mem_valid && loc == secondary_memlocs[(int) mode])
616 loc = copy_rtx (loc);
618 /* The only time the call below will do anything is if the stack
619 offset is too large. In that case IND_LEVELS doesn't matter, so we
620 can just pass a zero. Adjust the type to be the address of the
621 corresponding object. If the address was valid, save the eliminated
622 address. If it wasn't valid, we need to make a reload each time, so
627 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
628 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
631 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
635 secondary_memlocs_elim[(int) mode][opnum] = loc;
636 if (secondary_memlocs_elim_used <= (int)mode)
637 secondary_memlocs_elim_used = (int)mode + 1;
641 /* Clear any secondary memory locations we've made. */
644 clear_secondary_mem (void)
646 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
648 #endif /* SECONDARY_MEMORY_NEEDED */
651 /* Find the largest class which has at least one register valid in
652 mode INNER, and which for every such register, that register number
653 plus N is also valid in OUTER (if in range) and is cheap to move
654 into REGNO. Such a class must exist. */
656 static enum reg_class
657 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED,
658 enum machine_mode inner ATTRIBUTE_UNUSED, int n,
659 unsigned int dest_regno ATTRIBUTE_UNUSED)
664 enum reg_class best_class = NO_REGS;
665 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
666 unsigned int best_size = 0;
669 for (class = 1; class < N_REG_CLASSES; class++)
673 for (regno = 0; regno < FIRST_PSEUDO_REGISTER - n && ! bad; regno++)
674 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno))
676 if (HARD_REGNO_MODE_OK (regno, inner))
679 if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
680 || ! HARD_REGNO_MODE_OK (regno + n, outer))
687 cost = REGISTER_MOVE_COST (outer, class, dest_class);
689 if ((reg_class_size[class] > best_size
690 && (best_cost < 0 || best_cost >= cost))
694 best_size = reg_class_size[class];
695 best_cost = REGISTER_MOVE_COST (outer, class, dest_class);
699 gcc_assert (best_size != 0);
704 /* Return the number of a previously made reload that can be combined with
705 a new one, or n_reloads if none of the existing reloads can be used.
706 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
707 push_reload, they determine the kind of the new reload that we try to
708 combine. P_IN points to the corresponding value of IN, which can be
709 modified by this function.
710 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
713 find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
714 enum reload_type type, int opnum, int dont_share)
718 /* We can't merge two reloads if the output of either one is
721 if (earlyclobber_operand_p (out))
724 /* We can use an existing reload if the class is right
725 and at least one of IN and OUT is a match
726 and the other is at worst neutral.
727 (A zero compared against anything is neutral.)
729 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
730 for the same thing since that can cause us to need more reload registers
731 than we otherwise would. */
733 for (i = 0; i < n_reloads; i++)
734 if ((reg_class_subset_p (class, rld[i].class)
735 || reg_class_subset_p (rld[i].class, class))
736 /* If the existing reload has a register, it must fit our class. */
737 && (rld[i].reg_rtx == 0
738 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
739 true_regnum (rld[i].reg_rtx)))
740 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
741 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
742 || (out != 0 && MATCHES (rld[i].out, out)
743 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
744 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
745 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
746 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
749 /* Reloading a plain reg for input can match a reload to postincrement
750 that reg, since the postincrement's value is the right value.
751 Likewise, it can match a preincrement reload, since we regard
752 the preincrementation as happening before any ref in this insn
754 for (i = 0; i < n_reloads; i++)
755 if ((reg_class_subset_p (class, rld[i].class)
756 || reg_class_subset_p (rld[i].class, class))
757 /* If the existing reload has a register, it must fit our
759 && (rld[i].reg_rtx == 0
760 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
761 true_regnum (rld[i].reg_rtx)))
762 && out == 0 && rld[i].out == 0 && rld[i].in != 0
764 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == RTX_AUTOINC
765 && MATCHES (XEXP (rld[i].in, 0), in))
766 || (REG_P (rld[i].in)
767 && GET_RTX_CLASS (GET_CODE (in)) == RTX_AUTOINC
768 && MATCHES (XEXP (in, 0), rld[i].in)))
769 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
770 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES)
771 && MERGABLE_RELOADS (type, rld[i].when_needed,
772 opnum, rld[i].opnum))
774 /* Make sure reload_in ultimately has the increment,
775 not the plain register. */
783 /* Return nonzero if X is a SUBREG which will require reloading of its
784 SUBREG_REG expression. */
787 reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
791 /* Only SUBREGs are problematical. */
792 if (GET_CODE (x) != SUBREG)
795 inner = SUBREG_REG (x);
797 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
798 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
801 /* If INNER is not a hard register, then INNER will not need to
804 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
807 /* If INNER is not ok for MODE, then INNER will need reloading. */
808 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
811 /* If the outer part is a word or smaller, INNER larger than a
812 word and the number of regs for INNER is not the same as the
813 number of words in INNER, then INNER will need reloading. */
814 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
816 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
817 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
818 != (int) hard_regno_nregs[REGNO (inner)][GET_MODE (inner)]));
821 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
822 requiring an extra reload register. The caller has already found that
823 IN contains some reference to REGNO, so check that we can produce the
824 new value in a single step. E.g. if we have
825 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
826 instruction that adds one to a register, this should succeed.
827 However, if we have something like
828 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
829 needs to be loaded into a register first, we need a separate reload
831 Such PLUS reloads are generated by find_reload_address_part.
832 The out-of-range PLUS expressions are usually introduced in the instruction
833 patterns by register elimination and substituting pseudos without a home
834 by their function-invariant equivalences. */
836 can_reload_into (rtx in, int regno, enum machine_mode mode)
840 struct recog_data save_recog_data;
842 /* For matching constraints, we often get notional input reloads where
843 we want to use the original register as the reload register. I.e.
844 technically this is a non-optional input-output reload, but IN is
845 already a valid register, and has been chosen as the reload register.
846 Speed this up, since it trivially works. */
850 /* To test MEMs properly, we'd have to take into account all the reloads
851 that are already scheduled, which can become quite complicated.
852 And since we've already handled address reloads for this MEM, it
853 should always succeed anyway. */
857 /* If we can make a simple SET insn that does the job, everything should
859 dst = gen_rtx_REG (mode, regno);
860 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
861 save_recog_data = recog_data;
862 if (recog_memoized (test_insn) >= 0)
864 extract_insn (test_insn);
865 r = constrain_operands (1);
867 recog_data = save_recog_data;
871 /* Record one reload that needs to be performed.
872 IN is an rtx saying where the data are to be found before this instruction.
873 OUT says where they must be stored after the instruction.
874 (IN is zero for data not read, and OUT is zero for data not written.)
875 INLOC and OUTLOC point to the places in the instructions where
876 IN and OUT were found.
877 If IN and OUT are both nonzero, it means the same register must be used
878 to reload both IN and OUT.
880 CLASS is a register class required for the reloaded data.
881 INMODE is the machine mode that the instruction requires
882 for the reg that replaces IN and OUTMODE is likewise for OUT.
884 If IN is zero, then OUT's location and mode should be passed as
887 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
889 OPTIONAL nonzero means this reload does not need to be performed:
890 it can be discarded if that is more convenient.
892 OPNUM and TYPE say what the purpose of this reload is.
894 The return value is the reload-number for this reload.
896 If both IN and OUT are nonzero, in some rare cases we might
897 want to make two separate reloads. (Actually we never do this now.)
898 Therefore, the reload-number for OUT is stored in
899 output_reloadnum when we return; the return value applies to IN.
900 Usually (presently always), when IN and OUT are nonzero,
901 the two reload-numbers are equal, but the caller should be careful to
905 push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
906 enum reg_class class, enum machine_mode inmode,
907 enum machine_mode outmode, int strict_low, int optional,
908 int opnum, enum reload_type type)
912 int dont_remove_subreg = 0;
913 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
914 int secondary_in_reload = -1, secondary_out_reload = -1;
915 enum insn_code secondary_in_icode = CODE_FOR_nothing;
916 enum insn_code secondary_out_icode = CODE_FOR_nothing;
918 /* INMODE and/or OUTMODE could be VOIDmode if no mode
919 has been specified for the operand. In that case,
920 use the operand's mode as the mode to reload. */
921 if (inmode == VOIDmode && in != 0)
922 inmode = GET_MODE (in);
923 if (outmode == VOIDmode && out != 0)
924 outmode = GET_MODE (out);
926 /* If IN is a pseudo register everywhere-equivalent to a constant, and
927 it is not in a hard register, reload straight from the constant,
928 since we want to get rid of such pseudo registers.
929 Often this is done earlier, but not always in find_reloads_address. */
930 if (in != 0 && REG_P (in))
932 int regno = REGNO (in);
934 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
935 && reg_equiv_constant[regno] != 0)
936 in = reg_equiv_constant[regno];
939 /* Likewise for OUT. Of course, OUT will never be equivalent to
940 an actual constant, but it might be equivalent to a memory location
941 (in the case of a parameter). */
942 if (out != 0 && REG_P (out))
944 int regno = REGNO (out);
946 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
947 && reg_equiv_constant[regno] != 0)
948 out = reg_equiv_constant[regno];
951 /* If we have a read-write operand with an address side-effect,
952 change either IN or OUT so the side-effect happens only once. */
953 if (in != 0 && out != 0 && MEM_P (in) && rtx_equal_p (in, out))
954 switch (GET_CODE (XEXP (in, 0)))
956 case POST_INC: case POST_DEC: case POST_MODIFY:
957 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
960 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
961 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
968 /* If we are reloading a (SUBREG constant ...), really reload just the
969 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
970 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
971 a pseudo and hence will become a MEM) with M1 wider than M2 and the
972 register is a pseudo, also reload the inside expression.
973 For machines that extend byte loads, do this for any SUBREG of a pseudo
974 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
975 M2 is an integral mode that gets extended when loaded.
976 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
977 either M1 is not valid for R or M2 is wider than a word but we only
978 need one word to store an M2-sized quantity in R.
979 (However, if OUT is nonzero, we need to reload the reg *and*
980 the subreg, so do nothing here, and let following statement handle it.)
982 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
983 we can't handle it here because CONST_INT does not indicate a mode.
985 Similarly, we must reload the inside expression if we have a
986 STRICT_LOW_PART (presumably, in == out in the cas).
988 Also reload the inner expression if it does not require a secondary
989 reload but the SUBREG does.
991 Finally, reload the inner expression if it is a register that is in
992 the class whose registers cannot be referenced in a different size
993 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
994 cannot reload just the inside since we might end up with the wrong
995 register class. But if it is inside a STRICT_LOW_PART, we have
996 no choice, so we hope we do get the right register class there. */
998 if (in != 0 && GET_CODE (in) == SUBREG
999 && (subreg_lowpart_p (in) || strict_low)
1000 #ifdef CANNOT_CHANGE_MODE_CLASS
1001 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
1003 && (CONSTANT_P (SUBREG_REG (in))
1004 || GET_CODE (SUBREG_REG (in)) == PLUS
1006 || (((REG_P (SUBREG_REG (in))
1007 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1008 || MEM_P (SUBREG_REG (in)))
1009 && ((GET_MODE_SIZE (inmode)
1010 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1011 #ifdef LOAD_EXTEND_OP
1012 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1013 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1015 && (GET_MODE_SIZE (inmode)
1016 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1017 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1018 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != UNKNOWN)
1020 #ifdef WORD_REGISTER_OPERATIONS
1021 || ((GET_MODE_SIZE (inmode)
1022 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1023 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1024 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1028 || (REG_P (SUBREG_REG (in))
1029 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1030 /* The case where out is nonzero
1031 is handled differently in the following statement. */
1032 && (out == 0 || subreg_lowpart_p (in))
1033 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1034 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1036 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1038 != (int) hard_regno_nregs[REGNO (SUBREG_REG (in))]
1039 [GET_MODE (SUBREG_REG (in))]))
1040 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1041 || (secondary_reload_class (1, class, inmode, in) != NO_REGS
1042 && (secondary_reload_class (1, class, GET_MODE (SUBREG_REG (in)),
1045 #ifdef CANNOT_CHANGE_MODE_CLASS
1046 || (REG_P (SUBREG_REG (in))
1047 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1048 && REG_CANNOT_CHANGE_MODE_P
1049 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1053 in_subreg_loc = inloc;
1054 inloc = &SUBREG_REG (in);
1056 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1058 /* This is supposed to happen only for paradoxical subregs made by
1059 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1060 gcc_assert (GET_MODE_SIZE (GET_MODE (in)) <= GET_MODE_SIZE (inmode));
1062 inmode = GET_MODE (in);
1065 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1066 either M1 is not valid for R or M2 is wider than a word but we only
1067 need one word to store an M2-sized quantity in R.
1069 However, we must reload the inner reg *as well as* the subreg in
1072 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1073 code above. This can happen if SUBREG_BYTE != 0. */
1075 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1077 enum reg_class in_class = class;
1079 if (REG_P (SUBREG_REG (in)))
1081 = find_valid_class (inmode, GET_MODE (SUBREG_REG (in)),
1082 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1083 GET_MODE (SUBREG_REG (in)),
1086 REGNO (SUBREG_REG (in)));
1088 /* This relies on the fact that emit_reload_insns outputs the
1089 instructions for input reloads of type RELOAD_OTHER in the same
1090 order as the reloads. Thus if the outer reload is also of type
1091 RELOAD_OTHER, we are guaranteed that this inner reload will be
1092 output before the outer reload. */
1093 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1094 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1095 dont_remove_subreg = 1;
1098 /* Similarly for paradoxical and problematical SUBREGs on the output.
1099 Note that there is no reason we need worry about the previous value
1100 of SUBREG_REG (out); even if wider than out,
1101 storing in a subreg is entitled to clobber it all
1102 (except in the case of STRICT_LOW_PART,
1103 and in that case the constraint should label it input-output.) */
1104 if (out != 0 && GET_CODE (out) == SUBREG
1105 && (subreg_lowpart_p (out) || strict_low)
1106 #ifdef CANNOT_CHANGE_MODE_CLASS
1107 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1109 && (CONSTANT_P (SUBREG_REG (out))
1111 || (((REG_P (SUBREG_REG (out))
1112 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1113 || MEM_P (SUBREG_REG (out)))
1114 && ((GET_MODE_SIZE (outmode)
1115 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1116 #ifdef WORD_REGISTER_OPERATIONS
1117 || ((GET_MODE_SIZE (outmode)
1118 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1119 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1120 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1124 || (REG_P (SUBREG_REG (out))
1125 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1126 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1127 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1129 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1131 != (int) hard_regno_nregs[REGNO (SUBREG_REG (out))]
1132 [GET_MODE (SUBREG_REG (out))]))
1133 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1134 || (secondary_reload_class (0, class, outmode, out) != NO_REGS
1135 && (secondary_reload_class (0, class, GET_MODE (SUBREG_REG (out)),
1138 #ifdef CANNOT_CHANGE_MODE_CLASS
1139 || (REG_P (SUBREG_REG (out))
1140 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1141 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1142 GET_MODE (SUBREG_REG (out)),
1147 out_subreg_loc = outloc;
1148 outloc = &SUBREG_REG (out);
1150 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1151 gcc_assert (!MEM_P (out)
1152 || GET_MODE_SIZE (GET_MODE (out))
1153 <= GET_MODE_SIZE (outmode));
1155 outmode = GET_MODE (out);
1158 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1159 either M1 is not valid for R or M2 is wider than a word but we only
1160 need one word to store an M2-sized quantity in R.
1162 However, we must reload the inner reg *as well as* the subreg in
1163 that case. In this case, the inner reg is an in-out reload. */
1165 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1167 /* This relies on the fact that emit_reload_insns outputs the
1168 instructions for output reloads of type RELOAD_OTHER in reverse
1169 order of the reloads. Thus if the outer reload is also of type
1170 RELOAD_OTHER, we are guaranteed that this inner reload will be
1171 output after the outer reload. */
1172 dont_remove_subreg = 1;
1173 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1175 find_valid_class (outmode, GET_MODE (SUBREG_REG (out)),
1176 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1177 GET_MODE (SUBREG_REG (out)),
1180 REGNO (SUBREG_REG (out))),
1181 VOIDmode, VOIDmode, 0, 0,
1182 opnum, RELOAD_OTHER);
1185 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1186 if (in != 0 && out != 0 && MEM_P (out)
1187 && (REG_P (in) || MEM_P (in) || GET_CODE (in) == PLUS)
1188 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1191 /* If IN is a SUBREG of a hard register, make a new REG. This
1192 simplifies some of the cases below. */
1194 if (in != 0 && GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))
1195 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1196 && ! dont_remove_subreg)
1197 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1199 /* Similarly for OUT. */
1200 if (out != 0 && GET_CODE (out) == SUBREG
1201 && REG_P (SUBREG_REG (out))
1202 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1203 && ! dont_remove_subreg)
1204 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1206 /* Narrow down the class of register wanted if that is
1207 desirable on this machine for efficiency. */
1209 enum reg_class preferred_class = class;
1212 preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1214 /* Output reloads may need analogous treatment, different in detail. */
1215 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1217 preferred_class = PREFERRED_OUTPUT_RELOAD_CLASS (out, preferred_class);
1220 /* Discard what the target said if we cannot do it. */
1221 if (preferred_class != NO_REGS
1222 || (optional && type == RELOAD_FOR_OUTPUT))
1223 class = preferred_class;
1226 /* Make sure we use a class that can handle the actual pseudo
1227 inside any subreg. For example, on the 386, QImode regs
1228 can appear within SImode subregs. Although GENERAL_REGS
1229 can handle SImode, QImode needs a smaller class. */
1230 #ifdef LIMIT_RELOAD_CLASS
1232 class = LIMIT_RELOAD_CLASS (inmode, class);
1233 else if (in != 0 && GET_CODE (in) == SUBREG)
1234 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1237 class = LIMIT_RELOAD_CLASS (outmode, class);
1238 if (out != 0 && GET_CODE (out) == SUBREG)
1239 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1242 /* Verify that this class is at least possible for the mode that
1244 if (this_insn_is_asm)
1246 enum machine_mode mode;
1247 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1251 if (mode == VOIDmode)
1253 error_for_asm (this_insn, "cannot reload integer constant "
1254 "operand in %<asm%>");
1259 outmode = word_mode;
1261 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1262 if (HARD_REGNO_MODE_OK (i, mode)
1263 && in_hard_reg_set_p (reg_class_contents[(int) class], mode, i))
1265 if (i == FIRST_PSEUDO_REGISTER)
1267 error_for_asm (this_insn, "impossible register constraint "
1269 /* Avoid further trouble with this insn. */
1270 PATTERN (this_insn) = gen_rtx_USE (VOIDmode, const0_rtx);
1271 /* We used to continue here setting class to ALL_REGS, but it triggers
1272 sanity check on i386 for:
1273 void foo(long double d)
1277 Returning zero here ought to be safe as we take care in
1278 find_reloads to not process the reloads when instruction was
1285 /* Optional output reloads are always OK even if we have no register class,
1286 since the function of these reloads is only to have spill_reg_store etc.
1287 set, so that the storing insn can be deleted later. */
1288 gcc_assert (class != NO_REGS
1289 || (optional != 0 && type == RELOAD_FOR_OUTPUT));
1291 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1295 /* See if we need a secondary reload register to move between CLASS
1296 and IN or CLASS and OUT. Get the icode and push any required reloads
1297 needed for each of them if so. */
1301 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1302 &secondary_in_icode, NULL);
1303 if (out != 0 && GET_CODE (out) != SCRATCH)
1304 secondary_out_reload
1305 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1306 type, &secondary_out_icode, NULL);
1308 /* We found no existing reload suitable for re-use.
1309 So add an additional reload. */
1311 #ifdef SECONDARY_MEMORY_NEEDED
1312 /* If a memory location is needed for the copy, make one. */
1315 || (GET_CODE (in) == SUBREG && REG_P (SUBREG_REG (in))))
1316 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1317 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1319 get_secondary_mem (in, inmode, opnum, type);
1325 rld[i].class = class;
1326 rld[i].inmode = inmode;
1327 rld[i].outmode = outmode;
1329 rld[i].optional = optional;
1331 rld[i].nocombine = 0;
1332 rld[i].in_reg = inloc ? *inloc : 0;
1333 rld[i].out_reg = outloc ? *outloc : 0;
1334 rld[i].opnum = opnum;
1335 rld[i].when_needed = type;
1336 rld[i].secondary_in_reload = secondary_in_reload;
1337 rld[i].secondary_out_reload = secondary_out_reload;
1338 rld[i].secondary_in_icode = secondary_in_icode;
1339 rld[i].secondary_out_icode = secondary_out_icode;
1340 rld[i].secondary_p = 0;
1344 #ifdef SECONDARY_MEMORY_NEEDED
1347 || (GET_CODE (out) == SUBREG && REG_P (SUBREG_REG (out))))
1348 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1349 && SECONDARY_MEMORY_NEEDED (class,
1350 REGNO_REG_CLASS (reg_or_subregno (out)),
1352 get_secondary_mem (out, outmode, opnum, type);
1357 /* We are reusing an existing reload,
1358 but we may have additional information for it.
1359 For example, we may now have both IN and OUT
1360 while the old one may have just one of them. */
1362 /* The modes can be different. If they are, we want to reload in
1363 the larger mode, so that the value is valid for both modes. */
1364 if (inmode != VOIDmode
1365 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1366 rld[i].inmode = inmode;
1367 if (outmode != VOIDmode
1368 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1369 rld[i].outmode = outmode;
1372 rtx in_reg = inloc ? *inloc : 0;
1373 /* If we merge reloads for two distinct rtl expressions that
1374 are identical in content, there might be duplicate address
1375 reloads. Remove the extra set now, so that if we later find
1376 that we can inherit this reload, we can get rid of the
1377 address reloads altogether.
1379 Do not do this if both reloads are optional since the result
1380 would be an optional reload which could potentially leave
1381 unresolved address replacements.
1383 It is not sufficient to call transfer_replacements since
1384 choose_reload_regs will remove the replacements for address
1385 reloads of inherited reloads which results in the same
1387 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1388 && ! (rld[i].optional && optional))
1390 /* We must keep the address reload with the lower operand
1392 if (opnum > rld[i].opnum)
1394 remove_address_replacements (in);
1396 in_reg = rld[i].in_reg;
1399 remove_address_replacements (rld[i].in);
1402 rld[i].in_reg = in_reg;
1407 rld[i].out_reg = outloc ? *outloc : 0;
1409 if (reg_class_subset_p (class, rld[i].class))
1410 rld[i].class = class;
1411 rld[i].optional &= optional;
1412 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1413 opnum, rld[i].opnum))
1414 rld[i].when_needed = RELOAD_OTHER;
1415 rld[i].opnum = MIN (rld[i].opnum, opnum);
1418 /* If the ostensible rtx being reloaded differs from the rtx found
1419 in the location to substitute, this reload is not safe to combine
1420 because we cannot reliably tell whether it appears in the insn. */
1422 if (in != 0 && in != *inloc)
1423 rld[i].nocombine = 1;
1426 /* This was replaced by changes in find_reloads_address_1 and the new
1427 function inc_for_reload, which go with a new meaning of reload_inc. */
1429 /* If this is an IN/OUT reload in an insn that sets the CC,
1430 it must be for an autoincrement. It doesn't work to store
1431 the incremented value after the insn because that would clobber the CC.
1432 So we must do the increment of the value reloaded from,
1433 increment it, store it back, then decrement again. */
1434 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1438 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1439 /* If we did not find a nonzero amount-to-increment-by,
1440 that contradicts the belief that IN is being incremented
1441 in an address in this insn. */
1442 gcc_assert (rld[i].inc != 0);
1446 /* If we will replace IN and OUT with the reload-reg,
1447 record where they are located so that substitution need
1448 not do a tree walk. */
1450 if (replace_reloads)
1454 struct replacement *r = &replacements[n_replacements++];
1456 r->subreg_loc = in_subreg_loc;
1460 if (outloc != 0 && outloc != inloc)
1462 struct replacement *r = &replacements[n_replacements++];
1465 r->subreg_loc = out_subreg_loc;
1470 /* If this reload is just being introduced and it has both
1471 an incoming quantity and an outgoing quantity that are
1472 supposed to be made to match, see if either one of the two
1473 can serve as the place to reload into.
1475 If one of them is acceptable, set rld[i].reg_rtx
1478 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1480 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1483 earlyclobber_operand_p (out));
1485 /* If the outgoing register already contains the same value
1486 as the incoming one, we can dispense with loading it.
1487 The easiest way to tell the caller that is to give a phony
1488 value for the incoming operand (same as outgoing one). */
1489 if (rld[i].reg_rtx == out
1490 && (REG_P (in) || CONSTANT_P (in))
1491 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1492 static_reload_reg_p, i, inmode))
1496 /* If this is an input reload and the operand contains a register that
1497 dies in this insn and is used nowhere else, see if it is the right class
1498 to be used for this reload. Use it if so. (This occurs most commonly
1499 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1500 this if it is also an output reload that mentions the register unless
1501 the output is a SUBREG that clobbers an entire register.
1503 Note that the operand might be one of the spill regs, if it is a
1504 pseudo reg and we are in a block where spilling has not taken place.
1505 But if there is no spilling in this block, that is OK.
1506 An explicitly used hard reg cannot be a spill reg. */
1508 if (rld[i].reg_rtx == 0 && in != 0 && hard_regs_live_known)
1512 enum machine_mode rel_mode = inmode;
1514 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1517 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1518 if (REG_NOTE_KIND (note) == REG_DEAD
1519 && REG_P (XEXP (note, 0))
1520 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1521 && reg_mentioned_p (XEXP (note, 0), in)
1522 /* Check that we don't use a hardreg for an uninitialized
1523 pseudo. See also find_dummy_reload(). */
1524 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1525 || ! bitmap_bit_p (DF_RA_LIVE_OUT (ENTRY_BLOCK_PTR),
1526 ORIGINAL_REGNO (XEXP (note, 0))))
1527 && ! refers_to_regno_for_reload_p (regno,
1528 end_hard_regno (rel_mode,
1530 PATTERN (this_insn), inloc)
1531 /* If this is also an output reload, IN cannot be used as
1532 the reload register if it is set in this insn unless IN
1534 && (out == 0 || in == out
1535 || ! hard_reg_set_here_p (regno,
1536 end_hard_regno (rel_mode, regno),
1537 PATTERN (this_insn)))
1538 /* ??? Why is this code so different from the previous?
1539 Is there any simple coherent way to describe the two together?
1540 What's going on here. */
1542 || (GET_CODE (in) == SUBREG
1543 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1545 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1546 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1547 /* Make sure the operand fits in the reg that dies. */
1548 && (GET_MODE_SIZE (rel_mode)
1549 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1550 && HARD_REGNO_MODE_OK (regno, inmode)
1551 && HARD_REGNO_MODE_OK (regno, outmode))
1554 unsigned int nregs = MAX (hard_regno_nregs[regno][inmode],
1555 hard_regno_nregs[regno][outmode]);
1557 for (offs = 0; offs < nregs; offs++)
1558 if (fixed_regs[regno + offs]
1559 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1564 && (! (refers_to_regno_for_reload_p
1565 (regno, end_hard_regno (inmode, regno), in, (rtx *) 0))
1566 || can_reload_into (in, regno, inmode)))
1568 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1575 output_reloadnum = i;
1580 /* Record an additional place we must replace a value
1581 for which we have already recorded a reload.
1582 RELOADNUM is the value returned by push_reload
1583 when the reload was recorded.
1584 This is used in insn patterns that use match_dup. */
1587 push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1589 if (replace_reloads)
1591 struct replacement *r = &replacements[n_replacements++];
1592 r->what = reloadnum;
1599 /* Duplicate any replacement we have recorded to apply at
1600 location ORIG_LOC to also be performed at DUP_LOC.
1601 This is used in insn patterns that use match_dup. */
1604 dup_replacements (rtx *dup_loc, rtx *orig_loc)
1606 int i, n = n_replacements;
1608 for (i = 0; i < n; i++)
1610 struct replacement *r = &replacements[i];
1611 if (r->where == orig_loc)
1612 push_replacement (dup_loc, r->what, r->mode);
1616 /* Transfer all replacements that used to be in reload FROM to be in
1620 transfer_replacements (int to, int from)
1624 for (i = 0; i < n_replacements; i++)
1625 if (replacements[i].what == from)
1626 replacements[i].what = to;
1629 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1630 or a subpart of it. If we have any replacements registered for IN_RTX,
1631 cancel the reloads that were supposed to load them.
1632 Return nonzero if we canceled any reloads. */
1634 remove_address_replacements (rtx in_rtx)
1637 char reload_flags[MAX_RELOADS];
1638 int something_changed = 0;
1640 memset (reload_flags, 0, sizeof reload_flags);
1641 for (i = 0, j = 0; i < n_replacements; i++)
1643 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1644 reload_flags[replacements[i].what] |= 1;
1647 replacements[j++] = replacements[i];
1648 reload_flags[replacements[i].what] |= 2;
1651 /* Note that the following store must be done before the recursive calls. */
1654 for (i = n_reloads - 1; i >= 0; i--)
1656 if (reload_flags[i] == 1)
1658 deallocate_reload_reg (i);
1659 remove_address_replacements (rld[i].in);
1661 something_changed = 1;
1664 return something_changed;
1667 /* If there is only one output reload, and it is not for an earlyclobber
1668 operand, try to combine it with a (logically unrelated) input reload
1669 to reduce the number of reload registers needed.
1671 This is safe if the input reload does not appear in
1672 the value being output-reloaded, because this implies
1673 it is not needed any more once the original insn completes.
1675 If that doesn't work, see we can use any of the registers that
1676 die in this insn as a reload register. We can if it is of the right
1677 class and does not appear in the value being output-reloaded. */
1680 combine_reloads (void)
1683 int output_reload = -1;
1684 int secondary_out = -1;
1687 /* Find the output reload; return unless there is exactly one
1688 and that one is mandatory. */
1690 for (i = 0; i < n_reloads; i++)
1691 if (rld[i].out != 0)
1693 if (output_reload >= 0)
1698 if (output_reload < 0 || rld[output_reload].optional)
1701 /* An input-output reload isn't combinable. */
1703 if (rld[output_reload].in != 0)
1706 /* If this reload is for an earlyclobber operand, we can't do anything. */
1707 if (earlyclobber_operand_p (rld[output_reload].out))
1710 /* If there is a reload for part of the address of this operand, we would
1711 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1712 its life to the point where doing this combine would not lower the
1713 number of spill registers needed. */
1714 for (i = 0; i < n_reloads; i++)
1715 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1716 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1717 && rld[i].opnum == rld[output_reload].opnum)
1720 /* Check each input reload; can we combine it? */
1722 for (i = 0; i < n_reloads; i++)
1723 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1724 /* Life span of this reload must not extend past main insn. */
1725 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1726 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1727 && rld[i].when_needed != RELOAD_OTHER
1728 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1729 == CLASS_MAX_NREGS (rld[output_reload].class,
1730 rld[output_reload].outmode))
1732 && rld[i].reg_rtx == 0
1733 #ifdef SECONDARY_MEMORY_NEEDED
1734 /* Don't combine two reloads with different secondary
1735 memory locations. */
1736 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1737 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1738 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1739 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1741 && (SMALL_REGISTER_CLASSES
1742 ? (rld[i].class == rld[output_reload].class)
1743 : (reg_class_subset_p (rld[i].class,
1744 rld[output_reload].class)
1745 || reg_class_subset_p (rld[output_reload].class,
1747 && (MATCHES (rld[i].in, rld[output_reload].out)
1748 /* Args reversed because the first arg seems to be
1749 the one that we imagine being modified
1750 while the second is the one that might be affected. */
1751 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1753 /* However, if the input is a register that appears inside
1754 the output, then we also can't share.
1755 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1756 If the same reload reg is used for both reg 69 and the
1757 result to be stored in memory, then that result
1758 will clobber the address of the memory ref. */
1759 && ! (REG_P (rld[i].in)
1760 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1761 rld[output_reload].out))))
1762 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1763 rld[i].when_needed != RELOAD_FOR_INPUT)
1764 && (reg_class_size[(int) rld[i].class]
1765 || SMALL_REGISTER_CLASSES)
1766 /* We will allow making things slightly worse by combining an
1767 input and an output, but no worse than that. */
1768 && (rld[i].when_needed == RELOAD_FOR_INPUT
1769 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1773 /* We have found a reload to combine with! */
1774 rld[i].out = rld[output_reload].out;
1775 rld[i].out_reg = rld[output_reload].out_reg;
1776 rld[i].outmode = rld[output_reload].outmode;
1777 /* Mark the old output reload as inoperative. */
1778 rld[output_reload].out = 0;
1779 /* The combined reload is needed for the entire insn. */
1780 rld[i].when_needed = RELOAD_OTHER;
1781 /* If the output reload had a secondary reload, copy it. */
1782 if (rld[output_reload].secondary_out_reload != -1)
1784 rld[i].secondary_out_reload
1785 = rld[output_reload].secondary_out_reload;
1786 rld[i].secondary_out_icode
1787 = rld[output_reload].secondary_out_icode;
1790 #ifdef SECONDARY_MEMORY_NEEDED
1791 /* Copy any secondary MEM. */
1792 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1793 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1794 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1796 /* If required, minimize the register class. */
1797 if (reg_class_subset_p (rld[output_reload].class,
1799 rld[i].class = rld[output_reload].class;
1801 /* Transfer all replacements from the old reload to the combined. */
1802 for (j = 0; j < n_replacements; j++)
1803 if (replacements[j].what == output_reload)
1804 replacements[j].what = i;
1809 /* If this insn has only one operand that is modified or written (assumed
1810 to be the first), it must be the one corresponding to this reload. It
1811 is safe to use anything that dies in this insn for that output provided
1812 that it does not occur in the output (we already know it isn't an
1813 earlyclobber. If this is an asm insn, give up. */
1815 if (INSN_CODE (this_insn) == -1)
1818 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1819 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1820 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1823 /* See if some hard register that dies in this insn and is not used in
1824 the output is the right class. Only works if the register we pick
1825 up can fully hold our output reload. */
1826 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1827 if (REG_NOTE_KIND (note) == REG_DEAD
1828 && REG_P (XEXP (note, 0))
1829 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1830 rld[output_reload].out)
1831 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1832 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1833 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1834 REGNO (XEXP (note, 0)))
1835 && (hard_regno_nregs[REGNO (XEXP (note, 0))][rld[output_reload].outmode]
1836 <= hard_regno_nregs[REGNO (XEXP (note, 0))][GET_MODE (XEXP (note, 0))])
1837 /* Ensure that a secondary or tertiary reload for this output
1838 won't want this register. */
1839 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1840 || (! (TEST_HARD_REG_BIT
1841 (reg_class_contents[(int) rld[secondary_out].class],
1842 REGNO (XEXP (note, 0))))
1843 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1844 || ! (TEST_HARD_REG_BIT
1845 (reg_class_contents[(int) rld[secondary_out].class],
1846 REGNO (XEXP (note, 0)))))))
1847 && ! fixed_regs[REGNO (XEXP (note, 0))]
1848 /* Check that we don't use a hardreg for an uninitialized
1849 pseudo. See also find_dummy_reload(). */
1850 && (ORIGINAL_REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1851 || ! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR),
1852 ORIGINAL_REGNO (XEXP (note, 0)))))
1854 rld[output_reload].reg_rtx
1855 = gen_rtx_REG (rld[output_reload].outmode,
1856 REGNO (XEXP (note, 0)));
1861 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1862 See if one of IN and OUT is a register that may be used;
1863 this is desirable since a spill-register won't be needed.
1864 If so, return the register rtx that proves acceptable.
1866 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1867 CLASS is the register class required for the reload.
1869 If FOR_REAL is >= 0, it is the number of the reload,
1870 and in some cases when it can be discovered that OUT doesn't need
1871 to be computed, clear out rld[FOR_REAL].out.
1873 If FOR_REAL is -1, this should not be done, because this call
1874 is just to see if a register can be found, not to find and install it.
1876 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1877 puts an additional constraint on being able to use IN for OUT since
1878 IN must not appear elsewhere in the insn (it is assumed that IN itself
1879 is safe from the earlyclobber). */
1882 find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1883 enum machine_mode inmode, enum machine_mode outmode,
1884 enum reg_class class, int for_real, int earlyclobber)
1892 /* If operands exceed a word, we can't use either of them
1893 unless they have the same size. */
1894 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1895 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1896 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1899 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1900 respectively refers to a hard register. */
1902 /* Find the inside of any subregs. */
1903 while (GET_CODE (out) == SUBREG)
1905 if (REG_P (SUBREG_REG (out))
1906 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1907 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1908 GET_MODE (SUBREG_REG (out)),
1911 out = SUBREG_REG (out);
1913 while (GET_CODE (in) == SUBREG)
1915 if (REG_P (SUBREG_REG (in))
1916 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1917 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1918 GET_MODE (SUBREG_REG (in)),
1921 in = SUBREG_REG (in);
1924 /* Narrow down the reg class, the same way push_reload will;
1925 otherwise we might find a dummy now, but push_reload won't. */
1927 enum reg_class preferred_class = PREFERRED_RELOAD_CLASS (in, class);
1928 if (preferred_class != NO_REGS)
1929 class = preferred_class;
1932 /* See if OUT will do. */
1934 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1936 unsigned int regno = REGNO (out) + out_offset;
1937 unsigned int nwords = hard_regno_nregs[regno][outmode];
1940 /* When we consider whether the insn uses OUT,
1941 ignore references within IN. They don't prevent us
1942 from copying IN into OUT, because those refs would
1943 move into the insn that reloads IN.
1945 However, we only ignore IN in its role as this reload.
1946 If the insn uses IN elsewhere and it contains OUT,
1947 that counts. We can't be sure it's the "same" operand
1948 so it might not go through this reload. */
1950 *inloc = const0_rtx;
1952 if (regno < FIRST_PSEUDO_REGISTER
1953 && HARD_REGNO_MODE_OK (regno, outmode)
1954 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1955 PATTERN (this_insn), outloc))
1959 for (i = 0; i < nwords; i++)
1960 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1966 if (REG_P (real_out))
1969 value = gen_rtx_REG (outmode, regno);
1976 /* Consider using IN if OUT was not acceptable
1977 or if OUT dies in this insn (like the quotient in a divmod insn).
1978 We can't use IN unless it is dies in this insn,
1979 which means we must know accurately which hard regs are live.
1980 Also, the result can't go in IN if IN is used within OUT,
1981 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1982 if (hard_regs_live_known
1984 && REGNO (in) < FIRST_PSEUDO_REGISTER
1986 || find_reg_note (this_insn, REG_UNUSED, real_out))
1987 && find_reg_note (this_insn, REG_DEAD, real_in)
1988 && !fixed_regs[REGNO (in)]
1989 && HARD_REGNO_MODE_OK (REGNO (in),
1990 /* The only case where out and real_out might
1991 have different modes is where real_out
1992 is a subreg, and in that case, out
1994 (GET_MODE (out) != VOIDmode
1995 ? GET_MODE (out) : outmode))
1996 /* But only do all this if we can be sure, that this input
1997 operand doesn't correspond with an uninitialized pseudoreg.
1998 global can assign some hardreg to it, which is the same as
1999 a different pseudo also currently live (as it can ignore the
2000 conflict). So we never must introduce writes to such hardregs,
2001 as they would clobber the other live pseudo using the same.
2002 See also PR20973. */
2003 && (ORIGINAL_REGNO (in) < FIRST_PSEUDO_REGISTER
2004 || ! bitmap_bit_p (DF_RA_LIVE_OUT (ENTRY_BLOCK_PTR),
2005 ORIGINAL_REGNO (in))))
2007 unsigned int regno = REGNO (in) + in_offset;
2008 unsigned int nwords = hard_regno_nregs[regno][inmode];
2010 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
2011 && ! hard_reg_set_here_p (regno, regno + nwords,
2012 PATTERN (this_insn))
2014 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
2015 PATTERN (this_insn), inloc)))
2019 for (i = 0; i < nwords; i++)
2020 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2026 /* If we were going to use OUT as the reload reg
2027 and changed our mind, it means OUT is a dummy that
2028 dies here. So don't bother copying value to it. */
2029 if (for_real >= 0 && value == real_out)
2030 rld[for_real].out = 0;
2031 if (REG_P (real_in))
2034 value = gen_rtx_REG (inmode, regno);
2042 /* This page contains subroutines used mainly for determining
2043 whether the IN or an OUT of a reload can serve as the
2046 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2049 earlyclobber_operand_p (rtx x)
2053 for (i = 0; i < n_earlyclobbers; i++)
2054 if (reload_earlyclobbers[i] == x)
2060 /* Return 1 if expression X alters a hard reg in the range
2061 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2062 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2063 X should be the body of an instruction. */
2066 hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2068 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2070 rtx op0 = SET_DEST (x);
2072 while (GET_CODE (op0) == SUBREG)
2073 op0 = SUBREG_REG (op0);
2076 unsigned int r = REGNO (op0);
2078 /* See if this reg overlaps range under consideration. */
2080 && end_hard_regno (GET_MODE (op0), r) > beg_regno)
2084 else if (GET_CODE (x) == PARALLEL)
2086 int i = XVECLEN (x, 0) - 1;
2089 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2096 /* Return 1 if ADDR is a valid memory address for mode MODE,
2097 and check that each pseudo reg has the proper kind of
2101 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2103 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2110 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2111 if they are the same hard reg, and has special hacks for
2112 autoincrement and autodecrement.
2113 This is specifically intended for find_reloads to use
2114 in determining whether two operands match.
2115 X is the operand whose number is the lower of the two.
2117 The value is 2 if Y contains a pre-increment that matches
2118 a non-incrementing address in X. */
2120 /* ??? To be completely correct, we should arrange to pass
2121 for X the output operand and for Y the input operand.
2122 For now, we assume that the output operand has the lower number
2123 because that is natural in (SET output (... input ...)). */
2126 operands_match_p (rtx x, rtx y)
2129 RTX_CODE code = GET_CODE (x);
2135 if ((code == REG || (code == SUBREG && REG_P (SUBREG_REG (x))))
2136 && (REG_P (y) || (GET_CODE (y) == SUBREG
2137 && REG_P (SUBREG_REG (y)))))
2143 i = REGNO (SUBREG_REG (x));
2144 if (i >= FIRST_PSEUDO_REGISTER)
2146 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2147 GET_MODE (SUBREG_REG (x)),
2154 if (GET_CODE (y) == SUBREG)
2156 j = REGNO (SUBREG_REG (y));
2157 if (j >= FIRST_PSEUDO_REGISTER)
2159 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2160 GET_MODE (SUBREG_REG (y)),
2167 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2168 multiple hard register group of scalar integer registers, so that
2169 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2171 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2172 && SCALAR_INT_MODE_P (GET_MODE (x))
2173 && i < FIRST_PSEUDO_REGISTER)
2174 i += hard_regno_nregs[i][GET_MODE (x)] - 1;
2175 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2176 && SCALAR_INT_MODE_P (GET_MODE (y))
2177 && j < FIRST_PSEUDO_REGISTER)
2178 j += hard_regno_nregs[j][GET_MODE (y)] - 1;
2182 /* If two operands must match, because they are really a single
2183 operand of an assembler insn, then two postincrements are invalid
2184 because the assembler insn would increment only once.
2185 On the other hand, a postincrement matches ordinary indexing
2186 if the postincrement is the output operand. */
2187 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2188 return operands_match_p (XEXP (x, 0), y);
2189 /* Two preincrements are invalid
2190 because the assembler insn would increment only once.
2191 On the other hand, a preincrement matches ordinary indexing
2192 if the preincrement is the input operand.
2193 In this case, return 2, since some callers need to do special
2194 things when this happens. */
2195 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2196 || GET_CODE (y) == PRE_MODIFY)
2197 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2201 /* Now we have disposed of all the cases in which different rtx codes
2203 if (code != GET_CODE (y))
2206 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2207 if (GET_MODE (x) != GET_MODE (y))
2217 return XEXP (x, 0) == XEXP (y, 0);
2219 return XSTR (x, 0) == XSTR (y, 0);
2225 /* Compare the elements. If any pair of corresponding elements
2226 fail to match, return 0 for the whole things. */
2229 fmt = GET_RTX_FORMAT (code);
2230 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2236 if (XWINT (x, i) != XWINT (y, i))
2241 if (XINT (x, i) != XINT (y, i))
2246 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2249 /* If any subexpression returns 2,
2250 we should return 2 if we are successful. */
2259 if (XVECLEN (x, i) != XVECLEN (y, i))
2261 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2263 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2271 /* It is believed that rtx's at this level will never
2272 contain anything but integers and other rtx's,
2273 except for within LABEL_REFs and SYMBOL_REFs. */
2278 return 1 + success_2;
2281 /* Describe the range of registers or memory referenced by X.
2282 If X is a register, set REG_FLAG and put the first register
2283 number into START and the last plus one into END.
2284 If X is a memory reference, put a base address into BASE
2285 and a range of integer offsets into START and END.
2286 If X is pushing on the stack, we can assume it causes no trouble,
2287 so we set the SAFE field. */
2289 static struct decomposition
2292 struct decomposition val;
2295 memset (&val, 0, sizeof (val));
2297 switch (GET_CODE (x))
2301 rtx base = NULL_RTX, offset = 0;
2302 rtx addr = XEXP (x, 0);
2304 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2305 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2307 val.base = XEXP (addr, 0);
2308 val.start = -GET_MODE_SIZE (GET_MODE (x));
2309 val.end = GET_MODE_SIZE (GET_MODE (x));
2310 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2314 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2316 if (GET_CODE (XEXP (addr, 1)) == PLUS
2317 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2318 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2320 val.base = XEXP (addr, 0);
2321 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2322 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2323 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2328 if (GET_CODE (addr) == CONST)
2330 addr = XEXP (addr, 0);
2333 if (GET_CODE (addr) == PLUS)
2335 if (CONSTANT_P (XEXP (addr, 0)))
2337 base = XEXP (addr, 1);
2338 offset = XEXP (addr, 0);
2340 else if (CONSTANT_P (XEXP (addr, 1)))
2342 base = XEXP (addr, 0);
2343 offset = XEXP (addr, 1);
2350 offset = const0_rtx;
2352 if (GET_CODE (offset) == CONST)
2353 offset = XEXP (offset, 0);
2354 if (GET_CODE (offset) == PLUS)
2356 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2358 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2359 offset = XEXP (offset, 0);
2361 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2363 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2364 offset = XEXP (offset, 1);
2368 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2369 offset = const0_rtx;
2372 else if (GET_CODE (offset) != CONST_INT)
2374 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2375 offset = const0_rtx;
2378 if (all_const && GET_CODE (base) == PLUS)
2379 base = gen_rtx_CONST (GET_MODE (base), base);
2381 gcc_assert (GET_CODE (offset) == CONST_INT);
2383 val.start = INTVAL (offset);
2384 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2391 val.start = true_regnum (x);
2392 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2394 /* A pseudo with no hard reg. */
2395 val.start = REGNO (x);
2396 val.end = val.start + 1;
2400 val.end = end_hard_regno (GET_MODE (x), val.start);
2404 if (!REG_P (SUBREG_REG (x)))
2405 /* This could be more precise, but it's good enough. */
2406 return decompose (SUBREG_REG (x));
2408 val.start = true_regnum (x);
2409 if (val.start < 0 || val.start >= FIRST_PSEUDO_REGISTER)
2410 return decompose (SUBREG_REG (x));
2413 val.end = val.start + subreg_nregs (x);
2417 /* This hasn't been assigned yet, so it can't conflict yet. */
2422 gcc_assert (CONSTANT_P (x));
2429 /* Return 1 if altering Y will not modify the value of X.
2430 Y is also described by YDATA, which should be decompose (Y). */
2433 immune_p (rtx x, rtx y, struct decomposition ydata)
2435 struct decomposition xdata;
2438 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2442 gcc_assert (MEM_P (y));
2443 /* If Y is memory and X is not, Y can't affect X. */
2447 xdata = decompose (x);
2449 if (! rtx_equal_p (xdata.base, ydata.base))
2451 /* If bases are distinct symbolic constants, there is no overlap. */
2452 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2454 /* Constants and stack slots never overlap. */
2455 if (CONSTANT_P (xdata.base)
2456 && (ydata.base == frame_pointer_rtx
2457 || ydata.base == hard_frame_pointer_rtx
2458 || ydata.base == stack_pointer_rtx))
2460 if (CONSTANT_P (ydata.base)
2461 && (xdata.base == frame_pointer_rtx
2462 || xdata.base == hard_frame_pointer_rtx
2463 || xdata.base == stack_pointer_rtx))
2465 /* If either base is variable, we don't know anything. */
2469 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2472 /* Similar, but calls decompose. */
2475 safe_from_earlyclobber (rtx op, rtx clobber)
2477 struct decomposition early_data;
2479 early_data = decompose (clobber);
2480 return immune_p (op, clobber, early_data);
2483 /* Main entry point of this file: search the body of INSN
2484 for values that need reloading and record them with push_reload.
2485 REPLACE nonzero means record also where the values occur
2486 so that subst_reloads can be used.
2488 IND_LEVELS says how many levels of indirection are supported by this
2489 machine; a value of zero means that a memory reference is not a valid
2492 LIVE_KNOWN says we have valid information about which hard
2493 regs are live at each point in the program; this is true when
2494 we are called from global_alloc but false when stupid register
2495 allocation has been done.
2497 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2498 which is nonnegative if the reg has been commandeered for reloading into.
2499 It is copied into STATIC_RELOAD_REG_P and referenced from there
2500 by various subroutines.
2502 Return TRUE if some operands need to be changed, because of swapping
2503 commutative operands, reg_equiv_address substitution, or whatever. */
2506 find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2507 short *reload_reg_p)
2509 int insn_code_number;
2512 /* These start out as the constraints for the insn
2513 and they are chewed up as we consider alternatives. */
2514 char *constraints[MAX_RECOG_OPERANDS];
2515 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2517 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2518 char pref_or_nothing[MAX_RECOG_OPERANDS];
2519 /* Nonzero for a MEM operand whose entire address needs a reload.
2520 May be -1 to indicate the entire address may or may not need a reload. */
2521 int address_reloaded[MAX_RECOG_OPERANDS];
2522 /* Nonzero for an address operand that needs to be completely reloaded.
2523 May be -1 to indicate the entire operand may or may not need a reload. */
2524 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2525 /* Value of enum reload_type to use for operand. */
2526 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2527 /* Value of enum reload_type to use within address of operand. */
2528 enum reload_type address_type[MAX_RECOG_OPERANDS];
2529 /* Save the usage of each operand. */
2530 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2531 int no_input_reloads = 0, no_output_reloads = 0;
2533 int this_alternative[MAX_RECOG_OPERANDS];
2534 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2535 char this_alternative_win[MAX_RECOG_OPERANDS];
2536 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2537 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2538 int this_alternative_matches[MAX_RECOG_OPERANDS];
2540 int goal_alternative[MAX_RECOG_OPERANDS];
2541 int this_alternative_number;
2542 int goal_alternative_number = 0;
2543 int operand_reloadnum[MAX_RECOG_OPERANDS];
2544 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2545 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2546 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2547 char goal_alternative_win[MAX_RECOG_OPERANDS];
2548 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2549 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2550 int goal_alternative_swapped;
2553 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2554 rtx substed_operand[MAX_RECOG_OPERANDS];
2555 rtx body = PATTERN (insn);
2556 rtx set = single_set (insn);
2557 int goal_earlyclobber = 0, this_earlyclobber;
2558 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2564 n_earlyclobbers = 0;
2565 replace_reloads = replace;
2566 hard_regs_live_known = live_known;
2567 static_reload_reg_p = reload_reg_p;
2569 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2570 neither are insns that SET cc0. Insns that use CC0 are not allowed
2571 to have any input reloads. */
2572 if (JUMP_P (insn) || CALL_P (insn))
2573 no_output_reloads = 1;
2576 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2577 no_input_reloads = 1;
2578 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2579 no_output_reloads = 1;
2582 #ifdef SECONDARY_MEMORY_NEEDED
2583 /* The eliminated forms of any secondary memory locations are per-insn, so
2584 clear them out here. */
2586 if (secondary_memlocs_elim_used)
2588 memset (secondary_memlocs_elim, 0,
2589 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2590 secondary_memlocs_elim_used = 0;
2594 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2595 is cheap to move between them. If it is not, there may not be an insn
2596 to do the copy, so we may need a reload. */
2597 if (GET_CODE (body) == SET
2598 && REG_P (SET_DEST (body))
2599 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2600 && REG_P (SET_SRC (body))
2601 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2602 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2603 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2604 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2607 extract_insn (insn);
2609 noperands = reload_n_operands = recog_data.n_operands;
2610 n_alternatives = recog_data.n_alternatives;
2612 /* Just return "no reloads" if insn has no operands with constraints. */
2613 if (noperands == 0 || n_alternatives == 0)
2616 insn_code_number = INSN_CODE (insn);
2617 this_insn_is_asm = insn_code_number < 0;
2619 memcpy (operand_mode, recog_data.operand_mode,
2620 noperands * sizeof (enum machine_mode));
2621 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2625 /* If we will need to know, later, whether some pair of operands
2626 are the same, we must compare them now and save the result.
2627 Reloading the base and index registers will clobber them
2628 and afterward they will fail to match. */
2630 for (i = 0; i < noperands; i++)
2635 substed_operand[i] = recog_data.operand[i];
2638 modified[i] = RELOAD_READ;
2640 /* Scan this operand's constraint to see if it is an output operand,
2641 an in-out operand, is commutative, or should match another. */
2645 p += CONSTRAINT_LEN (c, p);
2649 modified[i] = RELOAD_WRITE;
2652 modified[i] = RELOAD_READ_WRITE;
2656 /* The last operand should not be marked commutative. */
2657 gcc_assert (i != noperands - 1);
2659 /* We currently only support one commutative pair of
2660 operands. Some existing asm code currently uses more
2661 than one pair. Previously, that would usually work,
2662 but sometimes it would crash the compiler. We
2663 continue supporting that case as well as we can by
2664 silently ignoring all but the first pair. In the
2665 future we may handle it correctly. */
2666 if (commutative < 0)
2669 gcc_assert (this_insn_is_asm);
2672 /* Use of ISDIGIT is tempting here, but it may get expensive because
2673 of locale support we don't want. */
2674 case '0': case '1': case '2': case '3': case '4':
2675 case '5': case '6': case '7': case '8': case '9':
2677 c = strtoul (p - 1, &p, 10);
2679 operands_match[c][i]
2680 = operands_match_p (recog_data.operand[c],
2681 recog_data.operand[i]);
2683 /* An operand may not match itself. */
2684 gcc_assert (c != i);
2686 /* If C can be commuted with C+1, and C might need to match I,
2687 then C+1 might also need to match I. */
2688 if (commutative >= 0)
2690 if (c == commutative || c == commutative + 1)
2692 int other = c + (c == commutative ? 1 : -1);
2693 operands_match[other][i]
2694 = operands_match_p (recog_data.operand[other],
2695 recog_data.operand[i]);
2697 if (i == commutative || i == commutative + 1)
2699 int other = i + (i == commutative ? 1 : -1);
2700 operands_match[c][other]
2701 = operands_match_p (recog_data.operand[c],
2702 recog_data.operand[other]);
2704 /* Note that C is supposed to be less than I.
2705 No need to consider altering both C and I because in
2706 that case we would alter one into the other. */
2713 /* Examine each operand that is a memory reference or memory address
2714 and reload parts of the addresses into index registers.
2715 Also here any references to pseudo regs that didn't get hard regs
2716 but are equivalent to constants get replaced in the insn itself
2717 with those constants. Nobody will ever see them again.
2719 Finally, set up the preferred classes of each operand. */
2721 for (i = 0; i < noperands; i++)
2723 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2725 address_reloaded[i] = 0;
2726 address_operand_reloaded[i] = 0;
2727 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2728 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2731 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2732 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2735 if (*constraints[i] == 0)
2736 /* Ignore things like match_operator operands. */
2738 else if (constraints[i][0] == 'p'
2739 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2741 address_operand_reloaded[i]
2742 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2743 recog_data.operand[i],
2744 recog_data.operand_loc[i],
2745 i, operand_type[i], ind_levels, insn);
2747 /* If we now have a simple operand where we used to have a
2748 PLUS or MULT, re-recognize and try again. */
2749 if ((OBJECT_P (*recog_data.operand_loc[i])
2750 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2751 && (GET_CODE (recog_data.operand[i]) == MULT
2752 || GET_CODE (recog_data.operand[i]) == PLUS))
2754 INSN_CODE (insn) = -1;
2755 retval = find_reloads (insn, replace, ind_levels, live_known,
2760 recog_data.operand[i] = *recog_data.operand_loc[i];
2761 substed_operand[i] = recog_data.operand[i];
2763 /* Address operands are reloaded in their existing mode,
2764 no matter what is specified in the machine description. */
2765 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2767 else if (code == MEM)
2770 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2771 recog_data.operand_loc[i],
2772 XEXP (recog_data.operand[i], 0),
2773 &XEXP (recog_data.operand[i], 0),
2774 i, address_type[i], ind_levels, insn);
2775 recog_data.operand[i] = *recog_data.operand_loc[i];
2776 substed_operand[i] = recog_data.operand[i];
2778 else if (code == SUBREG)
2780 rtx reg = SUBREG_REG (recog_data.operand[i]);
2782 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2785 && &SET_DEST (set) == recog_data.operand_loc[i],
2787 &address_reloaded[i]);
2789 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2790 that didn't get a hard register, emit a USE with a REG_EQUAL
2791 note in front so that we might inherit a previous, possibly
2797 && (GET_MODE_SIZE (GET_MODE (reg))
2798 >= GET_MODE_SIZE (GET_MODE (op))))
2799 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2801 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2803 substed_operand[i] = recog_data.operand[i] = op;
2805 else if (code == PLUS || GET_RTX_CLASS (code) == RTX_UNARY)
2806 /* We can get a PLUS as an "operand" as a result of register
2807 elimination. See eliminate_regs and gen_reload. We handle
2808 a unary operator by reloading the operand. */
2809 substed_operand[i] = recog_data.operand[i]
2810 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2811 ind_levels, 0, insn,
2812 &address_reloaded[i]);
2813 else if (code == REG)
2815 /* This is equivalent to calling find_reloads_toplev.
2816 The code is duplicated for speed.
2817 When we find a pseudo always equivalent to a constant,
2818 we replace it by the constant. We must be sure, however,
2819 that we don't try to replace it in the insn in which it
2821 int regno = REGNO (recog_data.operand[i]);
2822 if (reg_equiv_constant[regno] != 0
2823 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2825 /* Record the existing mode so that the check if constants are
2826 allowed will work when operand_mode isn't specified. */
2828 if (operand_mode[i] == VOIDmode)
2829 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2831 substed_operand[i] = recog_data.operand[i]
2832 = reg_equiv_constant[regno];
2834 if (reg_equiv_memory_loc[regno] != 0
2835 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2836 /* We need not give a valid is_set_dest argument since the case
2837 of a constant equivalence was checked above. */
2838 substed_operand[i] = recog_data.operand[i]
2839 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2840 ind_levels, 0, insn,
2841 &address_reloaded[i]);
2843 /* If the operand is still a register (we didn't replace it with an
2844 equivalent), get the preferred class to reload it into. */
2845 code = GET_CODE (recog_data.operand[i]);
2847 = ((code == REG && REGNO (recog_data.operand[i])
2848 >= FIRST_PSEUDO_REGISTER)
2849 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2853 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2854 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2857 /* If this is simply a copy from operand 1 to operand 0, merge the
2858 preferred classes for the operands. */
2859 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2860 && recog_data.operand[1] == SET_SRC (set))
2862 preferred_class[0] = preferred_class[1]
2863 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2864 pref_or_nothing[0] |= pref_or_nothing[1];
2865 pref_or_nothing[1] |= pref_or_nothing[0];
2868 /* Now see what we need for pseudo-regs that didn't get hard regs
2869 or got the wrong kind of hard reg. For this, we must consider
2870 all the operands together against the register constraints. */
2872 best = MAX_RECOG_OPERANDS * 2 + 600;
2875 goal_alternative_swapped = 0;
2878 /* The constraints are made of several alternatives.
2879 Each operand's constraint looks like foo,bar,... with commas
2880 separating the alternatives. The first alternatives for all
2881 operands go together, the second alternatives go together, etc.
2883 First loop over alternatives. */
2885 for (this_alternative_number = 0;
2886 this_alternative_number < n_alternatives;
2887 this_alternative_number++)
2889 /* Loop over operands for one constraint alternative. */
2890 /* LOSERS counts those that don't fit this alternative
2891 and would require loading. */
2893 /* BAD is set to 1 if it some operand can't fit this alternative
2894 even after reloading. */
2896 /* REJECT is a count of how undesirable this alternative says it is
2897 if any reloading is required. If the alternative matches exactly
2898 then REJECT is ignored, but otherwise it gets this much
2899 counted against it in addition to the reloading needed. Each
2900 ? counts three times here since we want the disparaging caused by
2901 a bad register class to only count 1/3 as much. */
2904 this_earlyclobber = 0;
2906 for (i = 0; i < noperands; i++)
2908 char *p = constraints[i];
2913 /* 0 => this operand can be reloaded somehow for this alternative. */
2915 /* 0 => this operand can be reloaded if the alternative allows regs. */
2919 rtx operand = recog_data.operand[i];
2921 /* Nonzero means this is a MEM that must be reloaded into a reg
2922 regardless of what the constraint says. */
2923 int force_reload = 0;
2925 /* Nonzero if a constant forced into memory would be OK for this
2928 int earlyclobber = 0;
2930 /* If the predicate accepts a unary operator, it means that
2931 we need to reload the operand, but do not do this for
2932 match_operator and friends. */
2933 if (UNARY_P (operand) && *p != 0)
2934 operand = XEXP (operand, 0);
2936 /* If the operand is a SUBREG, extract
2937 the REG or MEM (or maybe even a constant) within.
2938 (Constants can occur as a result of reg_equiv_constant.) */
2940 while (GET_CODE (operand) == SUBREG)
2942 /* Offset only matters when operand is a REG and
2943 it is a hard reg. This is because it is passed
2944 to reg_fits_class_p if it is a REG and all pseudos
2945 return 0 from that function. */
2946 if (REG_P (SUBREG_REG (operand))
2947 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2949 if (!subreg_offset_representable_p
2950 (REGNO (SUBREG_REG (operand)),
2951 GET_MODE (SUBREG_REG (operand)),
2952 SUBREG_BYTE (operand),
2953 GET_MODE (operand)))
2955 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2956 GET_MODE (SUBREG_REG (operand)),
2957 SUBREG_BYTE (operand),
2958 GET_MODE (operand));
2960 operand = SUBREG_REG (operand);
2961 /* Force reload if this is a constant or PLUS or if there may
2962 be a problem accessing OPERAND in the outer mode. */
2963 if (CONSTANT_P (operand)
2964 || GET_CODE (operand) == PLUS
2965 /* We must force a reload of paradoxical SUBREGs
2966 of a MEM because the alignment of the inner value
2967 may not be enough to do the outer reference. On
2968 big-endian machines, it may also reference outside
2971 On machines that extend byte operations and we have a
2972 SUBREG where both the inner and outer modes are no wider
2973 than a word and the inner mode is narrower, is integral,
2974 and gets extended when loaded from memory, combine.c has
2975 made assumptions about the behavior of the machine in such
2976 register access. If the data is, in fact, in memory we
2977 must always load using the size assumed to be in the
2978 register and let the insn do the different-sized
2981 This is doubly true if WORD_REGISTER_OPERATIONS. In
2982 this case eliminate_regs has left non-paradoxical
2983 subregs for push_reload to see. Make sure it does
2984 by forcing the reload.
2986 ??? When is it right at this stage to have a subreg
2987 of a mem that is _not_ to be handled specially? IMO
2988 those should have been reduced to just a mem. */
2989 || ((MEM_P (operand)
2991 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2992 #ifndef WORD_REGISTER_OPERATIONS
2993 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2994 < BIGGEST_ALIGNMENT)
2995 && (GET_MODE_SIZE (operand_mode[i])
2996 > GET_MODE_SIZE (GET_MODE (operand))))
2998 #ifdef LOAD_EXTEND_OP
2999 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3000 && (GET_MODE_SIZE (GET_MODE (operand))
3002 && (GET_MODE_SIZE (operand_mode[i])
3003 > GET_MODE_SIZE (GET_MODE (operand)))
3004 && INTEGRAL_MODE_P (GET_MODE (operand))
3005 && LOAD_EXTEND_OP (GET_MODE (operand)) != UNKNOWN)
3014 this_alternative[i] = (int) NO_REGS;
3015 this_alternative_win[i] = 0;
3016 this_alternative_match_win[i] = 0;
3017 this_alternative_offmemok[i] = 0;
3018 this_alternative_earlyclobber[i] = 0;
3019 this_alternative_matches[i] = -1;
3021 /* An empty constraint or empty alternative
3022 allows anything which matched the pattern. */
3023 if (*p == 0 || *p == ',')
3026 /* Scan this alternative's specs for this operand;
3027 set WIN if the operand fits any letter in this alternative.
3028 Otherwise, clear BADOP if this operand could
3029 fit some letter after reloads,
3030 or set WINREG if this operand could fit after reloads
3031 provided the constraint allows some registers. */
3034 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
3043 case '=': case '+': case '*':
3047 /* We only support one commutative marker, the first
3048 one. We already set commutative above. */
3060 /* Ignore rest of this alternative as far as
3061 reloading is concerned. */
3064 while (*p && *p != ',');
3068 case '0': case '1': case '2': case '3': case '4':
3069 case '5': case '6': case '7': case '8': case '9':
3070 m = strtoul (p, &end, 10);
3074 this_alternative_matches[i] = m;
3075 /* We are supposed to match a previous operand.
3076 If we do, we win if that one did.
3077 If we do not, count both of the operands as losers.
3078 (This is too conservative, since most of the time
3079 only a single reload insn will be needed to make
3080 the two operands win. As a result, this alternative
3081 may be rejected when it is actually desirable.) */
3082 if ((swapped && (m != commutative || i != commutative + 1))
3083 /* If we are matching as if two operands were swapped,
3084 also pretend that operands_match had been computed
3086 But if I is the second of those and C is the first,
3087 don't exchange them, because operands_match is valid
3088 only on one side of its diagonal. */
3090 [(m == commutative || m == commutative + 1)
3091 ? 2 * commutative + 1 - m : m]
3092 [(i == commutative || i == commutative + 1)
3093 ? 2 * commutative + 1 - i : i])
3094 : operands_match[m][i])
3096 /* If we are matching a non-offsettable address where an
3097 offsettable address was expected, then we must reject
3098 this combination, because we can't reload it. */
3099 if (this_alternative_offmemok[m]
3100 && MEM_P (recog_data.operand[m])
3101 && this_alternative[m] == (int) NO_REGS
3102 && ! this_alternative_win[m])
3105 did_match = this_alternative_win[m];
3109 /* Operands don't match. */
3112 /* Retroactively mark the operand we had to match
3113 as a loser, if it wasn't already. */
3114 if (this_alternative_win[m])
3116 this_alternative_win[m] = 0;
3117 if (this_alternative[m] == (int) NO_REGS)
3119 /* But count the pair only once in the total badness of
3120 this alternative, if the pair can be a dummy reload.
3121 The pointers in operand_loc are not swapped; swap
3122 them by hand if necessary. */
3123 if (swapped && i == commutative)
3124 loc1 = commutative + 1;
3125 else if (swapped && i == commutative + 1)
3129 if (swapped && m == commutative)
3130 loc2 = commutative + 1;
3131 else if (swapped && m == commutative + 1)
3136 = find_dummy_reload (recog_data.operand[i],
3137 recog_data.operand[m],
3138 recog_data.operand_loc[loc1],
3139 recog_data.operand_loc[loc2],
3140 operand_mode[i], operand_mode[m],
3141 this_alternative[m], -1,
3142 this_alternative_earlyclobber[m]);
3147 /* This can be fixed with reloads if the operand
3148 we are supposed to match can be fixed with reloads. */
3150 this_alternative[i] = this_alternative[m];
3152 /* If we have to reload this operand and some previous
3153 operand also had to match the same thing as this
3154 operand, we don't know how to do that. So reject this
3156 if (! did_match || force_reload)
3157 for (j = 0; j < i; j++)
3158 if (this_alternative_matches[j]
3159 == this_alternative_matches[i])
3164 /* All necessary reloads for an address_operand
3165 were handled in find_reloads_address. */
3167 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3177 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3178 && reg_renumber[REGNO (operand)] < 0))
3180 if (CONST_POOL_OK_P (operand))
3187 && ! address_reloaded[i]
3188 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3189 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3195 && ! address_reloaded[i]
3196 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3197 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3201 /* Memory operand whose address is not offsettable. */
3206 && ! (ind_levels ? offsettable_memref_p (operand)
3207 : offsettable_nonstrict_memref_p (operand))
3208 /* Certain mem addresses will become offsettable
3209 after they themselves are reloaded. This is important;
3210 we don't want our own handling of unoffsettables
3211 to override the handling of reg_equiv_address. */
3212 && !(REG_P (XEXP (operand, 0))
3214 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3218 /* Memory operand whose address is offsettable. */
3222 if ((MEM_P (operand)
3223 /* If IND_LEVELS, find_reloads_address won't reload a
3224 pseudo that didn't get a hard reg, so we have to
3225 reject that case. */
3226 && ((ind_levels ? offsettable_memref_p (operand)
3227 : offsettable_nonstrict_memref_p (operand))
3228 /* A reloaded address is offsettable because it is now
3229 just a simple register indirect. */
3230 || address_reloaded[i] == 1))
3232 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3233 && reg_renumber[REGNO (operand)] < 0
3234 /* If reg_equiv_address is nonzero, we will be
3235 loading it into a register; hence it will be
3236 offsettable, but we cannot say that reg_equiv_mem
3237 is offsettable without checking. */
3238 && ((reg_equiv_mem[REGNO (operand)] != 0
3239 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3240 || (reg_equiv_address[REGNO (operand)] != 0))))
3242 if (CONST_POOL_OK_P (operand)
3250 /* Output operand that is stored before the need for the
3251 input operands (and their index registers) is over. */
3252 earlyclobber = 1, this_earlyclobber = 1;
3257 if (GET_CODE (operand) == CONST_DOUBLE
3258 || (GET_CODE (operand) == CONST_VECTOR
3259 && (GET_MODE_CLASS (GET_MODE (operand))
3260 == MODE_VECTOR_FLOAT)))
3266 if (GET_CODE (operand) == CONST_DOUBLE
3267 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3272 if (GET_CODE (operand) == CONST_INT
3273 || (GET_CODE (operand) == CONST_DOUBLE
3274 && GET_MODE (operand) == VOIDmode))
3277 if (CONSTANT_P (operand)
3278 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)))
3283 if (GET_CODE (operand) == CONST_INT
3284 || (GET_CODE (operand) == CONST_DOUBLE
3285 && GET_MODE (operand) == VOIDmode))
3297 if (GET_CODE (operand) == CONST_INT
3298 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3309 /* A PLUS is never a valid operand, but reload can make
3310 it from a register when eliminating registers. */
3311 && GET_CODE (operand) != PLUS
3312 /* A SCRATCH is not a valid operand. */
3313 && GET_CODE (operand) != SCRATCH
3314 && (! CONSTANT_P (operand)
3316 || LEGITIMATE_PIC_OPERAND_P (operand))
3317 && (GENERAL_REGS == ALL_REGS
3319 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3320 && reg_renumber[REGNO (operand)] < 0)))
3322 /* Drop through into 'r' case. */
3326 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3330 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3332 #ifdef EXTRA_CONSTRAINT_STR
3333 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3337 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3339 /* If the address was already reloaded,
3341 else if (MEM_P (operand)
3342 && address_reloaded[i] == 1)
3344 /* Likewise if the address will be reloaded because
3345 reg_equiv_address is nonzero. For reg_equiv_mem
3346 we have to check. */
3347 else if (REG_P (operand)
3348 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3349 && reg_renumber[REGNO (operand)] < 0
3350 && ((reg_equiv_mem[REGNO (operand)] != 0
3351 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3352 || (reg_equiv_address[REGNO (operand)] != 0)))
3355 /* If we didn't already win, we can reload
3356 constants via force_const_mem, and other
3357 MEMs by reloading the address like for 'o'. */
3358 if (CONST_POOL_OK_P (operand)
3365 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3367 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3370 /* If we didn't already win, we can reload
3371 the address into a base register. */
3373 = (int) base_reg_class (VOIDmode, ADDRESS, SCRATCH);
3378 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3385 = (int) (reg_class_subunion
3386 [this_alternative[i]]
3387 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3389 if (GET_MODE (operand) == BLKmode)
3393 && reg_fits_class_p (operand, this_alternative[i],
3394 offset, GET_MODE (recog_data.operand[i])))
3398 while ((p += len), c);
3402 /* If this operand could be handled with a reg,
3403 and some reg is allowed, then this operand can be handled. */
3404 if (winreg && this_alternative[i] != (int) NO_REGS)
3407 /* Record which operands fit this alternative. */
3408 this_alternative_earlyclobber[i] = earlyclobber;
3409 if (win && ! force_reload)
3410 this_alternative_win[i] = 1;
3411 else if (did_match && ! force_reload)
3412 this_alternative_match_win[i] = 1;
3415 int const_to_mem = 0;
3417 this_alternative_offmemok[i] = offmemok;
3421 /* Alternative loses if it has no regs for a reg operand. */
3423 && this_alternative[i] == (int) NO_REGS
3424 && this_alternative_matches[i] < 0)
3427 /* If this is a constant that is reloaded into the desired
3428 class by copying it to memory first, count that as another
3429 reload. This is consistent with other code and is
3430 required to avoid choosing another alternative when
3431 the constant is moved into memory by this function on
3432 an early reload pass. Note that the test here is
3433 precisely the same as in the code below that calls
3435 if (CONST_POOL_OK_P (operand)
3436 && ((PREFERRED_RELOAD_CLASS (operand,
3437 (enum reg_class) this_alternative[i])
3439 || no_input_reloads)
3440 && operand_mode[i] != VOIDmode)
3443 if (this_alternative[i] != (int) NO_REGS)
3447 /* Alternative loses if it requires a type of reload not
3448 permitted for this insn. We can always reload SCRATCH
3449 and objects with a REG_UNUSED note. */
3450 if (GET_CODE (operand) != SCRATCH
3451 && modified[i] != RELOAD_READ && no_output_reloads
3452 && ! find_reg_note (insn, REG_UNUSED, operand))
3454 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3458 /* If we can't reload this value at all, reject this
3459 alternative. Note that we could also lose due to
3460 LIMIT_RELOAD_CLASS, but we don't check that
3463 if (! CONSTANT_P (operand)
3464 && (enum reg_class) this_alternative[i] != NO_REGS)
3466 if (PREFERRED_RELOAD_CLASS
3467 (operand, (enum reg_class) this_alternative[i])
3471 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3472 if (operand_type[i] == RELOAD_FOR_OUTPUT
3473 && PREFERRED_OUTPUT_RELOAD_CLASS
3474 (operand, (enum reg_class) this_alternative[i])
3480 /* We prefer to reload pseudos over reloading other things,
3481 since such reloads may be able to be eliminated later.
3482 If we are reloading a SCRATCH, we won't be generating any
3483 insns, just using a register, so it is also preferred.
3484 So bump REJECT in other cases. Don't do this in the
3485 case where we are forcing a constant into memory and
3486 it will then win since we don't want to have a different
3487 alternative match then. */
3488 if (! (REG_P (operand)
3489 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3490 && GET_CODE (operand) != SCRATCH
3491 && ! (const_to_mem && constmemok))
3494 /* Input reloads can be inherited more often than output
3495 reloads can be removed, so penalize output reloads. */
3496 if (operand_type[i] != RELOAD_FOR_INPUT
3497 && GET_CODE (operand) != SCRATCH)
3501 /* If this operand is a pseudo register that didn't get a hard
3502 reg and this alternative accepts some register, see if the
3503 class that we want is a subset of the preferred class for this
3504 register. If not, but it intersects that class, use the
3505 preferred class instead. If it does not intersect the preferred
3506 class, show that usage of this alternative should be discouraged;
3507 it will be discouraged more still if the register is `preferred
3508 or nothing'. We do this because it increases the chance of
3509 reusing our spill register in a later insn and avoiding a pair
3510 of memory stores and loads.
3512 Don't bother with this if this alternative will accept this
3515 Don't do this for a multiword operand, since it is only a
3516 small win and has the risk of requiring more spill registers,
3517 which could cause a large loss.
3519 Don't do this if the preferred class has only one register
3520 because we might otherwise exhaust the class. */
3522 if (! win && ! did_match
3523 && this_alternative[i] != (int) NO_REGS
3524 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3525 && reg_class_size [(int) preferred_class[i]] > 0
3526 && ! SMALL_REGISTER_CLASS_P (preferred_class[i]))
3528 if (! reg_class_subset_p (this_alternative[i],
3529 preferred_class[i]))
3531 /* Since we don't have a way of forming the intersection,
3532 we just do something special if the preferred class
3533 is a subset of the class we have; that's the most
3534 common case anyway. */
3535 if (reg_class_subset_p (preferred_class[i],
3536 this_alternative[i]))
3537 this_alternative[i] = (int) preferred_class[i];
3539 reject += (2 + 2 * pref_or_nothing[i]);
3544 /* Now see if any output operands that are marked "earlyclobber"
3545 in this alternative conflict with any input operands
3546 or any memory addresses. */
3548 for (i = 0; i < noperands; i++)
3549 if (this_alternative_earlyclobber[i]
3550 && (this_alternative_win[i] || this_alternative_match_win[i]))
3552 struct decomposition early_data;
3554 early_data = decompose (recog_data.operand[i]);
3556 gcc_assert (modified[i] != RELOAD_READ);
3558 if (this_alternative[i] == NO_REGS)
3560 this_alternative_earlyclobber[i] = 0;
3561 gcc_assert (this_insn_is_asm);
3562 error_for_asm (this_insn,
3563 "%<&%> constraint used with no register class");
3566 for (j = 0; j < noperands; j++)
3567 /* Is this an input operand or a memory ref? */
3568 if ((MEM_P (recog_data.operand[j])
3569 || modified[j] != RELOAD_WRITE)
3571 /* Ignore things like match_operator operands. */
3572 && *recog_data.constraints[j] != 0
3573 /* Don't count an input operand that is constrained to match
3574 the early clobber operand. */
3575 && ! (this_alternative_matches[j] == i
3576 && rtx_equal_p (recog_data.operand[i],
3577 recog_data.operand[j]))
3578 /* Is it altered by storing the earlyclobber operand? */
3579 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3582 /* If the output is in a non-empty few-regs class,
3583 it's costly to reload it, so reload the input instead. */
3584 if (SMALL_REGISTER_CLASS_P (this_alternative[i])
3585 && (REG_P (recog_data.operand[j])
3586 || GET_CODE (recog_data.operand[j]) == SUBREG))
3589 this_alternative_win[j] = 0;
3590 this_alternative_match_win[j] = 0;
3595 /* If an earlyclobber operand conflicts with something,
3596 it must be reloaded, so request this and count the cost. */
3600 this_alternative_win[i] = 0;
3601 this_alternative_match_win[j] = 0;
3602 for (j = 0; j < noperands; j++)
3603 if (this_alternative_matches[j] == i
3604 && this_alternative_match_win[j])
3606 this_alternative_win[j] = 0;
3607 this_alternative_match_win[j] = 0;
3613 /* If one alternative accepts all the operands, no reload required,
3614 choose that alternative; don't consider the remaining ones. */
3617 /* Unswap these so that they are never swapped at `finish'. */
3618 if (commutative >= 0)
3620 recog_data.operand[commutative] = substed_operand[commutative];
3621 recog_data.operand[commutative + 1]
3622 = substed_operand[commutative + 1];
3624 for (i = 0; i < noperands; i++)
3626 goal_alternative_win[i] = this_alternative_win[i];
3627 goal_alternative_match_win[i] = this_alternative_match_win[i];
3628 goal_alternative[i] = this_alternative[i];
3629 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3630 goal_alternative_matches[i] = this_alternative_matches[i];
3631 goal_alternative_earlyclobber[i]
3632 = this_alternative_earlyclobber[i];
3634 goal_alternative_number = this_alternative_number;
3635 goal_alternative_swapped = swapped;
3636 goal_earlyclobber = this_earlyclobber;
3640 /* REJECT, set by the ! and ? constraint characters and when a register
3641 would be reloaded into a non-preferred class, discourages the use of
3642 this alternative for a reload goal. REJECT is incremented by six
3643 for each ? and two for each non-preferred class. */
3644 losers = losers * 6 + reject;
3646 /* If this alternative can be made to work by reloading,
3647 and it needs less reloading than the others checked so far,
3648 record it as the chosen goal for reloading. */
3649 if (! bad && best > losers)
3651 for (i = 0; i < noperands; i++)
3653 goal_alternative[i] = this_alternative[i];
3654 goal_alternative_win[i] = this_alternative_win[i];
3655 goal_alternative_match_win[i] = this_alternative_match_win[i];
3656 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3657 goal_alternative_matches[i] = this_alternative_matches[i];
3658 goal_alternative_earlyclobber[i]
3659 = this_alternative_earlyclobber[i];
3661 goal_alternative_swapped = swapped;
3663 goal_alternative_number = this_alternative_number;
3664 goal_earlyclobber = this_earlyclobber;
3668 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3669 then we need to try each alternative twice,
3670 the second time matching those two operands
3671 as if we had exchanged them.
3672 To do this, really exchange them in operands.
3674 If we have just tried the alternatives the second time,
3675 return operands to normal and drop through. */
3677 if (commutative >= 0)
3682 enum reg_class tclass;
3685 recog_data.operand[commutative] = substed_operand[commutative + 1];
3686 recog_data.operand[commutative + 1] = substed_operand[commutative];
3687 /* Swap the duplicates too. */
3688 for (i = 0; i < recog_data.n_dups; i++)
3689 if (recog_data.dup_num[i] == commutative
3690 || recog_data.dup_num[i] == commutative + 1)
3691 *recog_data.dup_loc[i]
3692 = recog_data.operand[(int) recog_data.dup_num[i]];
3694 tclass = preferred_class[commutative];
3695 preferred_class[commutative] = preferred_class[commutative + 1];
3696 preferred_class[commutative + 1] = tclass;
3698 t = pref_or_nothing[commutative];
3699 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3700 pref_or_nothing[commutative + 1] = t;
3702 t = address_reloaded[commutative];
3703 address_reloaded[commutative] = address_reloaded[commutative + 1];
3704 address_reloaded[commutative + 1] = t;
3706 memcpy (constraints, recog_data.constraints,
3707 noperands * sizeof (char *));
3712 recog_data.operand[commutative] = substed_operand[commutative];
3713 recog_data.operand[commutative + 1]
3714 = substed_operand[commutative + 1];
3715 /* Unswap the duplicates too. */
3716 for (i = 0; i < recog_data.n_dups; i++)
3717 if (recog_data.dup_num[i] == commutative
3718 || recog_data.dup_num[i] == commutative + 1)
3719 *recog_data.dup_loc[i]
3720 = recog_data.operand[(int) recog_data.dup_num[i]];
3724 /* The operands don't meet the constraints.
3725 goal_alternative describes the alternative
3726 that we could reach by reloading the fewest operands.
3727 Reload so as to fit it. */
3729 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3731 /* No alternative works with reloads?? */
3732 if (insn_code_number >= 0)
3733 fatal_insn ("unable to generate reloads for:", insn);
3734 error_for_asm (insn, "inconsistent operand constraints in an %<asm%>");
3735 /* Avoid further trouble with this insn. */
3736 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3741 /* Jump to `finish' from above if all operands are valid already.
3742 In that case, goal_alternative_win is all 1. */
3745 /* Right now, for any pair of operands I and J that are required to match,
3747 goal_alternative_matches[J] is I.
3748 Set up goal_alternative_matched as the inverse function:
3749 goal_alternative_matched[I] = J. */
3751 for (i = 0; i < noperands; i++)
3752 goal_alternative_matched[i] = -1;
3754 for (i = 0; i < noperands; i++)
3755 if (! goal_alternative_win[i]
3756 && goal_alternative_matches[i] >= 0)
3757 goal_alternative_matched[goal_alternative_matches[i]] = i;
3759 for (i = 0; i < noperands; i++)
3760 goal_alternative_win[i] |= goal_alternative_match_win[i];
3762 /* If the best alternative is with operands 1 and 2 swapped,
3763 consider them swapped before reporting the reloads. Update the
3764 operand numbers of any reloads already pushed. */
3766 if (goal_alternative_swapped)
3770 tem = substed_operand[commutative];
3771 substed_operand[commutative] = substed_operand[commutative + 1];
3772 substed_operand[commutative + 1] = tem;
3773 tem = recog_data.operand[commutative];
3774 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3775 recog_data.operand[commutative + 1] = tem;
3776 tem = *recog_data.operand_loc[commutative];
3777 *recog_data.operand_loc[commutative]
3778 = *recog_data.operand_loc[commutative + 1];
3779 *recog_data.operand_loc[commutative + 1] = tem;
3781 for (i = 0; i < n_reloads; i++)
3783 if (rld[i].opnum == commutative)
3784 rld[i].opnum = commutative + 1;
3785 else if (rld[i].opnum == commutative + 1)
3786 rld[i].opnum = commutative;
3790 for (i = 0; i < noperands; i++)
3792 operand_reloadnum[i] = -1;
3794 /* If this is an earlyclobber operand, we need to widen the scope.
3795 The reload must remain valid from the start of the insn being
3796 reloaded until after the operand is stored into its destination.
3797 We approximate this with RELOAD_OTHER even though we know that we
3798 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3800 One special case that is worth checking is when we have an
3801 output that is earlyclobber but isn't used past the insn (typically
3802 a SCRATCH). In this case, we only need have the reload live
3803 through the insn itself, but not for any of our input or output
3805 But we must not accidentally narrow the scope of an existing
3806 RELOAD_OTHER reload - leave these alone.
3808 In any case, anything needed to address this operand can remain
3809 however they were previously categorized. */
3811 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3813 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3814 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3817 /* Any constants that aren't allowed and can't be reloaded
3818 into registers are here changed into memory references. */
3819 for (i = 0; i < noperands; i++)
3820 if (! goal_alternative_win[i]
3821 && CONST_POOL_OK_P (recog_data.operand[i])
3822 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3823 (enum reg_class) goal_alternative[i])
3825 || no_input_reloads)
3826 && operand_mode[i] != VOIDmode)
3828 substed_operand[i] = recog_data.operand[i]
3829 = find_reloads_toplev (force_const_mem (operand_mode[i],
3830 recog_data.operand[i]),
3831 i, address_type[i], ind_levels, 0, insn,
3833 if (alternative_allows_memconst (recog_data.constraints[i],
3834 goal_alternative_number))
3835 goal_alternative_win[i] = 1;
3838 /* Likewise any invalid constants appearing as operand of a PLUS
3839 that is to be reloaded. */
3840 for (i = 0; i < noperands; i++)
3841 if (! goal_alternative_win[i]
3842 && GET_CODE (recog_data.operand[i]) == PLUS
3843 && CONST_POOL_OK_P (XEXP (recog_data.operand[i], 1))
3844 && (PREFERRED_RELOAD_CLASS (XEXP (recog_data.operand[i], 1),
3845 (enum reg_class) goal_alternative[i])
3847 && operand_mode[i] != VOIDmode)
3849 rtx tem = force_const_mem (operand_mode[i],
3850 XEXP (recog_data.operand[i], 1));
3851 tem = gen_rtx_PLUS (operand_mode[i],
3852 XEXP (recog_data.operand[i], 0), tem);
3854 substed_operand[i] = recog_data.operand[i]
3855 = find_reloads_toplev (tem, i, address_type[i],
3856 ind_levels, 0, insn, NULL);
3859 /* Record the values of the earlyclobber operands for the caller. */
3860 if (goal_earlyclobber)
3861 for (i = 0; i < noperands; i++)
3862 if (goal_alternative_earlyclobber[i])
3863 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3865 /* Now record reloads for all the operands that need them. */
3866 for (i = 0; i < noperands; i++)
3867 if (! goal_alternative_win[i])
3869 /* Operands that match previous ones have already been handled. */
3870 if (goal_alternative_matches[i] >= 0)
3872 /* Handle an operand with a nonoffsettable address
3873 appearing where an offsettable address will do
3874 by reloading the address into a base register.
3876 ??? We can also do this when the operand is a register and
3877 reg_equiv_mem is not offsettable, but this is a bit tricky,
3878 so we don't bother with it. It may not be worth doing. */
3879 else if (goal_alternative_matched[i] == -1
3880 && goal_alternative_offmemok[i]
3881 && MEM_P (recog_data.operand[i]))
3883 /* If the address to be reloaded is a VOIDmode constant,
3884 use Pmode as mode of the reload register, as would have
3885 been done by find_reloads_address. */
3886 enum machine_mode address_mode;
3887 address_mode = GET_MODE (XEXP (recog_data.operand[i], 0));
3888 if (address_mode == VOIDmode)
3889 address_mode = Pmode;
3891 operand_reloadnum[i]
3892 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3893 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3894 base_reg_class (VOIDmode, MEM, SCRATCH),
3896 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3897 rld[operand_reloadnum[i]].inc
3898 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3900 /* If this operand is an output, we will have made any
3901 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3902 now we are treating part of the operand as an input, so
3903 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3905 if (modified[i] == RELOAD_WRITE)
3907 for (j = 0; j < n_reloads; j++)
3909 if (rld[j].opnum == i)
3911 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3912 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3913 else if (rld[j].when_needed
3914 == RELOAD_FOR_OUTADDR_ADDRESS)
3915 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3920 else if (goal_alternative_matched[i] == -1)
3922 operand_reloadnum[i]
3923 = push_reload ((modified[i] != RELOAD_WRITE
3924 ? recog_data.operand[i] : 0),
3925 (modified[i] != RELOAD_READ
3926 ? recog_data.operand[i] : 0),
3927 (modified[i] != RELOAD_WRITE
3928 ? recog_data.operand_loc[i] : 0),
3929 (modified[i] != RELOAD_READ
3930 ? recog_data.operand_loc[i] : 0),
3931 (enum reg_class) goal_alternative[i],
3932 (modified[i] == RELOAD_WRITE
3933 ? VOIDmode : operand_mode[i]),
3934 (modified[i] == RELOAD_READ
3935 ? VOIDmode : operand_mode[i]),
3936 (insn_code_number < 0 ? 0
3937 : insn_data[insn_code_number].operand[i].strict_low),
3938 0, i, operand_type[i]);
3940 /* In a matching pair of operands, one must be input only
3941 and the other must be output only.
3942 Pass the input operand as IN and the other as OUT. */
3943 else if (modified[i] == RELOAD_READ
3944 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3946 operand_reloadnum[i]
3947 = push_reload (recog_data.operand[i],
3948 recog_data.operand[goal_alternative_matched[i]],
3949 recog_data.operand_loc[i],
3950 recog_data.operand_loc[goal_alternative_matched[i]],
3951 (enum reg_class) goal_alternative[i],
3953 operand_mode[goal_alternative_matched[i]],
3954 0, 0, i, RELOAD_OTHER);
3955 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3957 else if (modified[i] == RELOAD_WRITE
3958 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3960 operand_reloadnum[goal_alternative_matched[i]]
3961 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3962 recog_data.operand[i],
3963 recog_data.operand_loc[goal_alternative_matched[i]],
3964 recog_data.operand_loc[i],
3965 (enum reg_class) goal_alternative[i],
3966 operand_mode[goal_alternative_matched[i]],
3968 0, 0, i, RELOAD_OTHER);
3969 operand_reloadnum[i] = output_reloadnum;
3973 gcc_assert (insn_code_number < 0);
3974 error_for_asm (insn, "inconsistent operand constraints "
3976 /* Avoid further trouble with this insn. */
3977 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3982 else if (goal_alternative_matched[i] < 0
3983 && goal_alternative_matches[i] < 0
3984 && address_operand_reloaded[i] != 1
3987 /* For each non-matching operand that's a MEM or a pseudo-register
3988 that didn't get a hard register, make an optional reload.
3989 This may get done even if the insn needs no reloads otherwise. */
3991 rtx operand = recog_data.operand[i];
3993 while (GET_CODE (operand) == SUBREG)
3994 operand = SUBREG_REG (operand);
3995 if ((MEM_P (operand)
3997 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3998 /* If this is only for an output, the optional reload would not
3999 actually cause us to use a register now, just note that
4000 something is stored here. */
4001 && ((enum reg_class) goal_alternative[i] != NO_REGS
4002 || modified[i] == RELOAD_WRITE)
4003 && ! no_input_reloads
4004 /* An optional output reload might allow to delete INSN later.
4005 We mustn't make in-out reloads on insns that are not permitted
4007 If this is an asm, we can't delete it; we must not even call
4008 push_reload for an optional output reload in this case,
4009 because we can't be sure that the constraint allows a register,
4010 and push_reload verifies the constraints for asms. */
4011 && (modified[i] == RELOAD_READ
4012 || (! no_output_reloads && ! this_insn_is_asm)))
4013 operand_reloadnum[i]
4014 = push_reload ((modified[i] != RELOAD_WRITE
4015 ? recog_data.operand[i] : 0),
4016 (modified[i] != RELOAD_READ
4017 ? recog_data.operand[i] : 0),
4018 (modified[i] != RELOAD_WRITE
4019 ? recog_data.operand_loc[i] : 0),
4020 (modified[i] != RELOAD_READ
4021 ? recog_data.operand_loc[i] : 0),
4022 (enum reg_class) goal_alternative[i],
4023 (modified[i] == RELOAD_WRITE
4024 ? VOIDmode : operand_mode[i]),
4025 (modified[i] == RELOAD_READ
4026 ? VOIDmode : operand_mode[i]),
4027 (insn_code_number < 0 ? 0
4028 : insn_data[insn_code_number].operand[i].strict_low),
4029 1, i, operand_type[i]);
4030 /* If a memory reference remains (either as a MEM or a pseudo that
4031 did not get a hard register), yet we can't make an optional
4032 reload, check if this is actually a pseudo register reference;
4033 we then need to emit a USE and/or a CLOBBER so that reload
4034 inheritance will do the right thing. */
4038 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
4039 && reg_renumber [REGNO (operand)] < 0)))
4041 operand = *recog_data.operand_loc[i];
4043 while (GET_CODE (operand) == SUBREG)
4044 operand = SUBREG_REG (operand);
4045 if (REG_P (operand))
4047 if (modified[i] != RELOAD_WRITE)
4048 /* We mark the USE with QImode so that we recognize
4049 it as one that can be safely deleted at the end
4051 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
4053 if (modified[i] != RELOAD_READ)
4054 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
4058 else if (goal_alternative_matches[i] >= 0
4059 && goal_alternative_win[goal_alternative_matches[i]]
4060 && modified[i] == RELOAD_READ
4061 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
4062 && ! no_input_reloads && ! no_output_reloads
4065 /* Similarly, make an optional reload for a pair of matching
4066 objects that are in MEM or a pseudo that didn't get a hard reg. */
4068 rtx operand = recog_data.operand[i];
4070 while (GET_CODE (operand) == SUBREG)
4071 operand = SUBREG_REG (operand);
4072 if ((MEM_P (operand)
4074 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
4075 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
4077 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
4078 = push_reload (recog_data.operand[goal_alternative_matches[i]],
4079 recog_data.operand[i],
4080 recog_data.operand_loc[goal_alternative_matches[i]],
4081 recog_data.operand_loc[i],
4082 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
4083 operand_mode[goal_alternative_matches[i]],
4085 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
4088 /* Perform whatever substitutions on the operands we are supposed
4089 to make due to commutativity or replacement of registers
4090 with equivalent constants or memory slots. */
4092 for (i = 0; i < noperands; i++)
4094 /* We only do this on the last pass through reload, because it is
4095 possible for some data (like reg_equiv_address) to be changed during
4096 later passes. Moreover, we lose the opportunity to get a useful
4097 reload_{in,out}_reg when we do these replacements. */
4101 rtx substitution = substed_operand[i];
4103 *recog_data.operand_loc[i] = substitution;
4105 /* If we're replacing an operand with a LABEL_REF, we need
4106 to make sure that there's a REG_LABEL note attached to
4107 this instruction. */
4109 && GET_CODE (substitution) == LABEL_REF
4110 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
4111 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
4112 XEXP (substitution, 0),
4116 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
4119 /* If this insn pattern contains any MATCH_DUP's, make sure that
4120 they will be substituted if the operands they match are substituted.
4121 Also do now any substitutions we already did on the operands.
4123 Don't do this if we aren't making replacements because we might be
4124 propagating things allocated by frame pointer elimination into places
4125 it doesn't expect. */
4127 if (insn_code_number >= 0 && replace)
4128 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
4130 int opno = recog_data.dup_num[i];
4131 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4132 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4136 /* This loses because reloading of prior insns can invalidate the equivalence
4137 (or at least find_equiv_reg isn't smart enough to find it any more),
4138 causing this insn to need more reload regs than it needed before.
4139 It may be too late to make the reload regs available.
4140 Now this optimization is done safely in choose_reload_regs. */
4142 /* For each reload of a reg into some other class of reg,
4143 search for an existing equivalent reg (same value now) in the right class.
4144 We can use it as long as we don't need to change its contents. */
4145 for (i = 0; i < n_reloads; i++)
4146 if (rld[i].reg_rtx == 0
4148 && REG_P (rld[i].in)
4152 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4153 static_reload_reg_p, 0, rld[i].inmode);
4154 /* Prevent generation of insn to load the value
4155 because the one we found already has the value. */
4157 rld[i].in = rld[i].reg_rtx;
4161 /* If we detected error and replaced asm instruction by USE, forget about the
4163 if (GET_CODE (PATTERN (insn)) == USE
4164 && GET_CODE (XEXP (PATTERN (insn), 0)) == CONST_INT)
4167 /* Perhaps an output reload can be combined with another
4168 to reduce needs by one. */
4169 if (!goal_earlyclobber)
4172 /* If we have a pair of reloads for parts of an address, they are reloading
4173 the same object, the operands themselves were not reloaded, and they
4174 are for two operands that are supposed to match, merge the reloads and
4175 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4177 for (i = 0; i < n_reloads; i++)
4181 for (j = i + 1; j < n_reloads; j++)
4182 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4183 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4184 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4185 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4186 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4187 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4188 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4189 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4190 && rtx_equal_p (rld[i].in, rld[j].in)
4191 && (operand_reloadnum[rld[i].opnum] < 0
4192 || rld[operand_reloadnum[rld[i].opnum]].optional)
4193 && (operand_reloadnum[rld[j].opnum] < 0
4194 || rld[operand_reloadnum[rld[j].opnum]].optional)
4195 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4196 || (goal_alternative_matches[rld[j].opnum]
4199 for (k = 0; k < n_replacements; k++)
4200 if (replacements[k].what == j)
4201 replacements[k].what = i;
4203 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4204 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4205 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4207 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4212 /* Scan all the reloads and update their type.
4213 If a reload is for the address of an operand and we didn't reload
4214 that operand, change the type. Similarly, change the operand number
4215 of a reload when two operands match. If a reload is optional, treat it
4216 as though the operand isn't reloaded.
4218 ??? This latter case is somewhat odd because if we do the optional
4219 reload, it means the object is hanging around. Thus we need only
4220 do the address reload if the optional reload was NOT done.
4222 Change secondary reloads to be the address type of their operand, not
4225 If an operand's reload is now RELOAD_OTHER, change any
4226 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4227 RELOAD_FOR_OTHER_ADDRESS. */
4229 for (i = 0; i < n_reloads; i++)
4231 if (rld[i].secondary_p
4232 && rld[i].when_needed == operand_type[rld[i].opnum])
4233 rld[i].when_needed = address_type[rld[i].opnum];
4235 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4236 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4237 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4238 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4239 && (operand_reloadnum[rld[i].opnum] < 0
4240 || rld[operand_reloadnum[rld[i].opnum]].optional))
4242 /* If we have a secondary reload to go along with this reload,
4243 change its type to RELOAD_FOR_OPADDR_ADDR. */
4245 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4246 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4247 && rld[i].secondary_in_reload != -1)
4249 int secondary_in_reload = rld[i].secondary_in_reload;
4251 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4253 /* If there's a tertiary reload we have to change it also. */
4254 if (secondary_in_reload > 0
4255 && rld[secondary_in_reload].secondary_in_reload != -1)
4256 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4257 = RELOAD_FOR_OPADDR_ADDR;
4260 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4261 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4262 && rld[i].secondary_out_reload != -1)
4264 int secondary_out_reload = rld[i].secondary_out_reload;
4266 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4268 /* If there's a tertiary reload we have to change it also. */
4269 if (secondary_out_reload
4270 && rld[secondary_out_reload].secondary_out_reload != -1)
4271 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4272 = RELOAD_FOR_OPADDR_ADDR;
4275 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4276 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4277 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4279 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4282 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4283 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4284 && operand_reloadnum[rld[i].opnum] >= 0
4285 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4287 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4289 if (goal_alternative_matches[rld[i].opnum] >= 0)
4290 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4293 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4294 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4295 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4297 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4298 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4299 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4300 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4301 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4302 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4303 This is complicated by the fact that a single operand can have more
4304 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4305 choose_reload_regs without affecting code quality, and cases that
4306 actually fail are extremely rare, so it turns out to be better to fix
4307 the problem here by not generating cases that choose_reload_regs will
4309 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4310 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4312 We can reduce the register pressure by exploiting that a
4313 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4314 does not conflict with any of them, if it is only used for the first of
4315 the RELOAD_FOR_X_ADDRESS reloads. */
4317 int first_op_addr_num = -2;
4318 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4319 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4320 int need_change = 0;
4321 /* We use last_op_addr_reload and the contents of the above arrays
4322 first as flags - -2 means no instance encountered, -1 means exactly
4323 one instance encountered.
4324 If more than one instance has been encountered, we store the reload
4325 number of the first reload of the kind in question; reload numbers
4326 are known to be non-negative. */
4327 for (i = 0; i < noperands; i++)
4328 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4329 for (i = n_reloads - 1; i >= 0; i--)
4331 switch (rld[i].when_needed)
4333 case RELOAD_FOR_OPERAND_ADDRESS:
4334 if (++first_op_addr_num >= 0)
4336 first_op_addr_num = i;
4340 case RELOAD_FOR_INPUT_ADDRESS:
4341 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4343 first_inpaddr_num[rld[i].opnum] = i;
4347 case RELOAD_FOR_OUTPUT_ADDRESS:
4348 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4350 first_outpaddr_num[rld[i].opnum] = i;
4361 for (i = 0; i < n_reloads; i++)
4364 enum reload_type type;
4366 switch (rld[i].when_needed)
4368 case RELOAD_FOR_OPADDR_ADDR:
4369 first_num = first_op_addr_num;
4370 type = RELOAD_FOR_OPERAND_ADDRESS;
4372 case RELOAD_FOR_INPADDR_ADDRESS:
4373 first_num = first_inpaddr_num[rld[i].opnum];
4374 type = RELOAD_FOR_INPUT_ADDRESS;
4376 case RELOAD_FOR_OUTADDR_ADDRESS:
4377 first_num = first_outpaddr_num[rld[i].opnum];
4378 type = RELOAD_FOR_OUTPUT_ADDRESS;
4385 else if (i > first_num)
4386 rld[i].when_needed = type;
4389 /* Check if the only TYPE reload that uses reload I is
4390 reload FIRST_NUM. */
4391 for (j = n_reloads - 1; j > first_num; j--)
4393 if (rld[j].when_needed == type
4394 && (rld[i].secondary_p
4395 ? rld[j].secondary_in_reload == i
4396 : reg_mentioned_p (rld[i].in, rld[j].in)))
4398 rld[i].when_needed = type;
4407 /* See if we have any reloads that are now allowed to be merged
4408 because we've changed when the reload is needed to
4409 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4410 check for the most common cases. */
4412 for (i = 0; i < n_reloads; i++)
4413 if (rld[i].in != 0 && rld[i].out == 0
4414 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4415 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4416 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4417 for (j = 0; j < n_reloads; j++)
4418 if (i != j && rld[j].in != 0 && rld[j].out == 0
4419 && rld[j].when_needed == rld[i].when_needed
4420 && MATCHES (rld[i].in, rld[j].in)
4421 && rld[i].class == rld[j].class
4422 && !rld[i].nocombine && !rld[j].nocombine
4423 && rld[i].reg_rtx == rld[j].reg_rtx)
4425 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4426 transfer_replacements (i, j);
4431 /* If we made any reloads for addresses, see if they violate a
4432 "no input reloads" requirement for this insn. But loads that we
4433 do after the insn (such as for output addresses) are fine. */
4434 if (no_input_reloads)
4435 for (i = 0; i < n_reloads; i++)
4436 gcc_assert (rld[i].in == 0
4437 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS
4438 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS);
4441 /* Compute reload_mode and reload_nregs. */
4442 for (i = 0; i < n_reloads; i++)
4445 = (rld[i].inmode == VOIDmode
4446 || (GET_MODE_SIZE (rld[i].outmode)
4447 > GET_MODE_SIZE (rld[i].inmode)))
4448 ? rld[i].outmode : rld[i].inmode;
4450 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4453 /* Special case a simple move with an input reload and a
4454 destination of a hard reg, if the hard reg is ok, use it. */
4455 for (i = 0; i < n_reloads; i++)
4456 if (rld[i].when_needed == RELOAD_FOR_INPUT
4457 && GET_CODE (PATTERN (insn)) == SET
4458 && REG_P (SET_DEST (PATTERN (insn)))
4459 && SET_SRC (PATTERN (insn)) == rld[i].in
4460 && !elimination_target_reg_p (SET_DEST (PATTERN (insn))))
4462 rtx dest = SET_DEST (PATTERN (insn));
4463 unsigned int regno = REGNO (dest);
4465 if (regno < FIRST_PSEUDO_REGISTER
4466 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4467 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4469 int nr = hard_regno_nregs[regno][rld[i].mode];
4472 for (nri = 1; nri < nr; nri ++)
4473 if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
4477 rld[i].reg_rtx = dest;
4484 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4485 accepts a memory operand with constant address. */
4488 alternative_allows_memconst (const char *constraint, int altnum)
4491 /* Skip alternatives before the one requested. */
4494 while (*constraint++ != ',');
4497 /* Scan the requested alternative for 'm' or 'o'.
4498 If one of them is present, this alternative accepts memory constants. */
4499 for (; (c = *constraint) && c != ',' && c != '#';
4500 constraint += CONSTRAINT_LEN (c, constraint))
4501 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c, constraint))
4506 /* Scan X for memory references and scan the addresses for reloading.
4507 Also checks for references to "constant" regs that we want to eliminate
4508 and replaces them with the values they stand for.
4509 We may alter X destructively if it contains a reference to such.
4510 If X is just a constant reg, we return the equivalent value
4513 IND_LEVELS says how many levels of indirect addressing this machine
4516 OPNUM and TYPE identify the purpose of the reload.
4518 IS_SET_DEST is true if X is the destination of a SET, which is not
4519 appropriate to be replaced by a constant.
4521 INSN, if nonzero, is the insn in which we do the reload. It is used
4522 to determine if we may generate output reloads, and where to put USEs
4523 for pseudos that we have to replace with stack slots.
4525 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4526 result of find_reloads_address. */
4529 find_reloads_toplev (rtx x, int opnum, enum reload_type type,
4530 int ind_levels, int is_set_dest, rtx insn,
4531 int *address_reloaded)
4533 RTX_CODE code = GET_CODE (x);
4535 const char *fmt = GET_RTX_FORMAT (code);
4541 /* This code is duplicated for speed in find_reloads. */
4542 int regno = REGNO (x);
4543 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4544 x = reg_equiv_constant[regno];
4546 /* This creates (subreg (mem...)) which would cause an unnecessary
4547 reload of the mem. */
4548 else if (reg_equiv_mem[regno] != 0)
4549 x = reg_equiv_mem[regno];
4551 else if (reg_equiv_memory_loc[regno]
4552 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4554 rtx mem = make_memloc (x, regno);
4555 if (reg_equiv_address[regno]
4556 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4558 /* If this is not a toplevel operand, find_reloads doesn't see
4559 this substitution. We have to emit a USE of the pseudo so
4560 that delete_output_reload can see it. */
4561 if (replace_reloads && recog_data.operand[opnum] != x)
4562 /* We mark the USE with QImode so that we recognize it
4563 as one that can be safely deleted at the end of
4565 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4568 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4569 opnum, type, ind_levels, insn);
4570 if (!rtx_equal_p (x, mem))
4571 push_reg_equiv_alt_mem (regno, x);
4572 if (address_reloaded)
4573 *address_reloaded = i;
4582 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4583 opnum, type, ind_levels, insn);
4584 if (address_reloaded)
4585 *address_reloaded = i;
4590 if (code == SUBREG && REG_P (SUBREG_REG (x)))
4592 /* Check for SUBREG containing a REG that's equivalent to a
4593 constant. If the constant has a known value, truncate it
4594 right now. Similarly if we are extracting a single-word of a
4595 multi-word constant. If the constant is symbolic, allow it
4596 to be substituted normally. push_reload will strip the
4597 subreg later. The constant must not be VOIDmode, because we
4598 will lose the mode of the register (this should never happen
4599 because one of the cases above should handle it). */
4601 int regno = REGNO (SUBREG_REG (x));
4604 if (subreg_lowpart_p (x)
4605 && regno >= FIRST_PSEUDO_REGISTER
4606 && reg_renumber[regno] < 0
4607 && reg_equiv_constant[regno] != 0
4608 && (tem = gen_lowpart_common (GET_MODE (x),
4609 reg_equiv_constant[regno])) != 0)
4612 if (regno >= FIRST_PSEUDO_REGISTER
4613 && reg_renumber[regno] < 0
4614 && reg_equiv_constant[regno] != 0)
4617 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4618 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4623 /* If the subreg contains a reg that will be converted to a mem,
4624 convert the subreg to a narrower memref now.
4625 Otherwise, we would get (subreg (mem ...) ...),
4626 which would force reload of the mem.
4628 We also need to do this if there is an equivalent MEM that is
4629 not offsettable. In that case, alter_subreg would produce an
4630 invalid address on big-endian machines.
4632 For machines that extend byte loads, we must not reload using
4633 a wider mode if we have a paradoxical SUBREG. find_reloads will
4634 force a reload in that case. So we should not do anything here. */
4636 if (regno >= FIRST_PSEUDO_REGISTER
4637 #ifdef LOAD_EXTEND_OP
4638 && (GET_MODE_SIZE (GET_MODE (x))
4639 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4641 && (reg_equiv_address[regno] != 0
4642 || (reg_equiv_mem[regno] != 0
4643 && (! strict_memory_address_p (GET_MODE (x),
4644 XEXP (reg_equiv_mem[regno], 0))
4645 || ! offsettable_memref_p (reg_equiv_mem[regno])
4646 || num_not_at_initial_offset))))
4647 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4651 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4655 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4656 ind_levels, is_set_dest, insn,
4658 /* If we have replaced a reg with it's equivalent memory loc -
4659 that can still be handled here e.g. if it's in a paradoxical
4660 subreg - we must make the change in a copy, rather than using
4661 a destructive change. This way, find_reloads can still elect
4662 not to do the change. */
4663 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4665 x = shallow_copy_rtx (x);
4668 XEXP (x, i) = new_part;
4674 /* Return a mem ref for the memory equivalent of reg REGNO.
4675 This mem ref is not shared with anything. */
4678 make_memloc (rtx ad, int regno)
4680 /* We must rerun eliminate_regs, in case the elimination
4681 offsets have changed. */
4683 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4685 /* If TEM might contain a pseudo, we must copy it to avoid
4686 modifying it when we do the substitution for the reload. */
4687 if (rtx_varies_p (tem, 0))
4688 tem = copy_rtx (tem);
4690 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4691 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4693 /* Copy the result if it's still the same as the equivalence, to avoid
4694 modifying it when we do the substitution for the reload. */
4695 if (tem == reg_equiv_memory_loc[regno])
4696 tem = copy_rtx (tem);
4700 /* Returns true if AD could be turned into a valid memory reference
4701 to mode MODE by reloading the part pointed to by PART into a
4705 maybe_memory_address_p (enum machine_mode mode, rtx ad, rtx *part)
4709 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4712 retv = memory_address_p (mode, ad);
4718 /* Record all reloads needed for handling memory address AD
4719 which appears in *LOC in a memory reference to mode MODE
4720 which itself is found in location *MEMREFLOC.
4721 Note that we take shortcuts assuming that no multi-reg machine mode
4722 occurs as part of an address.
4724 OPNUM and TYPE specify the purpose of this reload.
4726 IND_LEVELS says how many levels of indirect addressing this machine
4729 INSN, if nonzero, is the insn in which we do the reload. It is used
4730 to determine if we may generate output reloads, and where to put USEs
4731 for pseudos that we have to replace with stack slots.
4733 Value is one if this address is reloaded or replaced as a whole; it is
4734 zero if the top level of this address was not reloaded or replaced, and
4735 it is -1 if it may or may not have been reloaded or replaced.
4737 Note that there is no verification that the address will be valid after
4738 this routine does its work. Instead, we rely on the fact that the address
4739 was valid when reload started. So we need only undo things that reload
4740 could have broken. These are wrong register types, pseudos not allocated
4741 to a hard register, and frame pointer elimination. */
4744 find_reloads_address (enum machine_mode mode, rtx *memrefloc, rtx ad,
4745 rtx *loc, int opnum, enum reload_type type,
4746 int ind_levels, rtx insn)
4749 int removed_and = 0;
4753 /* If the address is a register, see if it is a legitimate address and
4754 reload if not. We first handle the cases where we need not reload
4755 or where we must reload in a non-standard way. */
4761 /* If the register is equivalent to an invariant expression, substitute
4762 the invariant, and eliminate any eliminable register references. */
4763 tem = reg_equiv_constant[regno];
4765 && (tem = eliminate_regs (tem, mode, insn))
4766 && strict_memory_address_p (mode, tem))
4772 tem = reg_equiv_memory_loc[regno];
4775 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4777 tem = make_memloc (ad, regno);
4778 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4782 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4783 &XEXP (tem, 0), opnum,
4784 ADDR_TYPE (type), ind_levels, insn);
4785 if (!rtx_equal_p (tem, orig))
4786 push_reg_equiv_alt_mem (regno, tem);
4788 /* We can avoid a reload if the register's equivalent memory
4789 expression is valid as an indirect memory address.
4790 But not all addresses are valid in a mem used as an indirect
4791 address: only reg or reg+constant. */
4794 && strict_memory_address_p (mode, tem)
4795 && (REG_P (XEXP (tem, 0))
4796 || (GET_CODE (XEXP (tem, 0)) == PLUS
4797 && REG_P (XEXP (XEXP (tem, 0), 0))
4798 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4800 /* TEM is not the same as what we'll be replacing the
4801 pseudo with after reload, put a USE in front of INSN
4802 in the final reload pass. */
4804 && num_not_at_initial_offset
4805 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4808 /* We mark the USE with QImode so that we
4809 recognize it as one that can be safely
4810 deleted at the end of reload. */
4811 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4814 /* This doesn't really count as replacing the address
4815 as a whole, since it is still a memory access. */
4823 /* The only remaining case where we can avoid a reload is if this is a
4824 hard register that is valid as a base register and which is not the
4825 subject of a CLOBBER in this insn. */
4827 else if (regno < FIRST_PSEUDO_REGISTER
4828 && regno_ok_for_base_p (regno, mode, MEM, SCRATCH)
4829 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4832 /* If we do not have one of the cases above, we must do the reload. */
4833 push_reload (ad, NULL_RTX, loc, (rtx*) 0, base_reg_class (mode, MEM, SCRATCH),
4834 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4838 if (strict_memory_address_p (mode, ad))
4840 /* The address appears valid, so reloads are not needed.
4841 But the address may contain an eliminable register.
4842 This can happen because a machine with indirect addressing
4843 may consider a pseudo register by itself a valid address even when
4844 it has failed to get a hard reg.
4845 So do a tree-walk to find and eliminate all such regs. */
4847 /* But first quickly dispose of a common case. */
4848 if (GET_CODE (ad) == PLUS
4849 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4850 && REG_P (XEXP (ad, 0))
4851 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4854 subst_reg_equivs_changed = 0;
4855 *loc = subst_reg_equivs (ad, insn);
4857 if (! subst_reg_equivs_changed)
4860 /* Check result for validity after substitution. */
4861 if (strict_memory_address_p (mode, ad))
4865 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4870 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4875 *memrefloc = copy_rtx (*memrefloc);
4876 XEXP (*memrefloc, 0) = ad;
4877 move_replacements (&ad, &XEXP (*memrefloc, 0));
4883 /* The address is not valid. We have to figure out why. First see if
4884 we have an outer AND and remove it if so. Then analyze what's inside. */
4886 if (GET_CODE (ad) == AND)
4889 loc = &XEXP (ad, 0);
4893 /* One possibility for why the address is invalid is that it is itself
4894 a MEM. This can happen when the frame pointer is being eliminated, a
4895 pseudo is not allocated to a hard register, and the offset between the
4896 frame and stack pointers is not its initial value. In that case the
4897 pseudo will have been replaced by a MEM referring to the
4901 /* First ensure that the address in this MEM is valid. Then, unless
4902 indirect addresses are valid, reload the MEM into a register. */
4904 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4905 opnum, ADDR_TYPE (type),
4906 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4908 /* If tem was changed, then we must create a new memory reference to
4909 hold it and store it back into memrefloc. */
4910 if (tem != ad && memrefloc)
4912 *memrefloc = copy_rtx (*memrefloc);
4913 copy_replacements (tem, XEXP (*memrefloc, 0));
4914 loc = &XEXP (*memrefloc, 0);
4916 loc = &XEXP (*loc, 0);
4919 /* Check similar cases as for indirect addresses as above except
4920 that we can allow pseudos and a MEM since they should have been
4921 taken care of above. */
4924 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4925 || MEM_P (XEXP (tem, 0))
4926 || ! (REG_P (XEXP (tem, 0))
4927 || (GET_CODE (XEXP (tem, 0)) == PLUS
4928 && REG_P (XEXP (XEXP (tem, 0), 0))
4929 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4931 /* Must use TEM here, not AD, since it is the one that will
4932 have any subexpressions reloaded, if needed. */
4933 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4934 base_reg_class (mode, MEM, SCRATCH), GET_MODE (tem),
4937 return ! removed_and;
4943 /* If we have address of a stack slot but it's not valid because the
4944 displacement is too large, compute the sum in a register.
4945 Handle all base registers here, not just fp/ap/sp, because on some
4946 targets (namely SH) we can also get too large displacements from
4947 big-endian corrections. */
4948 else if (GET_CODE (ad) == PLUS
4949 && REG_P (XEXP (ad, 0))
4950 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4951 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4952 && regno_ok_for_base_p (REGNO (XEXP (ad, 0)), mode, PLUS,
4956 /* Unshare the MEM rtx so we can safely alter it. */
4959 *memrefloc = copy_rtx (*memrefloc);
4960 loc = &XEXP (*memrefloc, 0);
4962 loc = &XEXP (*loc, 0);
4965 if (double_reg_address_ok)
4967 /* Unshare the sum as well. */
4968 *loc = ad = copy_rtx (ad);
4970 /* Reload the displacement into an index reg.
4971 We assume the frame pointer or arg pointer is a base reg. */
4972 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4973 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4979 /* If the sum of two regs is not necessarily valid,
4980 reload the sum into a base reg.
4981 That will at least work. */
4982 find_reloads_address_part (ad, loc,
4983 base_reg_class (mode, MEM, SCRATCH),
4984 Pmode, opnum, type, ind_levels);
4986 return ! removed_and;
4989 /* If we have an indexed stack slot, there are three possible reasons why
4990 it might be invalid: The index might need to be reloaded, the address
4991 might have been made by frame pointer elimination and hence have a
4992 constant out of range, or both reasons might apply.
4994 We can easily check for an index needing reload, but even if that is the
4995 case, we might also have an invalid constant. To avoid making the
4996 conservative assumption and requiring two reloads, we see if this address
4997 is valid when not interpreted strictly. If it is, the only problem is
4998 that the index needs a reload and find_reloads_address_1 will take care
5001 Handle all base registers here, not just fp/ap/sp, because on some
5002 targets (namely SPARC) we can also get invalid addresses from preventive
5003 subreg big-endian corrections made by find_reloads_toplev. We
5004 can also get expressions involving LO_SUM (rather than PLUS) from
5005 find_reloads_subreg_address.
5007 If we decide to do something, it must be that `double_reg_address_ok'
5008 is true. We generate a reload of the base register + constant and
5009 rework the sum so that the reload register will be added to the index.
5010 This is safe because we know the address isn't shared.
5012 We check for the base register as both the first and second operand of
5013 the innermost PLUS and/or LO_SUM. */
5015 for (op_index = 0; op_index < 2; ++op_index)
5017 rtx operand, addend;
5018 enum rtx_code inner_code;
5020 if (GET_CODE (ad) != PLUS)
5023 inner_code = GET_CODE (XEXP (ad, 0));
5024 if (!(GET_CODE (ad) == PLUS
5025 && GET_CODE (XEXP (ad, 1)) == CONST_INT
5026 && (inner_code == PLUS || inner_code == LO_SUM)))
5029 operand = XEXP (XEXP (ad, 0), op_index);
5030 if (!REG_P (operand) || REGNO (operand) >= FIRST_PSEUDO_REGISTER)
5033 addend = XEXP (XEXP (ad, 0), 1 - op_index);
5035 if ((regno_ok_for_base_p (REGNO (operand), mode, inner_code,
5037 || operand == frame_pointer_rtx
5038 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
5039 || operand == hard_frame_pointer_rtx
5041 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5042 || operand == arg_pointer_rtx
5044 || operand == stack_pointer_rtx)
5045 && ! maybe_memory_address_p (mode, ad,
5046 &XEXP (XEXP (ad, 0), 1 - op_index)))
5051 offset_reg = plus_constant (operand, INTVAL (XEXP (ad, 1)));
5053 /* Form the adjusted address. */
5054 if (GET_CODE (XEXP (ad, 0)) == PLUS)
5055 ad = gen_rtx_PLUS (GET_MODE (ad),
5056 op_index == 0 ? offset_reg : addend,
5057 op_index == 0 ? addend : offset_reg);
5059 ad = gen_rtx_LO_SUM (GET_MODE (ad),
5060 op_index == 0 ? offset_reg : addend,
5061 op_index == 0 ? addend : offset_reg);
5064 cls = base_reg_class (mode, MEM, GET_CODE (addend));
5065 find_reloads_address_part (XEXP (ad, op_index),
5066 &XEXP (ad, op_index), cls,
5067 GET_MODE (ad), opnum, type, ind_levels);
5068 find_reloads_address_1 (mode,
5069 XEXP (ad, 1 - op_index), 1, GET_CODE (ad),
5070 GET_CODE (XEXP (ad, op_index)),
5071 &XEXP (ad, 1 - op_index), opnum,
5078 /* See if address becomes valid when an eliminable register
5079 in a sum is replaced. */
5082 if (GET_CODE (ad) == PLUS)
5083 tem = subst_indexed_address (ad);
5084 if (tem != ad && strict_memory_address_p (mode, tem))
5086 /* Ok, we win that way. Replace any additional eliminable
5089 subst_reg_equivs_changed = 0;
5090 tem = subst_reg_equivs (tem, insn);
5092 /* Make sure that didn't make the address invalid again. */
5094 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
5101 /* If constants aren't valid addresses, reload the constant address
5103 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
5105 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5106 Unshare it so we can safely alter it. */
5107 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
5108 && CONSTANT_POOL_ADDRESS_P (ad))
5110 *memrefloc = copy_rtx (*memrefloc);
5111 loc = &XEXP (*memrefloc, 0);
5113 loc = &XEXP (*loc, 0);
5116 find_reloads_address_part (ad, loc, base_reg_class (mode, MEM, SCRATCH),
5117 Pmode, opnum, type, ind_levels);
5118 return ! removed_and;
5121 return find_reloads_address_1 (mode, ad, 0, MEM, SCRATCH, loc, opnum, type,
5125 /* Find all pseudo regs appearing in AD
5126 that are eliminable in favor of equivalent values
5127 and do not have hard regs; replace them by their equivalents.
5128 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5129 front of it for pseudos that we have to replace with stack slots. */
5132 subst_reg_equivs (rtx ad, rtx insn)
5134 RTX_CODE code = GET_CODE (ad);
5153 int regno = REGNO (ad);
5155 if (reg_equiv_constant[regno] != 0)
5157 subst_reg_equivs_changed = 1;
5158 return reg_equiv_constant[regno];
5160 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
5162 rtx mem = make_memloc (ad, regno);
5163 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5165 subst_reg_equivs_changed = 1;
5166 /* We mark the USE with QImode so that we recognize it
5167 as one that can be safely deleted at the end of
5169 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5178 /* Quickly dispose of a common case. */
5179 if (XEXP (ad, 0) == frame_pointer_rtx
5180 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5188 fmt = GET_RTX_FORMAT (code);
5189 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5191 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5195 /* Compute the sum of X and Y, making canonicalizations assumed in an
5196 address, namely: sum constant integers, surround the sum of two
5197 constants with a CONST, put the constant as the second operand, and
5198 group the constant on the outermost sum.
5200 This routine assumes both inputs are already in canonical form. */
5203 form_sum (rtx x, rtx y)
5206 enum machine_mode mode = GET_MODE (x);
5208 if (mode == VOIDmode)
5209 mode = GET_MODE (y);
5211 if (mode == VOIDmode)
5214 if (GET_CODE (x) == CONST_INT)
5215 return plus_constant (y, INTVAL (x));
5216 else if (GET_CODE (y) == CONST_INT)
5217 return plus_constant (x, INTVAL (y));
5218 else if (CONSTANT_P (x))
5219 tem = x, x = y, y = tem;
5221 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5222 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5224 /* Note that if the operands of Y are specified in the opposite
5225 order in the recursive calls below, infinite recursion will occur. */
5226 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5227 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5229 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5230 constant will have been placed second. */
5231 if (CONSTANT_P (x) && CONSTANT_P (y))
5233 if (GET_CODE (x) == CONST)
5235 if (GET_CODE (y) == CONST)
5238 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5241 return gen_rtx_PLUS (mode, x, y);
5244 /* If ADDR is a sum containing a pseudo register that should be
5245 replaced with a constant (from reg_equiv_constant),
5246 return the result of doing so, and also apply the associative
5247 law so that the result is more likely to be a valid address.
5248 (But it is not guaranteed to be one.)
5250 Note that at most one register is replaced, even if more are
5251 replaceable. Also, we try to put the result into a canonical form
5252 so it is more likely to be a valid address.
5254 In all other cases, return ADDR. */
5257 subst_indexed_address (rtx addr)
5259 rtx op0 = 0, op1 = 0, op2 = 0;
5263 if (GET_CODE (addr) == PLUS)
5265 /* Try to find a register to replace. */
5266 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5268 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5269 && reg_renumber[regno] < 0
5270 && reg_equiv_constant[regno] != 0)
5271 op0 = reg_equiv_constant[regno];
5272 else if (REG_P (op1)
5273 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5274 && reg_renumber[regno] < 0
5275 && reg_equiv_constant[regno] != 0)
5276 op1 = reg_equiv_constant[regno];
5277 else if (GET_CODE (op0) == PLUS
5278 && (tem = subst_indexed_address (op0)) != op0)
5280 else if (GET_CODE (op1) == PLUS
5281 && (tem = subst_indexed_address (op1)) != op1)
5286 /* Pick out up to three things to add. */
5287 if (GET_CODE (op1) == PLUS)
5288 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5289 else if (GET_CODE (op0) == PLUS)
5290 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5292 /* Compute the sum. */
5294 op1 = form_sum (op1, op2);
5296 op0 = form_sum (op0, op1);
5303 /* Update the REG_INC notes for an insn. It updates all REG_INC
5304 notes for the instruction which refer to REGNO the to refer
5305 to the reload number.
5307 INSN is the insn for which any REG_INC notes need updating.
5309 REGNO is the register number which has been reloaded.
5311 RELOADNUM is the reload number. */
5314 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED, int regno ATTRIBUTE_UNUSED,
5315 int reloadnum ATTRIBUTE_UNUSED)
5320 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5321 if (REG_NOTE_KIND (link) == REG_INC
5322 && (int) REGNO (XEXP (link, 0)) == regno)
5323 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5327 /* Record the pseudo registers we must reload into hard registers in a
5328 subexpression of a would-be memory address, X referring to a value
5329 in mode MODE. (This function is not called if the address we find
5332 CONTEXT = 1 means we are considering regs as index regs,
5333 = 0 means we are considering them as base regs.
5334 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5336 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5337 is the code of the index part of the address. Otherwise, pass SCRATCH
5339 OPNUM and TYPE specify the purpose of any reloads made.
5341 IND_LEVELS says how many levels of indirect addressing are
5342 supported at this point in the address.
5344 INSN, if nonzero, is the insn in which we do the reload. It is used
5345 to determine if we may generate output reloads.
5347 We return nonzero if X, as a whole, is reloaded or replaced. */
5349 /* Note that we take shortcuts assuming that no multi-reg machine mode
5350 occurs as part of an address.
5351 Also, this is not fully machine-customizable; it works for machines
5352 such as VAXen and 68000's and 32000's, but other possible machines
5353 could have addressing modes that this does not handle right.
5354 If you add push_reload calls here, you need to make sure gen_reload
5355 handles those cases gracefully. */
5358 find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
5359 enum rtx_code outer_code, enum rtx_code index_code,
5360 rtx *loc, int opnum, enum reload_type type,
5361 int ind_levels, rtx insn)
5363 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5365 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5366 : REGNO_OK_FOR_INDEX_P (REGNO))
5368 enum reg_class context_reg_class;
5369 RTX_CODE code = GET_CODE (x);
5372 context_reg_class = INDEX_REG_CLASS;
5374 context_reg_class = base_reg_class (mode, outer_code, index_code);
5380 rtx orig_op0 = XEXP (x, 0);
5381 rtx orig_op1 = XEXP (x, 1);
5382 RTX_CODE code0 = GET_CODE (orig_op0);
5383 RTX_CODE code1 = GET_CODE (orig_op1);
5387 if (GET_CODE (op0) == SUBREG)
5389 op0 = SUBREG_REG (op0);
5390 code0 = GET_CODE (op0);
5391 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5392 op0 = gen_rtx_REG (word_mode,
5394 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5395 GET_MODE (SUBREG_REG (orig_op0)),
5396 SUBREG_BYTE (orig_op0),
5397 GET_MODE (orig_op0))));
5400 if (GET_CODE (op1) == SUBREG)
5402 op1 = SUBREG_REG (op1);
5403 code1 = GET_CODE (op1);
5404 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5405 /* ??? Why is this given op1's mode and above for
5406 ??? op0 SUBREGs we use word_mode? */
5407 op1 = gen_rtx_REG (GET_MODE (op1),
5409 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5410 GET_MODE (SUBREG_REG (orig_op1)),
5411 SUBREG_BYTE (orig_op1),
5412 GET_MODE (orig_op1))));
5414 /* Plus in the index register may be created only as a result of
5415 register rematerialization for expression like &localvar*4. Reload it.
5416 It may be possible to combine the displacement on the outer level,
5417 but it is probably not worthwhile to do so. */
5420 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5421 opnum, ADDR_TYPE (type), ind_levels, insn);
5422 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5424 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5428 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5429 || code0 == ZERO_EXTEND || code1 == MEM)
5431 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5432 &XEXP (x, 0), opnum, type, ind_levels,
5434 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5435 &XEXP (x, 1), opnum, type, ind_levels,
5439 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5440 || code1 == ZERO_EXTEND || code0 == MEM)
5442 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5443 &XEXP (x, 0), opnum, type, ind_levels,
5445 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5446 &XEXP (x, 1), opnum, type, ind_levels,
5450 else if (code0 == CONST_INT || code0 == CONST
5451 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5452 find_reloads_address_1 (mode, orig_op1, 0, PLUS, code0,
5453 &XEXP (x, 1), opnum, type, ind_levels,
5456 else if (code1 == CONST_INT || code1 == CONST
5457 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5458 find_reloads_address_1 (mode, orig_op0, 0, PLUS, code1,
5459 &XEXP (x, 0), opnum, type, ind_levels,
5462 else if (code0 == REG && code1 == REG)
5464 if (REGNO_OK_FOR_INDEX_P (REGNO (op0))
5465 && regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5467 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1))
5468 && regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5470 else if (regno_ok_for_base_p (REGNO (op1), mode, PLUS, REG))
5471 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5472 &XEXP (x, 0), opnum, type, ind_levels,
5474 else if (regno_ok_for_base_p (REGNO (op0), mode, PLUS, REG))
5475 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5476 &XEXP (x, 1), opnum, type, ind_levels,
5478 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1)))
5479 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5480 &XEXP (x, 0), opnum, type, ind_levels,
5482 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0)))
5483 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5484 &XEXP (x, 1), opnum, type, ind_levels,
5488 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5489 &XEXP (x, 0), opnum, type, ind_levels,
5491 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5492 &XEXP (x, 1), opnum, type, ind_levels,
5497 else if (code0 == REG)
5499 find_reloads_address_1 (mode, orig_op0, 1, PLUS, SCRATCH,
5500 &XEXP (x, 0), opnum, type, ind_levels,
5502 find_reloads_address_1 (mode, orig_op1, 0, PLUS, REG,
5503 &XEXP (x, 1), opnum, type, ind_levels,
5507 else if (code1 == REG)
5509 find_reloads_address_1 (mode, orig_op1, 1, PLUS, SCRATCH,
5510 &XEXP (x, 1), opnum, type, ind_levels,
5512 find_reloads_address_1 (mode, orig_op0, 0, PLUS, REG,
5513 &XEXP (x, 0), opnum, type, ind_levels,
5523 rtx op0 = XEXP (x, 0);
5524 rtx op1 = XEXP (x, 1);
5525 enum rtx_code index_code;
5529 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5532 /* Currently, we only support {PRE,POST}_MODIFY constructs
5533 where a base register is {inc,dec}remented by the contents
5534 of another register or by a constant value. Thus, these
5535 operands must match. */
5536 gcc_assert (op0 == XEXP (op1, 0));
5538 /* Require index register (or constant). Let's just handle the
5539 register case in the meantime... If the target allows
5540 auto-modify by a constant then we could try replacing a pseudo
5541 register with its equivalent constant where applicable.
5543 We also handle the case where the register was eliminated
5544 resulting in a PLUS subexpression.
5546 If we later decide to reload the whole PRE_MODIFY or
5547 POST_MODIFY, inc_for_reload might clobber the reload register
5548 before reading the index. The index register might therefore
5549 need to live longer than a TYPE reload normally would, so be
5550 conservative and class it as RELOAD_OTHER. */
5551 if ((REG_P (XEXP (op1, 1))
5552 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5553 || GET_CODE (XEXP (op1, 1)) == PLUS)
5554 find_reloads_address_1 (mode, XEXP (op1, 1), 1, code, SCRATCH,
5555 &XEXP (op1, 1), opnum, RELOAD_OTHER,
5558 gcc_assert (REG_P (XEXP (op1, 0)));
5560 regno = REGNO (XEXP (op1, 0));
5561 index_code = GET_CODE (XEXP (op1, 1));
5563 /* A register that is incremented cannot be constant! */
5564 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5565 || reg_equiv_constant[regno] == 0);
5567 /* Handle a register that is equivalent to a memory location
5568 which cannot be addressed directly. */
5569 if (reg_equiv_memory_loc[regno] != 0
5570 && (reg_equiv_address[regno] != 0
5571 || num_not_at_initial_offset))
5573 rtx tem = make_memloc (XEXP (x, 0), regno);
5575 if (reg_equiv_address[regno]
5576 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5580 /* First reload the memory location's address.
5581 We can't use ADDR_TYPE (type) here, because we need to
5582 write back the value after reading it, hence we actually
5583 need two registers. */
5584 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5585 &XEXP (tem, 0), opnum,
5589 if (!rtx_equal_p (tem, orig))
5590 push_reg_equiv_alt_mem (regno, tem);
5592 /* Then reload the memory location into a base
5594 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5596 base_reg_class (mode, code,
5598 GET_MODE (x), GET_MODE (x), 0,
5599 0, opnum, RELOAD_OTHER);
5601 update_auto_inc_notes (this_insn, regno, reloadnum);
5606 if (reg_renumber[regno] >= 0)
5607 regno = reg_renumber[regno];
5609 /* We require a base register here... */
5610 if (!regno_ok_for_base_p (regno, GET_MODE (x), code, index_code))
5612 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5613 &XEXP (op1, 0), &XEXP (x, 0),
5614 base_reg_class (mode, code, index_code),
5615 GET_MODE (x), GET_MODE (x), 0, 0,
5616 opnum, RELOAD_OTHER);
5618 update_auto_inc_notes (this_insn, regno, reloadnum);
5628 if (REG_P (XEXP (x, 0)))
5630 int regno = REGNO (XEXP (x, 0));
5634 /* A register that is incremented cannot be constant! */
5635 gcc_assert (regno < FIRST_PSEUDO_REGISTER
5636 || reg_equiv_constant[regno] == 0);
5638 /* Handle a register that is equivalent to a memory location
5639 which cannot be addressed directly. */
5640 if (reg_equiv_memory_loc[regno] != 0
5641 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5643 rtx tem = make_memloc (XEXP (x, 0), regno);
5644 if (reg_equiv_address[regno]
5645 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5649 /* First reload the memory location's address.
5650 We can't use ADDR_TYPE (type) here, because we need to
5651 write back the value after reading it, hence we actually
5652 need two registers. */
5653 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5654 &XEXP (tem, 0), opnum, type,
5656 if (!rtx_equal_p (tem, orig))
5657 push_reg_equiv_alt_mem (regno, tem);
5658 /* Put this inside a new increment-expression. */
5659 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5660 /* Proceed to reload that, as if it contained a register. */
5664 /* If we have a hard register that is ok as an index,
5665 don't make a reload. If an autoincrement of a nice register
5666 isn't "valid", it must be that no autoincrement is "valid".
5667 If that is true and something made an autoincrement anyway,
5668 this must be a special context where one is allowed.
5669 (For example, a "push" instruction.)
5670 We can't improve this address, so leave it alone. */
5672 /* Otherwise, reload the autoincrement into a suitable hard reg
5673 and record how much to increment by. */
5675 if (reg_renumber[regno] >= 0)
5676 regno = reg_renumber[regno];
5677 if (regno >= FIRST_PSEUDO_REGISTER
5678 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5683 /* If we can output the register afterwards, do so, this
5684 saves the extra update.
5685 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5686 CALL_INSN - and it does not set CC0.
5687 But don't do this if we cannot directly address the
5688 memory location, since this will make it harder to
5689 reuse address reloads, and increases register pressure.
5690 Also don't do this if we can probably update x directly. */
5691 rtx equiv = (MEM_P (XEXP (x, 0))
5693 : reg_equiv_mem[regno]);
5694 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5695 if (insn && NONJUMP_INSN_P (insn) && equiv
5696 && memory_operand (equiv, GET_MODE (equiv))
5698 && ! sets_cc0_p (PATTERN (insn))
5700 && ! (icode != CODE_FOR_nothing
5701 && ((*insn_data[icode].operand[0].predicate)
5703 && ((*insn_data[icode].operand[1].predicate)
5706 /* We use the original pseudo for loc, so that
5707 emit_reload_insns() knows which pseudo this
5708 reload refers to and updates the pseudo rtx, not
5709 its equivalent memory location, as well as the
5710 corresponding entry in reg_last_reload_reg. */
5711 loc = &XEXP (x_orig, 0);
5714 = push_reload (x, x, loc, loc,
5716 GET_MODE (x), GET_MODE (x), 0, 0,
5717 opnum, RELOAD_OTHER);
5722 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5724 GET_MODE (x), GET_MODE (x), 0, 0,
5727 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5732 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5742 /* Look for parts to reload in the inner expression and reload them
5743 too, in addition to this operation. Reloading all inner parts in
5744 addition to this one shouldn't be necessary, but at this point,
5745 we don't know if we can possibly omit any part that *can* be
5746 reloaded. Targets that are better off reloading just either part
5747 (or perhaps even a different part of an outer expression), should
5748 define LEGITIMIZE_RELOAD_ADDRESS. */
5749 find_reloads_address_1 (GET_MODE (XEXP (x, 0)), XEXP (x, 0),
5750 context, code, SCRATCH, &XEXP (x, 0), opnum,
5751 type, ind_levels, insn);
5752 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5754 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5758 /* This is probably the result of a substitution, by eliminate_regs, of
5759 an equivalent address for a pseudo that was not allocated to a hard
5760 register. Verify that the specified address is valid and reload it
5763 Since we know we are going to reload this item, don't decrement for
5764 the indirection level.
5766 Note that this is actually conservative: it would be slightly more
5767 efficient to use the value of SPILL_INDIRECT_LEVELS from
5770 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5771 opnum, ADDR_TYPE (type), ind_levels, insn);
5772 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5774 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5779 int regno = REGNO (x);
5781 if (reg_equiv_constant[regno] != 0)
5783 find_reloads_address_part (reg_equiv_constant[regno], loc,
5785 GET_MODE (x), opnum, type, ind_levels);
5789 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5790 that feeds this insn. */
5791 if (reg_equiv_mem[regno] != 0)
5793 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5795 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5800 if (reg_equiv_memory_loc[regno]
5801 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5803 rtx tem = make_memloc (x, regno);
5804 if (reg_equiv_address[regno] != 0
5805 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5808 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5809 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5811 if (!rtx_equal_p (x, tem))
5812 push_reg_equiv_alt_mem (regno, x);
5816 if (reg_renumber[regno] >= 0)
5817 regno = reg_renumber[regno];
5819 if (regno >= FIRST_PSEUDO_REGISTER
5820 || !REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5823 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5825 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5829 /* If a register appearing in an address is the subject of a CLOBBER
5830 in this insn, reload it into some other register to be safe.
5831 The CLOBBER is supposed to make the register unavailable
5832 from before this insn to after it. */
5833 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5835 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5837 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5844 if (REG_P (SUBREG_REG (x)))
5846 /* If this is a SUBREG of a hard register and the resulting register
5847 is of the wrong class, reload the whole SUBREG. This avoids
5848 needless copies if SUBREG_REG is multi-word. */
5849 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5851 int regno ATTRIBUTE_UNUSED = subreg_regno (x);
5853 if (!REG_OK_FOR_CONTEXT (context, regno, mode, outer_code,
5856 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5858 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5862 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5863 is larger than the class size, then reload the whole SUBREG. */
5866 enum reg_class class = context_reg_class;
5867 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5868 > reg_class_size[class])
5870 x = find_reloads_subreg_address (x, 0, opnum,
5873 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5874 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5886 const char *fmt = GET_RTX_FORMAT (code);
5889 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5892 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
5894 find_reloads_address_1 (mode, XEXP (x, i), context, code, SCRATCH,
5895 &XEXP (x, i), opnum, type, ind_levels, insn);
5899 #undef REG_OK_FOR_CONTEXT
5903 /* X, which is found at *LOC, is a part of an address that needs to be
5904 reloaded into a register of class CLASS. If X is a constant, or if
5905 X is a PLUS that contains a constant, check that the constant is a
5906 legitimate operand and that we are supposed to be able to load
5907 it into the register.
5909 If not, force the constant into memory and reload the MEM instead.
5911 MODE is the mode to use, in case X is an integer constant.
5913 OPNUM and TYPE describe the purpose of any reloads made.
5915 IND_LEVELS says how many levels of indirect addressing this machine
5919 find_reloads_address_part (rtx x, rtx *loc, enum reg_class class,
5920 enum machine_mode mode, int opnum,
5921 enum reload_type type, int ind_levels)
5924 && (! LEGITIMATE_CONSTANT_P (x)
5925 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5929 tem = x = force_const_mem (mode, x);
5930 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5931 opnum, type, ind_levels, 0);
5934 else if (GET_CODE (x) == PLUS
5935 && CONSTANT_P (XEXP (x, 1))
5936 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5937 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5941 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5942 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5943 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5944 opnum, type, ind_levels, 0);
5947 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5948 mode, VOIDmode, 0, 0, opnum, type);
5951 /* X, a subreg of a pseudo, is a part of an address that needs to be
5954 If the pseudo is equivalent to a memory location that cannot be directly
5955 addressed, make the necessary address reloads.
5957 If address reloads have been necessary, or if the address is changed
5958 by register elimination, return the rtx of the memory location;
5959 otherwise, return X.
5961 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5964 OPNUM and TYPE identify the purpose of the reload.
5966 IND_LEVELS says how many levels of indirect addressing are
5967 supported at this point in the address.
5969 INSN, if nonzero, is the insn in which we do the reload. It is used
5970 to determine where to put USEs for pseudos that we have to replace with
5974 find_reloads_subreg_address (rtx x, int force_replace, int opnum,
5975 enum reload_type type, int ind_levels, rtx insn)
5977 int regno = REGNO (SUBREG_REG (x));
5979 if (reg_equiv_memory_loc[regno])
5981 /* If the address is not directly addressable, or if the address is not
5982 offsettable, then it must be replaced. */
5984 && (reg_equiv_address[regno]
5985 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5988 if (force_replace || num_not_at_initial_offset)
5990 rtx tem = make_memloc (SUBREG_REG (x), regno);
5992 /* If the address changes because of register elimination, then
5993 it must be replaced. */
5995 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5997 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5998 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
6001 enum machine_mode orig_mode = GET_MODE (orig);
6004 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
6005 hold the correct (negative) byte offset. */
6006 if (BYTES_BIG_ENDIAN && outer_size > inner_size)
6007 offset = inner_size - outer_size;
6009 offset = SUBREG_BYTE (x);
6011 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
6012 PUT_MODE (tem, GET_MODE (x));
6014 /* If this was a paradoxical subreg that we replaced, the
6015 resulting memory must be sufficiently aligned to allow
6016 us to widen the mode of the memory. */
6017 if (outer_size > inner_size)
6021 base = XEXP (tem, 0);
6022 if (GET_CODE (base) == PLUS)
6024 if (GET_CODE (XEXP (base, 1)) == CONST_INT
6025 && INTVAL (XEXP (base, 1)) % outer_size != 0)
6027 base = XEXP (base, 0);
6030 || (REGNO_POINTER_ALIGN (REGNO (base))
6031 < outer_size * BITS_PER_UNIT))
6035 reloaded = find_reloads_address (GET_MODE (tem), &tem,
6036 XEXP (tem, 0), &XEXP (tem, 0),
6037 opnum, type, ind_levels, insn);
6038 /* ??? Do we need to handle nonzero offsets somehow? */
6039 if (!offset && !rtx_equal_p (tem, orig))
6040 push_reg_equiv_alt_mem (regno, tem);
6042 /* For some processors an address may be valid in the
6043 original mode but not in a smaller mode. For
6044 example, ARM accepts a scaled index register in
6045 SImode but not in HImode. find_reloads_address
6046 assumes that we pass it a valid address, and doesn't
6047 force a reload. This will probably be fine if
6048 find_reloads_address finds some reloads. But if it
6049 doesn't find any, then we may have just converted a
6050 valid address into an invalid one. Check for that
6053 && strict_memory_address_p (orig_mode, XEXP (tem, 0))
6054 && !strict_memory_address_p (GET_MODE (tem),
6056 push_reload (XEXP (tem, 0), NULL_RTX, &XEXP (tem, 0), (rtx*) 0,
6057 base_reg_class (GET_MODE (tem), MEM, SCRATCH),
6058 GET_MODE (XEXP (tem, 0)), VOIDmode, 0, 0,
6061 /* If this is not a toplevel operand, find_reloads doesn't see
6062 this substitution. We have to emit a USE of the pseudo so
6063 that delete_output_reload can see it. */
6064 if (replace_reloads && recog_data.operand[opnum] != x)
6065 /* We mark the USE with QImode so that we recognize it
6066 as one that can be safely deleted at the end of
6068 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
6078 /* Substitute into the current INSN the registers into which we have reloaded
6079 the things that need reloading. The array `replacements'
6080 contains the locations of all pointers that must be changed
6081 and says what to replace them with.
6083 Return the rtx that X translates into; usually X, but modified. */
6086 subst_reloads (rtx insn)
6090 for (i = 0; i < n_replacements; i++)
6092 struct replacement *r = &replacements[i];
6093 rtx reloadreg = rld[r->what].reg_rtx;
6097 /* This checking takes a very long time on some platforms
6098 causing the gcc.c-torture/compile/limits-fnargs.c test
6099 to time out during testing. See PR 31850.
6101 Internal consistency test. Check that we don't modify
6102 anything in the equivalence arrays. Whenever something from
6103 those arrays needs to be reloaded, it must be unshared before
6104 being substituted into; the equivalence must not be modified.
6105 Otherwise, if the equivalence is used after that, it will
6106 have been modified, and the thing substituted (probably a
6107 register) is likely overwritten and not a usable equivalence. */
6110 for (check_regno = 0; check_regno < max_regno; check_regno++)
6112 #define CHECK_MODF(ARRAY) \
6113 gcc_assert (!ARRAY[check_regno] \
6114 || !loc_mentioned_in_p (r->where, \
6115 ARRAY[check_regno]))
6117 CHECK_MODF (reg_equiv_constant);
6118 CHECK_MODF (reg_equiv_memory_loc);
6119 CHECK_MODF (reg_equiv_address);
6120 CHECK_MODF (reg_equiv_mem);
6123 #endif /* DEBUG_RELOAD */
6125 /* If we're replacing a LABEL_REF with a register, add a
6126 REG_LABEL note to indicate to flow which label this
6127 register refers to. */
6128 if (GET_CODE (*r->where) == LABEL_REF
6131 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
6132 XEXP (*r->where, 0),
6134 JUMP_LABEL (insn) = XEXP (*r->where, 0);
6137 /* Encapsulate RELOADREG so its machine mode matches what
6138 used to be there. Note that gen_lowpart_common will
6139 do the wrong thing if RELOADREG is multi-word. RELOADREG
6140 will always be a REG here. */
6141 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
6142 reloadreg = reload_adjust_reg_for_mode (reloadreg, r->mode);
6144 /* If we are putting this into a SUBREG and RELOADREG is a
6145 SUBREG, we would be making nested SUBREGs, so we have to fix
6146 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6148 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
6150 if (GET_MODE (*r->subreg_loc)
6151 == GET_MODE (SUBREG_REG (reloadreg)))
6152 *r->subreg_loc = SUBREG_REG (reloadreg);
6156 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
6158 /* When working with SUBREGs the rule is that the byte
6159 offset must be a multiple of the SUBREG's mode. */
6160 final_offset = (final_offset /
6161 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6162 final_offset = (final_offset *
6163 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
6165 *r->where = SUBREG_REG (reloadreg);
6166 SUBREG_BYTE (*r->subreg_loc) = final_offset;
6170 *r->where = reloadreg;
6172 /* If reload got no reg and isn't optional, something's wrong. */
6174 gcc_assert (rld[r->what].optional);
6178 /* Make a copy of any replacements being done into X and move those
6179 copies to locations in Y, a copy of X. */
6182 copy_replacements (rtx x, rtx y)
6184 /* We can't support X being a SUBREG because we might then need to know its
6185 location if something inside it was replaced. */
6186 gcc_assert (GET_CODE (x) != SUBREG);
6188 copy_replacements_1 (&x, &y, n_replacements);
6192 copy_replacements_1 (rtx *px, rtx *py, int orig_replacements)
6196 struct replacement *r;
6200 for (j = 0; j < orig_replacements; j++)
6202 if (replacements[j].subreg_loc == px)
6204 r = &replacements[n_replacements++];
6205 r->where = replacements[j].where;
6207 r->what = replacements[j].what;
6208 r->mode = replacements[j].mode;
6210 else if (replacements[j].where == px)
6212 r = &replacements[n_replacements++];
6215 r->what = replacements[j].what;
6216 r->mode = replacements[j].mode;
6222 code = GET_CODE (x);
6223 fmt = GET_RTX_FORMAT (code);
6225 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6228 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6229 else if (fmt[i] == 'E')
6230 for (j = XVECLEN (x, i); --j >= 0; )
6231 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6236 /* Change any replacements being done to *X to be done to *Y. */
6239 move_replacements (rtx *x, rtx *y)
6243 for (i = 0; i < n_replacements; i++)
6244 if (replacements[i].subreg_loc == x)
6245 replacements[i].subreg_loc = y;
6246 else if (replacements[i].where == x)
6248 replacements[i].where = y;
6249 replacements[i].subreg_loc = 0;
6253 /* If LOC was scheduled to be replaced by something, return the replacement.
6254 Otherwise, return *LOC. */
6257 find_replacement (rtx *loc)
6259 struct replacement *r;
6261 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6263 rtx reloadreg = rld[r->what].reg_rtx;
6265 if (reloadreg && r->where == loc)
6267 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6268 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6272 else if (reloadreg && r->subreg_loc == loc)
6274 /* RELOADREG must be either a REG or a SUBREG.
6276 ??? Is it actually still ever a SUBREG? If so, why? */
6278 if (REG_P (reloadreg))
6279 return gen_rtx_REG (GET_MODE (*loc),
6280 (REGNO (reloadreg) +
6281 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6282 GET_MODE (SUBREG_REG (*loc)),
6285 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6289 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6291 /* When working with SUBREGs the rule is that the byte
6292 offset must be a multiple of the SUBREG's mode. */
6293 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6294 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6295 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6301 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6302 what's inside and make a new rtl if so. */
6303 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6304 || GET_CODE (*loc) == MULT)
6306 rtx x = find_replacement (&XEXP (*loc, 0));
6307 rtx y = find_replacement (&XEXP (*loc, 1));
6309 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6310 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6316 /* Return nonzero if register in range [REGNO, ENDREGNO)
6317 appears either explicitly or implicitly in X
6318 other than being stored into (except for earlyclobber operands).
6320 References contained within the substructure at LOC do not count.
6321 LOC may be zero, meaning don't ignore anything.
6323 This is similar to refers_to_regno_p in rtlanal.c except that we
6324 look at equivalences for pseudos that didn't get hard registers. */
6327 refers_to_regno_for_reload_p (unsigned int regno, unsigned int endregno,
6339 code = GET_CODE (x);
6346 /* If this is a pseudo, a hard register must not have been allocated.
6347 X must therefore either be a constant or be in memory. */
6348 if (r >= FIRST_PSEUDO_REGISTER)
6350 if (reg_equiv_memory_loc[r])
6351 return refers_to_regno_for_reload_p (regno, endregno,
6352 reg_equiv_memory_loc[r],
6355 gcc_assert (reg_equiv_constant[r] || reg_equiv_invariant[r]);
6359 return (endregno > r
6360 && regno < r + (r < FIRST_PSEUDO_REGISTER
6361 ? hard_regno_nregs[r][GET_MODE (x)]
6365 /* If this is a SUBREG of a hard reg, we can see exactly which
6366 registers are being modified. Otherwise, handle normally. */
6367 if (REG_P (SUBREG_REG (x))
6368 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6370 unsigned int inner_regno = subreg_regno (x);
6371 unsigned int inner_endregno
6372 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6373 ? subreg_nregs (x) : 1);
6375 return endregno > inner_regno && regno < inner_endregno;
6381 if (&SET_DEST (x) != loc
6382 /* Note setting a SUBREG counts as referring to the REG it is in for
6383 a pseudo but not for hard registers since we can
6384 treat each word individually. */
6385 && ((GET_CODE (SET_DEST (x)) == SUBREG
6386 && loc != &SUBREG_REG (SET_DEST (x))
6387 && REG_P (SUBREG_REG (SET_DEST (x)))
6388 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6389 && refers_to_regno_for_reload_p (regno, endregno,
6390 SUBREG_REG (SET_DEST (x)),
6392 /* If the output is an earlyclobber operand, this is
6394 || ((!REG_P (SET_DEST (x))
6395 || earlyclobber_operand_p (SET_DEST (x)))
6396 && refers_to_regno_for_reload_p (regno, endregno,
6397 SET_DEST (x), loc))))
6400 if (code == CLOBBER || loc == &SET_SRC (x))
6409 /* X does not match, so try its subexpressions. */
6411 fmt = GET_RTX_FORMAT (code);
6412 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6414 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6422 if (refers_to_regno_for_reload_p (regno, endregno,
6426 else if (fmt[i] == 'E')
6429 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6430 if (loc != &XVECEXP (x, i, j)
6431 && refers_to_regno_for_reload_p (regno, endregno,
6432 XVECEXP (x, i, j), loc))
6439 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6440 we check if any register number in X conflicts with the relevant register
6441 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6442 contains a MEM (we don't bother checking for memory addresses that can't
6443 conflict because we expect this to be a rare case.
6445 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6446 that we look at equivalences for pseudos that didn't get hard registers. */
6449 reg_overlap_mentioned_for_reload_p (rtx x, rtx in)
6451 int regno, endregno;
6453 /* Overly conservative. */
6454 if (GET_CODE (x) == STRICT_LOW_PART
6455 || GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC)
6458 /* If either argument is a constant, then modifying X can not affect IN. */
6459 if (CONSTANT_P (x) || CONSTANT_P (in))
6461 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == MEM)
6462 return refers_to_mem_for_reload_p (in);
6463 else if (GET_CODE (x) == SUBREG)
6465 regno = REGNO (SUBREG_REG (x));
6466 if (regno < FIRST_PSEUDO_REGISTER)
6467 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6468 GET_MODE (SUBREG_REG (x)),
6471 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6472 ? subreg_nregs (x) : 1);
6474 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6480 /* If this is a pseudo, it must not have been assigned a hard register.
6481 Therefore, it must either be in memory or be a constant. */
6483 if (regno >= FIRST_PSEUDO_REGISTER)
6485 if (reg_equiv_memory_loc[regno])
6486 return refers_to_mem_for_reload_p (in);
6487 gcc_assert (reg_equiv_constant[regno]);
6491 endregno = END_HARD_REGNO (x);
6493 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6496 return refers_to_mem_for_reload_p (in);
6497 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6498 || GET_CODE (x) == CC0)
6499 return reg_mentioned_p (x, in);
6502 gcc_assert (GET_CODE (x) == PLUS);
6504 /* We actually want to know if X is mentioned somewhere inside IN.
6505 We must not say that (plus (sp) (const_int 124)) is in
6506 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6507 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6508 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6513 else if (GET_CODE (in) == PLUS)
6514 return (rtx_equal_p (x, in)
6515 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 0))
6516 || reg_overlap_mentioned_for_reload_p (x, XEXP (in, 1)));
6517 else return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6518 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6524 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6528 refers_to_mem_for_reload_p (rtx x)
6537 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6538 && reg_equiv_memory_loc[REGNO (x)]);
6540 fmt = GET_RTX_FORMAT (GET_CODE (x));
6541 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6543 && (MEM_P (XEXP (x, i))
6544 || refers_to_mem_for_reload_p (XEXP (x, i))))
6550 /* Check the insns before INSN to see if there is a suitable register
6551 containing the same value as GOAL.
6552 If OTHER is -1, look for a register in class CLASS.
6553 Otherwise, just see if register number OTHER shares GOAL's value.
6555 Return an rtx for the register found, or zero if none is found.
6557 If RELOAD_REG_P is (short *)1,
6558 we reject any hard reg that appears in reload_reg_rtx
6559 because such a hard reg is also needed coming into this insn.
6561 If RELOAD_REG_P is any other nonzero value,
6562 it is a vector indexed by hard reg number
6563 and we reject any hard reg whose element in the vector is nonnegative
6564 as well as any that appears in reload_reg_rtx.
6566 If GOAL is zero, then GOALREG is a register number; we look
6567 for an equivalent for that register.
6569 MODE is the machine mode of the value we want an equivalence for.
6570 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6572 This function is used by jump.c as well as in the reload pass.
6574 If GOAL is the sum of the stack pointer and a constant, we treat it
6575 as if it were a constant except that sp is required to be unchanging. */
6578 find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
6579 short *reload_reg_p, int goalreg, enum machine_mode mode)
6582 rtx goaltry, valtry, value, where;
6588 int goal_mem_addr_varies = 0;
6589 int need_stable_sp = 0;
6596 else if (REG_P (goal))
6597 regno = REGNO (goal);
6598 else if (MEM_P (goal))
6600 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6601 if (MEM_VOLATILE_P (goal))
6603 if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
6605 /* An address with side effects must be reexecuted. */
6620 else if (CONSTANT_P (goal))
6622 else if (GET_CODE (goal) == PLUS
6623 && XEXP (goal, 0) == stack_pointer_rtx
6624 && CONSTANT_P (XEXP (goal, 1)))
6625 goal_const = need_stable_sp = 1;
6626 else if (GET_CODE (goal) == PLUS
6627 && XEXP (goal, 0) == frame_pointer_rtx
6628 && CONSTANT_P (XEXP (goal, 1)))
6634 /* Scan insns back from INSN, looking for one that copies
6635 a value into or out of GOAL.
6636 Stop and give up if we reach a label. */
6642 if (p == 0 || LABEL_P (p)
6643 || num > PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS))
6646 if (NONJUMP_INSN_P (p)
6647 /* If we don't want spill regs ... */
6648 && (! (reload_reg_p != 0
6649 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6650 /* ... then ignore insns introduced by reload; they aren't
6651 useful and can cause results in reload_as_needed to be
6652 different from what they were when calculating the need for
6653 spills. If we notice an input-reload insn here, we will
6654 reject it below, but it might hide a usable equivalent.
6655 That makes bad code. It may even fail: perhaps no reg was
6656 spilled for this insn because it was assumed we would find
6658 || INSN_UID (p) < reload_first_uid))
6661 pat = single_set (p);
6663 /* First check for something that sets some reg equal to GOAL. */
6666 && true_regnum (SET_SRC (pat)) == regno
6667 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6670 && true_regnum (SET_DEST (pat)) == regno
6671 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6673 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6674 /* When looking for stack pointer + const,
6675 make sure we don't use a stack adjust. */
6676 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6677 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6679 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6680 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6682 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6683 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6684 /* If we are looking for a constant,
6685 and something equivalent to that constant was copied
6686 into a reg, we can use that reg. */
6687 || (goal_const && REG_NOTES (p) != 0
6688 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6689 && ((rtx_equal_p (XEXP (tem, 0), goal)
6691 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6692 || (REG_P (SET_DEST (pat))
6693 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6694 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6695 && GET_CODE (goal) == CONST_INT
6697 = operand_subword (XEXP (tem, 0), 0, 0,
6699 && rtx_equal_p (goal, goaltry)
6701 = operand_subword (SET_DEST (pat), 0, 0,
6703 && (valueno = true_regnum (valtry)) >= 0)))
6704 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6706 && REG_P (SET_DEST (pat))
6707 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6708 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
6709 && GET_CODE (goal) == CONST_INT
6710 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6712 && rtx_equal_p (goal, goaltry)
6714 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6715 && (valueno = true_regnum (valtry)) >= 0)))
6719 if (valueno != other)
6722 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6724 else if (!in_hard_reg_set_p (reg_class_contents[(int) class],
6734 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6735 (or copying VALUE into GOAL, if GOAL is also a register).
6736 Now verify that VALUE is really valid. */
6738 /* VALUENO is the register number of VALUE; a hard register. */
6740 /* Don't try to re-use something that is killed in this insn. We want
6741 to be able to trust REG_UNUSED notes. */
6742 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6745 /* If we propose to get the value from the stack pointer or if GOAL is
6746 a MEM based on the stack pointer, we need a stable SP. */
6747 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6748 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6752 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6753 if (GET_MODE (value) != mode)
6756 /* Reject VALUE if it was loaded from GOAL
6757 and is also a register that appears in the address of GOAL. */
6759 if (goal_mem && value == SET_DEST (single_set (where))
6760 && refers_to_regno_for_reload_p (valueno, end_hard_regno (mode, valueno),
6764 /* Reject registers that overlap GOAL. */
6766 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6767 nregs = hard_regno_nregs[regno][mode];
6770 valuenregs = hard_regno_nregs[valueno][mode];
6772 if (!goal_mem && !goal_const
6773 && regno + nregs > valueno && regno < valueno + valuenregs)
6776 /* Reject VALUE if it is one of the regs reserved for reloads.
6777 Reload1 knows how to reuse them anyway, and it would get
6778 confused if we allocated one without its knowledge.
6779 (Now that insns introduced by reload are ignored above,
6780 this case shouldn't happen, but I'm not positive.) */
6782 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6785 for (i = 0; i < valuenregs; ++i)
6786 if (reload_reg_p[valueno + i] >= 0)
6790 /* Reject VALUE if it is a register being used for an input reload
6791 even if it is not one of those reserved. */
6793 if (reload_reg_p != 0)
6796 for (i = 0; i < n_reloads; i++)
6797 if (rld[i].reg_rtx != 0 && rld[i].in)
6799 int regno1 = REGNO (rld[i].reg_rtx);
6800 int nregs1 = hard_regno_nregs[regno1]
6801 [GET_MODE (rld[i].reg_rtx)];
6802 if (regno1 < valueno + valuenregs
6803 && regno1 + nregs1 > valueno)
6809 /* We must treat frame pointer as varying here,
6810 since it can vary--in a nonlocal goto as generated by expand_goto. */
6811 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6813 /* Now verify that the values of GOAL and VALUE remain unaltered
6814 until INSN is reached. */
6823 /* Don't trust the conversion past a function call
6824 if either of the two is in a call-clobbered register, or memory. */
6829 if (goal_mem || need_stable_sp)
6832 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6833 for (i = 0; i < nregs; ++i)
6834 if (call_used_regs[regno + i]
6835 || HARD_REGNO_CALL_PART_CLOBBERED (regno + i, mode))
6838 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6839 for (i = 0; i < valuenregs; ++i)
6840 if (call_used_regs[valueno + i]
6841 || HARD_REGNO_CALL_PART_CLOBBERED (valueno + i, mode))
6849 /* Watch out for unspec_volatile, and volatile asms. */
6850 if (volatile_insn_p (pat))
6853 /* If this insn P stores in either GOAL or VALUE, return 0.
6854 If GOAL is a memory ref and this insn writes memory, return 0.
6855 If GOAL is a memory ref and its address is not constant,
6856 and this insn P changes a register used in GOAL, return 0. */
6858 if (GET_CODE (pat) == COND_EXEC)
6859 pat = COND_EXEC_CODE (pat);
6860 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6862 rtx dest = SET_DEST (pat);
6863 while (GET_CODE (dest) == SUBREG
6864 || GET_CODE (dest) == ZERO_EXTRACT
6865 || GET_CODE (dest) == STRICT_LOW_PART)
6866 dest = XEXP (dest, 0);
6869 int xregno = REGNO (dest);
6871 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6872 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6875 if (xregno < regno + nregs && xregno + xnregs > regno)
6877 if (xregno < valueno + valuenregs
6878 && xregno + xnregs > valueno)
6880 if (goal_mem_addr_varies
6881 && reg_overlap_mentioned_for_reload_p (dest, goal))
6883 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6886 else if (goal_mem && MEM_P (dest)
6887 && ! push_operand (dest, GET_MODE (dest)))
6889 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6890 && reg_equiv_memory_loc[regno] != 0)
6892 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6895 else if (GET_CODE (pat) == PARALLEL)
6898 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6900 rtx v1 = XVECEXP (pat, 0, i);
6901 if (GET_CODE (v1) == COND_EXEC)
6902 v1 = COND_EXEC_CODE (v1);
6903 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6905 rtx dest = SET_DEST (v1);
6906 while (GET_CODE (dest) == SUBREG
6907 || GET_CODE (dest) == ZERO_EXTRACT
6908 || GET_CODE (dest) == STRICT_LOW_PART)
6909 dest = XEXP (dest, 0);
6912 int xregno = REGNO (dest);
6914 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6915 xnregs = hard_regno_nregs[xregno][GET_MODE (dest)];
6918 if (xregno < regno + nregs
6919 && xregno + xnregs > regno)
6921 if (xregno < valueno + valuenregs
6922 && xregno + xnregs > valueno)
6924 if (goal_mem_addr_varies
6925 && reg_overlap_mentioned_for_reload_p (dest,
6928 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6931 else if (goal_mem && MEM_P (dest)
6932 && ! push_operand (dest, GET_MODE (dest)))
6934 else if (MEM_P (dest) && regno >= FIRST_PSEUDO_REGISTER
6935 && reg_equiv_memory_loc[regno] != 0)
6937 else if (need_stable_sp
6938 && push_operand (dest, GET_MODE (dest)))
6944 if (CALL_P (p) && CALL_INSN_FUNCTION_USAGE (p))
6948 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6949 link = XEXP (link, 1))
6951 pat = XEXP (link, 0);
6952 if (GET_CODE (pat) == CLOBBER)
6954 rtx dest = SET_DEST (pat);
6958 int xregno = REGNO (dest);
6960 = hard_regno_nregs[xregno][GET_MODE (dest)];
6962 if (xregno < regno + nregs
6963 && xregno + xnregs > regno)
6965 else if (xregno < valueno + valuenregs
6966 && xregno + xnregs > valueno)
6968 else if (goal_mem_addr_varies
6969 && reg_overlap_mentioned_for_reload_p (dest,
6974 else if (goal_mem && MEM_P (dest)
6975 && ! push_operand (dest, GET_MODE (dest)))
6977 else if (need_stable_sp
6978 && push_operand (dest, GET_MODE (dest)))
6985 /* If this insn auto-increments or auto-decrements
6986 either regno or valueno, return 0 now.
6987 If GOAL is a memory ref and its address is not constant,
6988 and this insn P increments a register used in GOAL, return 0. */
6992 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6993 if (REG_NOTE_KIND (link) == REG_INC
6994 && REG_P (XEXP (link, 0)))
6996 int incno = REGNO (XEXP (link, 0));
6997 if (incno < regno + nregs && incno >= regno)
6999 if (incno < valueno + valuenregs && incno >= valueno)
7001 if (goal_mem_addr_varies
7002 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
7012 /* Find a place where INCED appears in an increment or decrement operator
7013 within X, and return the amount INCED is incremented or decremented by.
7014 The value is always positive. */
7017 find_inc_amount (rtx x, rtx inced)
7019 enum rtx_code code = GET_CODE (x);
7025 rtx addr = XEXP (x, 0);
7026 if ((GET_CODE (addr) == PRE_DEC
7027 || GET_CODE (addr) == POST_DEC
7028 || GET_CODE (addr) == PRE_INC
7029 || GET_CODE (addr) == POST_INC)
7030 && XEXP (addr, 0) == inced)
7031 return GET_MODE_SIZE (GET_MODE (x));
7032 else if ((GET_CODE (addr) == PRE_MODIFY
7033 || GET_CODE (addr) == POST_MODIFY)
7034 && GET_CODE (XEXP (addr, 1)) == PLUS
7035 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
7036 && XEXP (addr, 0) == inced
7037 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
7039 i = INTVAL (XEXP (XEXP (addr, 1), 1));
7040 return i < 0 ? -i : i;
7044 fmt = GET_RTX_FORMAT (code);
7045 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7049 int tem = find_inc_amount (XEXP (x, i), inced);
7056 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7058 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
7068 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7069 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7073 reg_inc_found_and_valid_p (unsigned int regno, unsigned int endregno,
7080 if (! INSN_P (insn))
7083 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
7084 if (REG_NOTE_KIND (link) == REG_INC)
7086 unsigned int test = (int) REGNO (XEXP (link, 0));
7087 if (test >= regno && test < endregno)
7094 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7098 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7099 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7100 REG_INC. REGNO must refer to a hard register. */
7103 regno_clobbered_p (unsigned int regno, rtx insn, enum machine_mode mode,
7106 unsigned int nregs, endregno;
7108 /* regno must be a hard register. */
7109 gcc_assert (regno < FIRST_PSEUDO_REGISTER);
7111 nregs = hard_regno_nregs[regno][mode];
7112 endregno = regno + nregs;
7114 if ((GET_CODE (PATTERN (insn)) == CLOBBER
7115 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7116 && REG_P (XEXP (PATTERN (insn), 0)))
7118 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
7120 return test >= regno && test < endregno;
7123 if (sets == 2 && reg_inc_found_and_valid_p (regno, endregno, insn))
7126 if (GET_CODE (PATTERN (insn)) == PARALLEL)
7128 int i = XVECLEN (PATTERN (insn), 0) - 1;
7132 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7133 if ((GET_CODE (elt) == CLOBBER
7134 || (sets == 1 && GET_CODE (PATTERN (insn)) == SET))
7135 && REG_P (XEXP (elt, 0)))
7137 unsigned int test = REGNO (XEXP (elt, 0));
7139 if (test >= regno && test < endregno)
7143 && reg_inc_found_and_valid_p (regno, endregno, elt))
7151 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7153 reload_adjust_reg_for_mode (rtx reloadreg, enum machine_mode mode)
7157 if (GET_MODE (reloadreg) == mode)
7160 regno = REGNO (reloadreg);
7162 if (WORDS_BIG_ENDIAN)
7163 regno += (int) hard_regno_nregs[regno][GET_MODE (reloadreg)]
7164 - (int) hard_regno_nregs[regno][mode];
7166 return gen_rtx_REG (mode, regno);
7169 static const char *const reload_when_needed_name[] =
7172 "RELOAD_FOR_OUTPUT",
7174 "RELOAD_FOR_INPUT_ADDRESS",
7175 "RELOAD_FOR_INPADDR_ADDRESS",
7176 "RELOAD_FOR_OUTPUT_ADDRESS",
7177 "RELOAD_FOR_OUTADDR_ADDRESS",
7178 "RELOAD_FOR_OPERAND_ADDRESS",
7179 "RELOAD_FOR_OPADDR_ADDR",
7181 "RELOAD_FOR_OTHER_ADDRESS"
7184 /* These functions are used to print the variables set by 'find_reloads' */
7187 debug_reload_to_stream (FILE *f)
7194 for (r = 0; r < n_reloads; r++)
7196 fprintf (f, "Reload %d: ", r);
7200 fprintf (f, "reload_in (%s) = ",
7201 GET_MODE_NAME (rld[r].inmode));
7202 print_inline_rtx (f, rld[r].in, 24);
7203 fprintf (f, "\n\t");
7206 if (rld[r].out != 0)
7208 fprintf (f, "reload_out (%s) = ",
7209 GET_MODE_NAME (rld[r].outmode));
7210 print_inline_rtx (f, rld[r].out, 24);
7211 fprintf (f, "\n\t");
7214 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
7216 fprintf (f, "%s (opnum = %d)",
7217 reload_when_needed_name[(int) rld[r].when_needed],
7220 if (rld[r].optional)
7221 fprintf (f, ", optional");
7223 if (rld[r].nongroup)
7224 fprintf (f, ", nongroup");
7226 if (rld[r].inc != 0)
7227 fprintf (f, ", inc by %d", rld[r].inc);
7229 if (rld[r].nocombine)
7230 fprintf (f, ", can't combine");
7232 if (rld[r].secondary_p)
7233 fprintf (f, ", secondary_reload_p");
7235 if (rld[r].in_reg != 0)
7237 fprintf (f, "\n\treload_in_reg: ");
7238 print_inline_rtx (f, rld[r].in_reg, 24);
7241 if (rld[r].out_reg != 0)
7243 fprintf (f, "\n\treload_out_reg: ");
7244 print_inline_rtx (f, rld[r].out_reg, 24);
7247 if (rld[r].reg_rtx != 0)
7249 fprintf (f, "\n\treload_reg_rtx: ");
7250 print_inline_rtx (f, rld[r].reg_rtx, 24);
7254 if (rld[r].secondary_in_reload != -1)
7256 fprintf (f, "%ssecondary_in_reload = %d",
7257 prefix, rld[r].secondary_in_reload);
7261 if (rld[r].secondary_out_reload != -1)
7262 fprintf (f, "%ssecondary_out_reload = %d\n",
7263 prefix, rld[r].secondary_out_reload);
7266 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7268 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7269 insn_data[rld[r].secondary_in_icode].name);
7273 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7274 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7275 insn_data[rld[r].secondary_out_icode].name);
7284 debug_reload_to_stream (stderr);