1 /* Decompose multiword subregs.
2 Copyright (C) 2007 Free Software Foundation, Inc.
3 Contributed by Richard Henderson <rth@redhat.com>
4 Ian Lance Taylor <iant@google.com>
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
25 #include "coretypes.h"
32 #include "insn-config.h"
34 #include "basic-block.h"
40 #include "tree-pass.h"
42 #ifdef STACK_GROWS_DOWNWARD
43 # undef STACK_GROWS_DOWNWARD
44 # define STACK_GROWS_DOWNWARD 1
46 # define STACK_GROWS_DOWNWARD 0
50 DEF_VEC_ALLOC_P (bitmap,heap);
52 /* Decompose multi-word pseudo-registers into individual
53 pseudo-registers when possible. This is possible when all the uses
54 of a multi-word register are via SUBREG, or are copies of the
55 register to another location. Breaking apart the register permits
56 more CSE and permits better register allocation. */
58 /* Bit N in this bitmap is set if regno N is used in a context in
59 which we can decompose it. */
60 static bitmap decomposable_context;
62 /* Bit N in this bitmap is set if regno N is used in a context in
63 which it can not be decomposed. */
64 static bitmap non_decomposable_context;
66 /* Bit N in the bitmap in element M of this array is set if there is a
67 copy from reg M to reg N. */
68 static VEC(bitmap,heap) *reg_copy_graph;
70 /* Return whether X is a simple object which we can take a word_mode
74 simple_move_operand (rtx x)
76 if (GET_CODE (x) == SUBREG)
82 if (GET_CODE (x) == LABEL_REF
83 || GET_CODE (x) == SYMBOL_REF
84 || GET_CODE (x) == HIGH
85 || GET_CODE (x) == CONST)
89 && (MEM_VOLATILE_P (x)
90 || mode_dependent_address_p (XEXP (x, 0))))
96 /* If INSN is a single set between two objects, return the single set.
97 Such an insn can always be decomposed. INSN should have been
98 passed to recog and extract_insn before this is called. */
101 simple_move (rtx insn)
105 enum machine_mode mode;
107 if (recog_data.n_operands != 2)
110 set = single_set (insn);
115 if (x != recog_data.operand[0] && x != recog_data.operand[1])
117 if (!simple_move_operand (x))
121 if (x != recog_data.operand[0] && x != recog_data.operand[1])
123 /* For the src we can handle ASM_OPERANDS, and it is beneficial for
124 things like x86 rdtsc which returns a DImode value. */
125 if (GET_CODE (x) != ASM_OPERANDS
126 && !simple_move_operand (x))
129 /* We try to decompose in integer modes, to avoid generating
130 inefficient code copying between integer and floating point
131 registers. That means that we can't decompose if this is a
132 non-integer mode for which there is no integer mode of the same
134 mode = GET_MODE (SET_SRC (set));
135 if (!SCALAR_INT_MODE_P (mode)
136 && (mode_for_size (GET_MODE_SIZE (mode) * BITS_PER_UNIT, MODE_INT, 0)
140 /* Reject PARTIAL_INT modes. They are used for processor specific
141 purposes and it's probably best not to tamper with them. */
142 if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
148 /* If SET is a copy from one multi-word pseudo-register to another,
149 record that in reg_copy_graph. Return whether it is such a
153 find_pseudo_copy (rtx set)
155 rtx dest = SET_DEST (set);
156 rtx src = SET_SRC (set);
160 if (!REG_P (dest) || !REG_P (src))
165 if (HARD_REGISTER_NUM_P (rd) || HARD_REGISTER_NUM_P (rs))
168 if (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
171 b = VEC_index (bitmap, reg_copy_graph, rs);
174 b = BITMAP_ALLOC (NULL);
175 VEC_replace (bitmap, reg_copy_graph, rs, b);
178 bitmap_set_bit (b, rd);
183 /* Look through the registers in DECOMPOSABLE_CONTEXT. For each case
184 where they are copied to another register, add the register to
185 which they are copied to DECOMPOSABLE_CONTEXT. Use
186 NON_DECOMPOSABLE_CONTEXT to limit this--we don't bother to track
187 copies of registers which are in NON_DECOMPOSABLE_CONTEXT. */
190 propagate_pseudo_copies (void)
192 bitmap queue, propagate;
194 queue = BITMAP_ALLOC (NULL);
195 propagate = BITMAP_ALLOC (NULL);
197 bitmap_copy (queue, decomposable_context);
200 bitmap_iterator iter;
203 bitmap_clear (propagate);
205 EXECUTE_IF_SET_IN_BITMAP (queue, 0, i, iter)
207 bitmap b = VEC_index (bitmap, reg_copy_graph, i);
209 bitmap_ior_and_compl_into (propagate, b, non_decomposable_context);
212 bitmap_and_compl (queue, propagate, decomposable_context);
213 bitmap_ior_into (decomposable_context, propagate);
215 while (!bitmap_empty_p (queue));
218 BITMAP_FREE (propagate);
221 /* A pointer to one of these values is passed to
222 find_decomposable_subregs via for_each_rtx. */
224 enum classify_move_insn
226 /* Not a simple move from one location to another. */
228 /* A simple move from one pseudo-register to another with no
230 SIMPLE_PSEUDO_REG_MOVE,
231 /* A simple move involving a non-pseudo-register, or from one
232 pseudo-register to another with a REG_RETVAL note. */
236 /* This is called via for_each_rtx. If we find a SUBREG which we
237 could use to decompose a pseudo-register, set a bit in
238 DECOMPOSABLE_CONTEXT. If we find an unadorned register which is
239 not a simple pseudo-register copy, DATA will point at the type of
240 move, and we set a bit in DECOMPOSABLE_CONTEXT or
241 NON_DECOMPOSABLE_CONTEXT as appropriate. */
244 find_decomposable_subregs (rtx *px, void *data)
246 enum classify_move_insn *pcmi = (enum classify_move_insn *) data;
252 if (GET_CODE (x) == SUBREG)
254 rtx inner = SUBREG_REG (x);
255 unsigned int regno, outer_size, inner_size, outer_words, inner_words;
260 regno = REGNO (inner);
261 if (HARD_REGISTER_NUM_P (regno))
264 outer_size = GET_MODE_SIZE (GET_MODE (x));
265 inner_size = GET_MODE_SIZE (GET_MODE (inner));
266 outer_words = (outer_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
267 inner_words = (inner_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
269 /* We only try to decompose single word subregs of multi-word
270 registers. When we find one, we return -1 to avoid iterating
271 over the inner register.
273 ??? This doesn't allow, e.g., DImode subregs of TImode values
274 on 32-bit targets. We would need to record the way the
275 pseudo-register was used, and only decompose if all the uses
276 were the same number and size of pieces. Hopefully this
277 doesn't happen much. */
279 if (outer_words == 1 && inner_words > 1)
281 bitmap_set_bit (decomposable_context, regno);
285 /* If this is a cast from one mode to another, where the modes
286 have the same size, and they are not tieable, then mark this
287 register as non-decomposable. If we decompose it we are
288 likely to mess up whatever the backend is trying to do. */
290 && outer_size == inner_size
291 && !MODES_TIEABLE_P (GET_MODE (x), GET_MODE (inner)))
293 bitmap_set_bit (non_decomposable_context, regno);
301 /* We will see an outer SUBREG before we see the inner REG, so
302 when we see a plain REG here it means a direct reference to
305 If this is not a simple copy from one location to another,
306 then we can not decompose this register. If this is a simple
307 copy from one pseudo-register to another, with no REG_RETVAL
308 note, and the mode is right, then we mark the register as
309 decomposable. Otherwise we don't say anything about this
310 register--it could be decomposed, but whether that would be
311 profitable depends upon how it is used elsewhere.
313 We only set bits in the bitmap for multi-word
314 pseudo-registers, since those are the only ones we care about
315 and it keeps the size of the bitmaps down. */
318 if (!HARD_REGISTER_NUM_P (regno)
319 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
323 case NOT_SIMPLE_MOVE:
324 bitmap_set_bit (non_decomposable_context, regno);
326 case SIMPLE_PSEUDO_REG_MOVE:
327 if (MODES_TIEABLE_P (GET_MODE (x), word_mode))
328 bitmap_set_bit (decomposable_context, regno);
339 enum classify_move_insn cmi_mem = NOT_SIMPLE_MOVE;
341 /* Any registers used in a MEM do not participate in a
342 SIMPLE_MOVE or SIMPLE_PSEUDO_REG_MOVE. Do our own recursion
343 here, and return -1 to block the parent's recursion. */
344 for_each_rtx (&XEXP (x, 0), find_decomposable_subregs, &cmi_mem);
351 /* Decompose REGNO into word-sized components. We smash the REG node
352 in place. This ensures that (1) something goes wrong quickly if we
353 fail to make some replacement, and (2) the debug information inside
354 the symbol table is automatically kept up to date. */
357 decompose_register (unsigned int regno)
360 unsigned int words, i;
363 reg = regno_reg_rtx[regno];
365 regno_reg_rtx[regno] = NULL_RTX;
366 clear_reg_info_regno (regno);
368 words = GET_MODE_SIZE (GET_MODE (reg));
369 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
371 v = rtvec_alloc (words);
372 for (i = 0; i < words; ++i)
373 RTVEC_ELT (v, i) = gen_reg_rtx_offset (reg, word_mode, i * UNITS_PER_WORD);
375 PUT_CODE (reg, CONCATN);
380 fprintf (dump_file, "; Splitting reg %u ->", regno);
381 for (i = 0; i < words; ++i)
382 fprintf (dump_file, " %u", REGNO (XVECEXP (reg, 0, i)));
383 fputc ('\n', dump_file);
387 /* Get a SUBREG of a CONCATN. */
390 simplify_subreg_concatn (enum machine_mode outermode, rtx op,
393 unsigned int inner_size;
394 enum machine_mode innermode;
396 unsigned int final_offset;
398 gcc_assert (GET_CODE (op) == CONCATN);
399 gcc_assert (byte % GET_MODE_SIZE (outermode) == 0);
401 innermode = GET_MODE (op);
402 gcc_assert (byte < GET_MODE_SIZE (innermode));
403 gcc_assert (GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (innermode));
405 inner_size = GET_MODE_SIZE (innermode) / XVECLEN (op, 0);
406 part = XVECEXP (op, 0, byte / inner_size);
407 final_offset = byte % inner_size;
408 if (final_offset + GET_MODE_SIZE (outermode) > inner_size)
411 return simplify_gen_subreg (outermode, part, GET_MODE (part), final_offset);
414 /* Wrapper around simplify_gen_subreg which handles CONCATN. */
417 simplify_gen_subreg_concatn (enum machine_mode outermode, rtx op,
418 enum machine_mode innermode, unsigned int byte)
422 /* We have to handle generating a SUBREG of a SUBREG of a CONCATN.
423 If OP is a SUBREG of a CONCATN, then it must be a simple mode
424 change with the same size and offset 0, or it must extract a
425 part. We shouldn't see anything else here. */
426 if (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == CONCATN)
430 if ((GET_MODE_SIZE (GET_MODE (op))
431 == GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))))
432 && SUBREG_BYTE (op) == 0)
433 return simplify_gen_subreg_concatn (outermode, SUBREG_REG (op),
434 GET_MODE (SUBREG_REG (op)), byte);
436 op2 = simplify_subreg_concatn (GET_MODE (op), SUBREG_REG (op),
440 /* We don't handle paradoxical subregs here. */
441 gcc_assert (GET_MODE_SIZE (outermode)
442 <= GET_MODE_SIZE (GET_MODE (op)));
443 gcc_assert (GET_MODE_SIZE (GET_MODE (op))
444 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))));
445 op2 = simplify_subreg_concatn (outermode, SUBREG_REG (op),
446 byte + SUBREG_BYTE (op));
447 gcc_assert (op2 != NULL_RTX);
452 gcc_assert (op != NULL_RTX);
453 gcc_assert (innermode == GET_MODE (op));
456 if (GET_CODE (op) == CONCATN)
457 return simplify_subreg_concatn (outermode, op, byte);
459 ret = simplify_gen_subreg (outermode, op, innermode, byte);
461 /* If we see an insn like (set (reg:DI) (subreg:DI (reg:SI) 0)) then
462 resolve_simple_move will ask for the high part of the paradoxical
463 subreg, which does not have a value. Just return a zero. */
465 && GET_CODE (op) == SUBREG
466 && SUBREG_BYTE (op) == 0
467 && (GET_MODE_SIZE (innermode)
468 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op)))))
469 return CONST0_RTX (outermode);
471 gcc_assert (ret != NULL_RTX);
475 /* Return whether we should resolve X into the registers into which it
479 resolve_reg_p (rtx x)
481 return GET_CODE (x) == CONCATN;
484 /* Return whether X is a SUBREG of a register which we need to
488 resolve_subreg_p (rtx x)
490 if (GET_CODE (x) != SUBREG)
492 return resolve_reg_p (SUBREG_REG (x));
495 /* This is called via for_each_rtx. Look for SUBREGs which need to be
499 resolve_subreg_use (rtx *px, void *data)
501 rtx insn = (rtx) data;
507 if (resolve_subreg_p (x))
509 x = simplify_subreg_concatn (GET_MODE (x), SUBREG_REG (x),
512 /* It is possible for a note to contain a reference which we can
513 decompose. In this case, return 1 to the caller to indicate
514 that the note must be removed. */
521 validate_change (insn, px, x, 1);
525 if (resolve_reg_p (x))
527 /* Return 1 to the caller to indicate that we found a direct
528 reference to a register which is being decomposed. This can
529 happen inside notes. */
537 /* We are deleting INSN. Move any EH_REGION notes to INSNS. */
540 move_eh_region_note (rtx insn, rtx insns)
544 note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
545 if (note == NULL_RTX)
548 gcc_assert (CALL_P (insn)
549 || (flag_non_call_exceptions && may_trap_p (PATTERN (insn))));
551 for (p = insns; p != NULL_RTX; p = NEXT_INSN (p))
554 || (flag_non_call_exceptions
556 && may_trap_p (PATTERN (p))))
557 REG_NOTES (p) = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (note, 0),
562 /* If there is a REG_LIBCALL note on OLD_START, move it to NEW_START,
563 and link the corresponding REG_RETVAL note to NEW_START. */
566 move_libcall_note (rtx old_start, rtx new_start)
568 rtx note0, note1, end;
570 note0 = find_reg_note (old_start, REG_LIBCALL, NULL);
571 if (note0 == NULL_RTX)
574 remove_note (old_start, note0);
575 end = XEXP (note0, 0);
576 note1 = find_reg_note (end, REG_RETVAL, NULL);
578 XEXP (note0, 1) = REG_NOTES (new_start);
579 REG_NOTES (new_start) = note0;
580 XEXP (note1, 0) = new_start;
583 /* Remove any REG_RETVAL note, the corresponding REG_LIBCALL note, and
584 any markers for a no-conflict block. We have decomposed the
585 registers so the non-conflict is now obvious. */
588 remove_retval_note (rtx insn1)
590 rtx note0, insn0, note1, insn;
592 note1 = find_reg_note (insn1, REG_RETVAL, NULL);
593 if (note1 == NULL_RTX)
596 insn0 = XEXP (note1, 0);
597 note0 = find_reg_note (insn0, REG_LIBCALL, NULL);
599 remove_note (insn0, note0);
600 remove_note (insn1, note1);
602 for (insn = insn0; insn != insn1; insn = NEXT_INSN (insn))
608 note = find_reg_note (insn, REG_NO_CONFLICT, NULL);
609 if (note == NULL_RTX)
611 remove_note (insn, note);
616 /* Resolve any decomposed registers which appear in register notes on
620 resolve_reg_notes (rtx insn)
624 note = find_reg_equal_equiv_note (insn);
627 if (for_each_rtx (&XEXP (note, 0), resolve_subreg_use, NULL))
629 remove_note (insn, note);
630 remove_retval_note (insn);
634 pnote = ®_NOTES (insn);
635 while (*pnote != NULL_RTX)
640 switch (REG_NOTE_KIND (note))
642 case REG_NO_CONFLICT:
643 if (resolve_reg_p (XEXP (note, 0)))
652 *pnote = XEXP (note, 1);
654 pnote = &XEXP (note, 1);
658 /* Return whether X can be decomposed into subwords. */
661 can_decompose_p (rtx x)
665 unsigned int regno = REGNO (x);
667 if (HARD_REGISTER_NUM_P (regno))
668 return (validate_subreg (word_mode, GET_MODE (x), x, UNITS_PER_WORD)
669 && HARD_REGNO_MODE_OK (regno, word_mode));
671 return !bitmap_bit_p (non_decomposable_context, regno);
677 /* Decompose the registers used in a simple move SET within INSN. If
678 we don't change anything, return INSN, otherwise return the start
679 of the sequence of moves. */
682 resolve_simple_move (rtx set, rtx insn)
684 rtx src, dest, real_dest, insns;
685 enum machine_mode orig_mode, dest_mode;
690 dest = SET_DEST (set);
691 orig_mode = GET_MODE (dest);
693 words = (GET_MODE_SIZE (orig_mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
699 /* We have to handle copying from a SUBREG of a decomposed reg where
700 the SUBREG is larger than word size. Rather than assume that we
701 can take a word_mode SUBREG of the destination, we copy to a new
702 register and then copy that to the destination. */
704 real_dest = NULL_RTX;
706 if (GET_CODE (src) == SUBREG
707 && resolve_reg_p (SUBREG_REG (src))
708 && (SUBREG_BYTE (src) != 0
709 || (GET_MODE_SIZE (orig_mode)
710 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))))
713 dest = gen_reg_rtx (orig_mode);
714 if (REG_P (real_dest))
715 REG_ATTRS (dest) = REG_ATTRS (real_dest);
718 /* Similarly if we are copying to a SUBREG of a decomposed reg where
719 the SUBREG is larger than word size. */
721 if (GET_CODE (dest) == SUBREG
722 && resolve_reg_p (SUBREG_REG (dest))
723 && (SUBREG_BYTE (dest) != 0
724 || (GET_MODE_SIZE (orig_mode)
725 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))))
727 rtx reg, minsn, smove;
729 reg = gen_reg_rtx (orig_mode);
730 minsn = emit_move_insn (reg, src);
731 smove = single_set (minsn);
732 gcc_assert (smove != NULL_RTX);
733 resolve_simple_move (smove, minsn);
737 /* If we didn't have any big SUBREGS of decomposed registers, and
738 neither side of the move is a register we are decomposing, then
739 we don't have to do anything here. */
741 if (src == SET_SRC (set)
742 && dest == SET_DEST (set)
743 && !resolve_reg_p (src)
744 && !resolve_subreg_p (src)
745 && !resolve_reg_p (dest)
746 && !resolve_subreg_p (dest))
752 /* It's possible for the code to use a subreg of a decomposed
753 register while forming an address. We need to handle that before
754 passing the address to emit_move_insn. We pass NULL_RTX as the
755 insn parameter to resolve_subreg_use because we can not validate
757 if (MEM_P (src) || MEM_P (dest))
762 for_each_rtx (&XEXP (src, 0), resolve_subreg_use, NULL_RTX);
764 for_each_rtx (&XEXP (dest, 0), resolve_subreg_use, NULL_RTX);
765 acg = apply_change_group ();
769 /* If SRC is a register which we can't decompose, or has side
770 effects, we need to move via a temporary register. */
772 if (!can_decompose_p (src)
773 || side_effects_p (src)
774 || GET_CODE (src) == ASM_OPERANDS)
778 reg = gen_reg_rtx (orig_mode);
779 emit_move_insn (reg, src);
783 /* If DEST is a register which we can't decompose, or has side
784 effects, we need to first move to a temporary register. We
785 handle the common case of pushing an operand directly. We also
786 go through a temporary register if it holds a floating point
787 value. This gives us better code on systems which can't move
788 data easily between integer and floating point registers. */
790 dest_mode = orig_mode;
791 pushing = push_operand (dest, dest_mode);
792 if (!can_decompose_p (dest)
793 || (side_effects_p (dest) && !pushing)
794 || (!SCALAR_INT_MODE_P (dest_mode)
795 && !resolve_reg_p (dest)
796 && !resolve_subreg_p (dest)))
798 if (real_dest == NULL_RTX)
800 if (!SCALAR_INT_MODE_P (dest_mode))
802 dest_mode = mode_for_size (GET_MODE_SIZE (dest_mode) * BITS_PER_UNIT,
804 gcc_assert (dest_mode != BLKmode);
806 dest = gen_reg_rtx (dest_mode);
807 if (REG_P (real_dest))
808 REG_ATTRS (dest) = REG_ATTRS (real_dest);
813 unsigned int i, j, jinc;
815 gcc_assert (GET_MODE_SIZE (orig_mode) % UNITS_PER_WORD == 0);
816 gcc_assert (GET_CODE (XEXP (dest, 0)) != PRE_MODIFY);
817 gcc_assert (GET_CODE (XEXP (dest, 0)) != POST_MODIFY);
819 if (WORDS_BIG_ENDIAN == STACK_GROWS_DOWNWARD)
830 for (i = 0; i < words; ++i, j += jinc)
834 temp = copy_rtx (XEXP (dest, 0));
835 temp = adjust_automodify_address_nv (dest, word_mode, temp,
837 emit_move_insn (temp,
838 simplify_gen_subreg_concatn (word_mode, src,
840 j * UNITS_PER_WORD));
847 if (REG_P (dest) && !HARD_REGISTER_NUM_P (REGNO (dest)))
848 emit_insn (gen_rtx_CLOBBER (VOIDmode, dest));
850 for (i = 0; i < words; ++i)
851 emit_move_insn (simplify_gen_subreg_concatn (word_mode, dest,
854 simplify_gen_subreg_concatn (word_mode, src,
856 i * UNITS_PER_WORD));
859 if (real_dest != NULL_RTX)
861 rtx mdest, minsn, smove;
863 if (dest_mode == orig_mode)
866 mdest = simplify_gen_subreg (orig_mode, dest, GET_MODE (dest), 0);
867 minsn = emit_move_insn (real_dest, mdest);
869 smove = single_set (minsn);
870 gcc_assert (smove != NULL_RTX);
872 resolve_simple_move (smove, minsn);
875 insns = get_insns ();
878 move_eh_region_note (insn, insns);
880 emit_insn_before (insns, insn);
882 move_libcall_note (insn, insns);
883 remove_retval_note (insn);
889 /* Change a CLOBBER of a decomposed register into a CLOBBER of the
890 component registers. Return whether we changed something. */
893 resolve_clobber (rtx pat, rtx insn)
896 enum machine_mode orig_mode;
897 unsigned int words, i;
901 if (!resolve_reg_p (reg) && !resolve_subreg_p (reg))
904 orig_mode = GET_MODE (reg);
905 words = GET_MODE_SIZE (orig_mode);
906 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
908 ret = validate_change (NULL_RTX, &XEXP (pat, 0),
909 simplify_gen_subreg_concatn (word_mode, reg,
912 gcc_assert (ret != 0);
914 for (i = words - 1; i > 0; --i)
918 x = simplify_gen_subreg_concatn (word_mode, reg, orig_mode,
920 x = gen_rtx_CLOBBER (VOIDmode, x);
921 emit_insn_after (x, insn);
927 /* A USE of a decomposed register is no longer meaningful. Return
928 whether we changed something. */
931 resolve_use (rtx pat, rtx insn)
933 if (resolve_reg_p (XEXP (pat, 0)) || resolve_subreg_p (XEXP (pat, 0)))
941 /* Look for registers which are always accessed via word-sized SUBREGs
942 or via copies. Decompose these registers into several word-sized
946 decompose_multiword_subregs (bool update_life)
951 max = max_reg_num ();
953 /* First see if there are any multi-word pseudo-registers. If there
954 aren't, there is nothing we can do. This should speed up this
955 pass in the normal case, since it should be faster than scanning
960 for (i = FIRST_PSEUDO_REGISTER; i < max; ++i)
962 if (regno_reg_rtx[i] != NULL
963 && GET_MODE_SIZE (GET_MODE (regno_reg_rtx[i])) > UNITS_PER_WORD)
970 /* FIXME: When the dataflow branch is merged, we can change this
971 code to look for each multi-word pseudo-register and to find each
972 insn which sets or uses that register. That should be faster
973 than scanning all the insns. */
975 decomposable_context = BITMAP_ALLOC (NULL);
976 non_decomposable_context = BITMAP_ALLOC (NULL);
978 reg_copy_graph = VEC_alloc (bitmap, heap, max);
979 VEC_safe_grow (bitmap, heap, reg_copy_graph, max);
980 memset (VEC_address (bitmap, reg_copy_graph), 0, sizeof (bitmap) * max);
986 FOR_BB_INSNS (bb, insn)
989 enum classify_move_insn cmi;
993 || GET_CODE (PATTERN (insn)) == CLOBBER
994 || GET_CODE (PATTERN (insn)) == USE)
997 recog_memoized (insn);
1000 set = simple_move (insn);
1003 cmi = NOT_SIMPLE_MOVE;
1008 retval = find_reg_note (insn, REG_RETVAL, NULL_RTX) != NULL_RTX;
1010 if (find_pseudo_copy (set) && !retval)
1011 cmi = SIMPLE_PSEUDO_REG_MOVE;
1013 && REG_P (SET_SRC (set))
1014 && HARD_REGISTER_P (SET_SRC (set)))
1018 /* We don't want to decompose an assignment which
1019 copies the value returned by a libcall to a
1020 pseudo-register. Doing that will lose the RETVAL
1021 note with no real gain. */
1022 cmi = NOT_SIMPLE_MOVE;
1024 /* If we have a RETVAL note, there should be an
1025 EQUAL note. We don't want to decompose any
1026 registers which that EQUAL note refers to
1027 directly. If we do, we will no longer know the
1028 value of the libcall. */
1029 note = find_reg_equal_equiv_note (insn);
1030 if (note != NULL_RTX)
1031 for_each_rtx (&XEXP (note, 0), find_decomposable_subregs,
1038 n = recog_data.n_operands;
1039 for (i = 0; i < n; ++i)
1041 for_each_rtx (&recog_data.operand[i],
1042 find_decomposable_subregs,
1045 /* We handle ASM_OPERANDS as a special case to support
1046 things like x86 rdtsc which returns a DImode value.
1047 We can decompose the output, which will certainly be
1048 operand 0, but not the inputs. */
1050 if (cmi == SIMPLE_MOVE
1051 && GET_CODE (SET_SRC (set)) == ASM_OPERANDS)
1053 gcc_assert (i == 0);
1054 cmi = NOT_SIMPLE_MOVE;
1060 bitmap_and_compl_into (decomposable_context, non_decomposable_context);
1061 if (!bitmap_empty_p (decomposable_context))
1063 int hold_no_new_pseudos = no_new_pseudos;
1064 int max_regno = max_reg_num ();
1065 sbitmap life_blocks;
1068 sbitmap_iterator sbi;
1069 bitmap_iterator iter;
1072 propagate_pseudo_copies ();
1075 life_blocks = sbitmap_alloc (last_basic_block);
1076 sbitmap_zero (life_blocks);
1077 sub_blocks = sbitmap_alloc (last_basic_block);
1078 sbitmap_zero (sub_blocks);
1080 EXECUTE_IF_SET_IN_BITMAP (decomposable_context, 0, regno, iter)
1081 decompose_register (regno);
1087 FOR_BB_INSNS (bb, insn)
1095 next = NEXT_INSN (insn);
1098 pat = PATTERN (insn);
1099 if (GET_CODE (pat) == CLOBBER)
1101 if (resolve_clobber (pat, insn))
1104 else if (GET_CODE (pat) == USE)
1106 if (resolve_use (pat, insn))
1114 recog_memoized (insn);
1115 extract_insn (insn);
1117 set = simple_move (insn);
1120 rtx orig_insn = insn;
1121 bool cfi = control_flow_insn_p (insn);
1123 /* We can end up splitting loads to multi-word pseudos
1124 into separate loads to machine word size pseudos.
1125 When this happens, we first had one load that can
1126 throw, and after resolve_simple_move we'll have a
1127 bunch of loads (at least two). All those loads may
1128 trap if we can have non-call exceptions, so they
1129 all will end the current basic block. We split the
1130 block after the outer loop over all insns, but we
1131 make sure here that we will be able to split the
1132 basic block and still produce the correct control
1133 flow graph for it. */
1135 || (flag_non_call_exceptions
1136 && can_throw_internal (insn)));
1138 insn = resolve_simple_move (set, insn);
1139 if (insn != orig_insn)
1143 remove_retval_note (insn);
1145 recog_memoized (insn);
1146 extract_insn (insn);
1149 SET_BIT (sub_blocks, bb->index);
1153 for (i = recog_data.n_operands - 1; i >= 0; --i)
1154 for_each_rtx (recog_data.operand_loc[i],
1158 resolve_reg_notes (insn);
1160 if (num_validated_changes () > 0)
1162 for (i = recog_data.n_dups - 1; i >= 0; --i)
1164 rtx *pl = recog_data.dup_loc[i];
1165 int dup_num = recog_data.dup_num[i];
1166 rtx *px = recog_data.operand_loc[dup_num];
1168 validate_change (insn, pl, *px, 1);
1171 i = apply_change_group ();
1174 remove_retval_note (insn);
1182 SET_BIT (life_blocks, bb->index);
1183 reg_scan_update (insn, next, max_regno);
1188 no_new_pseudos = hold_no_new_pseudos;
1191 update_life_info (life_blocks, UPDATE_LIFE_GLOBAL_RM_NOTES,
1194 /* If we had insns to split that caused control flow insns in the middle
1195 of a basic block, split those blocks now. Note that we only handle
1196 the case where splitting a load has caused multiple possibly trapping
1198 EXECUTE_IF_SET_IN_SBITMAP (sub_blocks, 0, i, sbi)
1203 bb = BASIC_BLOCK (i);
1204 insn = BB_HEAD (bb);
1209 if (control_flow_insn_p (insn))
1211 /* Split the block after insn. There will be a fallthru
1212 edge, which is OK so we keep it. We have to create the
1213 exception edges ourselves. */
1214 fallthru = split_block (bb, insn);
1215 rtl_make_eh_edge (NULL, bb, BB_END (bb));
1216 bb = fallthru->dest;
1217 insn = BB_HEAD (bb);
1220 insn = NEXT_INSN (insn);
1224 sbitmap_free (life_blocks);
1225 sbitmap_free (sub_blocks);
1232 for (i = 0; VEC_iterate (bitmap, reg_copy_graph, i, b); ++i)
1237 VEC_free (bitmap, heap, reg_copy_graph);
1239 BITMAP_FREE (decomposable_context);
1240 BITMAP_FREE (non_decomposable_context);
1243 /* Gate function for lower subreg pass. */
1246 gate_handle_lower_subreg (void)
1248 return flag_split_wide_types != 0;
1251 /* Implement first lower subreg pass. */
1254 rest_of_handle_lower_subreg (void)
1256 decompose_multiword_subregs (false);
1260 /* Implement second lower subreg pass. */
1263 rest_of_handle_lower_subreg2 (void)
1265 decompose_multiword_subregs (true);
1269 struct tree_opt_pass pass_lower_subreg =
1271 "subreg", /* name */
1272 gate_handle_lower_subreg, /* gate */
1273 rest_of_handle_lower_subreg, /* execute */
1276 0, /* static_pass_number */
1277 TV_LOWER_SUBREG, /* tv_id */
1278 0, /* properties_required */
1279 0, /* properties_provided */
1280 0, /* properties_destroyed */
1281 0, /* todo_flags_start */
1284 TODO_verify_flow, /* todo_flags_finish */
1288 struct tree_opt_pass pass_lower_subreg2 =
1290 "subreg2", /* name */
1291 gate_handle_lower_subreg, /* gate */
1292 rest_of_handle_lower_subreg2, /* execute */
1295 0, /* static_pass_number */
1296 TV_LOWER_SUBREG, /* tv_id */
1297 0, /* properties_required */
1298 0, /* properties_provided */
1299 0, /* properties_destroyed */
1300 0, /* todo_flags_start */
1303 TODO_verify_flow, /* todo_flags_finish */