gcc/longlong.h

   1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
   2    Copyright (C) 1991,92,94,95,96,97,98,99, 2000 Free Software Foundation, Inc.
   3
   4    This definition file is free software; you can redistribute it
   5    and/or modify it under the terms of the GNU General Public
   6    License as published by the Free Software Foundation; either
   7    version 2, or (at your option) any later version.
   8
   9    This definition file is distributed in the hope that it will be
  10    useful, but WITHOUT ANY WARRANTY; without even the implied
  11    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  12    See the GNU General Public License for more details.
  13
  14    You should have received a copy of the GNU General Public License
  15    along with this program; if not, write to the Free Software
  16    Foundation, Inc., 59 Temple Place - Suite 330,
  17    Boston, MA 02111-1307, USA.  */
  18
  19 /* You have to define the following before including this file:
  20
  21    UWtype -- An unsigned type, default type for operations (typically a "word")
  22    UHWtype -- An unsigned type, at least half the size of UWtype.
  23    UDWtype -- An unsigned type, at least twice as large a UWtype
  24    W_TYPE_SIZE -- size in bits of UWtype
  25
  26    UQItype -- Unsigned 8 bit type.
  27    SItype, USItype -- Signed and unsigned 32 bit types.
  28    DItype, UDItype -- Signed and unsigned 64 bit types.
  29
  30    On a 32 bit machine UWtype should typically be USItype;
  31    on a 64 bit machine, UWtype should typically be UDItype.
  32 */
  33
  34 #define __BITS4 (W_TYPE_SIZE / 4)
  35 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
  36 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
  37 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
  38
  39 #ifndef W_TYPE_SIZE
  40 #define W_TYPE_SIZE     32
  41 #define UWtype          USItype
  42 #define UHWtype         USItype
  43 #define UDWtype         UDItype
  44 #endif
  45
  46 /* Define auxiliary asm macros.
  47
  48    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
  49    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
  50    word product in HIGH_PROD and LOW_PROD.
  51
  52    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
  53    UDWtype product.  This is just a variant of umul_ppmm.
  54
  55    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  56    denominator) divides a UDWtype, composed by the UWtype integers
  57    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
  58    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
  59    than DENOMINATOR for correct operation.  If, in addition, the most
  60    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  61    UDIV_NEEDS_NORMALIZATION is defined to 1.
  62
  63    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  64    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
  65    is rounded towards 0.
  66
  67    5) count_leading_zeros(count, x) counts the number of zero-bits from the
  68    msb to the first non-zero bit in the UWtype X.  This is the number of
  69    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
  70    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
  71
  72    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
  73    from the least significant end.
  74
  75    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
  76    high_addend_2, low_addend_2) adds two UWtype integers, composed by
  77    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
  78    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
  79    (i.e. carry out) is not stored anywhere, and is lost.
  80
  81    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
  82    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
  83    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
  84    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
  85    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
  86    and is lost.
  87
  88    If any of these macros are left undefined for a particular CPU,
  89    C macros are used.  */
  90
  91 /* The CPUs come in alphabetical order below.
  92
  93    Please add support for more CPUs here, or improve the current support
  94    for the CPUs below!
  95    (E.g. WE32100, IBM360.)  */
  96
  97 #if defined (__GNUC__) && !defined (NO_ASM)
  98
  99 /* We sometimes need to clobber "cc" with gcc2, but that would not be
 100    understood by gcc1.  Use cpp to avoid major code duplication.  */
 101 #if __GNUC__ < 2
 102 #define __CLOBBER_CC
 103 #define __AND_CLOBBER_CC
 104 #else /* __GNUC__ >= 2 */
 105 #define __CLOBBER_CC : "cc"
 106 #define __AND_CLOBBER_CC , "cc"
 107 #endif /* __GNUC__ < 2 */
 108
 109 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
 110 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 111   __asm__ ("add %1,%4,%5\n\taddc %0,%2,%3"                              \
 112            : "=r" ((USItype) (sh)),                                     \
 113             "=&r" ((USItype) (sl))                                      \
 114            : "%r" ((USItype) (ah)),                                     \
 115              "rI" ((USItype) (bh)),                                     \
 116              "%r" ((USItype) (al)),                                     \
 117              "rI" ((USItype) (bl)))
 118 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 119   __asm__ ("sub %1,%4,%5\n\tsubc %0,%2,%3"                              \
 120            : "=r" ((USItype) (sh)),                                     \
 121              "=&r" ((USItype) (sl))                                     \
 122            : "r" ((USItype) (ah)),                                      \
 123              "rI" ((USItype) (bh)),                                     \
 124              "r" ((USItype) (al)),                                      \
 125              "rI" ((USItype) (bl)))
 126 #define umul_ppmm(xh, xl, m0, m1) \
 127   do {                                                                  \
 128     USItype __m0 = (m0), __m1 = (m1);                                   \
 129     __asm__ ("multiplu %0,%1,%2"                                        \
 130              : "=r" ((USItype) (xl))                                    \
 131              : "r" (__m0),                                              \
 132                "r" (__m1));                                             \
 133     __asm__ ("multmu %0,%1,%2"                                          \
 134              : "=r" ((USItype) (xh))                                    \
 135              : "r" (__m0),                                              \
 136                "r" (__m1));                                             \
 137   } while (0)
 138 #define udiv_qrnnd(q, r, n1, n0, d) \
 139   __asm__ ("dividu %0,%3,%4"                                            \
 140            : "=r" ((USItype) (q)),                                      \
 141              "=q" ((USItype) (r))                                       \
 142            : "1" ((USItype) (n1)),                                      \
 143              "r" ((USItype) (n0)),                                      \
 144              "r" ((USItype) (d)))
 145 #define count_leading_zeros(count, x) \
 146     __asm__ ("clz %0,%1"                                                \
 147              : "=r" ((USItype) (count))                                 \
 148              : "r" ((USItype) (x)))
 149 #define COUNT_LEADING_ZEROS_0 32
 150 #endif /* __a29k__ */
 151
 152 #if defined (__alpha) && W_TYPE_SIZE == 64
 153 #define umul_ppmm(ph, pl, m0, m1) \
 154   do {                                                                  \
 155     UDItype __m0 = (m0), __m1 = (m1);                                   \
 156     __asm__ ("umulh %r1,%2,%0"                                          \
 157              : "=r" ((UDItype) ph)                                      \
 158              : "%rJ" (__m0),                                            \
 159                "rI" (__m1));                                            \
 160     (pl) = __m0 * __m1;                                                 \
 161   } while (0)
 162 #define UMUL_TIME 46
 163 #ifndef LONGLONG_STANDALONE
 164 #define udiv_qrnnd(q, r, n1, n0, d) \
 165   do { UDItype __r;                                                     \
 166     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 167     (r) = __r;                                                          \
 168   } while (0)
 169 extern UDItype __udiv_qrnnd PARAMS ((UDItype *, UDItype, UDItype, UDItype));
 170 #define UDIV_TIME 220
 171 #endif /* LONGLONG_STANDALONE */
 172 #ifdef __alpha_cix__
 173 #define count_leading_zeros(COUNT,X) \
 174   __asm__("ctlz %1,%0" : "=r"(COUNT) : "r"(X))
 175 #define count_trailing_zeros(COUNT,X) \
 176   __asm__("cttz %1,%0" : "=r"(COUNT) : "r"(X))
 177 #define COUNT_LEADING_ZEROS_0 64
 178 #else
 179 extern const UQItype __clz_tab[];
 180 #define count_leading_zeros(COUNT,X) \
 181   do {                                                                  \
 182     UDItype __xr = (X), __t, __a;                                       \
 183     __asm__("cmpbge %1,%2,%0" : "=r"(__t) : "r"(~__xr), "r"(-1));       \
 184     __a = __clz_tab[__t ^ 0xff] - 1;                                    \
 185     __asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a));        \
 186     (COUNT) = 64 - (__clz_tab[__t] + __a*8);                            \
 187   } while (0)
 188 #define count_trailing_zeros(COUNT,X) \
 189   do {                                                                  \
 190     UDItype __xr = (X), __t, __a;                                       \
 191     __asm__("cmpbge %1,%2,%0" : "=r"(__t) : "r"(~__xr), "r"(-1));       \
 192     __t = ~__t & -~__t;                                                 \
 193     __a = ((__t & 0xCC) != 0) * 2;                                      \
 194     __a += ((__t & 0xF0) != 0) * 4;                                     \
 195     __a += ((__t & 0xAA) != 0);                                         \
 196     __asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a));        \
 197     __a <<= 3;                                                          \
 198     __t &= -__t;                                                        \
 199     __a += ((__t & 0xCC) != 0) * 2;                                     \
 200     __a += ((__t & 0xF0) != 0) * 4;                                     \
 201     __a += ((__t & 0xAA) != 0);                                         \
 202     (COUNT) = __a;                                                      \
 203   } while (0)
 204 #endif /* __alpha_cix__ */
 205 #endif /* __alpha */
 206
 207 #if defined (__arc__) && W_TYPE_SIZE == 32
 208 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 209   __asm__ ("add.f       %1, %4, %5\n\tadc       %0, %2, %3"             \
 210            : "=r" ((USItype) (sh)),                                     \
 211              "=&r" ((USItype) (sl))                                     \
 212            : "%r" ((USItype) (ah)),                                     \
 213              "rIJ" ((USItype) (bh)),                                    \
 214              "%r" ((USItype) (al)),                                     \
 215              "rIJ" ((USItype) (bl)))
 216 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 217   __asm__ ("sub.f       %1, %4, %5\n\tsbc       %0, %2, %3"             \
 218            : "=r" ((USItype) (sh)),                                     \
 219              "=&r" ((USItype) (sl))                                     \
 220            : "r" ((USItype) (ah)),                                      \
 221              "rIJ" ((USItype) (bh)),                                    \
 222              "r" ((USItype) (al)),                                      \
 223              "rIJ" ((USItype) (bl)))
 224 /* Call libgcc1 routine.  */
 225 #define umul_ppmm(w1, w0, u, v) \
 226 do {                                                                    \
 227   DWunion __w;                                                          \
 228   __w.ll = __umulsidi3 (u, v);                                          \
 229   w1 = __w.s.high;                                                      \
 230   w0 = __w.s.low;                                                       \
 231 } while (0)
 232 #define __umulsidi3 __umulsidi3
 233 UDItype __umulsidi3 (USItype, USItype);
 234 #endif
 235
 236 #if defined (__arm__) && W_TYPE_SIZE == 32
 237 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 238   __asm__ ("adds        %1, %4, %5\n\tadc       %0, %2, %3"             \
 239            : "=r" ((USItype) (sh)),                                     \
 240              "=&r" ((USItype) (sl))                                     \
 241            : "%r" ((USItype) (ah)),                                     \
 242              "rI" ((USItype) (bh)),                                     \
 243              "%r" ((USItype) (al)),                                     \
 244              "rI" ((USItype) (bl)))
 245 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 246   __asm__ ("subs        %1, %4, %5\n\tsbc       %0, %2, %3"             \
 247            : "=r" ((USItype) (sh)),                                     \
 248              "=&r" ((USItype) (sl))                                     \
 249            : "r" ((USItype) (ah)),                                      \
 250              "rI" ((USItype) (bh)),                                     \
 251              "r" ((USItype) (al)),                                      \
 252              "rI" ((USItype) (bl)))
 253 #define umul_ppmm(xh, xl, a, b) \
 254 {register USItype __t0, __t1, __t2;                                     \
 255   __asm__ ("%@ Inlined umul_ppmm\n"                                     \
 256            "    mov     %2, %5, lsr #16\n"                              \
 257            "    mov     %0, %6, lsr #16\n"                              \
 258            "    bic     %3, %5, %2, lsl #16\n"                          \
 259            "    bic     %4, %6, %0, lsl #16\n"                          \
 260            "    mul     %1, %3, %4\n"                                   \
 261            "    mul     %4, %2, %4\n"                                   \
 262            "    mul     %3, %0, %3\n"                                   \
 263            "    mul     %0, %2, %0\n"                                   \
 264            "    adds    %3, %4, %3\n"                                   \
 265            "    addcs   %0, %0, #65536\n"                               \
 266            "    adds    %1, %1, %3, lsl #16\n"                          \
 267            "    adc     %0, %0, %3, lsr #16"                            \
 268            : "=&r" ((USItype) (xh)),                                    \
 269              "=r" ((USItype) (xl)),                                     \
 270              "=&r" (__t0), "=&r" (__t1), "=r" (__t2)                    \
 271            : "r" ((USItype) (a)),                                       \
 272              "r" ((USItype) (b)));}
 273 #define UMUL_TIME 20
 274 #define UDIV_TIME 100
 275 #endif /* __arm__ */
 276
 277 #if defined (__clipper__) && W_TYPE_SIZE == 32
 278 #define umul_ppmm(w1, w0, u, v) \
 279   ({union {UDItype __ll;                                                \
 280            struct {USItype __l, __h;} __i;                              \
 281           } __xx;                                                       \
 282   __asm__ ("mulwux %2,%0"                                               \
 283            : "=r" (__xx.__ll)                                           \
 284            : "%0" ((USItype) (u)),                                      \
 285              "r" ((USItype) (v)));                                      \
 286   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 287 #define smul_ppmm(w1, w0, u, v) \
 288   ({union {DItype __ll;                                                 \
 289            struct {SItype __l, __h;} __i;                               \
 290           } __xx;                                                       \
 291   __asm__ ("mulwx %2,%0"                                                \
 292            : "=r" (__xx.__ll)                                           \
 293            : "%0" ((SItype) (u)),                                       \
 294              "r" ((SItype) (v)));                                       \
 295   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 296 #define __umulsidi3(u, v) \
 297   ({UDItype __w;                                                        \
 298     __asm__ ("mulwux %2,%0"                                             \
 299              : "=r" (__w)                                               \
 300              : "%0" ((USItype) (u)),                                    \
 301                "r" ((USItype) (v)));                                    \
 302     __w; })
 303 #endif /* __clipper__ */
 304
 305 #if defined (__gmicro__) && W_TYPE_SIZE == 32
 306 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 307   __asm__ ("add.w %5,%1\n\taddx %3,%0"                                  \
 308            : "=g" ((USItype) (sh)),                                     \
 309              "=&g" ((USItype) (sl))                                     \
 310            : "%0" ((USItype) (ah)),                                     \
 311              "g" ((USItype) (bh)),                                      \
 312              "%1" ((USItype) (al)),                                     \
 313              "g" ((USItype) (bl)))
 314 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 315   __asm__ ("sub.w %5,%1\n\tsubx %3,%0"                                  \
 316            : "=g" ((USItype) (sh)),                                     \
 317              "=&g" ((USItype) (sl))                                     \
 318            : "0" ((USItype) (ah)),                                      \
 319              "g" ((USItype) (bh)),                                      \
 320              "1" ((USItype) (al)),                                      \
 321              "g" ((USItype) (bl)))
 322 #define umul_ppmm(ph, pl, m0, m1) \
 323   __asm__ ("mulx %3,%0,%1"                                              \
 324            : "=g" ((USItype) (ph)),                                     \
 325              "=r" ((USItype) (pl))                                      \
 326            : "%0" ((USItype) (m0)),                                     \
 327              "g" ((USItype) (m1)))
 328 #define udiv_qrnnd(q, r, nh, nl, d) \
 329   __asm__ ("divx %4,%0,%1"                                              \
 330            : "=g" ((USItype) (q)),                                      \
 331              "=r" ((USItype) (r))                                       \
 332            : "1" ((USItype) (nh)),                                      \
 333              "0" ((USItype) (nl)),                                      \
 334              "g" ((USItype) (d)))
 335 #define count_leading_zeros(count, x) \
 336   __asm__ ("bsch/1 %1,%0"                                               \
 337            : "=g" (count)                                               \
 338            : "g" ((USItype) (x)),                                       \
 339              "0" ((USItype) 0))
 340 #endif
 341
 342 #if defined (__hppa) && W_TYPE_SIZE == 32
 343 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 344   __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0"                              \
 345            : "=r" ((USItype) (sh)),                                     \
 346              "=&r" ((USItype) (sl))                                     \
 347            : "%rM" ((USItype) (ah)),                                    \
 348              "rM" ((USItype) (bh)),                                     \
 349              "%rM" ((USItype) (al)),                                    \
 350              "rM" ((USItype) (bl)))
 351 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 352   __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0"                              \
 353            : "=r" ((USItype) (sh)),                                     \
 354              "=&r" ((USItype) (sl))                                     \
 355            : "rM" ((USItype) (ah)),                                     \
 356              "rM" ((USItype) (bh)),                                     \
 357              "rM" ((USItype) (al)),                                     \
 358              "rM" ((USItype) (bl)))
 359 #if defined (_PA_RISC1_1)
 360 #define umul_ppmm(w1, w0, u, v) \
 361   do {                                                                  \
 362     union                                                               \
 363       {                                                                 \
 364         UDItype __f;                                                    \
 365         struct {USItype __w1, __w0;} __w1w0;                            \
 366       } __t;                                                            \
 367     __asm__ ("xmpyu %1,%2,%0"                                           \
 368              : "=x" (__t.__f)                                           \
 369              : "x" ((USItype) (u)),                                     \
 370                "x" ((USItype) (v)));                                    \
 371     (w1) = __t.__w1w0.__w1;                                             \
 372     (w0) = __t.__w1w0.__w0;                                             \
 373      } while (0)
 374 #define UMUL_TIME 8
 375 #else
 376 #define UMUL_TIME 30
 377 #endif
 378 #define UDIV_TIME 40
 379 #define count_leading_zeros(count, x) \
 380   do {                                                                  \
 381     USItype __tmp;                                                      \
 382     __asm__ (                                                           \
 383        "ldi             1,%0\n"                                         \
 384 "       extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?\n"  \
 385 "       extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.\n"\
 386 "       ldo             16(%0),%0               ; Yes.  Perform add.\n" \
 387 "       extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?\n"   \
 388 "       extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.\n"\
 389 "       ldo             8(%0),%0                ; Yes.  Perform add.\n" \
 390 "       extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?\n"    \
 391 "       extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.\n"\
 392 "       ldo             4(%0),%0                ; Yes.  Perform add.\n" \
 393 "       extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?\n"    \
 394 "       extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.\n"\
 395 "       ldo             2(%0),%0                ; Yes.  Perform add.\n" \
 396 "       extru           %1,30,1,%1              ; Extract bit 1.\n"     \
 397 "       sub             %0,%1,%0                ; Subtract it.\n"       \
 398         : "=r" (count), "=r" (__tmp) : "1" (x));                        \
 399   } while (0)
 400 #endif
 401
 402 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
 403 #define umul_ppmm(xh, xl, m0, m1) \
 404   do {                                                                  \
 405     union {UDItype __ll;                                                \
 406            struct {USItype __h, __l;} __i;                              \
 407           } __xx;                                                       \
 408     USItype __m0 = (m0), __m1 = (m1);                                   \
 409     __asm__ ("mr %0,%3"                                                 \
 410              : "=r" (__xx.__i.__h),                                     \
 411                "=r" (__xx.__i.__l)                                      \
 412              : "%1" (__m0),                                             \
 413                "r" (__m1));                                             \
 414     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 415     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 416              + (((SItype) __m1 >> 31) & __m0));                         \
 417   } while (0)
 418 #define smul_ppmm(xh, xl, m0, m1) \
 419   do {                                                                  \
 420     union {DItype __ll;                                                 \
 421            struct {USItype __h, __l;} __i;                              \
 422           } __xx;                                                       \
 423     __asm__ ("mr %0,%3"                                                 \
 424              : "=r" (__xx.__i.__h),                                     \
 425                "=r" (__xx.__i.__l)                                      \
 426              : "%1" (m0),                                               \
 427                "r" (m1));                                               \
 428     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 429   } while (0)
 430 #define sdiv_qrnnd(q, r, n1, n0, d) \
 431   do {                                                                  \
 432     union {DItype __ll;                                                 \
 433            struct {USItype __h, __l;} __i;                              \
 434           } __xx;                                                       \
 435     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
 436     __asm__ ("dr %0,%2"                                                 \
 437              : "=r" (__xx.__ll)                                         \
 438              : "0" (__xx.__ll), "r" (d));                               \
 439     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
 440   } while (0)
 441 #endif
 442
 443 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
 444 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 445   __asm__ ("addl %5,%1\n\tadcl %3,%0"                                   \
 446            : "=r" ((USItype) (sh)),                                     \
 447              "=&r" ((USItype) (sl))                                     \
 448            : "%0" ((USItype) (ah)),                                     \
 449              "g" ((USItype) (bh)),                                      \
 450              "%1" ((USItype) (al)),                                     \
 451              "g" ((USItype) (bl)))
 452 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 453   __asm__ ("subl %5,%1\n\tsbbl %3,%0"                                   \
 454            : "=r" ((USItype) (sh)),                                     \
 455              "=&r" ((USItype) (sl))                                     \
 456            : "0" ((USItype) (ah)),                                      \
 457              "g" ((USItype) (bh)),                                      \
 458              "1" ((USItype) (al)),                                      \
 459              "g" ((USItype) (bl)))
 460 #define umul_ppmm(w1, w0, u, v) \
 461   __asm__ ("mull %3"                                                    \
 462            : "=a" ((USItype) (w0)),                                     \
 463              "=d" ((USItype) (w1))                                      \
 464            : "%0" ((USItype) (u)),                                      \
 465              "rm" ((USItype) (v)))
 466 #define udiv_qrnnd(q, r, n1, n0, dv) \
 467   __asm__ ("divl %4"                                                    \
 468            : "=a" ((USItype) (q)),                                      \
 469              "=d" ((USItype) (r))                                       \
 470            : "0" ((USItype) (n0)),                                      \
 471              "1" ((USItype) (n1)),                                      \
 472              "rm" ((USItype) (dv)))
 473 #define count_leading_zeros(count, x) \
 474   do {                                                                  \
 475     USItype __cbtmp;                                                    \
 476     __asm__ ("bsrl %1,%0"                                               \
 477              : "=r" (__cbtmp) : "rm" ((USItype) (x)));                  \
 478     (count) = __cbtmp ^ 31;                                             \
 479   } while (0)
 480 #define count_trailing_zeros(count, x) \
 481   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
 482 #define UMUL_TIME 40
 483 #define UDIV_TIME 40
 484 #endif /* 80x86 */
 485
 486 #if defined (__i860__) && W_TYPE_SIZE == 32
 487 #if 0
 488 /* Make sure these patterns really improve the code before
 489    switching them on.  */
 490 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 491   do {                                                                  \
 492     union                                                               \
 493       {                                                                 \
 494         DItype __ll;                                                    \
 495         struct {USItype __l, __h;} __i;                                 \
 496       }  __a, __b, __s;                                                 \
 497     __a.__i.__l = (al);                                                 \
 498     __a.__i.__h = (ah);                                                 \
 499     __b.__i.__l = (bl);                                                 \
 500     __b.__i.__h = (bh);                                                 \
 501     __asm__ ("fiadd.dd %1,%2,%0"                                        \
 502              : "=f" (__s.__ll)                                          \
 503              : "%f" (__a.__ll), "f" (__b.__ll));                        \
 504     (sh) = __s.__i.__h;                                                 \
 505     (sl) = __s.__i.__l;                                                 \
 506     } while (0)
 507 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 508   do {                                                                  \
 509     union                                                               \
 510       {                                                                 \
 511         DItype __ll;                                                    \
 512         struct {USItype __l, __h;} __i;                                 \
 513       }  __a, __b, __s;                                                 \
 514     __a.__i.__l = (al);                                                 \
 515     __a.__i.__h = (ah);                                                 \
 516     __b.__i.__l = (bl);                                                 \
 517     __b.__i.__h = (bh);                                                 \
 518     __asm__ ("fisub.dd %1,%2,%0"                                        \
 519              : "=f" (__s.__ll)                                          \
 520              : "%f" (__a.__ll), "f" (__b.__ll));                        \
 521     (sh) = __s.__i.__h;                                                 \
 522     (sl) = __s.__i.__l;                                                 \
 523     } while (0)
 524 #endif
 525 #endif /* __i860__ */
 526
 527 #if defined (__i960__) && W_TYPE_SIZE == 32
 528 #define umul_ppmm(w1, w0, u, v) \
 529   ({union {UDItype __ll;                                                \
 530            struct {USItype __l, __h;} __i;                              \
 531           } __xx;                                                       \
 532   __asm__ ("emul        %2,%1,%0"                                       \
 533            : "=d" (__xx.__ll)                                           \
 534            : "%dI" ((USItype) (u)),                                     \
 535              "dI" ((USItype) (v)));                                     \
 536   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 537 #define __umulsidi3(u, v) \
 538   ({UDItype __w;                                                        \
 539     __asm__ ("emul      %2,%1,%0"                                       \
 540              : "=d" (__w)                                               \
 541              : "%dI" ((USItype) (u)),                                   \
 542                "dI" ((USItype) (v)));                                   \
 543     __w; })
 544 #endif /* __i960__ */
 545
 546 #if defined (__M32R__) && W_TYPE_SIZE == 32
 547 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 548   /* The cmp clears the condition bit.  */ \
 549   __asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0"                    \
 550            : "=r" ((USItype) (sh)),                                     \
 551              "=&r" ((USItype) (sl))                                     \
 552            : "%0" ((USItype) (ah)),                                     \
 553              "r" ((USItype) (bh)),                                      \
 554              "%1" ((USItype) (al)),                                     \
 555              "r" ((USItype) (bl))                                       \
 556            : "cbit")
 557 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 558   /* The cmp clears the condition bit.  */ \
 559   __asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0"                      \
 560            : "=r" ((USItype) (sh)),                                     \
 561              "=&r" ((USItype) (sl))                                     \
 562            : "0" ((USItype) (ah)),                                      \
 563              "r" ((USItype) (bh)),                                      \
 564              "1" ((USItype) (al)),                                      \
 565              "r" ((USItype) (bl))                                       \
 566            : "cbit")
 567 #endif /* __M32R__ */
 568
 569 #if defined (__mc68000__) && W_TYPE_SIZE == 32
 570 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 571   __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0"                              \
 572            : "=d" ((USItype) (sh)),                                     \
 573              "=&d" ((USItype) (sl))                                     \
 574            : "%0" ((USItype) (ah)),                                     \
 575              "d" ((USItype) (bh)),                                      \
 576              "%1" ((USItype) (al)),                                     \
 577              "g" ((USItype) (bl)))
 578 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 579   __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0"                              \
 580            : "=d" ((USItype) (sh)),                                     \
 581              "=&d" ((USItype) (sl))                                     \
 582            : "0" ((USItype) (ah)),                                      \
 583              "d" ((USItype) (bh)),                                      \
 584              "1" ((USItype) (al)),                                      \
 585              "g" ((USItype) (bl)))
 586
 587 /* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r. */
 588 #if defined (__mc68020__) || defined(mc68020) \
 589         || defined(__mc68030__) || defined(mc68030) \
 590         || defined(__mc68040__) || defined(mc68040) \
 591         || defined(__mcpu32__) || defined(mcpu32) \
 592         || defined(__NeXT__)
 593 #define umul_ppmm(w1, w0, u, v) \
 594   __asm__ ("mulu%.l %3,%1:%0"                                           \
 595            : "=d" ((USItype) (w0)),                                     \
 596              "=d" ((USItype) (w1))                                      \
 597            : "%0" ((USItype) (u)),                                      \
 598              "dmi" ((USItype) (v)))
 599 #define UMUL_TIME 45
 600 #define udiv_qrnnd(q, r, n1, n0, d) \
 601   __asm__ ("divu%.l %4,%1:%0"                                           \
 602            : "=d" ((USItype) (q)),                                      \
 603              "=d" ((USItype) (r))                                       \
 604            : "0" ((USItype) (n0)),                                      \
 605              "1" ((USItype) (n1)),                                      \
 606              "dmi" ((USItype) (d)))
 607 #define UDIV_TIME 90
 608 #define sdiv_qrnnd(q, r, n1, n0, d) \
 609   __asm__ ("divs%.l %4,%1:%0"                                           \
 610            : "=d" ((USItype) (q)),                                      \
 611              "=d" ((USItype) (r))                                       \
 612            : "0" ((USItype) (n0)),                                      \
 613              "1" ((USItype) (n1)),                                      \
 614              "dmi" ((USItype) (d)))
 615
 616 #else /* not mc68020 */
 617 #if !defined(__mcf5200__)
 618 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
 619 #define umul_ppmm(xh, xl, a, b) \
 620   __asm__ ("| Inlined umul_ppmm\n"                                      \
 621            "    move%.l %2,%/d0\n"                                      \
 622            "    move%.l %3,%/d1\n"                                      \
 623            "    move%.l %/d0,%/d2\n"                                    \
 624            "    swap    %/d0\n"                                         \
 625            "    move%.l %/d1,%/d3\n"                                    \
 626            "    swap    %/d1\n"                                         \
 627            "    move%.w %/d2,%/d4\n"                                    \
 628            "    mulu    %/d3,%/d4\n"                                    \
 629            "    mulu    %/d1,%/d2\n"                                    \
 630            "    mulu    %/d0,%/d3\n"                                    \
 631            "    mulu    %/d0,%/d1\n"                                    \
 632            "    move%.l %/d4,%/d0\n"                                    \
 633            "    eor%.w  %/d0,%/d0\n"                                    \
 634            "    swap    %/d0\n"                                         \
 635            "    add%.l  %/d0,%/d2\n"                                    \
 636            "    add%.l  %/d3,%/d2\n"                                    \
 637            "    jcc     1f\n"                                           \
 638            "    add%.l  %#65536,%/d1\n"                                 \
 639            "1:  swap    %/d2\n"                                         \
 640            "    moveq   %#0,%/d0\n"                                     \
 641            "    move%.w %/d2,%/d0\n"                                    \
 642            "    move%.w %/d4,%/d2\n"                                    \
 643            "    move%.l %/d2,%1\n"                                      \
 644            "    add%.l  %/d1,%/d0\n"                                    \
 645            "    move%.l %/d0,%0"                                        \
 646            : "=g" ((USItype) (xh)),                                     \
 647              "=g" ((USItype) (xl))                                      \
 648            : "g" ((USItype) (a)),                                       \
 649              "g" ((USItype) (b))                                        \
 650            : "d0", "d1", "d2", "d3", "d4")
 651 #define UMUL_TIME 100
 652 #define UDIV_TIME 400
 653 #endif /* not mcf5200 */
 654 #endif /* not mc68020 */
 655
 656 /* The '020, '030, '040 and '060 have bitfield insns. */
 657 #if defined (__mc68020__) || defined(mc68020) \
 658         || defined(__mc68030__) || defined(mc68030) \
 659         || defined(__mc68040__) || defined(mc68040) \
 660         || defined(__mc68060__) || defined(mc68060) \
 661         || defined(__NeXT__)
 662 #define count_leading_zeros(count, x) \
 663   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
 664            : "=d" ((USItype) (count))                                   \
 665            : "od" ((USItype) (x)), "n" (0))
 666 #endif
 667 #endif /* mc68000 */
 668
 669 #if defined (__m88000__) && W_TYPE_SIZE == 32
 670 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 671   __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3"                   \
 672            : "=r" ((USItype) (sh)),                                     \
 673              "=&r" ((USItype) (sl))                                     \
 674            : "%rJ" ((USItype) (ah)),                                    \
 675              "rJ" ((USItype) (bh)),                                     \
 676              "%rJ" ((USItype) (al)),                                    \
 677              "rJ" ((USItype) (bl)))
 678 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 679   __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3"                   \
 680            : "=r" ((USItype) (sh)),                                     \
 681              "=&r" ((USItype) (sl))                                     \
 682            : "rJ" ((USItype) (ah)),                                     \
 683              "rJ" ((USItype) (bh)),                                     \
 684              "rJ" ((USItype) (al)),                                     \
 685              "rJ" ((USItype) (bl)))
 686 #define count_leading_zeros(count, x) \
 687   do {                                                                  \
 688     USItype __cbtmp;                                                    \
 689     __asm__ ("ff1 %0,%1"                                                \
 690              : "=r" (__cbtmp)                                           \
 691              : "r" ((USItype) (x)));                                    \
 692     (count) = __cbtmp ^ 31;                                             \
 693   } while (0)
 694 #define COUNT_LEADING_ZEROS_0 63 /* sic */
 695 #if defined (__mc88110__)
 696 #define umul_ppmm(wh, wl, u, v) \
 697   do {                                                                  \
 698     union {UDItype __ll;                                                \
 699            struct {USItype __h, __l;} __i;                              \
 700           } __xx;                                                       \
 701     __asm__ ("mulu.d    %0,%1,%2"                                       \
 702              : "=r" (__xx.__ll)                                         \
 703              : "r" ((USItype) (u)),                                     \
 704                "r" ((USItype) (v)));                                    \
 705     (wh) = __xx.__i.__h;                                                \
 706     (wl) = __xx.__i.__l;                                                \
 707   } while (0)
 708 #define udiv_qrnnd(q, r, n1, n0, d) \
 709   ({union {UDItype __ll;                                                \
 710            struct {USItype __h, __l;} __i;                              \
 711           } __xx;                                                       \
 712   USItype __q;                                                          \
 713   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 714   __asm__ ("divu.d %0,%1,%2"                                            \
 715            : "=r" (__q)                                                 \
 716            : "r" (__xx.__ll),                                           \
 717              "r" ((USItype) (d)));                                      \
 718   (r) = (n0) - __q * (d); (q) = __q; })
 719 #define UMUL_TIME 5
 720 #define UDIV_TIME 25
 721 #else
 722 #define UMUL_TIME 17
 723 #define UDIV_TIME 150
 724 #endif /* __mc88110__ */
 725 #endif /* __m88000__ */
 726
 727 #if defined (__mips__) && W_TYPE_SIZE == 32
 728 #define umul_ppmm(w1, w0, u, v) \
 729   __asm__ ("multu %2,%3"                                                \
 730            : "=l" ((USItype) (w0)),                                     \
 731              "=h" ((USItype) (w1))                                      \
 732            : "d" ((USItype) (u)),                                       \
 733              "d" ((USItype) (v)))
 734 #define UMUL_TIME 10
 735 #define UDIV_TIME 100
 736 #endif /* __mips__ */
 737
 738 #if defined (__ns32000__) && W_TYPE_SIZE == 32
 739 #define umul_ppmm(w1, w0, u, v) \
 740   ({union {UDItype __ll;                                                \
 741            struct {USItype __l, __h;} __i;                              \
 742           } __xx;                                                       \
 743   __asm__ ("meid %2,%0"                                                 \
 744            : "=g" (__xx.__ll)                                           \
 745            : "%0" ((USItype) (u)),                                      \
 746              "g" ((USItype) (v)));                                      \
 747   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 748 #define __umulsidi3(u, v) \
 749   ({UDItype __w;                                                        \
 750     __asm__ ("meid %2,%0"                                               \
 751              : "=g" (__w)                                               \
 752              : "%0" ((USItype) (u)),                                    \
 753                "g" ((USItype) (v)));                                    \
 754     __w; })
 755 #define udiv_qrnnd(q, r, n1, n0, d) \
 756   ({union {UDItype __ll;                                                \
 757            struct {USItype __l, __h;} __i;                              \
 758           } __xx;                                                       \
 759   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 760   __asm__ ("deid %2,%0"                                                 \
 761            : "=g" (__xx.__ll)                                           \
 762            : "0" (__xx.__ll),                                           \
 763              "g" ((USItype) (d)));                                      \
 764   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
 765 #define count_trailing_zeros(count,x) \
 766   do {
 767     __asm__ ("ffsd     %2,%0"                                          \
 768             : "=r" ((USItype) (count))                                 \
 769             : "0" ((USItype) 0),                                       \
 770               "r" ((USItype) (x)));                                    \
 771   } while (0)
 772 #endif /* __ns32000__ */
 773
 774 #if (defined (_ARCH_PPC) || defined (_IBMR2))
 775 #if W_TYPE_SIZE == 32
 776 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 777   do {                                                                  \
 778     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 779       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 780              : "=r" ((USItype) (sh)),                                   \
 781                "=&r" ((USItype) (sl))                                   \
 782              : "%r" ((USItype) (ah)),                                   \
 783                "%r" ((USItype) (al)),                                   \
 784                "rI" ((USItype) (bl)));                                  \
 785     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
 786       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 787              : "=r" ((USItype) (sh)),                                   \
 788                "=&r" ((USItype) (sl))                                   \
 789              : "%r" ((USItype) (ah)),                                   \
 790                "%r" ((USItype) (al)),                                   \
 791                "rI" ((USItype) (bl)));                                  \
 792     else                                                                \
 793       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 794              : "=r" ((USItype) (sh)),                                   \
 795                "=&r" ((USItype) (sl))                                   \
 796              : "%r" ((USItype) (ah)),                                   \
 797                "r" ((USItype) (bh)),                                    \
 798                "%r" ((USItype) (al)),                                   \
 799                "rI" ((USItype) (bl)));                                  \
 800   } while (0)
 801 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 802   do {                                                                  \
 803     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 804       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 805                : "=r" ((USItype) (sh)),                                 \
 806                  "=&r" ((USItype) (sl))                                 \
 807                : "r" ((USItype) (bh)),                                  \
 808                  "rI" ((USItype) (al)),                                 \
 809                  "r" ((USItype) (bl)));                                 \
 810     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
 811       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 812                : "=r" ((USItype) (sh)),                                 \
 813                  "=&r" ((USItype) (sl))                                 \
 814                : "r" ((USItype) (bh)),                                  \
 815                  "rI" ((USItype) (al)),                                 \
 816                  "r" ((USItype) (bl)));                                 \
 817     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 818       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 819                : "=r" ((USItype) (sh)),                                 \
 820                  "=&r" ((USItype) (sl))                                 \
 821                : "r" ((USItype) (ah)),                                  \
 822                  "rI" ((USItype) (al)),                                 \
 823                  "r" ((USItype) (bl)));                                 \
 824     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
 825       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 826                : "=r" ((USItype) (sh)),                                 \
 827                  "=&r" ((USItype) (sl))                                 \
 828                : "r" ((USItype) (ah)),                                  \
 829                  "rI" ((USItype) (al)),                                 \
 830                  "r" ((USItype) (bl)));                                 \
 831     else                                                                \
 832       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 833                : "=r" ((USItype) (sh)),                                 \
 834                  "=&r" ((USItype) (sl))                                 \
 835                : "r" ((USItype) (ah)),                                  \
 836                  "r" ((USItype) (bh)),                                  \
 837                  "rI" ((USItype) (al)),                                 \
 838                  "r" ((USItype) (bl)));                                 \
 839   } while (0)
 840 #endif /* W_TYPE_SIZE */
 841 #define count_leading_zeros(count, x) \
 842   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
 843            : "=r" ((USItype) (count))                                   \
 844            : "r" ((USItype) (x)))
 845 #define COUNT_LEADING_ZEROS_0 32
 846 #if defined (_ARCH_PPC)
 847 #define umul_ppmm(ph, pl, m0, m1) \
 848   do {                                                                  \
 849     USItype __m0 = (m0), __m1 = (m1);                                   \
 850     __asm__ ("mulhwu %0,%1,%2"                                          \
 851              : "=r" ((USItype) ph)                                      \
 852              : "%r" (__m0),                                             \
 853                "r" (__m1));                                             \
 854     (pl) = __m0 * __m1;                                                 \
 855   } while (0)
 856 #define UMUL_TIME 15
 857 #define smul_ppmm(ph, pl, m0, m1) \
 858   do {                                                                  \
 859     SItype __m0 = (m0), __m1 = (m1);                                    \
 860     __asm__ ("mulhw %0,%1,%2"                                           \
 861              : "=r" ((SItype) ph)                                       \
 862              : "%r" (__m0),                                             \
 863                "r" (__m1));                                             \
 864     (pl) = __m0 * __m1;                                                 \
 865   } while (0)
 866 #define SMUL_TIME 14
 867 #define UDIV_TIME 120
 868 #elif defined (_ARCH_PWR)
 869 #define umul_ppmm(xh, xl, m0, m1) \
 870   do {                                                                  \
 871     USItype __m0 = (m0), __m1 = (m1);                                   \
 872     __asm__ ("mul %0,%2,%3"                                             \
 873              : "=r" ((USItype) (xh)),                                   \
 874                "=q" ((USItype) (xl))                                    \
 875              : "r" (__m0),                                              \
 876                "r" (__m1));                                             \
 877     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 878              + (((SItype) __m1 >> 31) & __m0));                         \
 879   } while (0)
 880 #define UMUL_TIME 8
 881 #define smul_ppmm(xh, xl, m0, m1) \
 882   __asm__ ("mul %0,%2,%3"                                               \
 883            : "=r" ((SItype) (xh)),                                      \
 884              "=q" ((SItype) (xl))                                       \
 885            : "r" (m0),                                                  \
 886              "r" (m1))
 887 #define SMUL_TIME 4
 888 #define sdiv_qrnnd(q, r, nh, nl, d) \
 889   __asm__ ("div %0,%2,%4"                                               \
 890            : "=r" ((SItype) (q)), "=q" ((SItype) (r))                   \
 891            : "r" ((SItype) (nh)), "1" ((SItype) (nl)), "r" ((SItype) (d)))
 892 #define UDIV_TIME 100
 893 #endif
 894 #endif /* Power architecture variants.  */
 895
 896 #if defined (__pyr__) && W_TYPE_SIZE == 32
 897 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 898   __asm__ ("addw        %5,%1\n\taddwc  %3,%0"                          \
 899            : "=r" ((USItype) (sh)),                                     \
 900              "=&r" ((USItype) (sl))                                     \
 901            : "%0" ((USItype) (ah)),                                     \
 902              "g" ((USItype) (bh)),                                      \
 903              "%1" ((USItype) (al)),                                     \
 904              "g" ((USItype) (bl)))
 905 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 906   __asm__ ("subw        %5,%1\n\tsubwb  %3,%0"                          \
 907            : "=r" ((USItype) (sh)),                                     \
 908              "=&r" ((USItype) (sl))                                     \
 909            : "0" ((USItype) (ah)),                                      \
 910              "g" ((USItype) (bh)),                                      \
 911              "1" ((USItype) (al)),                                      \
 912              "g" ((USItype) (bl)))
 913 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
 914 #define umul_ppmm(w1, w0, u, v) \
 915   ({union {UDItype __ll;                                                \
 916            struct {USItype __h, __l;} __i;                              \
 917           } __xx;                                                       \
 918   __asm__ ("movw %1,%R0
 919         uemul %2,%0"                                                    \
 920            : "=&r" (__xx.__ll)                                          \
 921            : "g" ((USItype) (u)),                                       \
 922              "g" ((USItype) (v)));                                      \
 923   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 924 #endif /* __pyr__ */
 925
 926 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
 927 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 928   __asm__ ("a %1,%5\n\tae %0,%3"                                        \
 929            : "=r" ((USItype) (sh)),                                     \
 930              "=&r" ((USItype) (sl))                                     \
 931            : "%0" ((USItype) (ah)),                                     \
 932              "r" ((USItype) (bh)),                                      \
 933              "%1" ((USItype) (al)),                                     \
 934              "r" ((USItype) (bl)))
 935 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 936   __asm__ ("s %1,%5\n\tse %0,%3"                                        \
 937            : "=r" ((USItype) (sh)),                                     \
 938              "=&r" ((USItype) (sl))                                     \
 939            : "0" ((USItype) (ah)),                                      \
 940              "r" ((USItype) (bh)),                                      \
 941              "1" ((USItype) (al)),                                      \
 942              "r" ((USItype) (bl)))
 943 #define umul_ppmm(ph, pl, m0, m1) \
 944   do {                                                                  \
 945     USItype __m0 = (m0), __m1 = (m1);                                   \
 946     __asm__ (                                                           \
 947        "s       r2,r2\n"                                                \
 948 "       mts     r10,%2\n"                                               \
 949 "       m       r2,%3\n"                                                \
 950 "       m       r2,%3\n"                                                \
 951 "       m       r2,%3\n"                                                \
 952 "       m       r2,%3\n"                                                \
 953 "       m       r2,%3\n"                                                \
 954 "       m       r2,%3\n"                                                \
 955 "       m       r2,%3\n"                                                \
 956 "       m       r2,%3\n"                                                \
 957 "       m       r2,%3\n"                                                \
 958 "       m       r2,%3\n"                                                \
 959 "       m       r2,%3\n"                                                \
 960 "       m       r2,%3\n"                                                \
 961 "       m       r2,%3\n"                                                \
 962 "       m       r2,%3\n"                                                \
 963 "       m       r2,%3\n"                                                \
 964 "       m       r2,%3\n"                                                \
 965 "       cas     %0,r2,r0\n"                                             \
 966 "       mfs     r10,%1"                                                 \
 967              : "=r" ((USItype) (ph)),                                   \
 968                "=r" ((USItype) (pl))                                    \
 969              : "%r" (__m0),                                             \
 970                 "r" (__m1)                                              \
 971              : "r2");                                                   \
 972     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
 973              + (((SItype) __m1 >> 31) & __m0));                         \
 974   } while (0)
 975 #define UMUL_TIME 20
 976 #define UDIV_TIME 200
 977 #define count_leading_zeros(count, x) \
 978   do {                                                                  \
 979     if ((x) >= 0x10000)                                                 \
 980       __asm__ ("clz     %0,%1"                                          \
 981                : "=r" ((USItype) (count))                               \
 982                : "r" ((USItype) (x) >> 16));                            \
 983     else                                                                \
 984       {                                                                 \
 985         __asm__ ("clz   %0,%1"                                          \
 986                  : "=r" ((USItype) (count))                             \
 987                  : "r" ((USItype) (x)));                                        \
 988         (count) += 16;                                                  \
 989       }                                                                 \
 990   } while (0)
 991 #endif
 992
 993 #if defined (__sh2__) && W_TYPE_SIZE == 32
 994 #define umul_ppmm(w1, w0, u, v) \
 995   __asm__ (                                                             \
 996        "dmulu.l %2,%3\n\tsts    macl,%1\n\tsts  mach,%0"                \
 997            : "=r" ((USItype)(w1)),                                      \
 998              "=r" ((USItype)(w0))                                       \
 999            : "r" ((USItype)(u)),                                        \
1000              "r" ((USItype)(v))                                         \
1001            : "macl", "mach")
1002 #define UMUL_TIME 5
1003 #endif
1004
1005 #if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \
1006     && W_TYPE_SIZE == 32
1007 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1008   __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0"                          \
1009            : "=r" ((USItype) (sh)),                                     \
1010              "=&r" ((USItype) (sl))                                     \
1011            : "%rJ" ((USItype) (ah)),                                    \
1012              "rI" ((USItype) (bh)),                                     \
1013              "%rJ" ((USItype) (al)),                                    \
1014              "rI" ((USItype) (bl))                                      \
1015            __CLOBBER_CC)
1016 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1017   __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0"                          \
1018            : "=r" ((USItype) (sh)),                                     \
1019              "=&r" ((USItype) (sl))                                     \
1020            : "rJ" ((USItype) (ah)),                                     \
1021              "rI" ((USItype) (bh)),                                     \
1022              "rJ" ((USItype) (al)),                                     \
1023              "rI" ((USItype) (bl))                                      \
1024            __CLOBBER_CC)
1025 #if defined (__sparc_v8__)
1026 #define umul_ppmm(w1, w0, u, v) \
1027   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1028            : "=r" ((USItype) (w1)),                                     \
1029              "=r" ((USItype) (w0))                                      \
1030            : "r" ((USItype) (u)),                                       \
1031              "r" ((USItype) (v)))
1032 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
1033   __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
1034            : "=&r" ((USItype) (__q)),                                   \
1035              "=&r" ((USItype) (__r))                                    \
1036            : "r" ((USItype) (__n1)),                                    \
1037              "r" ((USItype) (__n0)),                                    \
1038              "r" ((USItype) (__d)))
1039 #else
1040 #if defined (__sparclite__)
1041 /* This has hardware multiply but not divide.  It also has two additional
1042    instructions scan (ffs from high bit) and divscc.  */
1043 #define umul_ppmm(w1, w0, u, v) \
1044   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1045            : "=r" ((USItype) (w1)),                                     \
1046              "=r" ((USItype) (w0))                                      \
1047            : "r" ((USItype) (u)),                                       \
1048              "r" ((USItype) (v)))
1049 #define udiv_qrnnd(q, r, n1, n0, d) \
1050   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
1051 "       wr      %%g0,%2,%%y     ! Not a delayed write for sparclite\n"  \
1052 "       tst     %%g0\n"                                                 \
1053 "       divscc  %3,%4,%%g1\n"                                           \
1054 "       divscc  %%g1,%4,%%g1\n"                                         \
1055 "       divscc  %%g1,%4,%%g1\n"                                         \
1056 "       divscc  %%g1,%4,%%g1\n"                                         \
1057 "       divscc  %%g1,%4,%%g1\n"                                         \
1058 "       divscc  %%g1,%4,%%g1\n"                                         \
1059 "       divscc  %%g1,%4,%%g1\n"                                         \
1060 "       divscc  %%g1,%4,%%g1\n"                                         \
1061 "       divscc  %%g1,%4,%%g1\n"                                         \
1062 "       divscc  %%g1,%4,%%g1\n"                                         \
1063 "       divscc  %%g1,%4,%%g1\n"                                         \
1064 "       divscc  %%g1,%4,%%g1\n"                                         \
1065 "       divscc  %%g1,%4,%%g1\n"                                         \
1066 "       divscc  %%g1,%4,%%g1\n"                                         \
1067 "       divscc  %%g1,%4,%%g1\n"                                         \
1068 "       divscc  %%g1,%4,%%g1\n"                                         \
1069 "       divscc  %%g1,%4,%%g1\n"                                         \
1070 "       divscc  %%g1,%4,%%g1\n"                                         \
1071 "       divscc  %%g1,%4,%%g1\n"                                         \
1072 "       divscc  %%g1,%4,%%g1\n"                                         \
1073 "       divscc  %%g1,%4,%%g1\n"                                         \
1074 "       divscc  %%g1,%4,%%g1\n"                                         \
1075 "       divscc  %%g1,%4,%%g1\n"                                         \
1076 "       divscc  %%g1,%4,%%g1\n"                                         \
1077 "       divscc  %%g1,%4,%%g1\n"                                         \
1078 "       divscc  %%g1,%4,%%g1\n"                                         \
1079 "       divscc  %%g1,%4,%%g1\n"                                         \
1080 "       divscc  %%g1,%4,%%g1\n"                                         \
1081 "       divscc  %%g1,%4,%%g1\n"                                         \
1082 "       divscc  %%g1,%4,%%g1\n"                                         \
1083 "       divscc  %%g1,%4,%%g1\n"                                         \
1084 "       divscc  %%g1,%4,%0\n"                                           \
1085 "       rd      %%y,%1\n"                                               \
1086 "       bl,a 1f\n"                                                      \
1087 "       add     %1,%4,%1\n"                                             \
1088 "1:     ! End of inline udiv_qrnnd"                                     \
1089            : "=r" ((USItype) (q)),                                      \
1090              "=r" ((USItype) (r))                                       \
1091            : "r" ((USItype) (n1)),                                      \
1092              "r" ((USItype) (n0)),                                      \
1093              "rI" ((USItype) (d))                                       \
1094            : "g1" __AND_CLOBBER_CC)
1095 #define UDIV_TIME 37
1096 #define count_leading_zeros(count, x) \
1097   do {                                                                  \
1098   __asm__ ("scan %1,1,%0"                                               \
1099            : "=r" ((USItype) (count))                                   \
1100            : "r" ((USItype) (x)));                                      \
1101   } while (0)
1102 /* Early sparclites return 63 for an argument of 0, but they warn that future
1103    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
1104    undefined.  */
1105 #else
1106 /* SPARC without integer multiplication and divide instructions.
1107    (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
1108 #define umul_ppmm(w1, w0, u, v) \
1109   __asm__ ("! Inlined umul_ppmm\n"                                      \
1110 "       wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr\n"\
1111 "       sra     %3,31,%%o5      ! Don't move this insn\n"               \
1112 "       and     %2,%%o5,%%o5    ! Don't move this insn\n"               \
1113 "       andcc   %%g0,0,%%g1     ! Don't move this insn\n"               \
1114 "       mulscc  %%g1,%3,%%g1\n"                                         \
1115 "       mulscc  %%g1,%3,%%g1\n"                                         \
1116 "       mulscc  %%g1,%3,%%g1\n"                                         \
1117 "       mulscc  %%g1,%3,%%g1\n"                                         \
1118 "       mulscc  %%g1,%3,%%g1\n"                                         \
1119 "       mulscc  %%g1,%3,%%g1\n"                                         \
1120 "       mulscc  %%g1,%3,%%g1\n"                                         \
1121 "       mulscc  %%g1,%3,%%g1\n"                                         \
1122 "       mulscc  %%g1,%3,%%g1\n"                                         \
1123 "       mulscc  %%g1,%3,%%g1\n"                                         \
1124 "       mulscc  %%g1,%3,%%g1\n"                                         \
1125 "       mulscc  %%g1,%3,%%g1\n"                                         \
1126 "       mulscc  %%g1,%3,%%g1\n"                                         \
1127 "       mulscc  %%g1,%3,%%g1\n"                                         \
1128 "       mulscc  %%g1,%3,%%g1\n"                                         \
1129 "       mulscc  %%g1,%3,%%g1\n"                                         \
1130 "       mulscc  %%g1,%3,%%g1\n"                                         \
1131 "       mulscc  %%g1,%3,%%g1\n"                                         \
1132 "       mulscc  %%g1,%3,%%g1\n"                                         \
1133 "       mulscc  %%g1,%3,%%g1\n"                                         \
1134 "       mulscc  %%g1,%3,%%g1\n"                                         \
1135 "       mulscc  %%g1,%3,%%g1\n"                                         \
1136 "       mulscc  %%g1,%3,%%g1\n"                                         \
1137 "       mulscc  %%g1,%3,%%g1\n"                                         \
1138 "       mulscc  %%g1,%3,%%g1\n"                                         \
1139 "       mulscc  %%g1,%3,%%g1\n"                                         \
1140 "       mulscc  %%g1,%3,%%g1\n"                                         \
1141 "       mulscc  %%g1,%3,%%g1\n"                                         \
1142 "       mulscc  %%g1,%3,%%g1\n"                                         \
1143 "       mulscc  %%g1,%3,%%g1\n"                                         \
1144 "       mulscc  %%g1,%3,%%g1\n"                                         \
1145 "       mulscc  %%g1,%3,%%g1\n"                                         \
1146 "       mulscc  %%g1,0,%%g1\n"                                          \
1147 "       add     %%g1,%%o5,%0\n"                                         \
1148 "       rd      %%y,%1"                                                 \
1149            : "=r" ((USItype) (w1)),                                     \
1150              "=r" ((USItype) (w0))                                      \
1151            : "%rI" ((USItype) (u)),                                     \
1152              "r" ((USItype) (v))                                                \
1153            : "g1", "o5" __AND_CLOBBER_CC)
1154 #define UMUL_TIME 39            /* 39 instructions */
1155 /* It's quite necessary to add this much assembler for the sparc.
1156    The default udiv_qrnnd (in C) is more than 10 times slower!  */
1157 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
1158   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
1159 "       mov     32,%%g1\n"                                              \
1160 "       subcc   %1,%2,%%g0\n"                                           \
1161 "1:     bcs     5f\n"                                                   \
1162 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1163 "       sub     %1,%2,%1        ! this kills msb of n\n"                \
1164 "       addx    %1,%1,%1        ! so this can't give carry\n"           \
1165 "       subcc   %%g1,1,%%g1\n"                                          \
1166 "2:     bne     1b\n"                                                   \
1167 "        subcc  %1,%2,%%g0\n"                                           \
1168 "       bcs     3f\n"                                                   \
1169 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1170 "       b       3f\n"                                                   \
1171 "        sub    %1,%2,%1        ! this kills msb of n\n"                \
1172 "4:     sub     %1,%2,%1\n"                                             \
1173 "5:     addxcc  %1,%1,%1\n"                                             \
1174 "       bcc     2b\n"                                                   \
1175 "        subcc  %%g1,1,%%g1\n"                                          \
1176 "! Got carry from n.  Subtract next step to cancel this carry.\n"       \
1177 "       bne     4b\n"                                                   \
1178 "        addcc  %0,%0,%0        ! shift n1n0 and a 0-bit in lsb\n"      \
1179 "       sub     %1,%2,%1\n"                                             \
1180 "3:     xnor    %0,0,%0\n"                                              \
1181 "       ! End of inline udiv_qrnnd"                                     \
1182            : "=&r" ((USItype) (__q)),                                   \
1183              "=&r" ((USItype) (__r))                                    \
1184            : "r" ((USItype) (__d)),                                     \
1185              "1" ((USItype) (__n1)),                                    \
1186              "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
1187 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations. */
1188 #endif /* __sparclite__ */
1189 #endif /* __sparc_v8__ */
1190 #endif /* sparc32 */
1191
1192 #if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \
1193     && W_TYPE_SIZE == 64
1194 #define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
1195   __asm__ ("addcc %r4,%5,%1\n\t"                                        \
1196            "add %r2,%3,%0\n\t"                                          \
1197            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1198            "add %0, 1, %0\n"                                            \
1199            "1:"                                                         \
1200            : "=r" ((UDItype)(sh)),                                      \
1201              "=&r" ((UDItype)(sl))                                      \
1202            : "%rJ" ((UDItype)(ah)),                                     \
1203              "rI" ((UDItype)(bh)),                                      \
1204              "%rJ" ((UDItype)(al)),                                     \
1205              "rI" ((UDItype)(bl))                                       \
1206            __CLOBBER_CC)
1207
1208 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
1209   __asm__ ("subcc %r4,%5,%1\n\t"                                        \
1210            "sub %r2,%3,%0\n\t"                                          \
1211            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1212            "sub %0, 1, %0\n\t"                                          \
1213            "1:"                                                         \
1214            : "=r" ((UDItype)(sh)),                                      \
1215              "=&r" ((UDItype)(sl))                                      \
1216            : "rJ" ((UDItype)(ah)),                                      \
1217              "rI" ((UDItype)(bh)),                                      \
1218              "rJ" ((UDItype)(al)),                                      \
1219              "rI" ((UDItype)(bl))                                       \
1220            __CLOBBER_CC)
1221
1222 #define umul_ppmm(wh, wl, u, v)                                         \
1223   do {                                                                  \
1224           UDItype tmp1, tmp2, tmp3, tmp4;                               \
1225           __asm__ __volatile__ (                                        \
1226                    "srl %7,0,%3\n\t"                                    \
1227                    "mulx %3,%6,%1\n\t"                                  \
1228                    "srlx %6,32,%2\n\t"                                  \
1229                    "mulx %2,%3,%4\n\t"                                  \
1230                    "sllx %4,32,%5\n\t"                                  \
1231                    "srl %6,0,%3\n\t"                                    \
1232                    "sub %1,%5,%5\n\t"                                   \
1233                    "srlx %5,32,%5\n\t"                                  \
1234                    "addcc %4,%5,%4\n\t"                                 \
1235                    "srlx %7,32,%5\n\t"                                  \
1236                    "mulx %3,%5,%3\n\t"                                  \
1237                    "mulx %2,%5,%5\n\t"                                  \
1238                    "sethi %%hi(0x80000000),%2\n\t"                      \
1239                    "addcc %4,%3,%4\n\t"                                 \
1240                    "srlx %4,32,%4\n\t"                                  \
1241                    "add %2,%2,%2\n\t"                                   \
1242                    "movcc %%xcc,%%g0,%2\n\t"                            \
1243                    "addcc %5,%4,%5\n\t"                                 \
1244                    "sllx %3,32,%3\n\t"                                  \
1245                    "add %1,%3,%1\n\t"                                   \
1246                    "add %5,%2,%0"                                       \
1247            : "=r" ((UDItype)(wh)),                                      \
1248              "=&r" ((UDItype)(wl)),                                     \
1249              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)     \
1250            : "r" ((UDItype)(u)),                                        \
1251              "r" ((UDItype)(v))                                         \
1252            __CLOBBER_CC);                                               \
1253   } while (0)
1254 #define UMUL_TIME 96
1255 #define UDIV_TIME 230
1256 #endif /* sparc64 */
1257
1258 #if defined (__vax__) && W_TYPE_SIZE == 32
1259 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1260   __asm__ ("addl2 %5,%1\n\tadwc %3,%0"                                  \
1261            : "=g" ((USItype) (sh)),                                     \
1262              "=&g" ((USItype) (sl))                                     \
1263            : "%0" ((USItype) (ah)),                                     \
1264              "g" ((USItype) (bh)),                                      \
1265              "%1" ((USItype) (al)),                                     \
1266              "g" ((USItype) (bl)))
1267 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1268   __asm__ ("subl2 %5,%1\n\tsbwc %3,%0"                                  \
1269            : "=g" ((USItype) (sh)),                                     \
1270              "=&g" ((USItype) (sl))                                     \
1271            : "0" ((USItype) (ah)),                                      \
1272              "g" ((USItype) (bh)),                                      \
1273              "1" ((USItype) (al)),                                      \
1274              "g" ((USItype) (bl)))
1275 #define umul_ppmm(xh, xl, m0, m1) \
1276   do {                                                                  \
1277     union {                                                             \
1278         UDItype __ll;                                                   \
1279         struct {USItype __l, __h;} __i;                                 \
1280       } __xx;                                                           \
1281     USItype __m0 = (m0), __m1 = (m1);                                   \
1282     __asm__ ("emul %1,%2,$0,%0"                                         \
1283              : "=r" (__xx.__ll)                                         \
1284              : "g" (__m0),                                              \
1285                "g" (__m1));                                             \
1286     (xh) = __xx.__i.__h;                                                \
1287     (xl) = __xx.__i.__l;                                                \
1288     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1289              + (((SItype) __m1 >> 31) & __m0));                         \
1290   } while (0)
1291 #define sdiv_qrnnd(q, r, n1, n0, d) \
1292   do {                                                                  \
1293     union {DItype __ll;                                                 \
1294            struct {SItype __l, __h;} __i;                               \
1295           } __xx;                                                       \
1296     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1297     __asm__ ("ediv %3,%2,%0,%1"                                         \
1298              : "=g" (q), "=g" (r)                                       \
1299              : "g" (__xx.__ll), "g" (d));                               \
1300   } while (0)
1301 #endif /* __vax__ */
1302
1303 #if defined (__z8000__) && W_TYPE_SIZE == 16
1304 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1305   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1306            : "=r" ((unsigned int)(sh)),                                 \
1307              "=&r" ((unsigned int)(sl))                                 \
1308            : "%0" ((unsigned int)(ah)),                                 \
1309              "r" ((unsigned int)(bh)),                                  \
1310              "%1" ((unsigned int)(al)),                                 \
1311              "rQR" ((unsigned int)(bl)))
1312 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1313   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1314            : "=r" ((unsigned int)(sh)),                                 \
1315              "=&r" ((unsigned int)(sl))                                 \
1316            : "0" ((unsigned int)(ah)),                                  \
1317              "r" ((unsigned int)(bh)),                                  \
1318              "1" ((unsigned int)(al)),                                  \
1319              "rQR" ((unsigned int)(bl)))
1320 #define umul_ppmm(xh, xl, m0, m1) \
1321   do {                                                                  \
1322     union {long int __ll;                                               \
1323            struct {unsigned int __h, __l;} __i;                         \
1324           } __xx;                                                       \
1325     unsigned int __m0 = (m0), __m1 = (m1);                              \
1326     __asm__ ("mult      %S0,%H3"                                        \
1327              : "=r" (__xx.__i.__h),                                     \
1328                "=r" (__xx.__i.__l)                                      \
1329              : "%1" (__m0),                                             \
1330                "rQR" (__m1));                                           \
1331     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1332     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1333              + (((signed int) __m1 >> 15) & __m0));                     \
1334   } while (0)
1335 #endif /* __z8000__ */
1336
1337 #endif /* __GNUC__ */
1338
1339 /* If this machine has no inline assembler, use C macros.  */
1340
1341 #if !defined (add_ssaaaa)
1342 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1343   do {                                                                  \
1344     UWtype __x;                                                         \
1345     __x = (al) + (bl);                                                  \
1346     (sh) = (ah) + (bh) + (__x < (al));                                  \
1347     (sl) = __x;                                                         \
1348   } while (0)
1349 #endif
1350
1351 #if !defined (sub_ddmmss)
1352 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1353   do {                                                                  \
1354     UWtype __x;                                                         \
1355     __x = (al) - (bl);                                                  \
1356     (sh) = (ah) - (bh) - (__x > (al));                                  \
1357     (sl) = __x;                                                         \
1358   } while (0)
1359 #endif
1360
1361 #if !defined (umul_ppmm)
1362 #define umul_ppmm(w1, w0, u, v)                                         \
1363   do {                                                                  \
1364     UWtype __x0, __x1, __x2, __x3;                                      \
1365     UHWtype __ul, __vl, __uh, __vh;                                     \
1366                                                                         \
1367     __ul = __ll_lowpart (u);                                            \
1368     __uh = __ll_highpart (u);                                           \
1369     __vl = __ll_lowpart (v);                                            \
1370     __vh = __ll_highpart (v);                                           \
1371                                                                         \
1372     __x0 = (UWtype) __ul * __vl;                                        \
1373     __x1 = (UWtype) __ul * __vh;                                        \
1374     __x2 = (UWtype) __uh * __vl;                                        \
1375     __x3 = (UWtype) __uh * __vh;                                        \
1376                                                                         \
1377     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1378     __x1 += __x2;               /* but this indeed can */               \
1379     if (__x1 < __x2)            /* did we get it? */                    \
1380       __x3 += __ll_B;           /* yes, add it in the proper pos. */    \
1381                                                                         \
1382     (w1) = __x3 + __ll_highpart (__x1);                                 \
1383     (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);          \
1384   } while (0)
1385 #endif
1386
1387 #if !defined (__umulsidi3)
1388 #define __umulsidi3(u, v) \
1389   ({DWunion __w;                                                        \
1390     umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
1391     __w.ll; })
1392 #endif
1393
1394 /* Define this unconditionally, so it can be used for debugging.  */
1395 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1396   do {                                                                  \
1397     UWtype __d1, __d0, __q1, __q0;                                      \
1398     UWtype __r1, __r0, __m;                                             \
1399     __d1 = __ll_highpart (d);                                           \
1400     __d0 = __ll_lowpart (d);                                            \
1401                                                                         \
1402     __r1 = (n1) % __d1;                                                 \
1403     __q1 = (n1) / __d1;                                                 \
1404     __m = (UWtype) __q1 * __d0;                                         \
1405     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1406     if (__r1 < __m)                                                     \
1407       {                                                                 \
1408         __q1--, __r1 += (d);                                            \
1409         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1410           if (__r1 < __m)                                               \
1411             __q1--, __r1 += (d);                                        \
1412       }                                                                 \
1413     __r1 -= __m;                                                        \
1414                                                                         \
1415     __r0 = __r1 % __d1;                                                 \
1416     __q0 = __r1 / __d1;                                                 \
1417     __m = (UWtype) __q0 * __d0;                                         \
1418     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1419     if (__r0 < __m)                                                     \
1420       {                                                                 \
1421         __q0--, __r0 += (d);                                            \
1422         if (__r0 >= (d))                                                \
1423           if (__r0 < __m)                                               \
1424             __q0--, __r0 += (d);                                        \
1425       }                                                                 \
1426     __r0 -= __m;                                                        \
1427                                                                         \
1428     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1429     (r) = __r0;                                                         \
1430   } while (0)
1431
1432 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1433    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1434 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1435 #define udiv_qrnnd(q, r, nh, nl, d) \
1436   do {                                                                  \
1437     USItype __r;                                                        \
1438     (q) = __udiv_w_sdiv (&__r, nh, nl, d);                              \
1439     (r) = __r;                                                          \
1440   } while (0)
1441 #endif
1442
1443 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1444 #if !defined (udiv_qrnnd)
1445 #define UDIV_NEEDS_NORMALIZATION 1
1446 #define udiv_qrnnd __udiv_qrnnd_c
1447 #endif
1448
1449 #if !defined (count_leading_zeros)
1450 extern const UQItype __clz_tab[];
1451 #define count_leading_zeros(count, x) \
1452   do {                                                                  \
1453     UWtype __xr = (x);                                                  \
1454     UWtype __a;                                                         \
1455                                                                         \
1456     if (W_TYPE_SIZE <= 32)                                              \
1457       {                                                                 \
1458         __a = __xr < ((UWtype)1<<2*__BITS4)                             \
1459           ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4)                 \
1460           : (__xr < ((UWtype)1<<3*__BITS4) ?  2*__BITS4 : 3*__BITS4);   \
1461       }                                                                 \
1462     else                                                                \
1463       {                                                                 \
1464         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1465           if (((__xr >> __a) & 0xff) != 0)                              \
1466             break;                                                      \
1467       }                                                                 \
1468                                                                         \
1469     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1470   } while (0)
1471 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1472 #endif
1473
1474 #if !defined (count_trailing_zeros)
1475 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1476    defined in asm, but if it is not, the C version above is good enough.  */
1477 #define count_trailing_zeros(count, x) \
1478   do {                                                                  \
1479     UWtype __ctz_x = (x);                                               \
1480     UWtype __ctz_c;                                                     \
1481     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1482     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1483   } while (0)
1484 #endif
1485
1486 #ifndef UDIV_NEEDS_NORMALIZATION
1487 #define UDIV_NEEDS_NORMALIZATION 0
1488 #endif