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* config/m68k/m68k-none.h: Introduce new ColdFire archs.
[pf3gnuchains/gcc-fork.git] / gcc / longlong.h
1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
2    Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000
3    Free Software Foundation, Inc.
4
5    This definition file is free software; you can redistribute it
6    and/or modify it under the terms of the GNU General Public
7    License as published by the Free Software Foundation; either
8    version 2, or (at your option) any later version.
9
10    This definition file is distributed in the hope that it will be
11    useful, but WITHOUT ANY WARRANTY; without even the implied
12    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
13    See the GNU General Public License for more details.
14
15    You should have received a copy of the GNU General Public License
16    along with this program; if not, write to the Free Software
17    Foundation, Inc., 59 Temple Place - Suite 330,
18    Boston, MA 02111-1307, USA.  */
19
20 /* You have to define the following before including this file:
21
22    UWtype -- An unsigned type, default type for operations (typically a "word")
23    UHWtype -- An unsigned type, at least half the size of UWtype.
24    UDWtype -- An unsigned type, at least twice as large a UWtype
25    W_TYPE_SIZE -- size in bits of UWtype
26
27    UQItype -- Unsigned 8 bit type.
28    SItype, USItype -- Signed and unsigned 32 bit types.
29    DItype, UDItype -- Signed and unsigned 64 bit types.
30
31    On a 32 bit machine UWtype should typically be USItype;
32    on a 64 bit machine, UWtype should typically be UDItype.
33 */
34
35 #define __BITS4 (W_TYPE_SIZE / 4)
36 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
37 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
38 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
39
40 #ifndef W_TYPE_SIZE
41 #define W_TYPE_SIZE     32
42 #define UWtype          USItype
43 #define UHWtype         USItype
44 #define UDWtype         UDItype
45 #endif
46
47 /* Define auxiliary asm macros.
48
49    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
50    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
51    word product in HIGH_PROD and LOW_PROD.
52
53    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
54    UDWtype product.  This is just a variant of umul_ppmm.
55
56    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
57    denominator) divides a UDWtype, composed by the UWtype integers
58    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
59    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
60    than DENOMINATOR for correct operation.  If, in addition, the most
61    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
62    UDIV_NEEDS_NORMALIZATION is defined to 1.
63
64    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
65    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
66    is rounded towards 0.
67
68    5) count_leading_zeros(count, x) counts the number of zero-bits from the
69    msb to the first nonzero bit in the UWtype X.  This is the number of
70    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
71    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
72
73    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
74    from the least significant end.
75
76    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
77    high_addend_2, low_addend_2) adds two UWtype integers, composed by
78    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
79    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
80    (i.e. carry out) is not stored anywhere, and is lost.
81
82    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
83    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
84    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
85    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
86    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
87    and is lost.
88
89    If any of these macros are left undefined for a particular CPU,
90    C macros are used.  */
91
92 /* The CPUs come in alphabetical order below.
93
94    Please add support for more CPUs here, or improve the current support
95    for the CPUs below!
96    (E.g. WE32100, IBM360.)  */
97
98 #if defined (__GNUC__) && !defined (NO_ASM)
99
100 /* We sometimes need to clobber "cc" with gcc2, but that would not be
101    understood by gcc1.  Use cpp to avoid major code duplication.  */
102 #if __GNUC__ < 2
103 #define __CLOBBER_CC
104 #define __AND_CLOBBER_CC
105 #else /* __GNUC__ >= 2 */
106 #define __CLOBBER_CC : "cc"
107 #define __AND_CLOBBER_CC , "cc"
108 #endif /* __GNUC__ < 2 */
109
110 #if defined (__alpha) && W_TYPE_SIZE == 64
111 #define umul_ppmm(ph, pl, m0, m1) \
112   do {                                                                  \
113     UDItype __m0 = (m0), __m1 = (m1);                                   \
114     (ph) = __builtin_alpha_umulh (__m0, __m1);                          \
115     (pl) = __m0 * __m1;                                                 \
116   } while (0)
117 #define UMUL_TIME 46
118 #ifndef LONGLONG_STANDALONE
119 #define udiv_qrnnd(q, r, n1, n0, d) \
120   do { UDItype __r;                                                     \
121     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
122     (r) = __r;                                                          \
123   } while (0)
124 extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
125 #define UDIV_TIME 220
126 #endif /* LONGLONG_STANDALONE */
127 #ifdef __alpha_cix__
128 #define count_leading_zeros(COUNT,X)    ((COUNT) = __builtin_clzl (X))
129 #define count_trailing_zeros(COUNT,X)   ((COUNT) = __builtin_ctzl (X))
130 #define COUNT_LEADING_ZEROS_0 64
131 #else
132 extern const UQItype __clz_tab[] ATTRIBUTE_HIDDEN;
133 #define count_leading_zeros(COUNT,X) \
134   do {                                                                  \
135     UDItype __xr = (X), __t, __a;                                       \
136     __t = __builtin_alpha_cmpbge (0, __xr);                             \
137     __a = __clz_tab[__t ^ 0xff] - 1;                                    \
138     __t = __builtin_alpha_extbl (__xr, __a);                            \
139     (COUNT) = 64 - (__clz_tab[__t] + __a*8);                            \
140   } while (0)
141 #define count_trailing_zeros(COUNT,X) \
142   do {                                                                  \
143     UDItype __xr = (X), __t, __a;                                       \
144     __t = __builtin_alpha_cmpbge (0, __xr);                             \
145     __t = ~__t & -~__t;                                                 \
146     __a = ((__t & 0xCC) != 0) * 2;                                      \
147     __a += ((__t & 0xF0) != 0) * 4;                                     \
148     __a += ((__t & 0xAA) != 0);                                         \
149     __t = __builtin_alpha_extbl (__xr, __a);                            \
150     __a <<= 3;                                                          \
151     __t &= -__t;                                                        \
152     __a += ((__t & 0xCC) != 0) * 2;                                     \
153     __a += ((__t & 0xF0) != 0) * 4;                                     \
154     __a += ((__t & 0xAA) != 0);                                         \
155     (COUNT) = __a;                                                      \
156   } while (0)
157 #endif /* __alpha_cix__ */
158 #endif /* __alpha */
159
160 #if defined (__arc__) && W_TYPE_SIZE == 32
161 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
162   __asm__ ("add.f       %1, %4, %5\n\tadc       %0, %2, %3"             \
163            : "=r" ((USItype) (sh)),                                     \
164              "=&r" ((USItype) (sl))                                     \
165            : "%r" ((USItype) (ah)),                                     \
166              "rIJ" ((USItype) (bh)),                                    \
167              "%r" ((USItype) (al)),                                     \
168              "rIJ" ((USItype) (bl)))
169 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
170   __asm__ ("sub.f       %1, %4, %5\n\tsbc       %0, %2, %3"             \
171            : "=r" ((USItype) (sh)),                                     \
172              "=&r" ((USItype) (sl))                                     \
173            : "r" ((USItype) (ah)),                                      \
174              "rIJ" ((USItype) (bh)),                                    \
175              "r" ((USItype) (al)),                                      \
176              "rIJ" ((USItype) (bl)))
177 /* Call libgcc routine.  */
178 #define umul_ppmm(w1, w0, u, v) \
179 do {                                                                    \
180   DWunion __w;                                                          \
181   __w.ll = __umulsidi3 (u, v);                                          \
182   w1 = __w.s.high;                                                      \
183   w0 = __w.s.low;                                                       \
184 } while (0)
185 #define __umulsidi3 __umulsidi3
186 UDItype __umulsidi3 (USItype, USItype);
187 #endif
188
189 #if defined (__arm__) && W_TYPE_SIZE == 32
190 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
191   __asm__ ("adds        %1, %4, %5\n\tadc       %0, %2, %3"             \
192            : "=r" ((USItype) (sh)),                                     \
193              "=&r" ((USItype) (sl))                                     \
194            : "%r" ((USItype) (ah)),                                     \
195              "rI" ((USItype) (bh)),                                     \
196              "%r" ((USItype) (al)),                                     \
197              "rI" ((USItype) (bl)))
198 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
199   __asm__ ("subs        %1, %4, %5\n\tsbc       %0, %2, %3"             \
200            : "=r" ((USItype) (sh)),                                     \
201              "=&r" ((USItype) (sl))                                     \
202            : "r" ((USItype) (ah)),                                      \
203              "rI" ((USItype) (bh)),                                     \
204              "r" ((USItype) (al)),                                      \
205              "rI" ((USItype) (bl)))
206 #define umul_ppmm(xh, xl, a, b) \
207 {register USItype __t0, __t1, __t2;                                     \
208   __asm__ ("%@ Inlined umul_ppmm\n"                                     \
209            "    mov     %2, %5, lsr #16\n"                              \
210            "    mov     %0, %6, lsr #16\n"                              \
211            "    bic     %3, %5, %2, lsl #16\n"                          \
212            "    bic     %4, %6, %0, lsl #16\n"                          \
213            "    mul     %1, %3, %4\n"                                   \
214            "    mul     %4, %2, %4\n"                                   \
215            "    mul     %3, %0, %3\n"                                   \
216            "    mul     %0, %2, %0\n"                                   \
217            "    adds    %3, %4, %3\n"                                   \
218            "    addcs   %0, %0, #65536\n"                               \
219            "    adds    %1, %1, %3, lsl #16\n"                          \
220            "    adc     %0, %0, %3, lsr #16"                            \
221            : "=&r" ((USItype) (xh)),                                    \
222              "=r" ((USItype) (xl)),                                     \
223              "=&r" (__t0), "=&r" (__t1), "=r" (__t2)                    \
224            : "r" ((USItype) (a)),                                       \
225              "r" ((USItype) (b)));}
226 #define UMUL_TIME 20
227 #define UDIV_TIME 100
228 #endif /* __arm__ */
229
230 #if defined (__hppa) && W_TYPE_SIZE == 32
231 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
232   __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0"                              \
233            : "=r" ((USItype) (sh)),                                     \
234              "=&r" ((USItype) (sl))                                     \
235            : "%rM" ((USItype) (ah)),                                    \
236              "rM" ((USItype) (bh)),                                     \
237              "%rM" ((USItype) (al)),                                    \
238              "rM" ((USItype) (bl)))
239 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
240   __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0"                              \
241            : "=r" ((USItype) (sh)),                                     \
242              "=&r" ((USItype) (sl))                                     \
243            : "rM" ((USItype) (ah)),                                     \
244              "rM" ((USItype) (bh)),                                     \
245              "rM" ((USItype) (al)),                                     \
246              "rM" ((USItype) (bl)))
247 #if defined (_PA_RISC1_1)
248 #define umul_ppmm(w1, w0, u, v) \
249   do {                                                                  \
250     union                                                               \
251       {                                                                 \
252         UDItype __f;                                                    \
253         struct {USItype __w1, __w0;} __w1w0;                            \
254       } __t;                                                            \
255     __asm__ ("xmpyu %1,%2,%0"                                           \
256              : "=x" (__t.__f)                                           \
257              : "x" ((USItype) (u)),                                     \
258                "x" ((USItype) (v)));                                    \
259     (w1) = __t.__w1w0.__w1;                                             \
260     (w0) = __t.__w1w0.__w0;                                             \
261      } while (0)
262 #define UMUL_TIME 8
263 #else
264 #define UMUL_TIME 30
265 #endif
266 #define UDIV_TIME 40
267 #define count_leading_zeros(count, x) \
268   do {                                                                  \
269     USItype __tmp;                                                      \
270     __asm__ (                                                           \
271        "ldi             1,%0\n"                                         \
272 "       extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?\n"  \
273 "       extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.\n"\
274 "       ldo             16(%0),%0               ; Yes.  Perform add.\n" \
275 "       extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?\n"   \
276 "       extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.\n"\
277 "       ldo             8(%0),%0                ; Yes.  Perform add.\n" \
278 "       extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?\n"    \
279 "       extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.\n"\
280 "       ldo             4(%0),%0                ; Yes.  Perform add.\n" \
281 "       extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?\n"    \
282 "       extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.\n"\
283 "       ldo             2(%0),%0                ; Yes.  Perform add.\n" \
284 "       extru           %1,30,1,%1              ; Extract bit 1.\n"     \
285 "       sub             %0,%1,%0                ; Subtract it.\n"       \
286         : "=r" (count), "=r" (__tmp) : "1" (x));                        \
287   } while (0)
288 #endif
289
290 #if (defined (__i370__) || defined (__s390__) || defined (__mvs__)) && W_TYPE_SIZE == 32
291 #define smul_ppmm(xh, xl, m0, m1) \
292   do {                                                                  \
293     union {DItype __ll;                                                 \
294            struct {USItype __h, __l;} __i;                              \
295           } __x;                                                        \
296     __asm__ ("lr %N0,%1\n\tmr %0,%2"                                    \
297              : "=&r" (__x.__ll)                                         \
298              : "r" (m0), "r" (m1));                                     \
299     (xh) = __x.__i.__h; (xl) = __x.__i.__l;                             \
300   } while (0)
301 #define sdiv_qrnnd(q, r, n1, n0, d) \
302   do {                                                                  \
303     union {DItype __ll;                                                 \
304            struct {USItype __h, __l;} __i;                              \
305           } __x;                                                        \
306     __x.__i.__h = n1; __x.__i.__l = n0;                                 \
307     __asm__ ("dr %0,%2"                                                 \
308              : "=r" (__x.__ll)                                          \
309              : "0" (__x.__ll), "r" (d));                                \
310     (q) = __x.__i.__l; (r) = __x.__i.__h;                               \
311   } while (0)
312 #endif
313
314 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
315 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
316   __asm__ ("addl %5,%1\n\tadcl %3,%0"                                   \
317            : "=r" ((USItype) (sh)),                                     \
318              "=&r" ((USItype) (sl))                                     \
319            : "%0" ((USItype) (ah)),                                     \
320              "g" ((USItype) (bh)),                                      \
321              "%1" ((USItype) (al)),                                     \
322              "g" ((USItype) (bl)))
323 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
324   __asm__ ("subl %5,%1\n\tsbbl %3,%0"                                   \
325            : "=r" ((USItype) (sh)),                                     \
326              "=&r" ((USItype) (sl))                                     \
327            : "0" ((USItype) (ah)),                                      \
328              "g" ((USItype) (bh)),                                      \
329              "1" ((USItype) (al)),                                      \
330              "g" ((USItype) (bl)))
331 #define umul_ppmm(w1, w0, u, v) \
332   __asm__ ("mull %3"                                                    \
333            : "=a" ((USItype) (w0)),                                     \
334              "=d" ((USItype) (w1))                                      \
335            : "%0" ((USItype) (u)),                                      \
336              "rm" ((USItype) (v)))
337 #define udiv_qrnnd(q, r, n1, n0, dv) \
338   __asm__ ("divl %4"                                                    \
339            : "=a" ((USItype) (q)),                                      \
340              "=d" ((USItype) (r))                                       \
341            : "0" ((USItype) (n0)),                                      \
342              "1" ((USItype) (n1)),                                      \
343              "rm" ((USItype) (dv)))
344 #define count_leading_zeros(count, x) \
345   do {                                                                  \
346     USItype __cbtmp;                                                    \
347     __asm__ ("bsrl %1,%0"                                               \
348              : "=r" (__cbtmp) : "rm" ((USItype) (x)));                  \
349     (count) = __cbtmp ^ 31;                                             \
350   } while (0)
351 #define count_trailing_zeros(count, x) \
352   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
353 #define UMUL_TIME 40
354 #define UDIV_TIME 40
355 #endif /* 80x86 */
356
357 #if defined (__i960__) && W_TYPE_SIZE == 32
358 #define umul_ppmm(w1, w0, u, v) \
359   ({union {UDItype __ll;                                                \
360            struct {USItype __l, __h;} __i;                              \
361           } __xx;                                                       \
362   __asm__ ("emul        %2,%1,%0"                                       \
363            : "=d" (__xx.__ll)                                           \
364            : "%dI" ((USItype) (u)),                                     \
365              "dI" ((USItype) (v)));                                     \
366   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
367 #define __umulsidi3(u, v) \
368   ({UDItype __w;                                                        \
369     __asm__ ("emul      %2,%1,%0"                                       \
370              : "=d" (__w)                                               \
371              : "%dI" ((USItype) (u)),                                   \
372                "dI" ((USItype) (v)));                                   \
373     __w; })
374 #endif /* __i960__ */
375
376 #if defined (__M32R__) && W_TYPE_SIZE == 32
377 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
378   /* The cmp clears the condition bit.  */ \
379   __asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0"                    \
380            : "=r" ((USItype) (sh)),                                     \
381              "=&r" ((USItype) (sl))                                     \
382            : "%0" ((USItype) (ah)),                                     \
383              "r" ((USItype) (bh)),                                      \
384              "%1" ((USItype) (al)),                                     \
385              "r" ((USItype) (bl))                                       \
386            : "cbit")
387 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
388   /* The cmp clears the condition bit.  */ \
389   __asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0"                      \
390            : "=r" ((USItype) (sh)),                                     \
391              "=&r" ((USItype) (sl))                                     \
392            : "0" ((USItype) (ah)),                                      \
393              "r" ((USItype) (bh)),                                      \
394              "1" ((USItype) (al)),                                      \
395              "r" ((USItype) (bl))                                       \
396            : "cbit")
397 #endif /* __M32R__ */
398
399 #if defined (__mc68000__) && W_TYPE_SIZE == 32
400 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
401   __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0"                              \
402            : "=d" ((USItype) (sh)),                                     \
403              "=&d" ((USItype) (sl))                                     \
404            : "%0" ((USItype) (ah)),                                     \
405              "d" ((USItype) (bh)),                                      \
406              "%1" ((USItype) (al)),                                     \
407              "g" ((USItype) (bl)))
408 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
409   __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0"                              \
410            : "=d" ((USItype) (sh)),                                     \
411              "=&d" ((USItype) (sl))                                     \
412            : "0" ((USItype) (ah)),                                      \
413              "d" ((USItype) (bh)),                                      \
414              "1" ((USItype) (al)),                                      \
415              "g" ((USItype) (bl)))
416
417 /* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r.  */
418 #if defined (__mc68020__) || defined(mc68020) \
419         || defined(__mc68030__) || defined(mc68030) \
420         || defined(__mc68040__) || defined(mc68040) \
421         || defined(__mcpu32__) || defined(mcpu32)
422 #define umul_ppmm(w1, w0, u, v) \
423   __asm__ ("mulu%.l %3,%1:%0"                                           \
424            : "=d" ((USItype) (w0)),                                     \
425              "=d" ((USItype) (w1))                                      \
426            : "%0" ((USItype) (u)),                                      \
427              "dmi" ((USItype) (v)))
428 #define UMUL_TIME 45
429 #define udiv_qrnnd(q, r, n1, n0, d) \
430   __asm__ ("divu%.l %4,%1:%0"                                           \
431            : "=d" ((USItype) (q)),                                      \
432              "=d" ((USItype) (r))                                       \
433            : "0" ((USItype) (n0)),                                      \
434              "1" ((USItype) (n1)),                                      \
435              "dmi" ((USItype) (d)))
436 #define UDIV_TIME 90
437 #define sdiv_qrnnd(q, r, n1, n0, d) \
438   __asm__ ("divs%.l %4,%1:%0"                                           \
439            : "=d" ((USItype) (q)),                                      \
440              "=d" ((USItype) (r))                                       \
441            : "0" ((USItype) (n0)),                                      \
442              "1" ((USItype) (n1)),                                      \
443              "dmi" ((USItype) (d)))
444
445 #else /* not mc68020 */
446 #if !defined(__mcf5200__)
447 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
448 #define umul_ppmm(xh, xl, a, b) \
449   __asm__ ("| Inlined umul_ppmm\n"                                      \
450            "    move%.l %2,%/d0\n"                                      \
451            "    move%.l %3,%/d1\n"                                      \
452            "    move%.l %/d0,%/d2\n"                                    \
453            "    swap    %/d0\n"                                         \
454            "    move%.l %/d1,%/d3\n"                                    \
455            "    swap    %/d1\n"                                         \
456            "    move%.w %/d2,%/d4\n"                                    \
457            "    mulu    %/d3,%/d4\n"                                    \
458            "    mulu    %/d1,%/d2\n"                                    \
459            "    mulu    %/d0,%/d3\n"                                    \
460            "    mulu    %/d0,%/d1\n"                                    \
461            "    move%.l %/d4,%/d0\n"                                    \
462            "    eor%.w  %/d0,%/d0\n"                                    \
463            "    swap    %/d0\n"                                         \
464            "    add%.l  %/d0,%/d2\n"                                    \
465            "    add%.l  %/d3,%/d2\n"                                    \
466            "    jcc     1f\n"                                           \
467            "    add%.l  %#65536,%/d1\n"                                 \
468            "1:  swap    %/d2\n"                                         \
469            "    moveq   %#0,%/d0\n"                                     \
470            "    move%.w %/d2,%/d0\n"                                    \
471            "    move%.w %/d4,%/d2\n"                                    \
472            "    move%.l %/d2,%1\n"                                      \
473            "    add%.l  %/d1,%/d0\n"                                    \
474            "    move%.l %/d0,%0"                                        \
475            : "=g" ((USItype) (xh)),                                     \
476              "=g" ((USItype) (xl))                                      \
477            : "g" ((USItype) (a)),                                       \
478              "g" ((USItype) (b))                                        \
479            : "d0", "d1", "d2", "d3", "d4")
480 #define UMUL_TIME 100
481 #define UDIV_TIME 400
482 #endif /* not mcf5200 */
483 #endif /* not mc68020 */
484
485 /* The '020, '030, '040 and '060 have bitfield insns.
486    cpu32 disguises as a 68020, but lacks them.  */
487 #if ( defined (__mc68020__) || defined(mc68020) \
488                 || defined(__mc68030__) || defined(mc68030) \
489                 || defined(__mc68040__) || defined(mc68040) \
490                 || defined(__mc68060__) || defined(mc68060) ) \
491         && !defined(__mcpu32__)
492 #define count_leading_zeros(count, x) \
493   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
494            : "=d" ((USItype) (count))                                   \
495            : "od" ((USItype) (x)), "n" (0))
496 #endif
497 #endif /* mc68000 */
498
499 #if defined (__m88000__) && W_TYPE_SIZE == 32
500 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
501   __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3"                   \
502            : "=r" ((USItype) (sh)),                                     \
503              "=&r" ((USItype) (sl))                                     \
504            : "%rJ" ((USItype) (ah)),                                    \
505              "rJ" ((USItype) (bh)),                                     \
506              "%rJ" ((USItype) (al)),                                    \
507              "rJ" ((USItype) (bl)))
508 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
509   __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3"                   \
510            : "=r" ((USItype) (sh)),                                     \
511              "=&r" ((USItype) (sl))                                     \
512            : "rJ" ((USItype) (ah)),                                     \
513              "rJ" ((USItype) (bh)),                                     \
514              "rJ" ((USItype) (al)),                                     \
515              "rJ" ((USItype) (bl)))
516 #define count_leading_zeros(count, x) \
517   do {                                                                  \
518     USItype __cbtmp;                                                    \
519     __asm__ ("ff1 %0,%1"                                                \
520              : "=r" (__cbtmp)                                           \
521              : "r" ((USItype) (x)));                                    \
522     (count) = __cbtmp ^ 31;                                             \
523   } while (0)
524 #define COUNT_LEADING_ZEROS_0 63 /* sic */
525 #if defined (__mc88110__)
526 #define umul_ppmm(wh, wl, u, v) \
527   do {                                                                  \
528     union {UDItype __ll;                                                \
529            struct {USItype __h, __l;} __i;                              \
530           } __xx;                                                       \
531     __asm__ ("mulu.d    %0,%1,%2"                                       \
532              : "=r" (__xx.__ll)                                         \
533              : "r" ((USItype) (u)),                                     \
534                "r" ((USItype) (v)));                                    \
535     (wh) = __xx.__i.__h;                                                \
536     (wl) = __xx.__i.__l;                                                \
537   } while (0)
538 #define udiv_qrnnd(q, r, n1, n0, d) \
539   ({union {UDItype __ll;                                                \
540            struct {USItype __h, __l;} __i;                              \
541           } __xx;                                                       \
542   USItype __q;                                                          \
543   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
544   __asm__ ("divu.d %0,%1,%2"                                            \
545            : "=r" (__q)                                                 \
546            : "r" (__xx.__ll),                                           \
547              "r" ((USItype) (d)));                                      \
548   (r) = (n0) - __q * (d); (q) = __q; })
549 #define UMUL_TIME 5
550 #define UDIV_TIME 25
551 #else
552 #define UMUL_TIME 17
553 #define UDIV_TIME 150
554 #endif /* __mc88110__ */
555 #endif /* __m88000__ */
556
557 #if defined (__mips__) && W_TYPE_SIZE == 32
558 #define umul_ppmm(w1, w0, u, v) \
559   __asm__ ("multu %2,%3"                                                \
560            : "=l" ((USItype) (w0)),                                     \
561              "=h" ((USItype) (w1))                                      \
562            : "d" ((USItype) (u)),                                       \
563              "d" ((USItype) (v)))
564 #define UMUL_TIME 10
565 #define UDIV_TIME 100
566 #endif /* __mips__ */
567
568 #if defined (__ns32000__) && W_TYPE_SIZE == 32
569 #define umul_ppmm(w1, w0, u, v) \
570   ({union {UDItype __ll;                                                \
571            struct {USItype __l, __h;} __i;                              \
572           } __xx;                                                       \
573   __asm__ ("meid %2,%0"                                                 \
574            : "=g" (__xx.__ll)                                           \
575            : "%0" ((USItype) (u)),                                      \
576              "g" ((USItype) (v)));                                      \
577   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
578 #define __umulsidi3(u, v) \
579   ({UDItype __w;                                                        \
580     __asm__ ("meid %2,%0"                                               \
581              : "=g" (__w)                                               \
582              : "%0" ((USItype) (u)),                                    \
583                "g" ((USItype) (v)));                                    \
584     __w; })
585 #define udiv_qrnnd(q, r, n1, n0, d) \
586   ({union {UDItype __ll;                                                \
587            struct {USItype __l, __h;} __i;                              \
588           } __xx;                                                       \
589   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
590   __asm__ ("deid %2,%0"                                                 \
591            : "=g" (__xx.__ll)                                           \
592            : "0" (__xx.__ll),                                           \
593              "g" ((USItype) (d)));                                      \
594   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
595 #define count_trailing_zeros(count,x) \
596   do {                                                                  \
597     __asm__ ("ffsd     %2,%0"                                           \
598             : "=r" ((USItype) (count))                                  \
599             : "0" ((USItype) 0),                                        \
600               "r" ((USItype) (x)));                                     \
601   } while (0)
602 #endif /* __ns32000__ */
603
604 /* FIXME: We should test _IBMR2 here when we add assembly support for the
605    system vendor compilers.
606    FIXME: What's needed for gcc PowerPC VxWorks?  __vxworks__ is not good
607    enough, since that hits ARM and m68k too.  */
608 #if (defined (_ARCH_PPC)        /* AIX */                               \
609      || defined (_ARCH_PWR)     /* AIX */                               \
610      || defined (_ARCH_COM)     /* AIX */                               \
611      || defined (__powerpc__)   /* gcc */                               \
612      || defined (__POWERPC__)   /* BEOS */                              \
613      || defined (__ppc__)       /* Darwin */                            \
614      || defined (PPC)           /* GNU/Linux, SysV */                   \
615      ) && W_TYPE_SIZE == 32
616 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
617   do {                                                                  \
618     if (__builtin_constant_p (bh) && (bh) == 0)                         \
619       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
620              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
621     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
622       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
623              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
624     else                                                                \
625       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
626              : "=r" (sh), "=&r" (sl)                                    \
627              : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
628   } while (0)
629 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
630   do {                                                                  \
631     if (__builtin_constant_p (ah) && (ah) == 0)                         \
632       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
633                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
634     else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0)         \
635       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
636                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
637     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
638       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
639                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
640     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
641       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
642                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
643     else                                                                \
644       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
645                : "=r" (sh), "=&r" (sl)                                  \
646                : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
647   } while (0)
648 #define count_leading_zeros(count, x) \
649   __asm__ ("{cntlz|cntlzw} %0,%1" : "=r" (count) : "r" (x))
650 #define COUNT_LEADING_ZEROS_0 32
651 #if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \
652   || defined (__ppc__) || defined (PPC)
653 #define umul_ppmm(ph, pl, m0, m1) \
654   do {                                                                  \
655     USItype __m0 = (m0), __m1 = (m1);                                   \
656     __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
657     (pl) = __m0 * __m1;                                                 \
658   } while (0)
659 #define UMUL_TIME 15
660 #define smul_ppmm(ph, pl, m0, m1) \
661   do {                                                                  \
662     SItype __m0 = (m0), __m1 = (m1);                                    \
663     __asm__ ("mulhw %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));       \
664     (pl) = __m0 * __m1;                                                 \
665   } while (0)
666 #define SMUL_TIME 14
667 #define UDIV_TIME 120
668 #elif defined (_ARCH_PWR)
669 #define UMUL_TIME 8
670 #define smul_ppmm(xh, xl, m0, m1) \
671   __asm__ ("mul %0,%2,%3" : "=r" (xh), "=q" (xl) : "r" (m0), "r" (m1))
672 #define SMUL_TIME 4
673 #define sdiv_qrnnd(q, r, nh, nl, d) \
674   __asm__ ("div %0,%2,%4" : "=r" (q), "=q" (r) : "r" (nh), "1" (nl), "r" (d))
675 #define UDIV_TIME 100
676 #endif
677 #endif /* 32-bit POWER architecture variants.  */
678
679 /* We should test _IBMR2 here when we add assembly support for the system
680    vendor compilers.  */
681 #if (defined (_ARCH_PPC64) || defined (__powerpc64__)) && W_TYPE_SIZE == 64
682 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
683   do {                                                                  \
684     if (__builtin_constant_p (bh) && (bh) == 0)                         \
685       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
686              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
687     else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)         \
688       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
689              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
690     else                                                                \
691       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
692              : "=r" (sh), "=&r" (sl)                                    \
693              : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
694   } while (0)
695 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
696   do {                                                                  \
697     if (__builtin_constant_p (ah) && (ah) == 0)                         \
698       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
699                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
700     else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0)         \
701       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
702                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
703     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
704       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
705                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
706     else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)         \
707       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
708                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
709     else                                                                \
710       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
711                : "=r" (sh), "=&r" (sl)                                  \
712                : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
713   } while (0)
714 #define count_leading_zeros(count, x) \
715   __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x))
716 #define COUNT_LEADING_ZEROS_0 64
717 #define umul_ppmm(ph, pl, m0, m1) \
718   do {                                                                  \
719     UDItype __m0 = (m0), __m1 = (m1);                                   \
720     __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
721     (pl) = __m0 * __m1;                                                 \
722   } while (0)
723 #define UMUL_TIME 15
724 #define smul_ppmm(ph, pl, m0, m1) \
725   do {                                                                  \
726     DItype __m0 = (m0), __m1 = (m1);                                    \
727     __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));       \
728     (pl) = __m0 * __m1;                                                 \
729   } while (0)
730 #define SMUL_TIME 14  /* ??? */
731 #define UDIV_TIME 120 /* ??? */
732 #endif /* 64-bit PowerPC.  */
733
734 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
735 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
736   __asm__ ("a %1,%5\n\tae %0,%3"                                        \
737            : "=r" ((USItype) (sh)),                                     \
738              "=&r" ((USItype) (sl))                                     \
739            : "%0" ((USItype) (ah)),                                     \
740              "r" ((USItype) (bh)),                                      \
741              "%1" ((USItype) (al)),                                     \
742              "r" ((USItype) (bl)))
743 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
744   __asm__ ("s %1,%5\n\tse %0,%3"                                        \
745            : "=r" ((USItype) (sh)),                                     \
746              "=&r" ((USItype) (sl))                                     \
747            : "0" ((USItype) (ah)),                                      \
748              "r" ((USItype) (bh)),                                      \
749              "1" ((USItype) (al)),                                      \
750              "r" ((USItype) (bl)))
751 #define umul_ppmm(ph, pl, m0, m1) \
752   do {                                                                  \
753     USItype __m0 = (m0), __m1 = (m1);                                   \
754     __asm__ (                                                           \
755        "s       r2,r2\n"                                                \
756 "       mts     r10,%2\n"                                               \
757 "       m       r2,%3\n"                                                \
758 "       m       r2,%3\n"                                                \
759 "       m       r2,%3\n"                                                \
760 "       m       r2,%3\n"                                                \
761 "       m       r2,%3\n"                                                \
762 "       m       r2,%3\n"                                                \
763 "       m       r2,%3\n"                                                \
764 "       m       r2,%3\n"                                                \
765 "       m       r2,%3\n"                                                \
766 "       m       r2,%3\n"                                                \
767 "       m       r2,%3\n"                                                \
768 "       m       r2,%3\n"                                                \
769 "       m       r2,%3\n"                                                \
770 "       m       r2,%3\n"                                                \
771 "       m       r2,%3\n"                                                \
772 "       m       r2,%3\n"                                                \
773 "       cas     %0,r2,r0\n"                                             \
774 "       mfs     r10,%1"                                                 \
775              : "=r" ((USItype) (ph)),                                   \
776                "=r" ((USItype) (pl))                                    \
777              : "%r" (__m0),                                             \
778                 "r" (__m1)                                              \
779              : "r2");                                                   \
780     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
781              + (((SItype) __m1 >> 31) & __m0));                         \
782   } while (0)
783 #define UMUL_TIME 20
784 #define UDIV_TIME 200
785 #define count_leading_zeros(count, x) \
786   do {                                                                  \
787     if ((x) >= 0x10000)                                                 \
788       __asm__ ("clz     %0,%1"                                          \
789                : "=r" ((USItype) (count))                               \
790                : "r" ((USItype) (x) >> 16));                            \
791     else                                                                \
792       {                                                                 \
793         __asm__ ("clz   %0,%1"                                          \
794                  : "=r" ((USItype) (count))                             \
795                  : "r" ((USItype) (x)));                                        \
796         (count) += 16;                                                  \
797       }                                                                 \
798   } while (0)
799 #endif
800
801 #if defined (__sh2__) && W_TYPE_SIZE == 32
802 #define umul_ppmm(w1, w0, u, v) \
803   __asm__ (                                                             \
804        "dmulu.l %2,%3\n\tsts    macl,%1\n\tsts  mach,%0"                \
805            : "=r" ((USItype)(w1)),                                      \
806              "=r" ((USItype)(w0))                                       \
807            : "r" ((USItype)(u)),                                        \
808              "r" ((USItype)(v))                                         \
809            : "macl", "mach")
810 #define UMUL_TIME 5
811 #endif
812
813 #if defined (__SH5__) && __SHMEDIA__ && W_TYPE_SIZE == 32
814 #define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v)
815 #define count_leading_zeros(count, x) \
816   do                                                                    \
817     {                                                                   \
818       UDItype x_ = (USItype)(x);                                        \
819       SItype c_;                                                        \
820                                                                         \
821       __asm__ ("nsb %1, %0" : "=r" (c_) : "r" (x_));                    \
822       (count) = c_ - 31;                                                \
823     }                                                                   \
824   while (0)
825 #define COUNT_LEADING_ZEROS_0 32
826 #endif
827
828 #if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \
829     && W_TYPE_SIZE == 32
830 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
831   __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0"                          \
832            : "=r" ((USItype) (sh)),                                     \
833              "=&r" ((USItype) (sl))                                     \
834            : "%rJ" ((USItype) (ah)),                                    \
835              "rI" ((USItype) (bh)),                                     \
836              "%rJ" ((USItype) (al)),                                    \
837              "rI" ((USItype) (bl))                                      \
838            __CLOBBER_CC)
839 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
840   __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0"                          \
841            : "=r" ((USItype) (sh)),                                     \
842              "=&r" ((USItype) (sl))                                     \
843            : "rJ" ((USItype) (ah)),                                     \
844              "rI" ((USItype) (bh)),                                     \
845              "rJ" ((USItype) (al)),                                     \
846              "rI" ((USItype) (bl))                                      \
847            __CLOBBER_CC)
848 #if defined (__sparc_v8__)
849 #define umul_ppmm(w1, w0, u, v) \
850   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
851            : "=r" ((USItype) (w1)),                                     \
852              "=r" ((USItype) (w0))                                      \
853            : "r" ((USItype) (u)),                                       \
854              "r" ((USItype) (v)))
855 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
856   __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
857            : "=&r" ((USItype) (__q)),                                   \
858              "=&r" ((USItype) (__r))                                    \
859            : "r" ((USItype) (__n1)),                                    \
860              "r" ((USItype) (__n0)),                                    \
861              "r" ((USItype) (__d)))
862 #else
863 #if defined (__sparclite__)
864 /* This has hardware multiply but not divide.  It also has two additional
865    instructions scan (ffs from high bit) and divscc.  */
866 #define umul_ppmm(w1, w0, u, v) \
867   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
868            : "=r" ((USItype) (w1)),                                     \
869              "=r" ((USItype) (w0))                                      \
870            : "r" ((USItype) (u)),                                       \
871              "r" ((USItype) (v)))
872 #define udiv_qrnnd(q, r, n1, n0, d) \
873   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
874 "       wr      %%g0,%2,%%y     ! Not a delayed write for sparclite\n"  \
875 "       tst     %%g0\n"                                                 \
876 "       divscc  %3,%4,%%g1\n"                                           \
877 "       divscc  %%g1,%4,%%g1\n"                                         \
878 "       divscc  %%g1,%4,%%g1\n"                                         \
879 "       divscc  %%g1,%4,%%g1\n"                                         \
880 "       divscc  %%g1,%4,%%g1\n"                                         \
881 "       divscc  %%g1,%4,%%g1\n"                                         \
882 "       divscc  %%g1,%4,%%g1\n"                                         \
883 "       divscc  %%g1,%4,%%g1\n"                                         \
884 "       divscc  %%g1,%4,%%g1\n"                                         \
885 "       divscc  %%g1,%4,%%g1\n"                                         \
886 "       divscc  %%g1,%4,%%g1\n"                                         \
887 "       divscc  %%g1,%4,%%g1\n"                                         \
888 "       divscc  %%g1,%4,%%g1\n"                                         \
889 "       divscc  %%g1,%4,%%g1\n"                                         \
890 "       divscc  %%g1,%4,%%g1\n"                                         \
891 "       divscc  %%g1,%4,%%g1\n"                                         \
892 "       divscc  %%g1,%4,%%g1\n"                                         \
893 "       divscc  %%g1,%4,%%g1\n"                                         \
894 "       divscc  %%g1,%4,%%g1\n"                                         \
895 "       divscc  %%g1,%4,%%g1\n"                                         \
896 "       divscc  %%g1,%4,%%g1\n"                                         \
897 "       divscc  %%g1,%4,%%g1\n"                                         \
898 "       divscc  %%g1,%4,%%g1\n"                                         \
899 "       divscc  %%g1,%4,%%g1\n"                                         \
900 "       divscc  %%g1,%4,%%g1\n"                                         \
901 "       divscc  %%g1,%4,%%g1\n"                                         \
902 "       divscc  %%g1,%4,%%g1\n"                                         \
903 "       divscc  %%g1,%4,%%g1\n"                                         \
904 "       divscc  %%g1,%4,%%g1\n"                                         \
905 "       divscc  %%g1,%4,%%g1\n"                                         \
906 "       divscc  %%g1,%4,%%g1\n"                                         \
907 "       divscc  %%g1,%4,%0\n"                                           \
908 "       rd      %%y,%1\n"                                               \
909 "       bl,a 1f\n"                                                      \
910 "       add     %1,%4,%1\n"                                             \
911 "1:     ! End of inline udiv_qrnnd"                                     \
912            : "=r" ((USItype) (q)),                                      \
913              "=r" ((USItype) (r))                                       \
914            : "r" ((USItype) (n1)),                                      \
915              "r" ((USItype) (n0)),                                      \
916              "rI" ((USItype) (d))                                       \
917            : "g1" __AND_CLOBBER_CC)
918 #define UDIV_TIME 37
919 #define count_leading_zeros(count, x) \
920   do {                                                                  \
921   __asm__ ("scan %1,1,%0"                                               \
922            : "=r" ((USItype) (count))                                   \
923            : "r" ((USItype) (x)));                                      \
924   } while (0)
925 /* Early sparclites return 63 for an argument of 0, but they warn that future
926    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
927    undefined.  */
928 #else
929 /* SPARC without integer multiplication and divide instructions.
930    (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
931 #define umul_ppmm(w1, w0, u, v) \
932   __asm__ ("! Inlined umul_ppmm\n"                                      \
933 "       wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr\n"\
934 "       sra     %3,31,%%o5      ! Don't move this insn\n"               \
935 "       and     %2,%%o5,%%o5    ! Don't move this insn\n"               \
936 "       andcc   %%g0,0,%%g1     ! Don't move this insn\n"               \
937 "       mulscc  %%g1,%3,%%g1\n"                                         \
938 "       mulscc  %%g1,%3,%%g1\n"                                         \
939 "       mulscc  %%g1,%3,%%g1\n"                                         \
940 "       mulscc  %%g1,%3,%%g1\n"                                         \
941 "       mulscc  %%g1,%3,%%g1\n"                                         \
942 "       mulscc  %%g1,%3,%%g1\n"                                         \
943 "       mulscc  %%g1,%3,%%g1\n"                                         \
944 "       mulscc  %%g1,%3,%%g1\n"                                         \
945 "       mulscc  %%g1,%3,%%g1\n"                                         \
946 "       mulscc  %%g1,%3,%%g1\n"                                         \
947 "       mulscc  %%g1,%3,%%g1\n"                                         \
948 "       mulscc  %%g1,%3,%%g1\n"                                         \
949 "       mulscc  %%g1,%3,%%g1\n"                                         \
950 "       mulscc  %%g1,%3,%%g1\n"                                         \
951 "       mulscc  %%g1,%3,%%g1\n"                                         \
952 "       mulscc  %%g1,%3,%%g1\n"                                         \
953 "       mulscc  %%g1,%3,%%g1\n"                                         \
954 "       mulscc  %%g1,%3,%%g1\n"                                         \
955 "       mulscc  %%g1,%3,%%g1\n"                                         \
956 "       mulscc  %%g1,%3,%%g1\n"                                         \
957 "       mulscc  %%g1,%3,%%g1\n"                                         \
958 "       mulscc  %%g1,%3,%%g1\n"                                         \
959 "       mulscc  %%g1,%3,%%g1\n"                                         \
960 "       mulscc  %%g1,%3,%%g1\n"                                         \
961 "       mulscc  %%g1,%3,%%g1\n"                                         \
962 "       mulscc  %%g1,%3,%%g1\n"                                         \
963 "       mulscc  %%g1,%3,%%g1\n"                                         \
964 "       mulscc  %%g1,%3,%%g1\n"                                         \
965 "       mulscc  %%g1,%3,%%g1\n"                                         \
966 "       mulscc  %%g1,%3,%%g1\n"                                         \
967 "       mulscc  %%g1,%3,%%g1\n"                                         \
968 "       mulscc  %%g1,%3,%%g1\n"                                         \
969 "       mulscc  %%g1,0,%%g1\n"                                          \
970 "       add     %%g1,%%o5,%0\n"                                         \
971 "       rd      %%y,%1"                                                 \
972            : "=r" ((USItype) (w1)),                                     \
973              "=r" ((USItype) (w0))                                      \
974            : "%rI" ((USItype) (u)),                                     \
975              "r" ((USItype) (v))                                                \
976            : "g1", "o5" __AND_CLOBBER_CC)
977 #define UMUL_TIME 39            /* 39 instructions */
978 /* It's quite necessary to add this much assembler for the sparc.
979    The default udiv_qrnnd (in C) is more than 10 times slower!  */
980 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
981   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
982 "       mov     32,%%g1\n"                                              \
983 "       subcc   %1,%2,%%g0\n"                                           \
984 "1:     bcs     5f\n"                                                   \
985 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
986 "       sub     %1,%2,%1        ! this kills msb of n\n"                \
987 "       addx    %1,%1,%1        ! so this can't give carry\n"           \
988 "       subcc   %%g1,1,%%g1\n"                                          \
989 "2:     bne     1b\n"                                                   \
990 "        subcc  %1,%2,%%g0\n"                                           \
991 "       bcs     3f\n"                                                   \
992 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
993 "       b       3f\n"                                                   \
994 "        sub    %1,%2,%1        ! this kills msb of n\n"                \
995 "4:     sub     %1,%2,%1\n"                                             \
996 "5:     addxcc  %1,%1,%1\n"                                             \
997 "       bcc     2b\n"                                                   \
998 "        subcc  %%g1,1,%%g1\n"                                          \
999 "! Got carry from n.  Subtract next step to cancel this carry.\n"       \
1000 "       bne     4b\n"                                                   \
1001 "        addcc  %0,%0,%0        ! shift n1n0 and a 0-bit in lsb\n"      \
1002 "       sub     %1,%2,%1\n"                                             \
1003 "3:     xnor    %0,0,%0\n"                                              \
1004 "       ! End of inline udiv_qrnnd"                                     \
1005            : "=&r" ((USItype) (__q)),                                   \
1006              "=&r" ((USItype) (__r))                                    \
1007            : "r" ((USItype) (__d)),                                     \
1008              "1" ((USItype) (__n1)),                                    \
1009              "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
1010 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations.  */
1011 #endif /* __sparclite__ */
1012 #endif /* __sparc_v8__ */
1013 #endif /* sparc32 */
1014
1015 #if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \
1016     && W_TYPE_SIZE == 64
1017 #define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
1018   __asm__ ("addcc %r4,%5,%1\n\t"                                        \
1019            "add %r2,%3,%0\n\t"                                          \
1020            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1021            "add %0, 1, %0\n"                                            \
1022            "1:"                                                         \
1023            : "=r" ((UDItype)(sh)),                                      \
1024              "=&r" ((UDItype)(sl))                                      \
1025            : "%rJ" ((UDItype)(ah)),                                     \
1026              "rI" ((UDItype)(bh)),                                      \
1027              "%rJ" ((UDItype)(al)),                                     \
1028              "rI" ((UDItype)(bl))                                       \
1029            __CLOBBER_CC)
1030
1031 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
1032   __asm__ ("subcc %r4,%5,%1\n\t"                                        \
1033            "sub %r2,%3,%0\n\t"                                          \
1034            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1035            "sub %0, 1, %0\n\t"                                          \
1036            "1:"                                                         \
1037            : "=r" ((UDItype)(sh)),                                      \
1038              "=&r" ((UDItype)(sl))                                      \
1039            : "rJ" ((UDItype)(ah)),                                      \
1040              "rI" ((UDItype)(bh)),                                      \
1041              "rJ" ((UDItype)(al)),                                      \
1042              "rI" ((UDItype)(bl))                                       \
1043            __CLOBBER_CC)
1044
1045 #define umul_ppmm(wh, wl, u, v)                                         \
1046   do {                                                                  \
1047           UDItype tmp1, tmp2, tmp3, tmp4;                               \
1048           __asm__ __volatile__ (                                        \
1049                    "srl %7,0,%3\n\t"                                    \
1050                    "mulx %3,%6,%1\n\t"                                  \
1051                    "srlx %6,32,%2\n\t"                                  \
1052                    "mulx %2,%3,%4\n\t"                                  \
1053                    "sllx %4,32,%5\n\t"                                  \
1054                    "srl %6,0,%3\n\t"                                    \
1055                    "sub %1,%5,%5\n\t"                                   \
1056                    "srlx %5,32,%5\n\t"                                  \
1057                    "addcc %4,%5,%4\n\t"                                 \
1058                    "srlx %7,32,%5\n\t"                                  \
1059                    "mulx %3,%5,%3\n\t"                                  \
1060                    "mulx %2,%5,%5\n\t"                                  \
1061                    "sethi %%hi(0x80000000),%2\n\t"                      \
1062                    "addcc %4,%3,%4\n\t"                                 \
1063                    "srlx %4,32,%4\n\t"                                  \
1064                    "add %2,%2,%2\n\t"                                   \
1065                    "movcc %%xcc,%%g0,%2\n\t"                            \
1066                    "addcc %5,%4,%5\n\t"                                 \
1067                    "sllx %3,32,%3\n\t"                                  \
1068                    "add %1,%3,%1\n\t"                                   \
1069                    "add %5,%2,%0"                                       \
1070            : "=r" ((UDItype)(wh)),                                      \
1071              "=&r" ((UDItype)(wl)),                                     \
1072              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)     \
1073            : "r" ((UDItype)(u)),                                        \
1074              "r" ((UDItype)(v))                                         \
1075            __CLOBBER_CC);                                               \
1076   } while (0)
1077 #define UMUL_TIME 96
1078 #define UDIV_TIME 230
1079 #endif /* sparc64 */
1080
1081 #if defined (__vax__) && W_TYPE_SIZE == 32
1082 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1083   __asm__ ("addl2 %5,%1\n\tadwc %3,%0"                                  \
1084            : "=g" ((USItype) (sh)),                                     \
1085              "=&g" ((USItype) (sl))                                     \
1086            : "%0" ((USItype) (ah)),                                     \
1087              "g" ((USItype) (bh)),                                      \
1088              "%1" ((USItype) (al)),                                     \
1089              "g" ((USItype) (bl)))
1090 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1091   __asm__ ("subl2 %5,%1\n\tsbwc %3,%0"                                  \
1092            : "=g" ((USItype) (sh)),                                     \
1093              "=&g" ((USItype) (sl))                                     \
1094            : "0" ((USItype) (ah)),                                      \
1095              "g" ((USItype) (bh)),                                      \
1096              "1" ((USItype) (al)),                                      \
1097              "g" ((USItype) (bl)))
1098 #define umul_ppmm(xh, xl, m0, m1) \
1099   do {                                                                  \
1100     union {                                                             \
1101         UDItype __ll;                                                   \
1102         struct {USItype __l, __h;} __i;                                 \
1103       } __xx;                                                           \
1104     USItype __m0 = (m0), __m1 = (m1);                                   \
1105     __asm__ ("emul %1,%2,$0,%0"                                         \
1106              : "=r" (__xx.__ll)                                         \
1107              : "g" (__m0),                                              \
1108                "g" (__m1));                                             \
1109     (xh) = __xx.__i.__h;                                                \
1110     (xl) = __xx.__i.__l;                                                \
1111     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1112              + (((SItype) __m1 >> 31) & __m0));                         \
1113   } while (0)
1114 #define sdiv_qrnnd(q, r, n1, n0, d) \
1115   do {                                                                  \
1116     union {DItype __ll;                                                 \
1117            struct {SItype __l, __h;} __i;                               \
1118           } __xx;                                                       \
1119     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1120     __asm__ ("ediv %3,%2,%0,%1"                                         \
1121              : "=g" (q), "=g" (r)                                       \
1122              : "g" (__xx.__ll), "g" (d));                               \
1123   } while (0)
1124 #endif /* __vax__ */
1125
1126 #if defined (__z8000__) && W_TYPE_SIZE == 16
1127 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1128   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1129            : "=r" ((unsigned int)(sh)),                                 \
1130              "=&r" ((unsigned int)(sl))                                 \
1131            : "%0" ((unsigned int)(ah)),                                 \
1132              "r" ((unsigned int)(bh)),                                  \
1133              "%1" ((unsigned int)(al)),                                 \
1134              "rQR" ((unsigned int)(bl)))
1135 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1136   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1137            : "=r" ((unsigned int)(sh)),                                 \
1138              "=&r" ((unsigned int)(sl))                                 \
1139            : "0" ((unsigned int)(ah)),                                  \
1140              "r" ((unsigned int)(bh)),                                  \
1141              "1" ((unsigned int)(al)),                                  \
1142              "rQR" ((unsigned int)(bl)))
1143 #define umul_ppmm(xh, xl, m0, m1) \
1144   do {                                                                  \
1145     union {long int __ll;                                               \
1146            struct {unsigned int __h, __l;} __i;                         \
1147           } __xx;                                                       \
1148     unsigned int __m0 = (m0), __m1 = (m1);                              \
1149     __asm__ ("mult      %S0,%H3"                                        \
1150              : "=r" (__xx.__i.__h),                                     \
1151                "=r" (__xx.__i.__l)                                      \
1152              : "%1" (__m0),                                             \
1153                "rQR" (__m1));                                           \
1154     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1155     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1156              + (((signed int) __m1 >> 15) & __m0));                     \
1157   } while (0)
1158 #endif /* __z8000__ */
1159
1160 #endif /* __GNUC__ */
1161
1162 /* If this machine has no inline assembler, use C macros.  */
1163
1164 #if !defined (add_ssaaaa)
1165 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1166   do {                                                                  \
1167     UWtype __x;                                                         \
1168     __x = (al) + (bl);                                                  \
1169     (sh) = (ah) + (bh) + (__x < (al));                                  \
1170     (sl) = __x;                                                         \
1171   } while (0)
1172 #endif
1173
1174 #if !defined (sub_ddmmss)
1175 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1176   do {                                                                  \
1177     UWtype __x;                                                         \
1178     __x = (al) - (bl);                                                  \
1179     (sh) = (ah) - (bh) - (__x > (al));                                  \
1180     (sl) = __x;                                                         \
1181   } while (0)
1182 #endif
1183
1184 /* If we lack umul_ppmm but have smul_ppmm, define umul_ppmm in terms of
1185    smul_ppmm.  */
1186 #if !defined (umul_ppmm) && defined (smul_ppmm)
1187 #define umul_ppmm(w1, w0, u, v)                                         \
1188   do {                                                                  \
1189     UWtype __w1;                                                        \
1190     UWtype __xm0 = (u), __xm1 = (v);                                    \
1191     smul_ppmm (__w1, w0, __xm0, __xm1);                                 \
1192     (w1) = __w1 + (-(__xm0 >> (W_TYPE_SIZE - 1)) & __xm1)               \
1193                 + (-(__xm1 >> (W_TYPE_SIZE - 1)) & __xm0);              \
1194   } while (0)
1195 #endif
1196
1197 /* If we still don't have umul_ppmm, define it using plain C.  */
1198 #if !defined (umul_ppmm)
1199 #define umul_ppmm(w1, w0, u, v)                                         \
1200   do {                                                                  \
1201     UWtype __x0, __x1, __x2, __x3;                                      \
1202     UHWtype __ul, __vl, __uh, __vh;                                     \
1203                                                                         \
1204     __ul = __ll_lowpart (u);                                            \
1205     __uh = __ll_highpart (u);                                           \
1206     __vl = __ll_lowpart (v);                                            \
1207     __vh = __ll_highpart (v);                                           \
1208                                                                         \
1209     __x0 = (UWtype) __ul * __vl;                                        \
1210     __x1 = (UWtype) __ul * __vh;                                        \
1211     __x2 = (UWtype) __uh * __vl;                                        \
1212     __x3 = (UWtype) __uh * __vh;                                        \
1213                                                                         \
1214     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1215     __x1 += __x2;               /* but this indeed can */               \
1216     if (__x1 < __x2)            /* did we get it? */                    \
1217       __x3 += __ll_B;           /* yes, add it in the proper pos.  */   \
1218                                                                         \
1219     (w1) = __x3 + __ll_highpart (__x1);                                 \
1220     (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);          \
1221   } while (0)
1222 #endif
1223
1224 #if !defined (__umulsidi3)
1225 #define __umulsidi3(u, v) \
1226   ({DWunion __w;                                                        \
1227     umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
1228     __w.ll; })
1229 #endif
1230
1231 /* Define this unconditionally, so it can be used for debugging.  */
1232 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1233   do {                                                                  \
1234     UWtype __d1, __d0, __q1, __q0;                                      \
1235     UWtype __r1, __r0, __m;                                             \
1236     __d1 = __ll_highpart (d);                                           \
1237     __d0 = __ll_lowpart (d);                                            \
1238                                                                         \
1239     __r1 = (n1) % __d1;                                                 \
1240     __q1 = (n1) / __d1;                                                 \
1241     __m = (UWtype) __q1 * __d0;                                         \
1242     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1243     if (__r1 < __m)                                                     \
1244       {                                                                 \
1245         __q1--, __r1 += (d);                                            \
1246         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1247           if (__r1 < __m)                                               \
1248             __q1--, __r1 += (d);                                        \
1249       }                                                                 \
1250     __r1 -= __m;                                                        \
1251                                                                         \
1252     __r0 = __r1 % __d1;                                                 \
1253     __q0 = __r1 / __d1;                                                 \
1254     __m = (UWtype) __q0 * __d0;                                         \
1255     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1256     if (__r0 < __m)                                                     \
1257       {                                                                 \
1258         __q0--, __r0 += (d);                                            \
1259         if (__r0 >= (d))                                                \
1260           if (__r0 < __m)                                               \
1261             __q0--, __r0 += (d);                                        \
1262       }                                                                 \
1263     __r0 -= __m;                                                        \
1264                                                                         \
1265     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1266     (r) = __r0;                                                         \
1267   } while (0)
1268
1269 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1270    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1271 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1272 #define udiv_qrnnd(q, r, nh, nl, d) \
1273   do {                                                                  \
1274     USItype __r;                                                        \
1275     (q) = __udiv_w_sdiv (&__r, nh, nl, d);                              \
1276     (r) = __r;                                                          \
1277   } while (0)
1278 #endif
1279
1280 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1281 #if !defined (udiv_qrnnd)
1282 #define UDIV_NEEDS_NORMALIZATION 1
1283 #define udiv_qrnnd __udiv_qrnnd_c
1284 #endif
1285
1286 #if !defined (count_leading_zeros)
1287 extern const UQItype __clz_tab[] ATTRIBUTE_HIDDEN;
1288 #define count_leading_zeros(count, x) \
1289   do {                                                                  \
1290     UWtype __xr = (x);                                                  \
1291     UWtype __a;                                                         \
1292                                                                         \
1293     if (W_TYPE_SIZE <= 32)                                              \
1294       {                                                                 \
1295         __a = __xr < ((UWtype)1<<2*__BITS4)                             \
1296           ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4)                 \
1297           : (__xr < ((UWtype)1<<3*__BITS4) ?  2*__BITS4 : 3*__BITS4);   \
1298       }                                                                 \
1299     else                                                                \
1300       {                                                                 \
1301         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1302           if (((__xr >> __a) & 0xff) != 0)                              \
1303             break;                                                      \
1304       }                                                                 \
1305                                                                         \
1306     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1307   } while (0)
1308 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1309 #endif
1310
1311 #if !defined (count_trailing_zeros)
1312 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1313    defined in asm, but if it is not, the C version above is good enough.  */
1314 #define count_trailing_zeros(count, x) \
1315   do {                                                                  \
1316     UWtype __ctz_x = (x);                                               \
1317     UWtype __ctz_c;                                                     \
1318     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1319     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1320   } while (0)
1321 #endif
1322
1323 #ifndef UDIV_NEEDS_NORMALIZATION
1324 #define UDIV_NEEDS_NORMALIZATION 0
1325 #endif