gcc/longlong.h

   1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
   2    Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000
   3    Free Software Foundation, Inc.
   4
   5    This definition file is free software; you can redistribute it
   6    and/or modify it under the terms of the GNU General Public
   7    License as published by the Free Software Foundation; either
   8    version 2, or (at your option) any later version.
   9
  10    This definition file is distributed in the hope that it will be
  11    useful, but WITHOUT ANY WARRANTY; without even the implied
  12    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13    See the GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with this program; if not, write to the Free Software
  17    Foundation, Inc., 59 Temple Place - Suite 330,
  18    Boston, MA 02111-1307, USA.  */
  19
  20 /* You have to define the following before including this file:
  21
  22    UWtype -- An unsigned type, default type for operations (typically a "word")
  23    UHWtype -- An unsigned type, at least half the size of UWtype.
  24    UDWtype -- An unsigned type, at least twice as large a UWtype
  25    W_TYPE_SIZE -- size in bits of UWtype
  26
  27    UQItype -- Unsigned 8 bit type.
  28    SItype, USItype -- Signed and unsigned 32 bit types.
  29    DItype, UDItype -- Signed and unsigned 64 bit types.
  30
  31    On a 32 bit machine UWtype should typically be USItype;
  32    on a 64 bit machine, UWtype should typically be UDItype.
  33 */
  34
  35 #define __BITS4 (W_TYPE_SIZE / 4)
  36 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
  37 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
  38 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
  39
  40 #ifndef W_TYPE_SIZE
  41 #define W_TYPE_SIZE     32
  42 #define UWtype          USItype
  43 #define UHWtype         USItype
  44 #define UDWtype         UDItype
  45 #endif
  46
  47 /* Define auxiliary asm macros.
  48
  49    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
  50    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
  51    word product in HIGH_PROD and LOW_PROD.
  52
  53    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
  54    UDWtype product.  This is just a variant of umul_ppmm.
  55
  56    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  57    denominator) divides a UDWtype, composed by the UWtype integers
  58    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
  59    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
  60    than DENOMINATOR for correct operation.  If, in addition, the most
  61    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  62    UDIV_NEEDS_NORMALIZATION is defined to 1.
  63
  64    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  65    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
  66    is rounded towards 0.
  67
  68    5) count_leading_zeros(count, x) counts the number of zero-bits from the
  69    msb to the first non-zero bit in the UWtype X.  This is the number of
  70    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
  71    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
  72
  73    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
  74    from the least significant end.
  75
  76    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
  77    high_addend_2, low_addend_2) adds two UWtype integers, composed by
  78    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
  79    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
  80    (i.e. carry out) is not stored anywhere, and is lost.
  81
  82    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
  83    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
  84    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
  85    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
  86    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
  87    and is lost.
  88
  89    If any of these macros are left undefined for a particular CPU,
  90    C macros are used.  */
  91
  92 /* The CPUs come in alphabetical order below.
  93
  94    Please add support for more CPUs here, or improve the current support
  95    for the CPUs below!
  96    (E.g. WE32100, IBM360.)  */
  97
  98 #if defined (__GNUC__) && !defined (NO_ASM)
  99
 100 /* We sometimes need to clobber "cc" with gcc2, but that would not be
 101    understood by gcc1.  Use cpp to avoid major code duplication.  */
 102 #if __GNUC__ < 2
 103 #define __CLOBBER_CC
 104 #define __AND_CLOBBER_CC
 105 #else /* __GNUC__ >= 2 */
 106 #define __CLOBBER_CC : "cc"
 107 #define __AND_CLOBBER_CC , "cc"
 108 #endif /* __GNUC__ < 2 */
 109
 110 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
 111 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 112   __asm__ ("add %1,%4,%5\n\taddc %0,%2,%3"                              \
 113            : "=r" ((USItype) (sh)),                                     \
 114             "=&r" ((USItype) (sl))                                      \
 115            : "%r" ((USItype) (ah)),                                     \
 116              "rI" ((USItype) (bh)),                                     \
 117              "%r" ((USItype) (al)),                                     \
 118              "rI" ((USItype) (bl)))
 119 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 120   __asm__ ("sub %1,%4,%5\n\tsubc %0,%2,%3"                              \
 121            : "=r" ((USItype) (sh)),                                     \
 122              "=&r" ((USItype) (sl))                                     \
 123            : "r" ((USItype) (ah)),                                      \
 124              "rI" ((USItype) (bh)),                                     \
 125              "r" ((USItype) (al)),                                      \
 126              "rI" ((USItype) (bl)))
 127 #define umul_ppmm(xh, xl, m0, m1) \
 128   do {                                                                  \
 129     USItype __m0 = (m0), __m1 = (m1);                                   \
 130     __asm__ ("multiplu %0,%1,%2"                                        \
 131              : "=r" ((USItype) (xl))                                    \
 132              : "r" (__m0),                                              \
 133                "r" (__m1));                                             \
 134     __asm__ ("multmu %0,%1,%2"                                          \
 135              : "=r" ((USItype) (xh))                                    \
 136              : "r" (__m0),                                              \
 137                "r" (__m1));                                             \
 138   } while (0)
 139 #define udiv_qrnnd(q, r, n1, n0, d) \
 140   __asm__ ("dividu %0,%3,%4"                                            \
 141            : "=r" ((USItype) (q)),                                      \
 142              "=q" ((USItype) (r))                                       \
 143            : "1" ((USItype) (n1)),                                      \
 144              "r" ((USItype) (n0)),                                      \
 145              "r" ((USItype) (d)))
 146 #define count_leading_zeros(count, x) \
 147     __asm__ ("clz %0,%1"                                                \
 148              : "=r" ((USItype) (count))                                 \
 149              : "r" ((USItype) (x)))
 150 #define COUNT_LEADING_ZEROS_0 32
 151 #endif /* __a29k__ */
 152
 153 #if defined (__alpha) && W_TYPE_SIZE == 64
 154 #define umul_ppmm(ph, pl, m0, m1) \
 155   do {                                                                  \
 156     UDItype __m0 = (m0), __m1 = (m1);                                   \
 157     __asm__ ("umulh %r1,%2,%0"                                          \
 158              : "=r" ((UDItype) ph)                                      \
 159              : "%rJ" (__m0),                                            \
 160                "rI" (__m1));                                            \
 161     (pl) = __m0 * __m1;                                                 \
 162   } while (0)
 163 #define UMUL_TIME 46
 164 #ifndef LONGLONG_STANDALONE
 165 #define udiv_qrnnd(q, r, n1, n0, d) \
 166   do { UDItype __r;                                                     \
 167     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 168     (r) = __r;                                                          \
 169   } while (0)
 170 extern UDItype __udiv_qrnnd PARAMS ((UDItype *, UDItype, UDItype, UDItype));
 171 #define UDIV_TIME 220
 172 #endif /* LONGLONG_STANDALONE */
 173 #ifdef __alpha_cix__
 174 #define count_leading_zeros(COUNT,X) \
 175   __asm__("ctlz %1,%0" : "=r"(COUNT) : "r"(X))
 176 #define count_trailing_zeros(COUNT,X) \
 177   __asm__("cttz %1,%0" : "=r"(COUNT) : "r"(X))
 178 #define COUNT_LEADING_ZEROS_0 64
 179 #else
 180 extern const UQItype __clz_tab[];
 181 #define count_leading_zeros(COUNT,X) \
 182   do {                                                                  \
 183     UDItype __xr = (X), __t, __a;                                       \
 184     __asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr));                \
 185     __a = __clz_tab[__t ^ 0xff] - 1;                                    \
 186     __asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a));        \
 187     (COUNT) = 64 - (__clz_tab[__t] + __a*8);                            \
 188   } while (0)
 189 #define count_trailing_zeros(COUNT,X) \
 190   do {                                                                  \
 191     UDItype __xr = (X), __t, __a;                                       \
 192     __asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr));                \
 193     __t = ~__t & -~__t;                                                 \
 194     __a = ((__t & 0xCC) != 0) * 2;                                      \
 195     __a += ((__t & 0xF0) != 0) * 4;                                     \
 196     __a += ((__t & 0xAA) != 0);                                         \
 197     __asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a));        \
 198     __a <<= 3;                                                          \
 199     __t &= -__t;                                                        \
 200     __a += ((__t & 0xCC) != 0) * 2;                                     \
 201     __a += ((__t & 0xF0) != 0) * 4;                                     \
 202     __a += ((__t & 0xAA) != 0);                                         \
 203     (COUNT) = __a;                                                      \
 204   } while (0)
 205 #endif /* __alpha_cix__ */
 206 #endif /* __alpha */
 207
 208 #if defined (__arc__) && W_TYPE_SIZE == 32
 209 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 210   __asm__ ("add.f       %1, %4, %5\n\tadc       %0, %2, %3"             \
 211            : "=r" ((USItype) (sh)),                                     \
 212              "=&r" ((USItype) (sl))                                     \
 213            : "%r" ((USItype) (ah)),                                     \
 214              "rIJ" ((USItype) (bh)),                                    \
 215              "%r" ((USItype) (al)),                                     \
 216              "rIJ" ((USItype) (bl)))
 217 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 218   __asm__ ("sub.f       %1, %4, %5\n\tsbc       %0, %2, %3"             \
 219            : "=r" ((USItype) (sh)),                                     \
 220              "=&r" ((USItype) (sl))                                     \
 221            : "r" ((USItype) (ah)),                                      \
 222              "rIJ" ((USItype) (bh)),                                    \
 223              "r" ((USItype) (al)),                                      \
 224              "rIJ" ((USItype) (bl)))
 225 /* Call libgcc routine.  */
 226 #define umul_ppmm(w1, w0, u, v) \
 227 do {                                                                    \
 228   DWunion __w;                                                          \
 229   __w.ll = __umulsidi3 (u, v);                                          \
 230   w1 = __w.s.high;                                                      \
 231   w0 = __w.s.low;                                                       \
 232 } while (0)
 233 #define __umulsidi3 __umulsidi3
 234 UDItype __umulsidi3 (USItype, USItype);
 235 #endif
 236
 237 #if defined (__arm__) && W_TYPE_SIZE == 32
 238 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 239   __asm__ ("adds        %1, %4, %5\n\tadc       %0, %2, %3"             \
 240            : "=r" ((USItype) (sh)),                                     \
 241              "=&r" ((USItype) (sl))                                     \
 242            : "%r" ((USItype) (ah)),                                     \
 243              "rI" ((USItype) (bh)),                                     \
 244              "%r" ((USItype) (al)),                                     \
 245              "rI" ((USItype) (bl)))
 246 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 247   __asm__ ("subs        %1, %4, %5\n\tsbc       %0, %2, %3"             \
 248            : "=r" ((USItype) (sh)),                                     \
 249              "=&r" ((USItype) (sl))                                     \
 250            : "r" ((USItype) (ah)),                                      \
 251              "rI" ((USItype) (bh)),                                     \
 252              "r" ((USItype) (al)),                                      \
 253              "rI" ((USItype) (bl)))
 254 #define umul_ppmm(xh, xl, a, b) \
 255 {register USItype __t0, __t1, __t2;                                     \
 256   __asm__ ("%@ Inlined umul_ppmm\n"                                     \
 257            "    mov     %2, %5, lsr #16\n"                              \
 258            "    mov     %0, %6, lsr #16\n"                              \
 259            "    bic     %3, %5, %2, lsl #16\n"                          \
 260            "    bic     %4, %6, %0, lsl #16\n"                          \
 261            "    mul     %1, %3, %4\n"                                   \
 262            "    mul     %4, %2, %4\n"                                   \
 263            "    mul     %3, %0, %3\n"                                   \
 264            "    mul     %0, %2, %0\n"                                   \
 265            "    adds    %3, %4, %3\n"                                   \
 266            "    addcs   %0, %0, #65536\n"                               \
 267            "    adds    %1, %1, %3, lsl #16\n"                          \
 268            "    adc     %0, %0, %3, lsr #16"                            \
 269            : "=&r" ((USItype) (xh)),                                    \
 270              "=r" ((USItype) (xl)),                                     \
 271              "=&r" (__t0), "=&r" (__t1), "=r" (__t2)                    \
 272            : "r" ((USItype) (a)),                                       \
 273              "r" ((USItype) (b)));}
 274 #define UMUL_TIME 20
 275 #define UDIV_TIME 100
 276 #endif /* __arm__ */
 277
 278 #if defined (__clipper__) && W_TYPE_SIZE == 32
 279 #define umul_ppmm(w1, w0, u, v) \
 280   ({union {UDItype __ll;                                                \
 281            struct {USItype __l, __h;} __i;                              \
 282           } __xx;                                                       \
 283   __asm__ ("mulwux %2,%0"                                               \
 284            : "=r" (__xx.__ll)                                           \
 285            : "%0" ((USItype) (u)),                                      \
 286              "r" ((USItype) (v)));                                      \
 287   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 288 #define smul_ppmm(w1, w0, u, v) \
 289   ({union {DItype __ll;                                                 \
 290            struct {SItype __l, __h;} __i;                               \
 291           } __xx;                                                       \
 292   __asm__ ("mulwx %2,%0"                                                \
 293            : "=r" (__xx.__ll)                                           \
 294            : "%0" ((SItype) (u)),                                       \
 295              "r" ((SItype) (v)));                                       \
 296   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 297 #define __umulsidi3(u, v) \
 298   ({UDItype __w;                                                        \
 299     __asm__ ("mulwux %2,%0"                                             \
 300              : "=r" (__w)                                               \
 301              : "%0" ((USItype) (u)),                                    \
 302                "r" ((USItype) (v)));                                    \
 303     __w; })
 304 #endif /* __clipper__ */
 305
 306 #if defined (__gmicro__) && W_TYPE_SIZE == 32
 307 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 308   __asm__ ("add.w %5,%1\n\taddx %3,%0"                                  \
 309            : "=g" ((USItype) (sh)),                                     \
 310              "=&g" ((USItype) (sl))                                     \
 311            : "%0" ((USItype) (ah)),                                     \
 312              "g" ((USItype) (bh)),                                      \
 313              "%1" ((USItype) (al)),                                     \
 314              "g" ((USItype) (bl)))
 315 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 316   __asm__ ("sub.w %5,%1\n\tsubx %3,%0"                                  \
 317            : "=g" ((USItype) (sh)),                                     \
 318              "=&g" ((USItype) (sl))                                     \
 319            : "0" ((USItype) (ah)),                                      \
 320              "g" ((USItype) (bh)),                                      \
 321              "1" ((USItype) (al)),                                      \
 322              "g" ((USItype) (bl)))
 323 #define umul_ppmm(ph, pl, m0, m1) \
 324   __asm__ ("mulx %3,%0,%1"                                              \
 325            : "=g" ((USItype) (ph)),                                     \
 326              "=r" ((USItype) (pl))                                      \
 327            : "%0" ((USItype) (m0)),                                     \
 328              "g" ((USItype) (m1)))
 329 #define udiv_qrnnd(q, r, nh, nl, d) \
 330   __asm__ ("divx %4,%0,%1"                                              \
 331            : "=g" ((USItype) (q)),                                      \
 332              "=r" ((USItype) (r))                                       \
 333            : "1" ((USItype) (nh)),                                      \
 334              "0" ((USItype) (nl)),                                      \
 335              "g" ((USItype) (d)))
 336 #define count_leading_zeros(count, x) \
 337   __asm__ ("bsch/1 %1,%0"                                               \
 338            : "=g" (count)                                               \
 339            : "g" ((USItype) (x)),                                       \
 340              "0" ((USItype) 0))
 341 #endif
 342
 343 #if defined (__hppa) && W_TYPE_SIZE == 32
 344 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 345   __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0"                              \
 346            : "=r" ((USItype) (sh)),                                     \
 347              "=&r" ((USItype) (sl))                                     \
 348            : "%rM" ((USItype) (ah)),                                    \
 349              "rM" ((USItype) (bh)),                                     \
 350              "%rM" ((USItype) (al)),                                    \
 351              "rM" ((USItype) (bl)))
 352 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 353   __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0"                              \
 354            : "=r" ((USItype) (sh)),                                     \
 355              "=&r" ((USItype) (sl))                                     \
 356            : "rM" ((USItype) (ah)),                                     \
 357              "rM" ((USItype) (bh)),                                     \
 358              "rM" ((USItype) (al)),                                     \
 359              "rM" ((USItype) (bl)))
 360 #if defined (_PA_RISC1_1)
 361 #define umul_ppmm(w1, w0, u, v) \
 362   do {                                                                  \
 363     union                                                               \
 364       {                                                                 \
 365         UDItype __f;                                                    \
 366         struct {USItype __w1, __w0;} __w1w0;                            \
 367       } __t;                                                            \
 368     __asm__ ("xmpyu %1,%2,%0"                                           \
 369              : "=x" (__t.__f)                                           \
 370              : "x" ((USItype) (u)),                                     \
 371                "x" ((USItype) (v)));                                    \
 372     (w1) = __t.__w1w0.__w1;                                             \
 373     (w0) = __t.__w1w0.__w0;                                             \
 374      } while (0)
 375 #define UMUL_TIME 8
 376 #else
 377 #define UMUL_TIME 30
 378 #endif
 379 #define UDIV_TIME 40
 380 #define count_leading_zeros(count, x) \
 381   do {                                                                  \
 382     USItype __tmp;                                                      \
 383     __asm__ (                                                           \
 384        "ldi             1,%0\n"                                         \
 385 "       extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?\n"  \
 386 "       extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.\n"\
 387 "       ldo             16(%0),%0               ; Yes.  Perform add.\n" \
 388 "       extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?\n"   \
 389 "       extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.\n"\
 390 "       ldo             8(%0),%0                ; Yes.  Perform add.\n" \
 391 "       extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?\n"    \
 392 "       extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.\n"\
 393 "       ldo             4(%0),%0                ; Yes.  Perform add.\n" \
 394 "       extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?\n"    \
 395 "       extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.\n"\
 396 "       ldo             2(%0),%0                ; Yes.  Perform add.\n" \
 397 "       extru           %1,30,1,%1              ; Extract bit 1.\n"     \
 398 "       sub             %0,%1,%0                ; Subtract it.\n"       \
 399         : "=r" (count), "=r" (__tmp) : "1" (x));                        \
 400   } while (0)
 401 #endif
 402
 403 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
 404 #define umul_ppmm(xh, xl, m0, m1) \
 405   do {                                                                  \
 406     union {UDItype __ll;                                                \
 407            struct {USItype __h, __l;} __i;                              \
 408           } __xx;                                                       \
 409     USItype __m0 = (m0), __m1 = (m1);                                   \
 410     __asm__ ("mr %0,%3"                                                 \
 411              : "=r" (__xx.__i.__h),                                     \
 412                "=r" (__xx.__i.__l)                                      \
 413              : "%1" (__m0),                                             \
 414                "r" (__m1));                                             \
 415     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 416     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 417              + (((SItype) __m1 >> 31) & __m0));                         \
 418   } while (0)
 419 #define smul_ppmm(xh, xl, m0, m1) \
 420   do {                                                                  \
 421     union {DItype __ll;                                                 \
 422            struct {USItype __h, __l;} __i;                              \
 423           } __xx;                                                       \
 424     __asm__ ("mr %0,%3"                                                 \
 425              : "=r" (__xx.__i.__h),                                     \
 426                "=r" (__xx.__i.__l)                                      \
 427              : "%1" (m0),                                               \
 428                "r" (m1));                                               \
 429     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 430   } while (0)
 431 #define sdiv_qrnnd(q, r, n1, n0, d) \
 432   do {                                                                  \
 433     union {DItype __ll;                                                 \
 434            struct {USItype __h, __l;} __i;                              \
 435           } __xx;                                                       \
 436     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
 437     __asm__ ("dr %0,%2"                                                 \
 438              : "=r" (__xx.__ll)                                         \
 439              : "0" (__xx.__ll), "r" (d));                               \
 440     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
 441   } while (0)
 442 #endif
 443
 444 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
 445 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 446   __asm__ ("addl %5,%1\n\tadcl %3,%0"                                   \
 447            : "=r" ((USItype) (sh)),                                     \
 448              "=&r" ((USItype) (sl))                                     \
 449            : "%0" ((USItype) (ah)),                                     \
 450              "g" ((USItype) (bh)),                                      \
 451              "%1" ((USItype) (al)),                                     \
 452              "g" ((USItype) (bl)))
 453 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 454   __asm__ ("subl %5,%1\n\tsbbl %3,%0"                                   \
 455            : "=r" ((USItype) (sh)),                                     \
 456              "=&r" ((USItype) (sl))                                     \
 457            : "0" ((USItype) (ah)),                                      \
 458              "g" ((USItype) (bh)),                                      \
 459              "1" ((USItype) (al)),                                      \
 460              "g" ((USItype) (bl)))
 461 #define umul_ppmm(w1, w0, u, v) \
 462   __asm__ ("mull %3"                                                    \
 463            : "=a" ((USItype) (w0)),                                     \
 464              "=d" ((USItype) (w1))                                      \
 465            : "%0" ((USItype) (u)),                                      \
 466              "rm" ((USItype) (v)))
 467 #define udiv_qrnnd(q, r, n1, n0, dv) \
 468   __asm__ ("divl %4"                                                    \
 469            : "=a" ((USItype) (q)),                                      \
 470              "=d" ((USItype) (r))                                       \
 471            : "0" ((USItype) (n0)),                                      \
 472              "1" ((USItype) (n1)),                                      \
 473              "rm" ((USItype) (dv)))
 474 #define count_leading_zeros(count, x) \
 475   do {                                                                  \
 476     USItype __cbtmp;                                                    \
 477     __asm__ ("bsrl %1,%0"                                               \
 478              : "=r" (__cbtmp) : "rm" ((USItype) (x)));                  \
 479     (count) = __cbtmp ^ 31;                                             \
 480   } while (0)
 481 #define count_trailing_zeros(count, x) \
 482   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
 483 #define UMUL_TIME 40
 484 #define UDIV_TIME 40
 485 #endif /* 80x86 */
 486
 487 #if defined (__i860__) && W_TYPE_SIZE == 32
 488 #if 0
 489 /* Make sure these patterns really improve the code before
 490    switching them on.  */
 491 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 492   do {                                                                  \
 493     union                                                               \
 494       {                                                                 \
 495         DItype __ll;                                                    \
 496         struct {USItype __l, __h;} __i;                                 \
 497       }  __a, __b, __s;                                                 \
 498     __a.__i.__l = (al);                                                 \
 499     __a.__i.__h = (ah);                                                 \
 500     __b.__i.__l = (bl);                                                 \
 501     __b.__i.__h = (bh);                                                 \
 502     __asm__ ("fiadd.dd %1,%2,%0"                                        \
 503              : "=f" (__s.__ll)                                          \
 504              : "%f" (__a.__ll), "f" (__b.__ll));                        \
 505     (sh) = __s.__i.__h;                                                 \
 506     (sl) = __s.__i.__l;                                                 \
 507     } while (0)
 508 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 509   do {                                                                  \
 510     union                                                               \
 511       {                                                                 \
 512         DItype __ll;                                                    \
 513         struct {USItype __l, __h;} __i;                                 \
 514       }  __a, __b, __s;                                                 \
 515     __a.__i.__l = (al);                                                 \
 516     __a.__i.__h = (ah);                                                 \
 517     __b.__i.__l = (bl);                                                 \
 518     __b.__i.__h = (bh);                                                 \
 519     __asm__ ("fisub.dd %1,%2,%0"                                        \
 520              : "=f" (__s.__ll)                                          \
 521              : "%f" (__a.__ll), "f" (__b.__ll));                        \
 522     (sh) = __s.__i.__h;                                                 \
 523     (sl) = __s.__i.__l;                                                 \
 524     } while (0)
 525 #endif
 526 #endif /* __i860__ */
 527
 528 #if defined (__i960__) && W_TYPE_SIZE == 32
 529 #define umul_ppmm(w1, w0, u, v) \
 530   ({union {UDItype __ll;                                                \
 531            struct {USItype __l, __h;} __i;                              \
 532           } __xx;                                                       \
 533   __asm__ ("emul        %2,%1,%0"                                       \
 534            : "=d" (__xx.__ll)                                           \
 535            : "%dI" ((USItype) (u)),                                     \
 536              "dI" ((USItype) (v)));                                     \
 537   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 538 #define __umulsidi3(u, v) \
 539   ({UDItype __w;                                                        \
 540     __asm__ ("emul      %2,%1,%0"                                       \
 541              : "=d" (__w)                                               \
 542              : "%dI" ((USItype) (u)),                                   \
 543                "dI" ((USItype) (v)));                                   \
 544     __w; })
 545 #endif /* __i960__ */
 546
 547 #if defined (__M32R__) && W_TYPE_SIZE == 32
 548 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 549   /* The cmp clears the condition bit.  */ \
 550   __asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0"                    \
 551            : "=r" ((USItype) (sh)),                                     \
 552              "=&r" ((USItype) (sl))                                     \
 553            : "%0" ((USItype) (ah)),                                     \
 554              "r" ((USItype) (bh)),                                      \
 555              "%1" ((USItype) (al)),                                     \
 556              "r" ((USItype) (bl))                                       \
 557            : "cbit")
 558 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 559   /* The cmp clears the condition bit.  */ \
 560   __asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0"                      \
 561            : "=r" ((USItype) (sh)),                                     \
 562              "=&r" ((USItype) (sl))                                     \
 563            : "0" ((USItype) (ah)),                                      \
 564              "r" ((USItype) (bh)),                                      \
 565              "1" ((USItype) (al)),                                      \
 566              "r" ((USItype) (bl))                                       \
 567            : "cbit")
 568 #endif /* __M32R__ */
 569
 570 #if defined (__mc68000__) && W_TYPE_SIZE == 32
 571 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 572   __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0"                              \
 573            : "=d" ((USItype) (sh)),                                     \
 574              "=&d" ((USItype) (sl))                                     \
 575            : "%0" ((USItype) (ah)),                                     \
 576              "d" ((USItype) (bh)),                                      \
 577              "%1" ((USItype) (al)),                                     \
 578              "g" ((USItype) (bl)))
 579 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 580   __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0"                              \
 581            : "=d" ((USItype) (sh)),                                     \
 582              "=&d" ((USItype) (sl))                                     \
 583            : "0" ((USItype) (ah)),                                      \
 584              "d" ((USItype) (bh)),                                      \
 585              "1" ((USItype) (al)),                                      \
 586              "g" ((USItype) (bl)))
 587
 588 /* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r.  */
 589 #if defined (__mc68020__) || defined(mc68020) \
 590         || defined(__mc68030__) || defined(mc68030) \
 591         || defined(__mc68040__) || defined(mc68040) \
 592         || defined(__mcpu32__) || defined(mcpu32) \
 593         || defined(__NeXT__)
 594 #define umul_ppmm(w1, w0, u, v) \
 595   __asm__ ("mulu%.l %3,%1:%0"                                           \
 596            : "=d" ((USItype) (w0)),                                     \
 597              "=d" ((USItype) (w1))                                      \
 598            : "%0" ((USItype) (u)),                                      \
 599              "dmi" ((USItype) (v)))
 600 #define UMUL_TIME 45
 601 #define udiv_qrnnd(q, r, n1, n0, d) \
 602   __asm__ ("divu%.l %4,%1:%0"                                           \
 603            : "=d" ((USItype) (q)),                                      \
 604              "=d" ((USItype) (r))                                       \
 605            : "0" ((USItype) (n0)),                                      \
 606              "1" ((USItype) (n1)),                                      \
 607              "dmi" ((USItype) (d)))
 608 #define UDIV_TIME 90
 609 #define sdiv_qrnnd(q, r, n1, n0, d) \
 610   __asm__ ("divs%.l %4,%1:%0"                                           \
 611            : "=d" ((USItype) (q)),                                      \
 612              "=d" ((USItype) (r))                                       \
 613            : "0" ((USItype) (n0)),                                      \
 614              "1" ((USItype) (n1)),                                      \
 615              "dmi" ((USItype) (d)))
 616
 617 #else /* not mc68020 */
 618 #if !defined(__mcf5200__)
 619 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
 620 #define umul_ppmm(xh, xl, a, b) \
 621   __asm__ ("| Inlined umul_ppmm\n"                                      \
 622            "    move%.l %2,%/d0\n"                                      \
 623            "    move%.l %3,%/d1\n"                                      \
 624            "    move%.l %/d0,%/d2\n"                                    \
 625            "    swap    %/d0\n"                                         \
 626            "    move%.l %/d1,%/d3\n"                                    \
 627            "    swap    %/d1\n"                                         \
 628            "    move%.w %/d2,%/d4\n"                                    \
 629            "    mulu    %/d3,%/d4\n"                                    \
 630            "    mulu    %/d1,%/d2\n"                                    \
 631            "    mulu    %/d0,%/d3\n"                                    \
 632            "    mulu    %/d0,%/d1\n"                                    \
 633            "    move%.l %/d4,%/d0\n"                                    \
 634            "    eor%.w  %/d0,%/d0\n"                                    \
 635            "    swap    %/d0\n"                                         \
 636            "    add%.l  %/d0,%/d2\n"                                    \
 637            "    add%.l  %/d3,%/d2\n"                                    \
 638            "    jcc     1f\n"                                           \
 639            "    add%.l  %#65536,%/d1\n"                                 \
 640            "1:  swap    %/d2\n"                                         \
 641            "    moveq   %#0,%/d0\n"                                     \
 642            "    move%.w %/d2,%/d0\n"                                    \
 643            "    move%.w %/d4,%/d2\n"                                    \
 644            "    move%.l %/d2,%1\n"                                      \
 645            "    add%.l  %/d1,%/d0\n"                                    \
 646            "    move%.l %/d0,%0"                                        \
 647            : "=g" ((USItype) (xh)),                                     \
 648              "=g" ((USItype) (xl))                                      \
 649            : "g" ((USItype) (a)),                                       \
 650              "g" ((USItype) (b))                                        \
 651            : "d0", "d1", "d2", "d3", "d4")
 652 #define UMUL_TIME 100
 653 #define UDIV_TIME 400
 654 #endif /* not mcf5200 */
 655 #endif /* not mc68020 */
 656
 657 /* The '020, '030, '040 and '060 have bitfield insns.  */
 658 #if defined (__mc68020__) || defined(mc68020) \
 659         || defined(__mc68030__) || defined(mc68030) \
 660         || defined(__mc68040__) || defined(mc68040) \
 661         || defined(__mc68060__) || defined(mc68060) \
 662         || defined(__NeXT__)
 663 #define count_leading_zeros(count, x) \
 664   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
 665            : "=d" ((USItype) (count))                                   \
 666            : "od" ((USItype) (x)), "n" (0))
 667 #endif
 668 #endif /* mc68000 */
 669
 670 #if defined (__m88000__) && W_TYPE_SIZE == 32
 671 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 672   __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3"                   \
 673            : "=r" ((USItype) (sh)),                                     \
 674              "=&r" ((USItype) (sl))                                     \
 675            : "%rJ" ((USItype) (ah)),                                    \
 676              "rJ" ((USItype) (bh)),                                     \
 677              "%rJ" ((USItype) (al)),                                    \
 678              "rJ" ((USItype) (bl)))
 679 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 680   __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3"                   \
 681            : "=r" ((USItype) (sh)),                                     \
 682              "=&r" ((USItype) (sl))                                     \
 683            : "rJ" ((USItype) (ah)),                                     \
 684              "rJ" ((USItype) (bh)),                                     \
 685              "rJ" ((USItype) (al)),                                     \
 686              "rJ" ((USItype) (bl)))
 687 #define count_leading_zeros(count, x) \
 688   do {                                                                  \
 689     USItype __cbtmp;                                                    \
 690     __asm__ ("ff1 %0,%1"                                                \
 691              : "=r" (__cbtmp)                                           \
 692              : "r" ((USItype) (x)));                                    \
 693     (count) = __cbtmp ^ 31;                                             \
 694   } while (0)
 695 #define COUNT_LEADING_ZEROS_0 63 /* sic */
 696 #if defined (__mc88110__)
 697 #define umul_ppmm(wh, wl, u, v) \
 698   do {                                                                  \
 699     union {UDItype __ll;                                                \
 700            struct {USItype __h, __l;} __i;                              \
 701           } __xx;                                                       \
 702     __asm__ ("mulu.d    %0,%1,%2"                                       \
 703              : "=r" (__xx.__ll)                                         \
 704              : "r" ((USItype) (u)),                                     \
 705                "r" ((USItype) (v)));                                    \
 706     (wh) = __xx.__i.__h;                                                \
 707     (wl) = __xx.__i.__l;                                                \
 708   } while (0)
 709 #define udiv_qrnnd(q, r, n1, n0, d) \
 710   ({union {UDItype __ll;                                                \
 711            struct {USItype __h, __l;} __i;                              \
 712           } __xx;                                                       \
 713   USItype __q;                                                          \
 714   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 715   __asm__ ("divu.d %0,%1,%2"                                            \
 716            : "=r" (__q)                                                 \
 717            : "r" (__xx.__ll),                                           \
 718              "r" ((USItype) (d)));                                      \
 719   (r) = (n0) - __q * (d); (q) = __q; })
 720 #define UMUL_TIME 5
 721 #define UDIV_TIME 25
 722 #else
 723 #define UMUL_TIME 17
 724 #define UDIV_TIME 150
 725 #endif /* __mc88110__ */
 726 #endif /* __m88000__ */
 727
 728 #if defined (__mips__) && W_TYPE_SIZE == 32
 729 #define umul_ppmm(w1, w0, u, v) \
 730   __asm__ ("multu %2,%3"                                                \
 731            : "=l" ((USItype) (w0)),                                     \
 732              "=h" ((USItype) (w1))                                      \
 733            : "d" ((USItype) (u)),                                       \
 734              "d" ((USItype) (v)))
 735 #define UMUL_TIME 10
 736 #define UDIV_TIME 100
 737 #endif /* __mips__ */
 738
 739 #if defined (__ns32000__) && W_TYPE_SIZE == 32
 740 #define umul_ppmm(w1, w0, u, v) \
 741   ({union {UDItype __ll;                                                \
 742            struct {USItype __l, __h;} __i;                              \
 743           } __xx;                                                       \
 744   __asm__ ("meid %2,%0"                                                 \
 745            : "=g" (__xx.__ll)                                           \
 746            : "%0" ((USItype) (u)),                                      \
 747              "g" ((USItype) (v)));                                      \
 748   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 749 #define __umulsidi3(u, v) \
 750   ({UDItype __w;                                                        \
 751     __asm__ ("meid %2,%0"                                               \
 752              : "=g" (__w)                                               \
 753              : "%0" ((USItype) (u)),                                    \
 754                "g" ((USItype) (v)));                                    \
 755     __w; })
 756 #define udiv_qrnnd(q, r, n1, n0, d) \
 757   ({union {UDItype __ll;                                                \
 758            struct {USItype __l, __h;} __i;                              \
 759           } __xx;                                                       \
 760   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 761   __asm__ ("deid %2,%0"                                                 \
 762            : "=g" (__xx.__ll)                                           \
 763            : "0" (__xx.__ll),                                           \
 764              "g" ((USItype) (d)));                                      \
 765   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
 766 #define count_trailing_zeros(count,x) \
 767   do {
 768     __asm__ ("ffsd     %2,%0"                                          \
 769             : "=r" ((USItype) (count))                                 \
 770             : "0" ((USItype) 0),                                       \
 771               "r" ((USItype) (x)));                                    \
 772   } while (0)
 773 #endif /* __ns32000__ */
 774
 775 #if (defined (_ARCH_PPC) || defined (_IBMR2))
 776 #if W_TYPE_SIZE == 32
 777 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 778   do {                                                                  \
 779     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 780       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 781              : "=r" ((USItype) (sh)),                                   \
 782                "=&r" ((USItype) (sl))                                   \
 783              : "%r" ((USItype) (ah)),                                   \
 784                "%r" ((USItype) (al)),                                   \
 785                "rI" ((USItype) (bl)));                                  \
 786     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
 787       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 788              : "=r" ((USItype) (sh)),                                   \
 789                "=&r" ((USItype) (sl))                                   \
 790              : "%r" ((USItype) (ah)),                                   \
 791                "%r" ((USItype) (al)),                                   \
 792                "rI" ((USItype) (bl)));                                  \
 793     else                                                                \
 794       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 795              : "=r" ((USItype) (sh)),                                   \
 796                "=&r" ((USItype) (sl))                                   \
 797              : "%r" ((USItype) (ah)),                                   \
 798                "r" ((USItype) (bh)),                                    \
 799                "%r" ((USItype) (al)),                                   \
 800                "rI" ((USItype) (bl)));                                  \
 801   } while (0)
 802 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 803   do {                                                                  \
 804     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 805       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 806                : "=r" ((USItype) (sh)),                                 \
 807                  "=&r" ((USItype) (sl))                                 \
 808                : "r" ((USItype) (bh)),                                  \
 809                  "rI" ((USItype) (al)),                                 \
 810                  "r" ((USItype) (bl)));                                 \
 811     else if (__builtin_constant_p (ah) && (ah) ==~(USItype) 0)          \
 812       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 813                : "=r" ((USItype) (sh)),                                 \
 814                  "=&r" ((USItype) (sl))                                 \
 815                : "r" ((USItype) (bh)),                                  \
 816                  "rI" ((USItype) (al)),                                 \
 817                  "r" ((USItype) (bl)));                                 \
 818     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 819       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 820                : "=r" ((USItype) (sh)),                                 \
 821                  "=&r" ((USItype) (sl))                                 \
 822                : "r" ((USItype) (ah)),                                  \
 823                  "rI" ((USItype) (al)),                                 \
 824                  "r" ((USItype) (bl)));                                 \
 825     else if (__builtin_constant_p (bh) && (bh) ==~(USItype) 0)          \
 826       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 827                : "=r" ((USItype) (sh)),                                 \
 828                  "=&r" ((USItype) (sl))                                 \
 829                : "r" ((USItype) (ah)),                                  \
 830                  "rI" ((USItype) (al)),                                 \
 831                  "r" ((USItype) (bl)));                                 \
 832     else                                                                \
 833       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 834                : "=r" ((USItype) (sh)),                                 \
 835                  "=&r" ((USItype) (sl))                                 \
 836                : "r" ((USItype) (ah)),                                  \
 837                  "r" ((USItype) (bh)),                                  \
 838                  "rI" ((USItype) (al)),                                 \
 839                  "r" ((USItype) (bl)));                                 \
 840   } while (0)
 841 #endif /* W_TYPE_SIZE */
 842 #define count_leading_zeros(count, x) \
 843   __asm__ ("{cntlz|cntlzw} %0,%1"                                       \
 844            : "=r" ((USItype) (count))                                   \
 845            : "r" ((USItype) (x)))
 846 #define COUNT_LEADING_ZEROS_0 32
 847 #if defined (_ARCH_PPC)
 848 #define umul_ppmm(ph, pl, m0, m1) \
 849   do {                                                                  \
 850     USItype __m0 = (m0), __m1 = (m1);                                   \
 851     __asm__ ("mulhwu %0,%1,%2"                                          \
 852              : "=r" ((USItype) ph)                                      \
 853              : "%r" (__m0),                                             \
 854                "r" (__m1));                                             \
 855     (pl) = __m0 * __m1;                                                 \
 856   } while (0)
 857 #define UMUL_TIME 15
 858 #define smul_ppmm(ph, pl, m0, m1) \
 859   do {                                                                  \
 860     SItype __m0 = (m0), __m1 = (m1);                                    \
 861     __asm__ ("mulhw %0,%1,%2"                                           \
 862              : "=r" ((SItype) ph)                                       \
 863              : "%r" (__m0),                                             \
 864                "r" (__m1));                                             \
 865     (pl) = __m0 * __m1;                                                 \
 866   } while (0)
 867 #define SMUL_TIME 14
 868 #define UDIV_TIME 120
 869 #elif defined (_ARCH_PWR)
 870 #define umul_ppmm(xh, xl, m0, m1) \
 871   do {                                                                  \
 872     USItype __m0 = (m0), __m1 = (m1);                                   \
 873     __asm__ ("mul %0,%2,%3"                                             \
 874              : "=r" ((USItype) (xh)),                                   \
 875                "=q" ((USItype) (xl))                                    \
 876              : "r" (__m0),                                              \
 877                "r" (__m1));                                             \
 878     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 879              + (((SItype) __m1 >> 31) & __m0));                         \
 880   } while (0)
 881 #define UMUL_TIME 8
 882 #define smul_ppmm(xh, xl, m0, m1) \
 883   __asm__ ("mul %0,%2,%3"                                               \
 884            : "=r" ((SItype) (xh)),                                      \
 885              "=q" ((SItype) (xl))                                       \
 886            : "r" (m0),                                                  \
 887              "r" (m1))
 888 #define SMUL_TIME 4
 889 #define sdiv_qrnnd(q, r, nh, nl, d) \
 890   __asm__ ("div %0,%2,%4"                                               \
 891            : "=r" ((SItype) (q)), "=q" ((SItype) (r))                   \
 892            : "r" ((SItype) (nh)), "1" ((SItype) (nl)), "r" ((SItype) (d)))
 893 #define UDIV_TIME 100
 894 #endif
 895 #endif /* Power architecture variants.  */
 896
 897 #if defined (__pyr__) && W_TYPE_SIZE == 32
 898 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 899   __asm__ ("addw        %5,%1\n\taddwc  %3,%0"                          \
 900            : "=r" ((USItype) (sh)),                                     \
 901              "=&r" ((USItype) (sl))                                     \
 902            : "%0" ((USItype) (ah)),                                     \
 903              "g" ((USItype) (bh)),                                      \
 904              "%1" ((USItype) (al)),                                     \
 905              "g" ((USItype) (bl)))
 906 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 907   __asm__ ("subw        %5,%1\n\tsubwb  %3,%0"                          \
 908            : "=r" ((USItype) (sh)),                                     \
 909              "=&r" ((USItype) (sl))                                     \
 910            : "0" ((USItype) (ah)),                                      \
 911              "g" ((USItype) (bh)),                                      \
 912              "1" ((USItype) (al)),                                      \
 913              "g" ((USItype) (bl)))
 914 /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP.  */
 915 #define umul_ppmm(w1, w0, u, v) \
 916   ({union {UDItype __ll;                                                \
 917            struct {USItype __h, __l;} __i;                              \
 918           } __xx;                                                       \
 919   __asm__ ("movw %1,%R0\n\tuemul %2,%0"                                 \
 920            : "=&r" (__xx.__ll)                                          \
 921            : "g" ((USItype) (u)),                                       \
 922              "g" ((USItype) (v)));                                      \
 923   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 924 #endif /* __pyr__ */
 925
 926 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
 927 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 928   __asm__ ("a %1,%5\n\tae %0,%3"                                        \
 929            : "=r" ((USItype) (sh)),                                     \
 930              "=&r" ((USItype) (sl))                                     \
 931            : "%0" ((USItype) (ah)),                                     \
 932              "r" ((USItype) (bh)),                                      \
 933              "%1" ((USItype) (al)),                                     \
 934              "r" ((USItype) (bl)))
 935 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 936   __asm__ ("s %1,%5\n\tse %0,%3"                                        \
 937            : "=r" ((USItype) (sh)),                                     \
 938              "=&r" ((USItype) (sl))                                     \
 939            : "0" ((USItype) (ah)),                                      \
 940              "r" ((USItype) (bh)),                                      \
 941              "1" ((USItype) (al)),                                      \
 942              "r" ((USItype) (bl)))
 943 #define umul_ppmm(ph, pl, m0, m1) \
 944   do {                                                                  \
 945     USItype __m0 = (m0), __m1 = (m1);                                   \
 946     __asm__ (                                                           \
 947        "s       r2,r2\n"                                                \
 948 "       mts     r10,%2\n"                                               \
 949 "       m       r2,%3\n"                                                \
 950 "       m       r2,%3\n"                                                \
 951 "       m       r2,%3\n"                                                \
 952 "       m       r2,%3\n"                                                \
 953 "       m       r2,%3\n"                                                \
 954 "       m       r2,%3\n"                                                \
 955 "       m       r2,%3\n"                                                \
 956 "       m       r2,%3\n"                                                \
 957 "       m       r2,%3\n"                                                \
 958 "       m       r2,%3\n"                                                \
 959 "       m       r2,%3\n"                                                \
 960 "       m       r2,%3\n"                                                \
 961 "       m       r2,%3\n"                                                \
 962 "       m       r2,%3\n"                                                \
 963 "       m       r2,%3\n"                                                \
 964 "       m       r2,%3\n"                                                \
 965 "       cas     %0,r2,r0\n"                                             \
 966 "       mfs     r10,%1"                                                 \
 967              : "=r" ((USItype) (ph)),                                   \
 968                "=r" ((USItype) (pl))                                    \
 969              : "%r" (__m0),                                             \
 970                 "r" (__m1)                                              \
 971              : "r2");                                                   \
 972     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
 973              + (((SItype) __m1 >> 31) & __m0));                         \
 974   } while (0)
 975 #define UMUL_TIME 20
 976 #define UDIV_TIME 200
 977 #define count_leading_zeros(count, x) \
 978   do {                                                                  \
 979     if ((x) >= 0x10000)                                                 \
 980       __asm__ ("clz     %0,%1"                                          \
 981                : "=r" ((USItype) (count))                               \
 982                : "r" ((USItype) (x) >> 16));                            \
 983     else                                                                \
 984       {                                                                 \
 985         __asm__ ("clz   %0,%1"                                          \
 986                  : "=r" ((USItype) (count))                             \
 987                  : "r" ((USItype) (x)));                                        \
 988         (count) += 16;                                                  \
 989       }                                                                 \
 990   } while (0)
 991 #endif
 992
 993 #if defined (__sh2__) && W_TYPE_SIZE == 32
 994 #define umul_ppmm(w1, w0, u, v) \
 995   __asm__ (                                                             \
 996        "dmulu.l %2,%3\n\tsts    macl,%1\n\tsts  mach,%0"                \
 997            : "=r" ((USItype)(w1)),                                      \
 998              "=r" ((USItype)(w0))                                       \
 999            : "r" ((USItype)(u)),                                        \
1000              "r" ((USItype)(v))                                         \
1001            : "macl", "mach")
1002 #define UMUL_TIME 5
1003 #endif
1004
1005 #if defined (__SH5__) && __SHMEDIA__ && W_TYPE_SIZE == 32
1006 #define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v)
1007 #define count_leading_zeros(count, x) \
1008   do                                                                    \
1009     {                                                                   \
1010       UDItype x_ = (USItype)(x);                                        \
1011       SItype c_;                                                        \
1012                                                                         \
1013       __asm__ ("nsb %1, %0" : "=r" (c_) : "r" (x_));                    \
1014       (count) = c_ - 31;                                                \
1015     }                                                                   \
1016   while (0)
1017 #define COUNT_LEADING_ZEROS_0 32
1018 #endif
1019
1020 #if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \
1021     && W_TYPE_SIZE == 32
1022 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1023   __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0"                          \
1024            : "=r" ((USItype) (sh)),                                     \
1025              "=&r" ((USItype) (sl))                                     \
1026            : "%rJ" ((USItype) (ah)),                                    \
1027              "rI" ((USItype) (bh)),                                     \
1028              "%rJ" ((USItype) (al)),                                    \
1029              "rI" ((USItype) (bl))                                      \
1030            __CLOBBER_CC)
1031 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1032   __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0"                          \
1033            : "=r" ((USItype) (sh)),                                     \
1034              "=&r" ((USItype) (sl))                                     \
1035            : "rJ" ((USItype) (ah)),                                     \
1036              "rI" ((USItype) (bh)),                                     \
1037              "rJ" ((USItype) (al)),                                     \
1038              "rI" ((USItype) (bl))                                      \
1039            __CLOBBER_CC)
1040 #if defined (__sparc_v8__)
1041 #define umul_ppmm(w1, w0, u, v) \
1042   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1043            : "=r" ((USItype) (w1)),                                     \
1044              "=r" ((USItype) (w0))                                      \
1045            : "r" ((USItype) (u)),                                       \
1046              "r" ((USItype) (v)))
1047 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
1048   __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
1049            : "=&r" ((USItype) (__q)),                                   \
1050              "=&r" ((USItype) (__r))                                    \
1051            : "r" ((USItype) (__n1)),                                    \
1052              "r" ((USItype) (__n0)),                                    \
1053              "r" ((USItype) (__d)))
1054 #else
1055 #if defined (__sparclite__)
1056 /* This has hardware multiply but not divide.  It also has two additional
1057    instructions scan (ffs from high bit) and divscc.  */
1058 #define umul_ppmm(w1, w0, u, v) \
1059   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
1060            : "=r" ((USItype) (w1)),                                     \
1061              "=r" ((USItype) (w0))                                      \
1062            : "r" ((USItype) (u)),                                       \
1063              "r" ((USItype) (v)))
1064 #define udiv_qrnnd(q, r, n1, n0, d) \
1065   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
1066 "       wr      %%g0,%2,%%y     ! Not a delayed write for sparclite\n"  \
1067 "       tst     %%g0\n"                                                 \
1068 "       divscc  %3,%4,%%g1\n"                                           \
1069 "       divscc  %%g1,%4,%%g1\n"                                         \
1070 "       divscc  %%g1,%4,%%g1\n"                                         \
1071 "       divscc  %%g1,%4,%%g1\n"                                         \
1072 "       divscc  %%g1,%4,%%g1\n"                                         \
1073 "       divscc  %%g1,%4,%%g1\n"                                         \
1074 "       divscc  %%g1,%4,%%g1\n"                                         \
1075 "       divscc  %%g1,%4,%%g1\n"                                         \
1076 "       divscc  %%g1,%4,%%g1\n"                                         \
1077 "       divscc  %%g1,%4,%%g1\n"                                         \
1078 "       divscc  %%g1,%4,%%g1\n"                                         \
1079 "       divscc  %%g1,%4,%%g1\n"                                         \
1080 "       divscc  %%g1,%4,%%g1\n"                                         \
1081 "       divscc  %%g1,%4,%%g1\n"                                         \
1082 "       divscc  %%g1,%4,%%g1\n"                                         \
1083 "       divscc  %%g1,%4,%%g1\n"                                         \
1084 "       divscc  %%g1,%4,%%g1\n"                                         \
1085 "       divscc  %%g1,%4,%%g1\n"                                         \
1086 "       divscc  %%g1,%4,%%g1\n"                                         \
1087 "       divscc  %%g1,%4,%%g1\n"                                         \
1088 "       divscc  %%g1,%4,%%g1\n"                                         \
1089 "       divscc  %%g1,%4,%%g1\n"                                         \
1090 "       divscc  %%g1,%4,%%g1\n"                                         \
1091 "       divscc  %%g1,%4,%%g1\n"                                         \
1092 "       divscc  %%g1,%4,%%g1\n"                                         \
1093 "       divscc  %%g1,%4,%%g1\n"                                         \
1094 "       divscc  %%g1,%4,%%g1\n"                                         \
1095 "       divscc  %%g1,%4,%%g1\n"                                         \
1096 "       divscc  %%g1,%4,%%g1\n"                                         \
1097 "       divscc  %%g1,%4,%%g1\n"                                         \
1098 "       divscc  %%g1,%4,%%g1\n"                                         \
1099 "       divscc  %%g1,%4,%0\n"                                           \
1100 "       rd      %%y,%1\n"                                               \
1101 "       bl,a 1f\n"                                                      \
1102 "       add     %1,%4,%1\n"                                             \
1103 "1:     ! End of inline udiv_qrnnd"                                     \
1104            : "=r" ((USItype) (q)),                                      \
1105              "=r" ((USItype) (r))                                       \
1106            : "r" ((USItype) (n1)),                                      \
1107              "r" ((USItype) (n0)),                                      \
1108              "rI" ((USItype) (d))                                       \
1109            : "g1" __AND_CLOBBER_CC)
1110 #define UDIV_TIME 37
1111 #define count_leading_zeros(count, x) \
1112   do {                                                                  \
1113   __asm__ ("scan %1,1,%0"                                               \
1114            : "=r" ((USItype) (count))                                   \
1115            : "r" ((USItype) (x)));                                      \
1116   } while (0)
1117 /* Early sparclites return 63 for an argument of 0, but they warn that future
1118    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
1119    undefined.  */
1120 #else
1121 /* SPARC without integer multiplication and divide instructions.
1122    (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
1123 #define umul_ppmm(w1, w0, u, v) \
1124   __asm__ ("! Inlined umul_ppmm\n"                                      \
1125 "       wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr\n"\
1126 "       sra     %3,31,%%o5      ! Don't move this insn\n"               \
1127 "       and     %2,%%o5,%%o5    ! Don't move this insn\n"               \
1128 "       andcc   %%g0,0,%%g1     ! Don't move this insn\n"               \
1129 "       mulscc  %%g1,%3,%%g1\n"                                         \
1130 "       mulscc  %%g1,%3,%%g1\n"                                         \
1131 "       mulscc  %%g1,%3,%%g1\n"                                         \
1132 "       mulscc  %%g1,%3,%%g1\n"                                         \
1133 "       mulscc  %%g1,%3,%%g1\n"                                         \
1134 "       mulscc  %%g1,%3,%%g1\n"                                         \
1135 "       mulscc  %%g1,%3,%%g1\n"                                         \
1136 "       mulscc  %%g1,%3,%%g1\n"                                         \
1137 "       mulscc  %%g1,%3,%%g1\n"                                         \
1138 "       mulscc  %%g1,%3,%%g1\n"                                         \
1139 "       mulscc  %%g1,%3,%%g1\n"                                         \
1140 "       mulscc  %%g1,%3,%%g1\n"                                         \
1141 "       mulscc  %%g1,%3,%%g1\n"                                         \
1142 "       mulscc  %%g1,%3,%%g1\n"                                         \
1143 "       mulscc  %%g1,%3,%%g1\n"                                         \
1144 "       mulscc  %%g1,%3,%%g1\n"                                         \
1145 "       mulscc  %%g1,%3,%%g1\n"                                         \
1146 "       mulscc  %%g1,%3,%%g1\n"                                         \
1147 "       mulscc  %%g1,%3,%%g1\n"                                         \
1148 "       mulscc  %%g1,%3,%%g1\n"                                         \
1149 "       mulscc  %%g1,%3,%%g1\n"                                         \
1150 "       mulscc  %%g1,%3,%%g1\n"                                         \
1151 "       mulscc  %%g1,%3,%%g1\n"                                         \
1152 "       mulscc  %%g1,%3,%%g1\n"                                         \
1153 "       mulscc  %%g1,%3,%%g1\n"                                         \
1154 "       mulscc  %%g1,%3,%%g1\n"                                         \
1155 "       mulscc  %%g1,%3,%%g1\n"                                         \
1156 "       mulscc  %%g1,%3,%%g1\n"                                         \
1157 "       mulscc  %%g1,%3,%%g1\n"                                         \
1158 "       mulscc  %%g1,%3,%%g1\n"                                         \
1159 "       mulscc  %%g1,%3,%%g1\n"                                         \
1160 "       mulscc  %%g1,%3,%%g1\n"                                         \
1161 "       mulscc  %%g1,0,%%g1\n"                                          \
1162 "       add     %%g1,%%o5,%0\n"                                         \
1163 "       rd      %%y,%1"                                                 \
1164            : "=r" ((USItype) (w1)),                                     \
1165              "=r" ((USItype) (w0))                                      \
1166            : "%rI" ((USItype) (u)),                                     \
1167              "r" ((USItype) (v))                                                \
1168            : "g1", "o5" __AND_CLOBBER_CC)
1169 #define UMUL_TIME 39            /* 39 instructions */
1170 /* It's quite necessary to add this much assembler for the sparc.
1171    The default udiv_qrnnd (in C) is more than 10 times slower!  */
1172 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
1173   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
1174 "       mov     32,%%g1\n"                                              \
1175 "       subcc   %1,%2,%%g0\n"                                           \
1176 "1:     bcs     5f\n"                                                   \
1177 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1178 "       sub     %1,%2,%1        ! this kills msb of n\n"                \
1179 "       addx    %1,%1,%1        ! so this can't give carry\n"           \
1180 "       subcc   %%g1,1,%%g1\n"                                          \
1181 "2:     bne     1b\n"                                                   \
1182 "        subcc  %1,%2,%%g0\n"                                           \
1183 "       bcs     3f\n"                                                   \
1184 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1185 "       b       3f\n"                                                   \
1186 "        sub    %1,%2,%1        ! this kills msb of n\n"                \
1187 "4:     sub     %1,%2,%1\n"                                             \
1188 "5:     addxcc  %1,%1,%1\n"                                             \
1189 "       bcc     2b\n"                                                   \
1190 "        subcc  %%g1,1,%%g1\n"                                          \
1191 "! Got carry from n.  Subtract next step to cancel this carry.\n"       \
1192 "       bne     4b\n"                                                   \
1193 "        addcc  %0,%0,%0        ! shift n1n0 and a 0-bit in lsb\n"      \
1194 "       sub     %1,%2,%1\n"                                             \
1195 "3:     xnor    %0,0,%0\n"                                              \
1196 "       ! End of inline udiv_qrnnd"                                     \
1197            : "=&r" ((USItype) (__q)),                                   \
1198              "=&r" ((USItype) (__r))                                    \
1199            : "r" ((USItype) (__d)),                                     \
1200              "1" ((USItype) (__n1)),                                    \
1201              "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
1202 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations.  */
1203 #endif /* __sparclite__ */
1204 #endif /* __sparc_v8__ */
1205 #endif /* sparc32 */
1206
1207 #if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \
1208     && W_TYPE_SIZE == 64
1209 #define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
1210   __asm__ ("addcc %r4,%5,%1\n\t"                                        \
1211            "add %r2,%3,%0\n\t"                                          \
1212            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1213            "add %0, 1, %0\n"                                            \
1214            "1:"                                                         \
1215            : "=r" ((UDItype)(sh)),                                      \
1216              "=&r" ((UDItype)(sl))                                      \
1217            : "%rJ" ((UDItype)(ah)),                                     \
1218              "rI" ((UDItype)(bh)),                                      \
1219              "%rJ" ((UDItype)(al)),                                     \
1220              "rI" ((UDItype)(bl))                                       \
1221            __CLOBBER_CC)
1222
1223 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
1224   __asm__ ("subcc %r4,%5,%1\n\t"                                        \
1225            "sub %r2,%3,%0\n\t"                                          \
1226            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1227            "sub %0, 1, %0\n\t"                                          \
1228            "1:"                                                         \
1229            : "=r" ((UDItype)(sh)),                                      \
1230              "=&r" ((UDItype)(sl))                                      \
1231            : "rJ" ((UDItype)(ah)),                                      \
1232              "rI" ((UDItype)(bh)),                                      \
1233              "rJ" ((UDItype)(al)),                                      \
1234              "rI" ((UDItype)(bl))                                       \
1235            __CLOBBER_CC)
1236
1237 #define umul_ppmm(wh, wl, u, v)                                         \
1238   do {                                                                  \
1239           UDItype tmp1, tmp2, tmp3, tmp4;                               \
1240           __asm__ __volatile__ (                                        \
1241                    "srl %7,0,%3\n\t"                                    \
1242                    "mulx %3,%6,%1\n\t"                                  \
1243                    "srlx %6,32,%2\n\t"                                  \
1244                    "mulx %2,%3,%4\n\t"                                  \
1245                    "sllx %4,32,%5\n\t"                                  \
1246                    "srl %6,0,%3\n\t"                                    \
1247                    "sub %1,%5,%5\n\t"                                   \
1248                    "srlx %5,32,%5\n\t"                                  \
1249                    "addcc %4,%5,%4\n\t"                                 \
1250                    "srlx %7,32,%5\n\t"                                  \
1251                    "mulx %3,%5,%3\n\t"                                  \
1252                    "mulx %2,%5,%5\n\t"                                  \
1253                    "sethi %%hi(0x80000000),%2\n\t"                      \
1254                    "addcc %4,%3,%4\n\t"                                 \
1255                    "srlx %4,32,%4\n\t"                                  \
1256                    "add %2,%2,%2\n\t"                                   \
1257                    "movcc %%xcc,%%g0,%2\n\t"                            \
1258                    "addcc %5,%4,%5\n\t"                                 \
1259                    "sllx %3,32,%3\n\t"                                  \
1260                    "add %1,%3,%1\n\t"                                   \
1261                    "add %5,%2,%0"                                       \
1262            : "=r" ((UDItype)(wh)),                                      \
1263              "=&r" ((UDItype)(wl)),                                     \
1264              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)     \
1265            : "r" ((UDItype)(u)),                                        \
1266              "r" ((UDItype)(v))                                         \
1267            __CLOBBER_CC);                                               \
1268   } while (0)
1269 #define UMUL_TIME 96
1270 #define UDIV_TIME 230
1271 #endif /* sparc64 */
1272
1273 #if defined (__vax__) && W_TYPE_SIZE == 32
1274 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1275   __asm__ ("addl2 %5,%1\n\tadwc %3,%0"                                  \
1276            : "=g" ((USItype) (sh)),                                     \
1277              "=&g" ((USItype) (sl))                                     \
1278            : "%0" ((USItype) (ah)),                                     \
1279              "g" ((USItype) (bh)),                                      \
1280              "%1" ((USItype) (al)),                                     \
1281              "g" ((USItype) (bl)))
1282 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1283   __asm__ ("subl2 %5,%1\n\tsbwc %3,%0"                                  \
1284            : "=g" ((USItype) (sh)),                                     \
1285              "=&g" ((USItype) (sl))                                     \
1286            : "0" ((USItype) (ah)),                                      \
1287              "g" ((USItype) (bh)),                                      \
1288              "1" ((USItype) (al)),                                      \
1289              "g" ((USItype) (bl)))
1290 #define umul_ppmm(xh, xl, m0, m1) \
1291   do {                                                                  \
1292     union {                                                             \
1293         UDItype __ll;                                                   \
1294         struct {USItype __l, __h;} __i;                                 \
1295       } __xx;                                                           \
1296     USItype __m0 = (m0), __m1 = (m1);                                   \
1297     __asm__ ("emul %1,%2,$0,%0"                                         \
1298              : "=r" (__xx.__ll)                                         \
1299              : "g" (__m0),                                              \
1300                "g" (__m1));                                             \
1301     (xh) = __xx.__i.__h;                                                \
1302     (xl) = __xx.__i.__l;                                                \
1303     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1304              + (((SItype) __m1 >> 31) & __m0));                         \
1305   } while (0)
1306 #define sdiv_qrnnd(q, r, n1, n0, d) \
1307   do {                                                                  \
1308     union {DItype __ll;                                                 \
1309            struct {SItype __l, __h;} __i;                               \
1310           } __xx;                                                       \
1311     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1312     __asm__ ("ediv %3,%2,%0,%1"                                         \
1313              : "=g" (q), "=g" (r)                                       \
1314              : "g" (__xx.__ll), "g" (d));                               \
1315   } while (0)
1316 #endif /* __vax__ */
1317
1318 #if defined (__z8000__) && W_TYPE_SIZE == 16
1319 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1320   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1321            : "=r" ((unsigned int)(sh)),                                 \
1322              "=&r" ((unsigned int)(sl))                                 \
1323            : "%0" ((unsigned int)(ah)),                                 \
1324              "r" ((unsigned int)(bh)),                                  \
1325              "%1" ((unsigned int)(al)),                                 \
1326              "rQR" ((unsigned int)(bl)))
1327 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1328   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1329            : "=r" ((unsigned int)(sh)),                                 \
1330              "=&r" ((unsigned int)(sl))                                 \
1331            : "0" ((unsigned int)(ah)),                                  \
1332              "r" ((unsigned int)(bh)),                                  \
1333              "1" ((unsigned int)(al)),                                  \
1334              "rQR" ((unsigned int)(bl)))
1335 #define umul_ppmm(xh, xl, m0, m1) \
1336   do {                                                                  \
1337     union {long int __ll;                                               \
1338            struct {unsigned int __h, __l;} __i;                         \
1339           } __xx;                                                       \
1340     unsigned int __m0 = (m0), __m1 = (m1);                              \
1341     __asm__ ("mult      %S0,%H3"                                        \
1342              : "=r" (__xx.__i.__h),                                     \
1343                "=r" (__xx.__i.__l)                                      \
1344              : "%1" (__m0),                                             \
1345                "rQR" (__m1));                                           \
1346     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1347     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1348              + (((signed int) __m1 >> 15) & __m0));                     \
1349   } while (0)
1350 #endif /* __z8000__ */
1351
1352 #endif /* __GNUC__ */
1353
1354 /* If this machine has no inline assembler, use C macros.  */
1355
1356 #if !defined (add_ssaaaa)
1357 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1358   do {                                                                  \
1359     UWtype __x;                                                         \
1360     __x = (al) + (bl);                                                  \
1361     (sh) = (ah) + (bh) + (__x < (al));                                  \
1362     (sl) = __x;                                                         \
1363   } while (0)
1364 #endif
1365
1366 #if !defined (sub_ddmmss)
1367 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1368   do {                                                                  \
1369     UWtype __x;                                                         \
1370     __x = (al) - (bl);                                                  \
1371     (sh) = (ah) - (bh) - (__x > (al));                                  \
1372     (sl) = __x;                                                         \
1373   } while (0)
1374 #endif
1375
1376 #if !defined (umul_ppmm)
1377 #define umul_ppmm(w1, w0, u, v)                                         \
1378   do {                                                                  \
1379     UWtype __x0, __x1, __x2, __x3;                                      \
1380     UHWtype __ul, __vl, __uh, __vh;                                     \
1381                                                                         \
1382     __ul = __ll_lowpart (u);                                            \
1383     __uh = __ll_highpart (u);                                           \
1384     __vl = __ll_lowpart (v);                                            \
1385     __vh = __ll_highpart (v);                                           \
1386                                                                         \
1387     __x0 = (UWtype) __ul * __vl;                                        \
1388     __x1 = (UWtype) __ul * __vh;                                        \
1389     __x2 = (UWtype) __uh * __vl;                                        \
1390     __x3 = (UWtype) __uh * __vh;                                        \
1391                                                                         \
1392     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1393     __x1 += __x2;               /* but this indeed can */               \
1394     if (__x1 < __x2)            /* did we get it? */                    \
1395       __x3 += __ll_B;           /* yes, add it in the proper pos.  */   \
1396                                                                         \
1397     (w1) = __x3 + __ll_highpart (__x1);                                 \
1398     (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);          \
1399   } while (0)
1400 #endif
1401
1402 #if !defined (__umulsidi3)
1403 #define __umulsidi3(u, v) \
1404   ({DWunion __w;                                                        \
1405     umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
1406     __w.ll; })
1407 #endif
1408
1409 /* Define this unconditionally, so it can be used for debugging.  */
1410 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1411   do {                                                                  \
1412     UWtype __d1, __d0, __q1, __q0;                                      \
1413     UWtype __r1, __r0, __m;                                             \
1414     __d1 = __ll_highpart (d);                                           \
1415     __d0 = __ll_lowpart (d);                                            \
1416                                                                         \
1417     __r1 = (n1) % __d1;                                                 \
1418     __q1 = (n1) / __d1;                                                 \
1419     __m = (UWtype) __q1 * __d0;                                         \
1420     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1421     if (__r1 < __m)                                                     \
1422       {                                                                 \
1423         __q1--, __r1 += (d);                                            \
1424         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1425           if (__r1 < __m)                                               \
1426             __q1--, __r1 += (d);                                        \
1427       }                                                                 \
1428     __r1 -= __m;                                                        \
1429                                                                         \
1430     __r0 = __r1 % __d1;                                                 \
1431     __q0 = __r1 / __d1;                                                 \
1432     __m = (UWtype) __q0 * __d0;                                         \
1433     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1434     if (__r0 < __m)                                                     \
1435       {                                                                 \
1436         __q0--, __r0 += (d);                                            \
1437         if (__r0 >= (d))                                                \
1438           if (__r0 < __m)                                               \
1439             __q0--, __r0 += (d);                                        \
1440       }                                                                 \
1441     __r0 -= __m;                                                        \
1442                                                                         \
1443     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1444     (r) = __r0;                                                         \
1445   } while (0)
1446
1447 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1448    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1449 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1450 #define udiv_qrnnd(q, r, nh, nl, d) \
1451   do {                                                                  \
1452     USItype __r;                                                        \
1453     (q) = __udiv_w_sdiv (&__r, nh, nl, d);                              \
1454     (r) = __r;                                                          \
1455   } while (0)
1456 #endif
1457
1458 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1459 #if !defined (udiv_qrnnd)
1460 #define UDIV_NEEDS_NORMALIZATION 1
1461 #define udiv_qrnnd __udiv_qrnnd_c
1462 #endif
1463
1464 #if !defined (count_leading_zeros)
1465 extern const UQItype __clz_tab[];
1466 #define count_leading_zeros(count, x) \
1467   do {                                                                  \
1468     UWtype __xr = (x);                                                  \
1469     UWtype __a;                                                         \
1470                                                                         \
1471     if (W_TYPE_SIZE <= 32)                                              \
1472       {                                                                 \
1473         __a = __xr < ((UWtype)1<<2*__BITS4)                             \
1474           ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4)                 \
1475           : (__xr < ((UWtype)1<<3*__BITS4) ?  2*__BITS4 : 3*__BITS4);   \
1476       }                                                                 \
1477     else                                                                \
1478       {                                                                 \
1479         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1480           if (((__xr >> __a) & 0xff) != 0)                              \
1481             break;                                                      \
1482       }                                                                 \
1483                                                                         \
1484     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1485   } while (0)
1486 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1487 #endif
1488
1489 #if !defined (count_trailing_zeros)
1490 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1491    defined in asm, but if it is not, the C version above is good enough.  */
1492 #define count_trailing_zeros(count, x) \
1493   do {                                                                  \
1494     UWtype __ctz_x = (x);                                               \
1495     UWtype __ctz_c;                                                     \
1496     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1497     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1498   } while (0)
1499 #endif
1500
1501 #ifndef UDIV_NEEDS_NORMALIZATION
1502 #define UDIV_NEEDS_NORMALIZATION 0
1503 #endif