gcc/longlong.h

   1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
   2    Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000
   3    Free Software Foundation, Inc.
   4
   5    This definition file is free software; you can redistribute it
   6    and/or modify it under the terms of the GNU General Public
   7    License as published by the Free Software Foundation; either
   8    version 2, or (at your option) any later version.
   9
  10    This definition file is distributed in the hope that it will be
  11    useful, but WITHOUT ANY WARRANTY; without even the implied
  12    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13    See the GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with this program; if not, write to the Free Software
  17    Foundation, Inc., 59 Temple Place - Suite 330,
  18    Boston, MA 02111-1307, USA.  */
  19
  20 /* You have to define the following before including this file:
  21
  22    UWtype -- An unsigned type, default type for operations (typically a "word")
  23    UHWtype -- An unsigned type, at least half the size of UWtype.
  24    UDWtype -- An unsigned type, at least twice as large a UWtype
  25    W_TYPE_SIZE -- size in bits of UWtype
  26
  27    UQItype -- Unsigned 8 bit type.
  28    SItype, USItype -- Signed and unsigned 32 bit types.
  29    DItype, UDItype -- Signed and unsigned 64 bit types.
  30
  31    On a 32 bit machine UWtype should typically be USItype;
  32    on a 64 bit machine, UWtype should typically be UDItype.
  33 */
  34
  35 #define __BITS4 (W_TYPE_SIZE / 4)
  36 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
  37 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
  38 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
  39
  40 #ifndef W_TYPE_SIZE
  41 #define W_TYPE_SIZE     32
  42 #define UWtype          USItype
  43 #define UHWtype         USItype
  44 #define UDWtype         UDItype
  45 #endif
  46
  47 /* Define auxiliary asm macros.
  48
  49    1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
  50    UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
  51    word product in HIGH_PROD and LOW_PROD.
  52
  53    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
  54    UDWtype product.  This is just a variant of umul_ppmm.
  55
  56    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  57    denominator) divides a UDWtype, composed by the UWtype integers
  58    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
  59    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
  60    than DENOMINATOR for correct operation.  If, in addition, the most
  61    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  62    UDIV_NEEDS_NORMALIZATION is defined to 1.
  63
  64    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  65    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
  66    is rounded towards 0.
  67
  68    5) count_leading_zeros(count, x) counts the number of zero-bits from the
  69    msb to the first non-zero bit in the UWtype X.  This is the number of
  70    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
  71    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
  72
  73    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
  74    from the least significant end.
  75
  76    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
  77    high_addend_2, low_addend_2) adds two UWtype integers, composed by
  78    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
  79    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
  80    (i.e. carry out) is not stored anywhere, and is lost.
  81
  82    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
  83    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
  84    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
  85    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
  86    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
  87    and is lost.
  88
  89    If any of these macros are left undefined for a particular CPU,
  90    C macros are used.  */
  91
  92 /* The CPUs come in alphabetical order below.
  93
  94    Please add support for more CPUs here, or improve the current support
  95    for the CPUs below!
  96    (E.g. WE32100, IBM360.)  */
  97
  98 #if defined (__GNUC__) && !defined (NO_ASM)
  99
 100 /* We sometimes need to clobber "cc" with gcc2, but that would not be
 101    understood by gcc1.  Use cpp to avoid major code duplication.  */
 102 #if __GNUC__ < 2
 103 #define __CLOBBER_CC
 104 #define __AND_CLOBBER_CC
 105 #else /* __GNUC__ >= 2 */
 106 #define __CLOBBER_CC : "cc"
 107 #define __AND_CLOBBER_CC , "cc"
 108 #endif /* __GNUC__ < 2 */
 109
 110 #if defined (__alpha) && W_TYPE_SIZE == 64
 111 #define umul_ppmm(ph, pl, m0, m1) \
 112   do {                                                                  \
 113     UDItype __m0 = (m0), __m1 = (m1);                                   \
 114     __asm__ ("umulh %r1,%2,%0"                                          \
 115              : "=r" ((UDItype) ph)                                      \
 116              : "%rJ" (__m0),                                            \
 117                "rI" (__m1));                                            \
 118     (pl) = __m0 * __m1;                                                 \
 119   } while (0)
 120 #define UMUL_TIME 46
 121 #ifndef LONGLONG_STANDALONE
 122 #define udiv_qrnnd(q, r, n1, n0, d) \
 123   do { UDItype __r;                                                     \
 124     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 125     (r) = __r;                                                          \
 126   } while (0)
 127 extern UDItype __udiv_qrnnd PARAMS ((UDItype *, UDItype, UDItype, UDItype));
 128 #define UDIV_TIME 220
 129 #endif /* LONGLONG_STANDALONE */
 130 #ifdef __alpha_cix__
 131 #define count_leading_zeros(COUNT,X) \
 132   __asm__("ctlz %1,%0" : "=r"(COUNT) : "r"(X))
 133 #define count_trailing_zeros(COUNT,X) \
 134   __asm__("cttz %1,%0" : "=r"(COUNT) : "r"(X))
 135 #define COUNT_LEADING_ZEROS_0 64
 136 #else
 137 extern const UQItype __clz_tab[];
 138 #define count_leading_zeros(COUNT,X) \
 139   do {                                                                  \
 140     UDItype __xr = (X), __t, __a;                                       \
 141     __asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr));                \
 142     __a = __clz_tab[__t ^ 0xff] - 1;                                    \
 143     __asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a));        \
 144     (COUNT) = 64 - (__clz_tab[__t] + __a*8);                            \
 145   } while (0)
 146 #define count_trailing_zeros(COUNT,X) \
 147   do {                                                                  \
 148     UDItype __xr = (X), __t, __a;                                       \
 149     __asm__("cmpbge $31,%1,%0" : "=r"(__t) : "r"(__xr));                \
 150     __t = ~__t & -~__t;                                                 \
 151     __a = ((__t & 0xCC) != 0) * 2;                                      \
 152     __a += ((__t & 0xF0) != 0) * 4;                                     \
 153     __a += ((__t & 0xAA) != 0);                                         \
 154     __asm__("extbl %1,%2,%0" : "=r"(__t) : "r"(__xr), "r"(__a));        \
 155     __a <<= 3;                                                          \
 156     __t &= -__t;                                                        \
 157     __a += ((__t & 0xCC) != 0) * 2;                                     \
 158     __a += ((__t & 0xF0) != 0) * 4;                                     \
 159     __a += ((__t & 0xAA) != 0);                                         \
 160     (COUNT) = __a;                                                      \
 161   } while (0)
 162 #endif /* __alpha_cix__ */
 163 #endif /* __alpha */
 164
 165 #if defined (__arc__) && W_TYPE_SIZE == 32
 166 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 167   __asm__ ("add.f       %1, %4, %5\n\tadc       %0, %2, %3"             \
 168            : "=r" ((USItype) (sh)),                                     \
 169              "=&r" ((USItype) (sl))                                     \
 170            : "%r" ((USItype) (ah)),                                     \
 171              "rIJ" ((USItype) (bh)),                                    \
 172              "%r" ((USItype) (al)),                                     \
 173              "rIJ" ((USItype) (bl)))
 174 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 175   __asm__ ("sub.f       %1, %4, %5\n\tsbc       %0, %2, %3"             \
 176            : "=r" ((USItype) (sh)),                                     \
 177              "=&r" ((USItype) (sl))                                     \
 178            : "r" ((USItype) (ah)),                                      \
 179              "rIJ" ((USItype) (bh)),                                    \
 180              "r" ((USItype) (al)),                                      \
 181              "rIJ" ((USItype) (bl)))
 182 /* Call libgcc routine.  */
 183 #define umul_ppmm(w1, w0, u, v) \
 184 do {                                                                    \
 185   DWunion __w;                                                          \
 186   __w.ll = __umulsidi3 (u, v);                                          \
 187   w1 = __w.s.high;                                                      \
 188   w0 = __w.s.low;                                                       \
 189 } while (0)
 190 #define __umulsidi3 __umulsidi3
 191 UDItype __umulsidi3 (USItype, USItype);
 192 #endif
 193
 194 #if defined (__arm__) && W_TYPE_SIZE == 32
 195 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 196   __asm__ ("adds        %1, %4, %5\n\tadc       %0, %2, %3"             \
 197            : "=r" ((USItype) (sh)),                                     \
 198              "=&r" ((USItype) (sl))                                     \
 199            : "%r" ((USItype) (ah)),                                     \
 200              "rI" ((USItype) (bh)),                                     \
 201              "%r" ((USItype) (al)),                                     \
 202              "rI" ((USItype) (bl)))
 203 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 204   __asm__ ("subs        %1, %4, %5\n\tsbc       %0, %2, %3"             \
 205            : "=r" ((USItype) (sh)),                                     \
 206              "=&r" ((USItype) (sl))                                     \
 207            : "r" ((USItype) (ah)),                                      \
 208              "rI" ((USItype) (bh)),                                     \
 209              "r" ((USItype) (al)),                                      \
 210              "rI" ((USItype) (bl)))
 211 #define umul_ppmm(xh, xl, a, b) \
 212 {register USItype __t0, __t1, __t2;                                     \
 213   __asm__ ("%@ Inlined umul_ppmm\n"                                     \
 214            "    mov     %2, %5, lsr #16\n"                              \
 215            "    mov     %0, %6, lsr #16\n"                              \
 216            "    bic     %3, %5, %2, lsl #16\n"                          \
 217            "    bic     %4, %6, %0, lsl #16\n"                          \
 218            "    mul     %1, %3, %4\n"                                   \
 219            "    mul     %4, %2, %4\n"                                   \
 220            "    mul     %3, %0, %3\n"                                   \
 221            "    mul     %0, %2, %0\n"                                   \
 222            "    adds    %3, %4, %3\n"                                   \
 223            "    addcs   %0, %0, #65536\n"                               \
 224            "    adds    %1, %1, %3, lsl #16\n"                          \
 225            "    adc     %0, %0, %3, lsr #16"                            \
 226            : "=&r" ((USItype) (xh)),                                    \
 227              "=r" ((USItype) (xl)),                                     \
 228              "=&r" (__t0), "=&r" (__t1), "=r" (__t2)                    \
 229            : "r" ((USItype) (a)),                                       \
 230              "r" ((USItype) (b)));}
 231 #define UMUL_TIME 20
 232 #define UDIV_TIME 100
 233 #endif /* __arm__ */
 234
 235 #if defined (__hppa) && W_TYPE_SIZE == 32
 236 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 237   __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0"                              \
 238            : "=r" ((USItype) (sh)),                                     \
 239              "=&r" ((USItype) (sl))                                     \
 240            : "%rM" ((USItype) (ah)),                                    \
 241              "rM" ((USItype) (bh)),                                     \
 242              "%rM" ((USItype) (al)),                                    \
 243              "rM" ((USItype) (bl)))
 244 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 245   __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0"                              \
 246            : "=r" ((USItype) (sh)),                                     \
 247              "=&r" ((USItype) (sl))                                     \
 248            : "rM" ((USItype) (ah)),                                     \
 249              "rM" ((USItype) (bh)),                                     \
 250              "rM" ((USItype) (al)),                                     \
 251              "rM" ((USItype) (bl)))
 252 #if defined (_PA_RISC1_1)
 253 #define umul_ppmm(w1, w0, u, v) \
 254   do {                                                                  \
 255     union                                                               \
 256       {                                                                 \
 257         UDItype __f;                                                    \
 258         struct {USItype __w1, __w0;} __w1w0;                            \
 259       } __t;                                                            \
 260     __asm__ ("xmpyu %1,%2,%0"                                           \
 261              : "=x" (__t.__f)                                           \
 262              : "x" ((USItype) (u)),                                     \
 263                "x" ((USItype) (v)));                                    \
 264     (w1) = __t.__w1w0.__w1;                                             \
 265     (w0) = __t.__w1w0.__w0;                                             \
 266      } while (0)
 267 #define UMUL_TIME 8
 268 #else
 269 #define UMUL_TIME 30
 270 #endif
 271 #define UDIV_TIME 40
 272 #define count_leading_zeros(count, x) \
 273   do {                                                                  \
 274     USItype __tmp;                                                      \
 275     __asm__ (                                                           \
 276        "ldi             1,%0\n"                                         \
 277 "       extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?\n"  \
 278 "       extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.\n"\
 279 "       ldo             16(%0),%0               ; Yes.  Perform add.\n" \
 280 "       extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?\n"   \
 281 "       extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.\n"\
 282 "       ldo             8(%0),%0                ; Yes.  Perform add.\n" \
 283 "       extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?\n"    \
 284 "       extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.\n"\
 285 "       ldo             4(%0),%0                ; Yes.  Perform add.\n" \
 286 "       extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?\n"    \
 287 "       extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.\n"\
 288 "       ldo             2(%0),%0                ; Yes.  Perform add.\n" \
 289 "       extru           %1,30,1,%1              ; Extract bit 1.\n"     \
 290 "       sub             %0,%1,%0                ; Subtract it.\n"       \
 291         : "=r" (count), "=r" (__tmp) : "1" (x));                        \
 292   } while (0)
 293 #endif
 294
 295 #if (defined (__i370__) || defined (__mvs__)) && W_TYPE_SIZE == 32
 296 #define umul_ppmm(xh, xl, m0, m1) \
 297   do {                                                                  \
 298     union {UDItype __ll;                                                \
 299            struct {USItype __h, __l;} __i;                              \
 300           } __xx;                                                       \
 301     USItype __m0 = (m0), __m1 = (m1);                                   \
 302     __asm__ ("mr %0,%3"                                                 \
 303              : "=r" (__xx.__i.__h),                                     \
 304                "=r" (__xx.__i.__l)                                      \
 305              : "%1" (__m0),                                             \
 306                "r" (__m1));                                             \
 307     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 308     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
 309              + (((SItype) __m1 >> 31) & __m0));                         \
 310   } while (0)
 311 #define smul_ppmm(xh, xl, m0, m1) \
 312   do {                                                                  \
 313     union {DItype __ll;                                                 \
 314            struct {USItype __h, __l;} __i;                              \
 315           } __xx;                                                       \
 316     __asm__ ("mr %0,%3"                                                 \
 317              : "=r" (__xx.__i.__h),                                     \
 318                "=r" (__xx.__i.__l)                                      \
 319              : "%1" (m0),                                               \
 320                "r" (m1));                                               \
 321     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
 322   } while (0)
 323 #define sdiv_qrnnd(q, r, n1, n0, d) \
 324   do {                                                                  \
 325     union {DItype __ll;                                                 \
 326            struct {USItype __h, __l;} __i;                              \
 327           } __xx;                                                       \
 328     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
 329     __asm__ ("dr %0,%2"                                                 \
 330              : "=r" (__xx.__ll)                                         \
 331              : "0" (__xx.__ll), "r" (d));                               \
 332     (q) = __xx.__i.__l; (r) = __xx.__i.__h;                             \
 333   } while (0)
 334 #endif
 335
 336 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
 337 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 338   __asm__ ("addl %5,%1\n\tadcl %3,%0"                                   \
 339            : "=r" ((USItype) (sh)),                                     \
 340              "=&r" ((USItype) (sl))                                     \
 341            : "%0" ((USItype) (ah)),                                     \
 342              "g" ((USItype) (bh)),                                      \
 343              "%1" ((USItype) (al)),                                     \
 344              "g" ((USItype) (bl)))
 345 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 346   __asm__ ("subl %5,%1\n\tsbbl %3,%0"                                   \
 347            : "=r" ((USItype) (sh)),                                     \
 348              "=&r" ((USItype) (sl))                                     \
 349            : "0" ((USItype) (ah)),                                      \
 350              "g" ((USItype) (bh)),                                      \
 351              "1" ((USItype) (al)),                                      \
 352              "g" ((USItype) (bl)))
 353 #define umul_ppmm(w1, w0, u, v) \
 354   __asm__ ("mull %3"                                                    \
 355            : "=a" ((USItype) (w0)),                                     \
 356              "=d" ((USItype) (w1))                                      \
 357            : "%0" ((USItype) (u)),                                      \
 358              "rm" ((USItype) (v)))
 359 #define udiv_qrnnd(q, r, n1, n0, dv) \
 360   __asm__ ("divl %4"                                                    \
 361            : "=a" ((USItype) (q)),                                      \
 362              "=d" ((USItype) (r))                                       \
 363            : "0" ((USItype) (n0)),                                      \
 364              "1" ((USItype) (n1)),                                      \
 365              "rm" ((USItype) (dv)))
 366 #define count_leading_zeros(count, x) \
 367   do {                                                                  \
 368     USItype __cbtmp;                                                    \
 369     __asm__ ("bsrl %1,%0"                                               \
 370              : "=r" (__cbtmp) : "rm" ((USItype) (x)));                  \
 371     (count) = __cbtmp ^ 31;                                             \
 372   } while (0)
 373 #define count_trailing_zeros(count, x) \
 374   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
 375 #define UMUL_TIME 40
 376 #define UDIV_TIME 40
 377 #endif /* 80x86 */
 378
 379 #if defined (__i960__) && W_TYPE_SIZE == 32
 380 #define umul_ppmm(w1, w0, u, v) \
 381   ({union {UDItype __ll;                                                \
 382            struct {USItype __l, __h;} __i;                              \
 383           } __xx;                                                       \
 384   __asm__ ("emul        %2,%1,%0"                                       \
 385            : "=d" (__xx.__ll)                                           \
 386            : "%dI" ((USItype) (u)),                                     \
 387              "dI" ((USItype) (v)));                                     \
 388   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 389 #define __umulsidi3(u, v) \
 390   ({UDItype __w;                                                        \
 391     __asm__ ("emul      %2,%1,%0"                                       \
 392              : "=d" (__w)                                               \
 393              : "%dI" ((USItype) (u)),                                   \
 394                "dI" ((USItype) (v)));                                   \
 395     __w; })
 396 #endif /* __i960__ */
 397
 398 #if defined (__M32R__) && W_TYPE_SIZE == 32
 399 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 400   /* The cmp clears the condition bit.  */ \
 401   __asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0"                    \
 402            : "=r" ((USItype) (sh)),                                     \
 403              "=&r" ((USItype) (sl))                                     \
 404            : "%0" ((USItype) (ah)),                                     \
 405              "r" ((USItype) (bh)),                                      \
 406              "%1" ((USItype) (al)),                                     \
 407              "r" ((USItype) (bl))                                       \
 408            : "cbit")
 409 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 410   /* The cmp clears the condition bit.  */ \
 411   __asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0"                      \
 412            : "=r" ((USItype) (sh)),                                     \
 413              "=&r" ((USItype) (sl))                                     \
 414            : "0" ((USItype) (ah)),                                      \
 415              "r" ((USItype) (bh)),                                      \
 416              "1" ((USItype) (al)),                                      \
 417              "r" ((USItype) (bl))                                       \
 418            : "cbit")
 419 #endif /* __M32R__ */
 420
 421 #if defined (__mc68000__) && W_TYPE_SIZE == 32
 422 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 423   __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0"                              \
 424            : "=d" ((USItype) (sh)),                                     \
 425              "=&d" ((USItype) (sl))                                     \
 426            : "%0" ((USItype) (ah)),                                     \
 427              "d" ((USItype) (bh)),                                      \
 428              "%1" ((USItype) (al)),                                     \
 429              "g" ((USItype) (bl)))
 430 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 431   __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0"                              \
 432            : "=d" ((USItype) (sh)),                                     \
 433              "=&d" ((USItype) (sl))                                     \
 434            : "0" ((USItype) (ah)),                                      \
 435              "d" ((USItype) (bh)),                                      \
 436              "1" ((USItype) (al)),                                      \
 437              "g" ((USItype) (bl)))
 438
 439 /* The '020, '030, '040 and CPU32 have 32x32->64 and 64/32->32q-32r.  */
 440 #if defined (__mc68020__) || defined(mc68020) \
 441         || defined(__mc68030__) || defined(mc68030) \
 442         || defined(__mc68040__) || defined(mc68040) \
 443         || defined(__mcpu32__) || defined(mcpu32)
 444 #define umul_ppmm(w1, w0, u, v) \
 445   __asm__ ("mulu%.l %3,%1:%0"                                           \
 446            : "=d" ((USItype) (w0)),                                     \
 447              "=d" ((USItype) (w1))                                      \
 448            : "%0" ((USItype) (u)),                                      \
 449              "dmi" ((USItype) (v)))
 450 #define UMUL_TIME 45
 451 #define udiv_qrnnd(q, r, n1, n0, d) \
 452   __asm__ ("divu%.l %4,%1:%0"                                           \
 453            : "=d" ((USItype) (q)),                                      \
 454              "=d" ((USItype) (r))                                       \
 455            : "0" ((USItype) (n0)),                                      \
 456              "1" ((USItype) (n1)),                                      \
 457              "dmi" ((USItype) (d)))
 458 #define UDIV_TIME 90
 459 #define sdiv_qrnnd(q, r, n1, n0, d) \
 460   __asm__ ("divs%.l %4,%1:%0"                                           \
 461            : "=d" ((USItype) (q)),                                      \
 462              "=d" ((USItype) (r))                                       \
 463            : "0" ((USItype) (n0)),                                      \
 464              "1" ((USItype) (n1)),                                      \
 465              "dmi" ((USItype) (d)))
 466
 467 #else /* not mc68020 */
 468 #if !defined(__mcf5200__)
 469 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
 470 #define umul_ppmm(xh, xl, a, b) \
 471   __asm__ ("| Inlined umul_ppmm\n"                                      \
 472            "    move%.l %2,%/d0\n"                                      \
 473            "    move%.l %3,%/d1\n"                                      \
 474            "    move%.l %/d0,%/d2\n"                                    \
 475            "    swap    %/d0\n"                                         \
 476            "    move%.l %/d1,%/d3\n"                                    \
 477            "    swap    %/d1\n"                                         \
 478            "    move%.w %/d2,%/d4\n"                                    \
 479            "    mulu    %/d3,%/d4\n"                                    \
 480            "    mulu    %/d1,%/d2\n"                                    \
 481            "    mulu    %/d0,%/d3\n"                                    \
 482            "    mulu    %/d0,%/d1\n"                                    \
 483            "    move%.l %/d4,%/d0\n"                                    \
 484            "    eor%.w  %/d0,%/d0\n"                                    \
 485            "    swap    %/d0\n"                                         \
 486            "    add%.l  %/d0,%/d2\n"                                    \
 487            "    add%.l  %/d3,%/d2\n"                                    \
 488            "    jcc     1f\n"                                           \
 489            "    add%.l  %#65536,%/d1\n"                                 \
 490            "1:  swap    %/d2\n"                                         \
 491            "    moveq   %#0,%/d0\n"                                     \
 492            "    move%.w %/d2,%/d0\n"                                    \
 493            "    move%.w %/d4,%/d2\n"                                    \
 494            "    move%.l %/d2,%1\n"                                      \
 495            "    add%.l  %/d1,%/d0\n"                                    \
 496            "    move%.l %/d0,%0"                                        \
 497            : "=g" ((USItype) (xh)),                                     \
 498              "=g" ((USItype) (xl))                                      \
 499            : "g" ((USItype) (a)),                                       \
 500              "g" ((USItype) (b))                                        \
 501            : "d0", "d1", "d2", "d3", "d4")
 502 #define UMUL_TIME 100
 503 #define UDIV_TIME 400
 504 #endif /* not mcf5200 */
 505 #endif /* not mc68020 */
 506
 507 /* The '020, '030, '040 and '060 have bitfield insns.  */
 508 #if defined (__mc68020__) || defined(mc68020) \
 509         || defined(__mc68030__) || defined(mc68030) \
 510         || defined(__mc68040__) || defined(mc68040) \
 511         || defined(__mc68060__) || defined(mc68060)
 512 #define count_leading_zeros(count, x) \
 513   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
 514            : "=d" ((USItype) (count))                                   \
 515            : "od" ((USItype) (x)), "n" (0))
 516 #endif
 517 #endif /* mc68000 */
 518
 519 #if defined (__m88000__) && W_TYPE_SIZE == 32
 520 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 521   __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3"                   \
 522            : "=r" ((USItype) (sh)),                                     \
 523              "=&r" ((USItype) (sl))                                     \
 524            : "%rJ" ((USItype) (ah)),                                    \
 525              "rJ" ((USItype) (bh)),                                     \
 526              "%rJ" ((USItype) (al)),                                    \
 527              "rJ" ((USItype) (bl)))
 528 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 529   __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3"                   \
 530            : "=r" ((USItype) (sh)),                                     \
 531              "=&r" ((USItype) (sl))                                     \
 532            : "rJ" ((USItype) (ah)),                                     \
 533              "rJ" ((USItype) (bh)),                                     \
 534              "rJ" ((USItype) (al)),                                     \
 535              "rJ" ((USItype) (bl)))
 536 #define count_leading_zeros(count, x) \
 537   do {                                                                  \
 538     USItype __cbtmp;                                                    \
 539     __asm__ ("ff1 %0,%1"                                                \
 540              : "=r" (__cbtmp)                                           \
 541              : "r" ((USItype) (x)));                                    \
 542     (count) = __cbtmp ^ 31;                                             \
 543   } while (0)
 544 #define COUNT_LEADING_ZEROS_0 63 /* sic */
 545 #if defined (__mc88110__)
 546 #define umul_ppmm(wh, wl, u, v) \
 547   do {                                                                  \
 548     union {UDItype __ll;                                                \
 549            struct {USItype __h, __l;} __i;                              \
 550           } __xx;                                                       \
 551     __asm__ ("mulu.d    %0,%1,%2"                                       \
 552              : "=r" (__xx.__ll)                                         \
 553              : "r" ((USItype) (u)),                                     \
 554                "r" ((USItype) (v)));                                    \
 555     (wh) = __xx.__i.__h;                                                \
 556     (wl) = __xx.__i.__l;                                                \
 557   } while (0)
 558 #define udiv_qrnnd(q, r, n1, n0, d) \
 559   ({union {UDItype __ll;                                                \
 560            struct {USItype __h, __l;} __i;                              \
 561           } __xx;                                                       \
 562   USItype __q;                                                          \
 563   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 564   __asm__ ("divu.d %0,%1,%2"                                            \
 565            : "=r" (__q)                                                 \
 566            : "r" (__xx.__ll),                                           \
 567              "r" ((USItype) (d)));                                      \
 568   (r) = (n0) - __q * (d); (q) = __q; })
 569 #define UMUL_TIME 5
 570 #define UDIV_TIME 25
 571 #else
 572 #define UMUL_TIME 17
 573 #define UDIV_TIME 150
 574 #endif /* __mc88110__ */
 575 #endif /* __m88000__ */
 576
 577 #if defined (__mips__) && W_TYPE_SIZE == 32
 578 #define umul_ppmm(w1, w0, u, v) \
 579   __asm__ ("multu %2,%3"                                                \
 580            : "=l" ((USItype) (w0)),                                     \
 581              "=h" ((USItype) (w1))                                      \
 582            : "d" ((USItype) (u)),                                       \
 583              "d" ((USItype) (v)))
 584 #define UMUL_TIME 10
 585 #define UDIV_TIME 100
 586 #endif /* __mips__ */
 587
 588 #if defined (__ns32000__) && W_TYPE_SIZE == 32
 589 #define umul_ppmm(w1, w0, u, v) \
 590   ({union {UDItype __ll;                                                \
 591            struct {USItype __l, __h;} __i;                              \
 592           } __xx;                                                       \
 593   __asm__ ("meid %2,%0"                                                 \
 594            : "=g" (__xx.__ll)                                           \
 595            : "%0" ((USItype) (u)),                                      \
 596              "g" ((USItype) (v)));                                      \
 597   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 598 #define __umulsidi3(u, v) \
 599   ({UDItype __w;                                                        \
 600     __asm__ ("meid %2,%0"                                               \
 601              : "=g" (__w)                                               \
 602              : "%0" ((USItype) (u)),                                    \
 603                "g" ((USItype) (v)));                                    \
 604     __w; })
 605 #define udiv_qrnnd(q, r, n1, n0, d) \
 606   ({union {UDItype __ll;                                                \
 607            struct {USItype __l, __h;} __i;                              \
 608           } __xx;                                                       \
 609   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 610   __asm__ ("deid %2,%0"                                                 \
 611            : "=g" (__xx.__ll)                                           \
 612            : "0" (__xx.__ll),                                           \
 613              "g" ((USItype) (d)));                                      \
 614   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
 615 #define count_trailing_zeros(count,x) \
 616   do {                                                                  \
 617     __asm__ ("ffsd     %2,%0"                                           \
 618             : "=r" ((USItype) (count))                                  \
 619             : "0" ((USItype) 0),                                        \
 620               "r" ((USItype) (x)));                                     \
 621   } while (0)
 622 #endif /* __ns32000__ */
 623
 624 /* FIXME: We should test _IBMR2 here when we add assembly support for the
 625    system vendor compilers.
 626    FIXME: What's needed for gcc PowerPC VxWorks?  __vxworks__ is not good
 627    enough, since that hits ARM and m68k too.  */
 628 #if (defined (_ARCH_PPC)        /* AIX */                               \
 629      || defined (_ARCH_PWR)     /* AIX */                               \
 630      || defined (_ARCH_COM)     /* AIX */                               \
 631      || defined (__powerpc__)   /* gcc */                               \
 632      || defined (__POWERPC__)   /* BEOS */                              \
 633      || defined (__ppc__)       /* Darwin */                            \
 634      || defined (PPC)           /* GNU/Linux, SysV */                   \
 635      ) && W_TYPE_SIZE == 32
 636 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 637   do {                                                                  \
 638     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 639       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 640              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 641     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
 642       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 643              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 644     else                                                                \
 645       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 646              : "=r" (sh), "=&r" (sl)                                    \
 647              : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
 648   } while (0)
 649 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 650   do {                                                                  \
 651     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 652       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 653                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 654     else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0)         \
 655       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 656                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 657     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 658       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 659                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 660     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
 661       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 662                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 663     else                                                                \
 664       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 665                : "=r" (sh), "=&r" (sl)                                  \
 666                : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
 667   } while (0)
 668 #define count_leading_zeros(count, x) \
 669   __asm__ ("{cntlz|cntlzw} %0,%1" : "=r" (count) : "r" (x))
 670 #define COUNT_LEADING_ZEROS_0 32
 671 #if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \
 672   || defined (__ppc__) || defined (PPC) || defined (__vxworks__)
 673 #define umul_ppmm(ph, pl, m0, m1) \
 674   do {                                                                  \
 675     USItype __m0 = (m0), __m1 = (m1);                                   \
 676     __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
 677     (pl) = __m0 * __m1;                                                 \
 678   } while (0)
 679 #define UMUL_TIME 15
 680 #define smul_ppmm(ph, pl, m0, m1) \
 681   do {                                                                  \
 682     SItype __m0 = (m0), __m1 = (m1);                                    \
 683     __asm__ ("mulhw %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));       \
 684     (pl) = __m0 * __m1;                                                 \
 685   } while (0)
 686 #define SMUL_TIME 14
 687 #define UDIV_TIME 120
 688 #elif defined (_ARCH_PWR)
 689 #define UMUL_TIME 8
 690 #define smul_ppmm(xh, xl, m0, m1) \
 691   __asm__ ("mul %0,%2,%3" : "=r" (xh), "=q" (xl) : "r" (m0), "r" (m1))
 692 #define SMUL_TIME 4
 693 #define sdiv_qrnnd(q, r, nh, nl, d) \
 694   __asm__ ("div %0,%2,%4" : "=r" (q), "=q" (r) : "r" (nh), "1" (nl), "r" (d))
 695 #define UDIV_TIME 100
 696 #endif
 697 #endif /* 32-bit POWER architecture variants.  */
 698
 699 /* We should test _IBMR2 here when we add assembly support for the system
 700    vendor compilers.  */
 701 #if (defined (_ARCH_PPC64) || defined (__powerpc64__)) && W_TYPE_SIZE == 64
 702 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 703   do {                                                                  \
 704     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 705       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 706              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 707     else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)         \
 708       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 709              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 710     else                                                                \
 711       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 712              : "=r" (sh), "=&r" (sl)                                    \
 713              : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
 714   } while (0)
 715 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 716   do {                                                                  \
 717     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 718       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 719                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 720     else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0)         \
 721       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 722                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 723     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 724       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 725                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 726     else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)         \
 727       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 728                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 729     else                                                                \
 730       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 731                : "=r" (sh), "=&r" (sl)                                  \
 732                : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
 733   } while (0)
 734 #define count_leading_zeros(count, x) \
 735   __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x))
 736 #define COUNT_LEADING_ZEROS_0 64
 737 #define umul_ppmm(ph, pl, m0, m1) \
 738   do {                                                                  \
 739     UDItype __m0 = (m0), __m1 = (m1);                                   \
 740     __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
 741     (pl) = __m0 * __m1;                                                 \
 742   } while (0)
 743 #define UMUL_TIME 15
 744 #define smul_ppmm(ph, pl, m0, m1) \
 745   do {                                                                  \
 746     DItype __m0 = (m0), __m1 = (m1);                                    \
 747     __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));       \
 748     (pl) = __m0 * __m1;                                                 \
 749   } while (0)
 750 #define SMUL_TIME 14  /* ??? */
 751 #define UDIV_TIME 120 /* ??? */
 752 #endif /* 64-bit PowerPC.  */
 753
 754 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
 755 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 756   __asm__ ("a %1,%5\n\tae %0,%3"                                        \
 757            : "=r" ((USItype) (sh)),                                     \
 758              "=&r" ((USItype) (sl))                                     \
 759            : "%0" ((USItype) (ah)),                                     \
 760              "r" ((USItype) (bh)),                                      \
 761              "%1" ((USItype) (al)),                                     \
 762              "r" ((USItype) (bl)))
 763 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 764   __asm__ ("s %1,%5\n\tse %0,%3"                                        \
 765            : "=r" ((USItype) (sh)),                                     \
 766              "=&r" ((USItype) (sl))                                     \
 767            : "0" ((USItype) (ah)),                                      \
 768              "r" ((USItype) (bh)),                                      \
 769              "1" ((USItype) (al)),                                      \
 770              "r" ((USItype) (bl)))
 771 #define umul_ppmm(ph, pl, m0, m1) \
 772   do {                                                                  \
 773     USItype __m0 = (m0), __m1 = (m1);                                   \
 774     __asm__ (                                                           \
 775        "s       r2,r2\n"                                                \
 776 "       mts     r10,%2\n"                                               \
 777 "       m       r2,%3\n"                                                \
 778 "       m       r2,%3\n"                                                \
 779 "       m       r2,%3\n"                                                \
 780 "       m       r2,%3\n"                                                \
 781 "       m       r2,%3\n"                                                \
 782 "       m       r2,%3\n"                                                \
 783 "       m       r2,%3\n"                                                \
 784 "       m       r2,%3\n"                                                \
 785 "       m       r2,%3\n"                                                \
 786 "       m       r2,%3\n"                                                \
 787 "       m       r2,%3\n"                                                \
 788 "       m       r2,%3\n"                                                \
 789 "       m       r2,%3\n"                                                \
 790 "       m       r2,%3\n"                                                \
 791 "       m       r2,%3\n"                                                \
 792 "       m       r2,%3\n"                                                \
 793 "       cas     %0,r2,r0\n"                                             \
 794 "       mfs     r10,%1"                                                 \
 795              : "=r" ((USItype) (ph)),                                   \
 796                "=r" ((USItype) (pl))                                    \
 797              : "%r" (__m0),                                             \
 798                 "r" (__m1)                                              \
 799              : "r2");                                                   \
 800     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
 801              + (((SItype) __m1 >> 31) & __m0));                         \
 802   } while (0)
 803 #define UMUL_TIME 20
 804 #define UDIV_TIME 200
 805 #define count_leading_zeros(count, x) \
 806   do {                                                                  \
 807     if ((x) >= 0x10000)                                                 \
 808       __asm__ ("clz     %0,%1"                                          \
 809                : "=r" ((USItype) (count))                               \
 810                : "r" ((USItype) (x) >> 16));                            \
 811     else                                                                \
 812       {                                                                 \
 813         __asm__ ("clz   %0,%1"                                          \
 814                  : "=r" ((USItype) (count))                             \
 815                  : "r" ((USItype) (x)));                                        \
 816         (count) += 16;                                                  \
 817       }                                                                 \
 818   } while (0)
 819 #endif
 820
 821 #if defined (__sh2__) && W_TYPE_SIZE == 32
 822 #define umul_ppmm(w1, w0, u, v) \
 823   __asm__ (                                                             \
 824        "dmulu.l %2,%3\n\tsts    macl,%1\n\tsts  mach,%0"                \
 825            : "=r" ((USItype)(w1)),                                      \
 826              "=r" ((USItype)(w0))                                       \
 827            : "r" ((USItype)(u)),                                        \
 828              "r" ((USItype)(v))                                         \
 829            : "macl", "mach")
 830 #define UMUL_TIME 5
 831 #endif
 832
 833 #if defined (__SH5__) && __SHMEDIA__ && W_TYPE_SIZE == 32
 834 #define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v)
 835 #define count_leading_zeros(count, x) \
 836   do                                                                    \
 837     {                                                                   \
 838       UDItype x_ = (USItype)(x);                                        \
 839       SItype c_;                                                        \
 840                                                                         \
 841       __asm__ ("nsb %1, %0" : "=r" (c_) : "r" (x_));                    \
 842       (count) = c_ - 31;                                                \
 843     }                                                                   \
 844   while (0)
 845 #define COUNT_LEADING_ZEROS_0 32
 846 #endif
 847
 848 #if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \
 849     && W_TYPE_SIZE == 32
 850 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 851   __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0"                          \
 852            : "=r" ((USItype) (sh)),                                     \
 853              "=&r" ((USItype) (sl))                                     \
 854            : "%rJ" ((USItype) (ah)),                                    \
 855              "rI" ((USItype) (bh)),                                     \
 856              "%rJ" ((USItype) (al)),                                    \
 857              "rI" ((USItype) (bl))                                      \
 858            __CLOBBER_CC)
 859 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 860   __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0"                          \
 861            : "=r" ((USItype) (sh)),                                     \
 862              "=&r" ((USItype) (sl))                                     \
 863            : "rJ" ((USItype) (ah)),                                     \
 864              "rI" ((USItype) (bh)),                                     \
 865              "rJ" ((USItype) (al)),                                     \
 866              "rI" ((USItype) (bl))                                      \
 867            __CLOBBER_CC)
 868 #if defined (__sparc_v8__)
 869 #define umul_ppmm(w1, w0, u, v) \
 870   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
 871            : "=r" ((USItype) (w1)),                                     \
 872              "=r" ((USItype) (w0))                                      \
 873            : "r" ((USItype) (u)),                                       \
 874              "r" ((USItype) (v)))
 875 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
 876   __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
 877            : "=&r" ((USItype) (__q)),                                   \
 878              "=&r" ((USItype) (__r))                                    \
 879            : "r" ((USItype) (__n1)),                                    \
 880              "r" ((USItype) (__n0)),                                    \
 881              "r" ((USItype) (__d)))
 882 #else
 883 #if defined (__sparclite__)
 884 /* This has hardware multiply but not divide.  It also has two additional
 885    instructions scan (ffs from high bit) and divscc.  */
 886 #define umul_ppmm(w1, w0, u, v) \
 887   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
 888            : "=r" ((USItype) (w1)),                                     \
 889              "=r" ((USItype) (w0))                                      \
 890            : "r" ((USItype) (u)),                                       \
 891              "r" ((USItype) (v)))
 892 #define udiv_qrnnd(q, r, n1, n0, d) \
 893   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
 894 "       wr      %%g0,%2,%%y     ! Not a delayed write for sparclite\n"  \
 895 "       tst     %%g0\n"                                                 \
 896 "       divscc  %3,%4,%%g1\n"                                           \
 897 "       divscc  %%g1,%4,%%g1\n"                                         \
 898 "       divscc  %%g1,%4,%%g1\n"                                         \
 899 "       divscc  %%g1,%4,%%g1\n"                                         \
 900 "       divscc  %%g1,%4,%%g1\n"                                         \
 901 "       divscc  %%g1,%4,%%g1\n"                                         \
 902 "       divscc  %%g1,%4,%%g1\n"                                         \
 903 "       divscc  %%g1,%4,%%g1\n"                                         \
 904 "       divscc  %%g1,%4,%%g1\n"                                         \
 905 "       divscc  %%g1,%4,%%g1\n"                                         \
 906 "       divscc  %%g1,%4,%%g1\n"                                         \
 907 "       divscc  %%g1,%4,%%g1\n"                                         \
 908 "       divscc  %%g1,%4,%%g1\n"                                         \
 909 "       divscc  %%g1,%4,%%g1\n"                                         \
 910 "       divscc  %%g1,%4,%%g1\n"                                         \
 911 "       divscc  %%g1,%4,%%g1\n"                                         \
 912 "       divscc  %%g1,%4,%%g1\n"                                         \
 913 "       divscc  %%g1,%4,%%g1\n"                                         \
 914 "       divscc  %%g1,%4,%%g1\n"                                         \
 915 "       divscc  %%g1,%4,%%g1\n"                                         \
 916 "       divscc  %%g1,%4,%%g1\n"                                         \
 917 "       divscc  %%g1,%4,%%g1\n"                                         \
 918 "       divscc  %%g1,%4,%%g1\n"                                         \
 919 "       divscc  %%g1,%4,%%g1\n"                                         \
 920 "       divscc  %%g1,%4,%%g1\n"                                         \
 921 "       divscc  %%g1,%4,%%g1\n"                                         \
 922 "       divscc  %%g1,%4,%%g1\n"                                         \
 923 "       divscc  %%g1,%4,%%g1\n"                                         \
 924 "       divscc  %%g1,%4,%%g1\n"                                         \
 925 "       divscc  %%g1,%4,%%g1\n"                                         \
 926 "       divscc  %%g1,%4,%%g1\n"                                         \
 927 "       divscc  %%g1,%4,%0\n"                                           \
 928 "       rd      %%y,%1\n"                                               \
 929 "       bl,a 1f\n"                                                      \
 930 "       add     %1,%4,%1\n"                                             \
 931 "1:     ! End of inline udiv_qrnnd"                                     \
 932            : "=r" ((USItype) (q)),                                      \
 933              "=r" ((USItype) (r))                                       \
 934            : "r" ((USItype) (n1)),                                      \
 935              "r" ((USItype) (n0)),                                      \
 936              "rI" ((USItype) (d))                                       \
 937            : "g1" __AND_CLOBBER_CC)
 938 #define UDIV_TIME 37
 939 #define count_leading_zeros(count, x) \
 940   do {                                                                  \
 941   __asm__ ("scan %1,1,%0"                                               \
 942            : "=r" ((USItype) (count))                                   \
 943            : "r" ((USItype) (x)));                                      \
 944   } while (0)
 945 /* Early sparclites return 63 for an argument of 0, but they warn that future
 946    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
 947    undefined.  */
 948 #else
 949 /* SPARC without integer multiplication and divide instructions.
 950    (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
 951 #define umul_ppmm(w1, w0, u, v) \
 952   __asm__ ("! Inlined umul_ppmm\n"                                      \
 953 "       wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr\n"\
 954 "       sra     %3,31,%%o5      ! Don't move this insn\n"               \
 955 "       and     %2,%%o5,%%o5    ! Don't move this insn\n"               \
 956 "       andcc   %%g0,0,%%g1     ! Don't move this insn\n"               \
 957 "       mulscc  %%g1,%3,%%g1\n"                                         \
 958 "       mulscc  %%g1,%3,%%g1\n"                                         \
 959 "       mulscc  %%g1,%3,%%g1\n"                                         \
 960 "       mulscc  %%g1,%3,%%g1\n"                                         \
 961 "       mulscc  %%g1,%3,%%g1\n"                                         \
 962 "       mulscc  %%g1,%3,%%g1\n"                                         \
 963 "       mulscc  %%g1,%3,%%g1\n"                                         \
 964 "       mulscc  %%g1,%3,%%g1\n"                                         \
 965 "       mulscc  %%g1,%3,%%g1\n"                                         \
 966 "       mulscc  %%g1,%3,%%g1\n"                                         \
 967 "       mulscc  %%g1,%3,%%g1\n"                                         \
 968 "       mulscc  %%g1,%3,%%g1\n"                                         \
 969 "       mulscc  %%g1,%3,%%g1\n"                                         \
 970 "       mulscc  %%g1,%3,%%g1\n"                                         \
 971 "       mulscc  %%g1,%3,%%g1\n"                                         \
 972 "       mulscc  %%g1,%3,%%g1\n"                                         \
 973 "       mulscc  %%g1,%3,%%g1\n"                                         \
 974 "       mulscc  %%g1,%3,%%g1\n"                                         \
 975 "       mulscc  %%g1,%3,%%g1\n"                                         \
 976 "       mulscc  %%g1,%3,%%g1\n"                                         \
 977 "       mulscc  %%g1,%3,%%g1\n"                                         \
 978 "       mulscc  %%g1,%3,%%g1\n"                                         \
 979 "       mulscc  %%g1,%3,%%g1\n"                                         \
 980 "       mulscc  %%g1,%3,%%g1\n"                                         \
 981 "       mulscc  %%g1,%3,%%g1\n"                                         \
 982 "       mulscc  %%g1,%3,%%g1\n"                                         \
 983 "       mulscc  %%g1,%3,%%g1\n"                                         \
 984 "       mulscc  %%g1,%3,%%g1\n"                                         \
 985 "       mulscc  %%g1,%3,%%g1\n"                                         \
 986 "       mulscc  %%g1,%3,%%g1\n"                                         \
 987 "       mulscc  %%g1,%3,%%g1\n"                                         \
 988 "       mulscc  %%g1,%3,%%g1\n"                                         \
 989 "       mulscc  %%g1,0,%%g1\n"                                          \
 990 "       add     %%g1,%%o5,%0\n"                                         \
 991 "       rd      %%y,%1"                                                 \
 992            : "=r" ((USItype) (w1)),                                     \
 993              "=r" ((USItype) (w0))                                      \
 994            : "%rI" ((USItype) (u)),                                     \
 995              "r" ((USItype) (v))                                                \
 996            : "g1", "o5" __AND_CLOBBER_CC)
 997 #define UMUL_TIME 39            /* 39 instructions */
 998 /* It's quite necessary to add this much assembler for the sparc.
 999    The default udiv_qrnnd (in C) is more than 10 times slower!  */
1000 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
1001   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
1002 "       mov     32,%%g1\n"                                              \
1003 "       subcc   %1,%2,%%g0\n"                                           \
1004 "1:     bcs     5f\n"                                                   \
1005 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1006 "       sub     %1,%2,%1        ! this kills msb of n\n"                \
1007 "       addx    %1,%1,%1        ! so this can't give carry\n"           \
1008 "       subcc   %%g1,1,%%g1\n"                                          \
1009 "2:     bne     1b\n"                                                   \
1010 "        subcc  %1,%2,%%g0\n"                                           \
1011 "       bcs     3f\n"                                                   \
1012 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1013 "       b       3f\n"                                                   \
1014 "        sub    %1,%2,%1        ! this kills msb of n\n"                \
1015 "4:     sub     %1,%2,%1\n"                                             \
1016 "5:     addxcc  %1,%1,%1\n"                                             \
1017 "       bcc     2b\n"                                                   \
1018 "        subcc  %%g1,1,%%g1\n"                                          \
1019 "! Got carry from n.  Subtract next step to cancel this carry.\n"       \
1020 "       bne     4b\n"                                                   \
1021 "        addcc  %0,%0,%0        ! shift n1n0 and a 0-bit in lsb\n"      \
1022 "       sub     %1,%2,%1\n"                                             \
1023 "3:     xnor    %0,0,%0\n"                                              \
1024 "       ! End of inline udiv_qrnnd"                                     \
1025            : "=&r" ((USItype) (__q)),                                   \
1026              "=&r" ((USItype) (__r))                                    \
1027            : "r" ((USItype) (__d)),                                     \
1028              "1" ((USItype) (__n1)),                                    \
1029              "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
1030 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations.  */
1031 #endif /* __sparclite__ */
1032 #endif /* __sparc_v8__ */
1033 #endif /* sparc32 */
1034
1035 #if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \
1036     && W_TYPE_SIZE == 64
1037 #define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
1038   __asm__ ("addcc %r4,%5,%1\n\t"                                        \
1039            "add %r2,%3,%0\n\t"                                          \
1040            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1041            "add %0, 1, %0\n"                                            \
1042            "1:"                                                         \
1043            : "=r" ((UDItype)(sh)),                                      \
1044              "=&r" ((UDItype)(sl))                                      \
1045            : "%rJ" ((UDItype)(ah)),                                     \
1046              "rI" ((UDItype)(bh)),                                      \
1047              "%rJ" ((UDItype)(al)),                                     \
1048              "rI" ((UDItype)(bl))                                       \
1049            __CLOBBER_CC)
1050
1051 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
1052   __asm__ ("subcc %r4,%5,%1\n\t"                                        \
1053            "sub %r2,%3,%0\n\t"                                          \
1054            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1055            "sub %0, 1, %0\n\t"                                          \
1056            "1:"                                                         \
1057            : "=r" ((UDItype)(sh)),                                      \
1058              "=&r" ((UDItype)(sl))                                      \
1059            : "rJ" ((UDItype)(ah)),                                      \
1060              "rI" ((UDItype)(bh)),                                      \
1061              "rJ" ((UDItype)(al)),                                      \
1062              "rI" ((UDItype)(bl))                                       \
1063            __CLOBBER_CC)
1064
1065 #define umul_ppmm(wh, wl, u, v)                                         \
1066   do {                                                                  \
1067           UDItype tmp1, tmp2, tmp3, tmp4;                               \
1068           __asm__ __volatile__ (                                        \
1069                    "srl %7,0,%3\n\t"                                    \
1070                    "mulx %3,%6,%1\n\t"                                  \
1071                    "srlx %6,32,%2\n\t"                                  \
1072                    "mulx %2,%3,%4\n\t"                                  \
1073                    "sllx %4,32,%5\n\t"                                  \
1074                    "srl %6,0,%3\n\t"                                    \
1075                    "sub %1,%5,%5\n\t"                                   \
1076                    "srlx %5,32,%5\n\t"                                  \
1077                    "addcc %4,%5,%4\n\t"                                 \
1078                    "srlx %7,32,%5\n\t"                                  \
1079                    "mulx %3,%5,%3\n\t"                                  \
1080                    "mulx %2,%5,%5\n\t"                                  \
1081                    "sethi %%hi(0x80000000),%2\n\t"                      \
1082                    "addcc %4,%3,%4\n\t"                                 \
1083                    "srlx %4,32,%4\n\t"                                  \
1084                    "add %2,%2,%2\n\t"                                   \
1085                    "movcc %%xcc,%%g0,%2\n\t"                            \
1086                    "addcc %5,%4,%5\n\t"                                 \
1087                    "sllx %3,32,%3\n\t"                                  \
1088                    "add %1,%3,%1\n\t"                                   \
1089                    "add %5,%2,%0"                                       \
1090            : "=r" ((UDItype)(wh)),                                      \
1091              "=&r" ((UDItype)(wl)),                                     \
1092              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)     \
1093            : "r" ((UDItype)(u)),                                        \
1094              "r" ((UDItype)(v))                                         \
1095            __CLOBBER_CC);                                               \
1096   } while (0)
1097 #define UMUL_TIME 96
1098 #define UDIV_TIME 230
1099 #endif /* sparc64 */
1100
1101 #if defined (__vax__) && W_TYPE_SIZE == 32
1102 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1103   __asm__ ("addl2 %5,%1\n\tadwc %3,%0"                                  \
1104            : "=g" ((USItype) (sh)),                                     \
1105              "=&g" ((USItype) (sl))                                     \
1106            : "%0" ((USItype) (ah)),                                     \
1107              "g" ((USItype) (bh)),                                      \
1108              "%1" ((USItype) (al)),                                     \
1109              "g" ((USItype) (bl)))
1110 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1111   __asm__ ("subl2 %5,%1\n\tsbwc %3,%0"                                  \
1112            : "=g" ((USItype) (sh)),                                     \
1113              "=&g" ((USItype) (sl))                                     \
1114            : "0" ((USItype) (ah)),                                      \
1115              "g" ((USItype) (bh)),                                      \
1116              "1" ((USItype) (al)),                                      \
1117              "g" ((USItype) (bl)))
1118 #define umul_ppmm(xh, xl, m0, m1) \
1119   do {                                                                  \
1120     union {                                                             \
1121         UDItype __ll;                                                   \
1122         struct {USItype __l, __h;} __i;                                 \
1123       } __xx;                                                           \
1124     USItype __m0 = (m0), __m1 = (m1);                                   \
1125     __asm__ ("emul %1,%2,$0,%0"                                         \
1126              : "=r" (__xx.__ll)                                         \
1127              : "g" (__m0),                                              \
1128                "g" (__m1));                                             \
1129     (xh) = __xx.__i.__h;                                                \
1130     (xl) = __xx.__i.__l;                                                \
1131     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1132              + (((SItype) __m1 >> 31) & __m0));                         \
1133   } while (0)
1134 #define sdiv_qrnnd(q, r, n1, n0, d) \
1135   do {                                                                  \
1136     union {DItype __ll;                                                 \
1137            struct {SItype __l, __h;} __i;                               \
1138           } __xx;                                                       \
1139     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1140     __asm__ ("ediv %3,%2,%0,%1"                                         \
1141              : "=g" (q), "=g" (r)                                       \
1142              : "g" (__xx.__ll), "g" (d));                               \
1143   } while (0)
1144 #endif /* __vax__ */
1145
1146 #if defined (__z8000__) && W_TYPE_SIZE == 16
1147 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1148   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1149            : "=r" ((unsigned int)(sh)),                                 \
1150              "=&r" ((unsigned int)(sl))                                 \
1151            : "%0" ((unsigned int)(ah)),                                 \
1152              "r" ((unsigned int)(bh)),                                  \
1153              "%1" ((unsigned int)(al)),                                 \
1154              "rQR" ((unsigned int)(bl)))
1155 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1156   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1157            : "=r" ((unsigned int)(sh)),                                 \
1158              "=&r" ((unsigned int)(sl))                                 \
1159            : "0" ((unsigned int)(ah)),                                  \
1160              "r" ((unsigned int)(bh)),                                  \
1161              "1" ((unsigned int)(al)),                                  \
1162              "rQR" ((unsigned int)(bl)))
1163 #define umul_ppmm(xh, xl, m0, m1) \
1164   do {                                                                  \
1165     union {long int __ll;                                               \
1166            struct {unsigned int __h, __l;} __i;                         \
1167           } __xx;                                                       \
1168     unsigned int __m0 = (m0), __m1 = (m1);                              \
1169     __asm__ ("mult      %S0,%H3"                                        \
1170              : "=r" (__xx.__i.__h),                                     \
1171                "=r" (__xx.__i.__l)                                      \
1172              : "%1" (__m0),                                             \
1173                "rQR" (__m1));                                           \
1174     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1175     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1176              + (((signed int) __m1 >> 15) & __m0));                     \
1177   } while (0)
1178 #endif /* __z8000__ */
1179
1180 #endif /* __GNUC__ */
1181
1182 /* If this machine has no inline assembler, use C macros.  */
1183
1184 #if !defined (add_ssaaaa)
1185 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1186   do {                                                                  \
1187     UWtype __x;                                                         \
1188     __x = (al) + (bl);                                                  \
1189     (sh) = (ah) + (bh) + (__x < (al));                                  \
1190     (sl) = __x;                                                         \
1191   } while (0)
1192 #endif
1193
1194 #if !defined (sub_ddmmss)
1195 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1196   do {                                                                  \
1197     UWtype __x;                                                         \
1198     __x = (al) - (bl);                                                  \
1199     (sh) = (ah) - (bh) - (__x > (al));                                  \
1200     (sl) = __x;                                                         \
1201   } while (0)
1202 #endif
1203
1204 #if !defined (umul_ppmm)
1205 #define umul_ppmm(w1, w0, u, v)                                         \
1206   do {                                                                  \
1207     UWtype __x0, __x1, __x2, __x3;                                      \
1208     UHWtype __ul, __vl, __uh, __vh;                                     \
1209                                                                         \
1210     __ul = __ll_lowpart (u);                                            \
1211     __uh = __ll_highpart (u);                                           \
1212     __vl = __ll_lowpart (v);                                            \
1213     __vh = __ll_highpart (v);                                           \
1214                                                                         \
1215     __x0 = (UWtype) __ul * __vl;                                        \
1216     __x1 = (UWtype) __ul * __vh;                                        \
1217     __x2 = (UWtype) __uh * __vl;                                        \
1218     __x3 = (UWtype) __uh * __vh;                                        \
1219                                                                         \
1220     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1221     __x1 += __x2;               /* but this indeed can */               \
1222     if (__x1 < __x2)            /* did we get it? */                    \
1223       __x3 += __ll_B;           /* yes, add it in the proper pos.  */   \
1224                                                                         \
1225     (w1) = __x3 + __ll_highpart (__x1);                                 \
1226     (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);          \
1227   } while (0)
1228 #endif
1229
1230 #if !defined (__umulsidi3)
1231 #define __umulsidi3(u, v) \
1232   ({DWunion __w;                                                        \
1233     umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
1234     __w.ll; })
1235 #endif
1236
1237 /* Define this unconditionally, so it can be used for debugging.  */
1238 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1239   do {                                                                  \
1240     UWtype __d1, __d0, __q1, __q0;                                      \
1241     UWtype __r1, __r0, __m;                                             \
1242     __d1 = __ll_highpart (d);                                           \
1243     __d0 = __ll_lowpart (d);                                            \
1244                                                                         \
1245     __r1 = (n1) % __d1;                                                 \
1246     __q1 = (n1) / __d1;                                                 \
1247     __m = (UWtype) __q1 * __d0;                                         \
1248     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1249     if (__r1 < __m)                                                     \
1250       {                                                                 \
1251         __q1--, __r1 += (d);                                            \
1252         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1253           if (__r1 < __m)                                               \
1254             __q1--, __r1 += (d);                                        \
1255       }                                                                 \
1256     __r1 -= __m;                                                        \
1257                                                                         \
1258     __r0 = __r1 % __d1;                                                 \
1259     __q0 = __r1 / __d1;                                                 \
1260     __m = (UWtype) __q0 * __d0;                                         \
1261     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1262     if (__r0 < __m)                                                     \
1263       {                                                                 \
1264         __q0--, __r0 += (d);                                            \
1265         if (__r0 >= (d))                                                \
1266           if (__r0 < __m)                                               \
1267             __q0--, __r0 += (d);                                        \
1268       }                                                                 \
1269     __r0 -= __m;                                                        \
1270                                                                         \
1271     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1272     (r) = __r0;                                                         \
1273   } while (0)
1274
1275 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1276    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1277 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1278 #define udiv_qrnnd(q, r, nh, nl, d) \
1279   do {                                                                  \
1280     USItype __r;                                                        \
1281     (q) = __udiv_w_sdiv (&__r, nh, nl, d);                              \
1282     (r) = __r;                                                          \
1283   } while (0)
1284 #endif
1285
1286 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1287 #if !defined (udiv_qrnnd)
1288 #define UDIV_NEEDS_NORMALIZATION 1
1289 #define udiv_qrnnd __udiv_qrnnd_c
1290 #endif
1291
1292 #if !defined (count_leading_zeros)
1293 extern const UQItype __clz_tab[];
1294 #define count_leading_zeros(count, x) \
1295   do {                                                                  \
1296     UWtype __xr = (x);                                                  \
1297     UWtype __a;                                                         \
1298                                                                         \
1299     if (W_TYPE_SIZE <= 32)                                              \
1300       {                                                                 \
1301         __a = __xr < ((UWtype)1<<2*__BITS4)                             \
1302           ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4)                 \
1303           : (__xr < ((UWtype)1<<3*__BITS4) ?  2*__BITS4 : 3*__BITS4);   \
1304       }                                                                 \
1305     else                                                                \
1306       {                                                                 \
1307         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1308           if (((__xr >> __a) & 0xff) != 0)                              \
1309             break;                                                      \
1310       }                                                                 \
1311                                                                         \
1312     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1313   } while (0)
1314 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1315 #endif
1316
1317 #if !defined (count_trailing_zeros)
1318 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1319    defined in asm, but if it is not, the C version above is good enough.  */
1320 #define count_trailing_zeros(count, x) \
1321   do {                                                                  \
1322     UWtype __ctz_x = (x);                                               \
1323     UWtype __ctz_c;                                                     \
1324     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1325     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1326   } while (0)
1327 #endif
1328
1329 #ifndef UDIV_NEEDS_NORMALIZATION
1330 #define UDIV_NEEDS_NORMALIZATION 0
1331 #endif