gcc/longlong.h

   1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
   2    Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2004,
   3    2005, 2007  Free Software Foundation, Inc.
   4
   5    This definition file is free software; you can redistribute it
   6    and/or modify it under the terms of the GNU General Public
   7    License as published by the Free Software Foundation; either
   8    version 3, or (at your option) any later version.
   9
  10    This definition file is distributed in the hope that it will be
  11    useful, but WITHOUT ANY WARRANTY; without even the implied
  12    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13    See the GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with this program; see the file COPYING3.  If not see
  17    <http://www.gnu.org/licenses/>.  */
  18
  19 /* You have to define the following before including this file:
  20
  21    UWtype -- An unsigned type, default type for operations (typically a "word")
  22    UHWtype -- An unsigned type, at least half the size of UWtype.
  23    UDWtype -- An unsigned type, at least twice as large a UWtype
  24    W_TYPE_SIZE -- size in bits of UWtype
  25
  26    UQItype -- Unsigned 8 bit type.
  27    SItype, USItype -- Signed and unsigned 32 bit types.
  28    DItype, UDItype -- Signed and unsigned 64 bit types.
  29
  30    On a 32 bit machine UWtype should typically be USItype;
  31    on a 64 bit machine, UWtype should typically be UDItype.  */
  32
  33 #define __BITS4 (W_TYPE_SIZE / 4)
  34 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
  35 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
  36 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
  37
  38 #ifndef W_TYPE_SIZE
  39 #define W_TYPE_SIZE     32
  40 #define UWtype          USItype
  41 #define UHWtype         USItype
  42 #define UDWtype         UDItype
  43 #endif
  44
  45 extern const UQItype __clz_tab[256];
  46
  47 /* Define auxiliary asm macros.
  48
  49    1) umul_ppmm(high_prod, low_prod, multiplier, multiplicand) multiplies two
  50    UWtype integers MULTIPLIER and MULTIPLICAND, and generates a two UWtype
  51    word product in HIGH_PROD and LOW_PROD.
  52
  53    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
  54    UDWtype product.  This is just a variant of umul_ppmm.
  55
  56    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  57    denominator) divides a UDWtype, composed by the UWtype integers
  58    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
  59    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
  60    than DENOMINATOR for correct operation.  If, in addition, the most
  61    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  62    UDIV_NEEDS_NORMALIZATION is defined to 1.
  63
  64    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  65    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
  66    is rounded towards 0.
  67
  68    5) count_leading_zeros(count, x) counts the number of zero-bits from the
  69    msb to the first nonzero bit in the UWtype X.  This is the number of
  70    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
  71    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
  72
  73    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
  74    from the least significant end.
  75
  76    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
  77    high_addend_2, low_addend_2) adds two UWtype integers, composed by
  78    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
  79    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
  80    (i.e. carry out) is not stored anywhere, and is lost.
  81
  82    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
  83    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
  84    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
  85    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
  86    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
  87    and is lost.
  88
  89    If any of these macros are left undefined for a particular CPU,
  90    C macros are used.  */
  91
  92 /* The CPUs come in alphabetical order below.
  93
  94    Please add support for more CPUs here, or improve the current support
  95    for the CPUs below!
  96    (E.g. WE32100, IBM360.)  */
  97
  98 #if defined (__GNUC__) && !defined (NO_ASM)
  99
 100 /* We sometimes need to clobber "cc" with gcc2, but that would not be
 101    understood by gcc1.  Use cpp to avoid major code duplication.  */
 102 #if __GNUC__ < 2
 103 #define __CLOBBER_CC
 104 #define __AND_CLOBBER_CC
 105 #else /* __GNUC__ >= 2 */
 106 #define __CLOBBER_CC : "cc"
 107 #define __AND_CLOBBER_CC , "cc"
 108 #endif /* __GNUC__ < 2 */
 109
 110 #if defined (__alpha) && W_TYPE_SIZE == 64
 111 #define umul_ppmm(ph, pl, m0, m1) \
 112   do {                                                                  \
 113     UDItype __m0 = (m0), __m1 = (m1);                                   \
 114     (ph) = __builtin_alpha_umulh (__m0, __m1);                          \
 115     (pl) = __m0 * __m1;                                                 \
 116   } while (0)
 117 #define UMUL_TIME 46
 118 #ifndef LONGLONG_STANDALONE
 119 #define udiv_qrnnd(q, r, n1, n0, d) \
 120   do { UDItype __r;                                                     \
 121     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 122     (r) = __r;                                                          \
 123   } while (0)
 124 extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
 125 #define UDIV_TIME 220
 126 #endif /* LONGLONG_STANDALONE */
 127 #ifdef __alpha_cix__
 128 #define count_leading_zeros(COUNT,X)    ((COUNT) = __builtin_clzl (X))
 129 #define count_trailing_zeros(COUNT,X)   ((COUNT) = __builtin_ctzl (X))
 130 #define COUNT_LEADING_ZEROS_0 64
 131 #else
 132 #define count_leading_zeros(COUNT,X) \
 133   do {                                                                  \
 134     UDItype __xr = (X), __t, __a;                                       \
 135     __t = __builtin_alpha_cmpbge (0, __xr);                             \
 136     __a = __clz_tab[__t ^ 0xff] - 1;                                    \
 137     __t = __builtin_alpha_extbl (__xr, __a);                            \
 138     (COUNT) = 64 - (__clz_tab[__t] + __a*8);                            \
 139   } while (0)
 140 #define count_trailing_zeros(COUNT,X) \
 141   do {                                                                  \
 142     UDItype __xr = (X), __t, __a;                                       \
 143     __t = __builtin_alpha_cmpbge (0, __xr);                             \
 144     __t = ~__t & -~__t;                                                 \
 145     __a = ((__t & 0xCC) != 0) * 2;                                      \
 146     __a += ((__t & 0xF0) != 0) * 4;                                     \
 147     __a += ((__t & 0xAA) != 0);                                         \
 148     __t = __builtin_alpha_extbl (__xr, __a);                            \
 149     __a <<= 3;                                                          \
 150     __t &= -__t;                                                        \
 151     __a += ((__t & 0xCC) != 0) * 2;                                     \
 152     __a += ((__t & 0xF0) != 0) * 4;                                     \
 153     __a += ((__t & 0xAA) != 0);                                         \
 154     (COUNT) = __a;                                                      \
 155   } while (0)
 156 #endif /* __alpha_cix__ */
 157 #endif /* __alpha */
 158
 159 #if defined (__arc__) && W_TYPE_SIZE == 32
 160 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 161   __asm__ ("add.f       %1, %4, %5\n\tadc       %0, %2, %3"             \
 162            : "=r" ((USItype) (sh)),                                     \
 163              "=&r" ((USItype) (sl))                                     \
 164            : "%r" ((USItype) (ah)),                                     \
 165              "rIJ" ((USItype) (bh)),                                    \
 166              "%r" ((USItype) (al)),                                     \
 167              "rIJ" ((USItype) (bl)))
 168 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 169   __asm__ ("sub.f       %1, %4, %5\n\tsbc       %0, %2, %3"             \
 170            : "=r" ((USItype) (sh)),                                     \
 171              "=&r" ((USItype) (sl))                                     \
 172            : "r" ((USItype) (ah)),                                      \
 173              "rIJ" ((USItype) (bh)),                                    \
 174              "r" ((USItype) (al)),                                      \
 175              "rIJ" ((USItype) (bl)))
 176 /* Call libgcc routine.  */
 177 #define umul_ppmm(w1, w0, u, v) \
 178 do {                                                                    \
 179   DWunion __w;                                                          \
 180   __w.ll = __umulsidi3 (u, v);                                          \
 181   w1 = __w.s.high;                                                      \
 182   w0 = __w.s.low;                                                       \
 183 } while (0)
 184 #define __umulsidi3 __umulsidi3
 185 UDItype __umulsidi3 (USItype, USItype);
 186 #endif
 187
 188 #if defined (__arm__) && !defined (__thumb__) && W_TYPE_SIZE == 32
 189 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 190   __asm__ ("adds        %1, %4, %5\n\tadc       %0, %2, %3"             \
 191            : "=r" ((USItype) (sh)),                                     \
 192              "=&r" ((USItype) (sl))                                     \
 193            : "%r" ((USItype) (ah)),                                     \
 194              "rI" ((USItype) (bh)),                                     \
 195              "%r" ((USItype) (al)),                                     \
 196              "rI" ((USItype) (bl)) __CLOBBER_CC)
 197 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 198   __asm__ ("subs        %1, %4, %5\n\tsbc       %0, %2, %3"             \
 199            : "=r" ((USItype) (sh)),                                     \
 200              "=&r" ((USItype) (sl))                                     \
 201            : "r" ((USItype) (ah)),                                      \
 202              "rI" ((USItype) (bh)),                                     \
 203              "r" ((USItype) (al)),                                      \
 204              "rI" ((USItype) (bl)) __CLOBBER_CC)
 205 #define umul_ppmm(xh, xl, a, b) \
 206 {register USItype __t0, __t1, __t2;                                     \
 207   __asm__ ("%@ Inlined umul_ppmm\n"                                     \
 208            "    mov     %2, %5, lsr #16\n"                              \
 209            "    mov     %0, %6, lsr #16\n"                              \
 210            "    bic     %3, %5, %2, lsl #16\n"                          \
 211            "    bic     %4, %6, %0, lsl #16\n"                          \
 212            "    mul     %1, %3, %4\n"                                   \
 213            "    mul     %4, %2, %4\n"                                   \
 214            "    mul     %3, %0, %3\n"                                   \
 215            "    mul     %0, %2, %0\n"                                   \
 216            "    adds    %3, %4, %3\n"                                   \
 217            "    addcs   %0, %0, #65536\n"                               \
 218            "    adds    %1, %1, %3, lsl #16\n"                          \
 219            "    adc     %0, %0, %3, lsr #16"                            \
 220            : "=&r" ((USItype) (xh)),                                    \
 221              "=r" ((USItype) (xl)),                                     \
 222              "=&r" (__t0), "=&r" (__t1), "=r" (__t2)                    \
 223            : "r" ((USItype) (a)),                                       \
 224              "r" ((USItype) (b)) __CLOBBER_CC );}
 225 #define UMUL_TIME 20
 226 #define UDIV_TIME 100
 227 #endif /* __arm__ */
 228
 229 #if defined (__CRIS__) && __CRIS_arch_version >= 3
 230 #define count_leading_zeros(COUNT, X) ((COUNT) = __builtin_clz (X))
 231 #if __CRIS_arch_version >= 8
 232 #define count_trailing_zeros(COUNT, X) ((COUNT) = __builtin_ctz (X))
 233 #endif
 234 #endif /* __CRIS__ */
 235
 236 #if defined (__hppa) && W_TYPE_SIZE == 32
 237 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 238   __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0"                              \
 239            : "=r" ((USItype) (sh)),                                     \
 240              "=&r" ((USItype) (sl))                                     \
 241            : "%rM" ((USItype) (ah)),                                    \
 242              "rM" ((USItype) (bh)),                                     \
 243              "%rM" ((USItype) (al)),                                    \
 244              "rM" ((USItype) (bl)))
 245 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 246   __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0"                              \
 247            : "=r" ((USItype) (sh)),                                     \
 248              "=&r" ((USItype) (sl))                                     \
 249            : "rM" ((USItype) (ah)),                                     \
 250              "rM" ((USItype) (bh)),                                     \
 251              "rM" ((USItype) (al)),                                     \
 252              "rM" ((USItype) (bl)))
 253 #if defined (_PA_RISC1_1)
 254 #define umul_ppmm(w1, w0, u, v) \
 255   do {                                                                  \
 256     union                                                               \
 257       {                                                                 \
 258         UDItype __f;                                                    \
 259         struct {USItype __w1, __w0;} __w1w0;                            \
 260       } __t;                                                            \
 261     __asm__ ("xmpyu %1,%2,%0"                                           \
 262              : "=x" (__t.__f)                                           \
 263              : "x" ((USItype) (u)),                                     \
 264                "x" ((USItype) (v)));                                    \
 265     (w1) = __t.__w1w0.__w1;                                             \
 266     (w0) = __t.__w1w0.__w0;                                             \
 267      } while (0)
 268 #define UMUL_TIME 8
 269 #else
 270 #define UMUL_TIME 30
 271 #endif
 272 #define UDIV_TIME 40
 273 #define count_leading_zeros(count, x) \
 274   do {                                                                  \
 275     USItype __tmp;                                                      \
 276     __asm__ (                                                           \
 277        "ldi             1,%0\n"                                         \
 278 "       extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?\n"  \
 279 "       extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.\n"\
 280 "       ldo             16(%0),%0               ; Yes.  Perform add.\n" \
 281 "       extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?\n"   \
 282 "       extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.\n"\
 283 "       ldo             8(%0),%0                ; Yes.  Perform add.\n" \
 284 "       extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?\n"    \
 285 "       extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.\n"\
 286 "       ldo             4(%0),%0                ; Yes.  Perform add.\n" \
 287 "       extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?\n"    \
 288 "       extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.\n"\
 289 "       ldo             2(%0),%0                ; Yes.  Perform add.\n" \
 290 "       extru           %1,30,1,%1              ; Extract bit 1.\n"     \
 291 "       sub             %0,%1,%0                ; Subtract it.\n"       \
 292         : "=r" (count), "=r" (__tmp) : "1" (x));                        \
 293   } while (0)
 294 #endif
 295
 296 #if (defined (__i370__) || defined (__s390__) || defined (__mvs__)) && W_TYPE_SIZE == 32
 297 #define smul_ppmm(xh, xl, m0, m1) \
 298   do {                                                                  \
 299     union {DItype __ll;                                                 \
 300            struct {USItype __h, __l;} __i;                              \
 301           } __x;                                                        \
 302     __asm__ ("lr %N0,%1\n\tmr %0,%2"                                    \
 303              : "=&r" (__x.__ll)                                         \
 304              : "r" (m0), "r" (m1));                                     \
 305     (xh) = __x.__i.__h; (xl) = __x.__i.__l;                             \
 306   } while (0)
 307 #define sdiv_qrnnd(q, r, n1, n0, d) \
 308   do {                                                                  \
 309     union {DItype __ll;                                                 \
 310            struct {USItype __h, __l;} __i;                              \
 311           } __x;                                                        \
 312     __x.__i.__h = n1; __x.__i.__l = n0;                                 \
 313     __asm__ ("dr %0,%2"                                                 \
 314              : "=r" (__x.__ll)                                          \
 315              : "0" (__x.__ll), "r" (d));                                \
 316     (q) = __x.__i.__l; (r) = __x.__i.__h;                               \
 317   } while (0)
 318 #endif
 319
 320 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
 321 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 322   __asm__ ("add{l} {%5,%1|%1,%5}\n\tadc{l} {%3,%0|%0,%3}"               \
 323            : "=r" ((USItype) (sh)),                                     \
 324              "=&r" ((USItype) (sl))                                     \
 325            : "%0" ((USItype) (ah)),                                     \
 326              "g" ((USItype) (bh)),                                      \
 327              "%1" ((USItype) (al)),                                     \
 328              "g" ((USItype) (bl)))
 329 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 330   __asm__ ("sub{l} {%5,%1|%1,%5}\n\tsbb{l} {%3,%0|%0,%3}"               \
 331            : "=r" ((USItype) (sh)),                                     \
 332              "=&r" ((USItype) (sl))                                     \
 333            : "0" ((USItype) (ah)),                                      \
 334              "g" ((USItype) (bh)),                                      \
 335              "1" ((USItype) (al)),                                      \
 336              "g" ((USItype) (bl)))
 337 #define umul_ppmm(w1, w0, u, v) \
 338   __asm__ ("mul{l} %3"                                                  \
 339            : "=a" ((USItype) (w0)),                                     \
 340              "=d" ((USItype) (w1))                                      \
 341            : "%0" ((USItype) (u)),                                      \
 342              "rm" ((USItype) (v)))
 343 #define udiv_qrnnd(q, r, n1, n0, dv) \
 344   __asm__ ("div{l} %4"                                                  \
 345            : "=a" ((USItype) (q)),                                      \
 346              "=d" ((USItype) (r))                                       \
 347            : "0" ((USItype) (n0)),                                      \
 348              "1" ((USItype) (n1)),                                      \
 349              "rm" ((USItype) (dv)))
 350 #define count_leading_zeros(count, x)   ((count) = __builtin_clz (x))
 351 #define count_trailing_zeros(count, x)  ((count) = __builtin_ctz (x))
 352 #define UMUL_TIME 40
 353 #define UDIV_TIME 40
 354 #endif /* 80x86 */
 355
 356 #if (defined (__x86_64__) || defined (__i386__)) && W_TYPE_SIZE == 64
 357 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 358   __asm__ ("add{q} {%5,%1|%1,%5}\n\tadc{q} {%3,%0|%0,%3}"               \
 359            : "=r" ((UDItype) (sh)),                                     \
 360              "=&r" ((UDItype) (sl))                                     \
 361            : "%0" ((UDItype) (ah)),                                     \
 362              "rme" ((UDItype) (bh)),                                    \
 363              "%1" ((UDItype) (al)),                                     \
 364              "rme" ((UDItype) (bl)))
 365 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 366   __asm__ ("sub{q} {%5,%1|%1,%5}\n\tsbb{q} {%3,%0|%0,%3}"               \
 367            : "=r" ((UDItype) (sh)),                                     \
 368              "=&r" ((UDItype) (sl))                                     \
 369            : "0" ((UDItype) (ah)),                                      \
 370              "rme" ((UDItype) (bh)),                                    \
 371              "1" ((UDItype) (al)),                                      \
 372              "rme" ((UDItype) (bl)))
 373 #define umul_ppmm(w1, w0, u, v) \
 374   __asm__ ("mul{q} %3"                                                  \
 375            : "=a" ((UDItype) (w0)),                                     \
 376              "=d" ((UDItype) (w1))                                      \
 377            : "%0" ((UDItype) (u)),                                      \
 378              "rm" ((UDItype) (v)))
 379 #define udiv_qrnnd(q, r, n1, n0, dv) \
 380   __asm__ ("div{q} %4"                                                  \
 381            : "=a" ((UDItype) (q)),                                      \
 382              "=d" ((UDItype) (r))                                       \
 383            : "0" ((UDItype) (n0)),                                      \
 384              "1" ((UDItype) (n1)),                                      \
 385              "rm" ((UDItype) (dv)))
 386 #define count_leading_zeros(count, x)   ((count) = __builtin_clzl (x))
 387 #define count_trailing_zeros(count, x)  ((count) = __builtin_ctzl (x))
 388 #define UMUL_TIME 40
 389 #define UDIV_TIME 40
 390 #endif /* x86_64 */
 391
 392 #if defined (__i960__) && W_TYPE_SIZE == 32
 393 #define umul_ppmm(w1, w0, u, v) \
 394   ({union {UDItype __ll;                                                \
 395            struct {USItype __l, __h;} __i;                              \
 396           } __xx;                                                       \
 397   __asm__ ("emul        %2,%1,%0"                                       \
 398            : "=d" (__xx.__ll)                                           \
 399            : "%dI" ((USItype) (u)),                                     \
 400              "dI" ((USItype) (v)));                                     \
 401   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 402 #define __umulsidi3(u, v) \
 403   ({UDItype __w;                                                        \
 404     __asm__ ("emul      %2,%1,%0"                                       \
 405              : "=d" (__w)                                               \
 406              : "%dI" ((USItype) (u)),                                   \
 407                "dI" ((USItype) (v)));                                   \
 408     __w; })
 409 #endif /* __i960__ */
 410
 411 #if defined (__M32R__) && W_TYPE_SIZE == 32
 412 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 413   /* The cmp clears the condition bit.  */ \
 414   __asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3"                      \
 415            : "=r" ((USItype) (sh)),                                     \
 416              "=&r" ((USItype) (sl))                                     \
 417            : "0" ((USItype) (ah)),                                      \
 418              "r" ((USItype) (bh)),                                      \
 419              "1" ((USItype) (al)),                                      \
 420              "r" ((USItype) (bl))                                       \
 421            : "cbit")
 422 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 423   /* The cmp clears the condition bit.  */ \
 424   __asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3"                      \
 425            : "=r" ((USItype) (sh)),                                     \
 426              "=&r" ((USItype) (sl))                                     \
 427            : "0" ((USItype) (ah)),                                      \
 428              "r" ((USItype) (bh)),                                      \
 429              "1" ((USItype) (al)),                                      \
 430              "r" ((USItype) (bl))                                       \
 431            : "cbit")
 432 #endif /* __M32R__ */
 433
 434 #if defined (__mc68000__) && W_TYPE_SIZE == 32
 435 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 436   __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0"                              \
 437            : "=d" ((USItype) (sh)),                                     \
 438              "=&d" ((USItype) (sl))                                     \
 439            : "%0" ((USItype) (ah)),                                     \
 440              "d" ((USItype) (bh)),                                      \
 441              "%1" ((USItype) (al)),                                     \
 442              "g" ((USItype) (bl)))
 443 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 444   __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0"                              \
 445            : "=d" ((USItype) (sh)),                                     \
 446              "=&d" ((USItype) (sl))                                     \
 447            : "0" ((USItype) (ah)),                                      \
 448              "d" ((USItype) (bh)),                                      \
 449              "1" ((USItype) (al)),                                      \
 450              "g" ((USItype) (bl)))
 451
 452 /* The '020, '030, '040, '060 and CPU32 have 32x32->64 and 64/32->32q-32r.  */
 453 #if (defined (__mc68020__) && !defined (__mc68060__))
 454 #define umul_ppmm(w1, w0, u, v) \
 455   __asm__ ("mulu%.l %3,%1:%0"                                           \
 456            : "=d" ((USItype) (w0)),                                     \
 457              "=d" ((USItype) (w1))                                      \
 458            : "%0" ((USItype) (u)),                                      \
 459              "dmi" ((USItype) (v)))
 460 #define UMUL_TIME 45
 461 #define udiv_qrnnd(q, r, n1, n0, d) \
 462   __asm__ ("divu%.l %4,%1:%0"                                           \
 463            : "=d" ((USItype) (q)),                                      \
 464              "=d" ((USItype) (r))                                       \
 465            : "0" ((USItype) (n0)),                                      \
 466              "1" ((USItype) (n1)),                                      \
 467              "dmi" ((USItype) (d)))
 468 #define UDIV_TIME 90
 469 #define sdiv_qrnnd(q, r, n1, n0, d) \
 470   __asm__ ("divs%.l %4,%1:%0"                                           \
 471            : "=d" ((USItype) (q)),                                      \
 472              "=d" ((USItype) (r))                                       \
 473            : "0" ((USItype) (n0)),                                      \
 474              "1" ((USItype) (n1)),                                      \
 475              "dmi" ((USItype) (d)))
 476
 477 #elif defined (__mcoldfire__) /* not mc68020 */
 478
 479 #define umul_ppmm(xh, xl, a, b) \
 480   __asm__ ("| Inlined umul_ppmm\n"                                      \
 481            "    move%.l %2,%/d0\n"                                      \
 482            "    move%.l %3,%/d1\n"                                      \
 483            "    move%.l %/d0,%/d2\n"                                    \
 484            "    swap    %/d0\n"                                         \
 485            "    move%.l %/d1,%/d3\n"                                    \
 486            "    swap    %/d1\n"                                         \
 487            "    move%.w %/d2,%/d4\n"                                    \
 488            "    mulu    %/d3,%/d4\n"                                    \
 489            "    mulu    %/d1,%/d2\n"                                    \
 490            "    mulu    %/d0,%/d3\n"                                    \
 491            "    mulu    %/d0,%/d1\n"                                    \
 492            "    move%.l %/d4,%/d0\n"                                    \
 493            "    clr%.w  %/d0\n"                                         \
 494            "    swap    %/d0\n"                                         \
 495            "    add%.l  %/d0,%/d2\n"                                    \
 496            "    add%.l  %/d3,%/d2\n"                                    \
 497            "    jcc     1f\n"                                           \
 498            "    add%.l  %#65536,%/d1\n"                                 \
 499            "1:  swap    %/d2\n"                                         \
 500            "    moveq   %#0,%/d0\n"                                     \
 501            "    move%.w %/d2,%/d0\n"                                    \
 502            "    move%.w %/d4,%/d2\n"                                    \
 503            "    move%.l %/d2,%1\n"                                      \
 504            "    add%.l  %/d1,%/d0\n"                                    \
 505            "    move%.l %/d0,%0"                                        \
 506            : "=g" ((USItype) (xh)),                                     \
 507              "=g" ((USItype) (xl))                                      \
 508            : "g" ((USItype) (a)),                                       \
 509              "g" ((USItype) (b))                                        \
 510            : "d0", "d1", "d2", "d3", "d4")
 511 #define UMUL_TIME 100
 512 #define UDIV_TIME 400
 513 #else /* not ColdFire */
 514 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
 515 #define umul_ppmm(xh, xl, a, b) \
 516   __asm__ ("| Inlined umul_ppmm\n"                                      \
 517            "    move%.l %2,%/d0\n"                                      \
 518            "    move%.l %3,%/d1\n"                                      \
 519            "    move%.l %/d0,%/d2\n"                                    \
 520            "    swap    %/d0\n"                                         \
 521            "    move%.l %/d1,%/d3\n"                                    \
 522            "    swap    %/d1\n"                                         \
 523            "    move%.w %/d2,%/d4\n"                                    \
 524            "    mulu    %/d3,%/d4\n"                                    \
 525            "    mulu    %/d1,%/d2\n"                                    \
 526            "    mulu    %/d0,%/d3\n"                                    \
 527            "    mulu    %/d0,%/d1\n"                                    \
 528            "    move%.l %/d4,%/d0\n"                                    \
 529            "    eor%.w  %/d0,%/d0\n"                                    \
 530            "    swap    %/d0\n"                                         \
 531            "    add%.l  %/d0,%/d2\n"                                    \
 532            "    add%.l  %/d3,%/d2\n"                                    \
 533            "    jcc     1f\n"                                           \
 534            "    add%.l  %#65536,%/d1\n"                                 \
 535            "1:  swap    %/d2\n"                                         \
 536            "    moveq   %#0,%/d0\n"                                     \
 537            "    move%.w %/d2,%/d0\n"                                    \
 538            "    move%.w %/d4,%/d2\n"                                    \
 539            "    move%.l %/d2,%1\n"                                      \
 540            "    add%.l  %/d1,%/d0\n"                                    \
 541            "    move%.l %/d0,%0"                                        \
 542            : "=g" ((USItype) (xh)),                                     \
 543              "=g" ((USItype) (xl))                                      \
 544            : "g" ((USItype) (a)),                                       \
 545              "g" ((USItype) (b))                                        \
 546            : "d0", "d1", "d2", "d3", "d4")
 547 #define UMUL_TIME 100
 548 #define UDIV_TIME 400
 549
 550 #endif /* not mc68020 */
 551
 552 /* The '020, '030, '040 and '060 have bitfield insns.
 553    cpu32 disguises as a 68020, but lacks them.  */
 554 #if defined (__mc68020__) && !defined (__mcpu32__)
 555 #define count_leading_zeros(count, x) \
 556   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
 557            : "=d" ((USItype) (count))                                   \
 558            : "od" ((USItype) (x)), "n" (0))
 559 /* Some ColdFire architectures have a ff1 instruction supported via
 560    __builtin_clz. */
 561 #elif defined (__mcfisaaplus__) || defined (__mcfisac__)
 562 #define count_leading_zeros(count,x) ((count) = __builtin_clz (x))
 563 #define COUNT_LEADING_ZEROS_0 32
 564 #endif
 565 #endif /* mc68000 */
 566
 567 #if defined (__m88000__) && W_TYPE_SIZE == 32
 568 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 569   __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3"                   \
 570            : "=r" ((USItype) (sh)),                                     \
 571              "=&r" ((USItype) (sl))                                     \
 572            : "%rJ" ((USItype) (ah)),                                    \
 573              "rJ" ((USItype) (bh)),                                     \
 574              "%rJ" ((USItype) (al)),                                    \
 575              "rJ" ((USItype) (bl)))
 576 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 577   __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3"                   \
 578            : "=r" ((USItype) (sh)),                                     \
 579              "=&r" ((USItype) (sl))                                     \
 580            : "rJ" ((USItype) (ah)),                                     \
 581              "rJ" ((USItype) (bh)),                                     \
 582              "rJ" ((USItype) (al)),                                     \
 583              "rJ" ((USItype) (bl)))
 584 #define count_leading_zeros(count, x) \
 585   do {                                                                  \
 586     USItype __cbtmp;                                                    \
 587     __asm__ ("ff1 %0,%1"                                                \
 588              : "=r" (__cbtmp)                                           \
 589              : "r" ((USItype) (x)));                                    \
 590     (count) = __cbtmp ^ 31;                                             \
 591   } while (0)
 592 #define COUNT_LEADING_ZEROS_0 63 /* sic */
 593 #if defined (__mc88110__)
 594 #define umul_ppmm(wh, wl, u, v) \
 595   do {                                                                  \
 596     union {UDItype __ll;                                                \
 597            struct {USItype __h, __l;} __i;                              \
 598           } __xx;                                                       \
 599     __asm__ ("mulu.d    %0,%1,%2"                                       \
 600              : "=r" (__xx.__ll)                                         \
 601              : "r" ((USItype) (u)),                                     \
 602                "r" ((USItype) (v)));                                    \
 603     (wh) = __xx.__i.__h;                                                \
 604     (wl) = __xx.__i.__l;                                                \
 605   } while (0)
 606 #define udiv_qrnnd(q, r, n1, n0, d) \
 607   ({union {UDItype __ll;                                                \
 608            struct {USItype __h, __l;} __i;                              \
 609           } __xx;                                                       \
 610   USItype __q;                                                          \
 611   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 612   __asm__ ("divu.d %0,%1,%2"                                            \
 613            : "=r" (__q)                                                 \
 614            : "r" (__xx.__ll),                                           \
 615              "r" ((USItype) (d)));                                      \
 616   (r) = (n0) - __q * (d); (q) = __q; })
 617 #define UMUL_TIME 5
 618 #define UDIV_TIME 25
 619 #else
 620 #define UMUL_TIME 17
 621 #define UDIV_TIME 150
 622 #endif /* __mc88110__ */
 623 #endif /* __m88000__ */
 624
 625 #if defined (__mips__) && W_TYPE_SIZE == 32
 626 #define umul_ppmm(w1, w0, u, v) \
 627   __asm__ ("multu %2,%3"                                                \
 628            : "=l" ((USItype) (w0)),                                     \
 629              "=h" ((USItype) (w1))                                      \
 630            : "d" ((USItype) (u)),                                       \
 631              "d" ((USItype) (v)))
 632 #define UMUL_TIME 10
 633 #define UDIV_TIME 100
 634
 635 #if (__mips == 32 || __mips == 64) && ! __mips16
 636 #define count_leading_zeros(COUNT,X)    ((COUNT) = __builtin_clz (X))
 637 #define COUNT_LEADING_ZEROS_0 32
 638 #endif
 639 #endif /* __mips__ */
 640
 641 #if defined (__ns32000__) && W_TYPE_SIZE == 32
 642 #define umul_ppmm(w1, w0, u, v) \
 643   ({union {UDItype __ll;                                                \
 644            struct {USItype __l, __h;} __i;                              \
 645           } __xx;                                                       \
 646   __asm__ ("meid %2,%0"                                                 \
 647            : "=g" (__xx.__ll)                                           \
 648            : "%0" ((USItype) (u)),                                      \
 649              "g" ((USItype) (v)));                                      \
 650   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 651 #define __umulsidi3(u, v) \
 652   ({UDItype __w;                                                        \
 653     __asm__ ("meid %2,%0"                                               \
 654              : "=g" (__w)                                               \
 655              : "%0" ((USItype) (u)),                                    \
 656                "g" ((USItype) (v)));                                    \
 657     __w; })
 658 #define udiv_qrnnd(q, r, n1, n0, d) \
 659   ({union {UDItype __ll;                                                \
 660            struct {USItype __l, __h;} __i;                              \
 661           } __xx;                                                       \
 662   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 663   __asm__ ("deid %2,%0"                                                 \
 664            : "=g" (__xx.__ll)                                           \
 665            : "0" (__xx.__ll),                                           \
 666              "g" ((USItype) (d)));                                      \
 667   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
 668 #define count_trailing_zeros(count,x) \
 669   do {                                                                  \
 670     __asm__ ("ffsd     %2,%0"                                           \
 671             : "=r" ((USItype) (count))                                  \
 672             : "0" ((USItype) 0),                                        \
 673               "r" ((USItype) (x)));                                     \
 674   } while (0)
 675 #endif /* __ns32000__ */
 676
 677 /* FIXME: We should test _IBMR2 here when we add assembly support for the
 678    system vendor compilers.
 679    FIXME: What's needed for gcc PowerPC VxWorks?  __vxworks__ is not good
 680    enough, since that hits ARM and m68k too.  */
 681 #if (defined (_ARCH_PPC)        /* AIX */                               \
 682      || defined (_ARCH_PWR)     /* AIX */                               \
 683      || defined (_ARCH_COM)     /* AIX */                               \
 684      || defined (__powerpc__)   /* gcc */                               \
 685      || defined (__POWERPC__)   /* BEOS */                              \
 686      || defined (__ppc__)       /* Darwin */                            \
 687      || (defined (PPC) && ! defined (CPU_FAMILY)) /* gcc 2.7.x GNU&SysV */    \
 688      || (defined (PPC) && defined (CPU_FAMILY)    /* VxWorks */               \
 689          && CPU_FAMILY == PPC)                                                \
 690      ) && W_TYPE_SIZE == 32
 691 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 692   do {                                                                  \
 693     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 694       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 695              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 696     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
 697       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 698              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 699     else                                                                \
 700       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 701              : "=r" (sh), "=&r" (sl)                                    \
 702              : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
 703   } while (0)
 704 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 705   do {                                                                  \
 706     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 707       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 708                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 709     else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0)         \
 710       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 711                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 712     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 713       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 714                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 715     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
 716       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 717                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 718     else                                                                \
 719       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 720                : "=r" (sh), "=&r" (sl)                                  \
 721                : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
 722   } while (0)
 723 #define count_leading_zeros(count, x) \
 724   __asm__ ("{cntlz|cntlzw} %0,%1" : "=r" (count) : "r" (x))
 725 #define COUNT_LEADING_ZEROS_0 32
 726 #if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \
 727   || defined (__ppc__)                                                    \
 728   || (defined (PPC) && ! defined (CPU_FAMILY)) /* gcc 2.7.x GNU&SysV */       \
 729   || (defined (PPC) && defined (CPU_FAMILY)    /* VxWorks */                  \
 730          && CPU_FAMILY == PPC)
 731 #define umul_ppmm(ph, pl, m0, m1) \
 732   do {                                                                  \
 733     USItype __m0 = (m0), __m1 = (m1);                                   \
 734     __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
 735     (pl) = __m0 * __m1;                                                 \
 736   } while (0)
 737 #define UMUL_TIME 15
 738 #define smul_ppmm(ph, pl, m0, m1) \
 739   do {                                                                  \
 740     SItype __m0 = (m0), __m1 = (m1);                                    \
 741     __asm__ ("mulhw %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));       \
 742     (pl) = __m0 * __m1;                                                 \
 743   } while (0)
 744 #define SMUL_TIME 14
 745 #define UDIV_TIME 120
 746 #elif defined (_ARCH_PWR)
 747 #define UMUL_TIME 8
 748 #define smul_ppmm(xh, xl, m0, m1) \
 749   __asm__ ("mul %0,%2,%3" : "=r" (xh), "=q" (xl) : "r" (m0), "r" (m1))
 750 #define SMUL_TIME 4
 751 #define sdiv_qrnnd(q, r, nh, nl, d) \
 752   __asm__ ("div %0,%2,%4" : "=r" (q), "=q" (r) : "r" (nh), "1" (nl), "r" (d))
 753 #define UDIV_TIME 100
 754 #endif
 755 #endif /* 32-bit POWER architecture variants.  */
 756
 757 /* We should test _IBMR2 here when we add assembly support for the system
 758    vendor compilers.  */
 759 #if (defined (_ARCH_PPC64) || defined (__powerpc64__)) && W_TYPE_SIZE == 64
 760 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 761   do {                                                                  \
 762     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 763       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 764              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 765     else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)         \
 766       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 767              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 768     else                                                                \
 769       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 770              : "=r" (sh), "=&r" (sl)                                    \
 771              : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
 772   } while (0)
 773 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 774   do {                                                                  \
 775     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 776       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 777                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 778     else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0)         \
 779       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 780                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 781     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 782       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 783                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 784     else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)         \
 785       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 786                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 787     else                                                                \
 788       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 789                : "=r" (sh), "=&r" (sl)                                  \
 790                : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
 791   } while (0)
 792 #define count_leading_zeros(count, x) \
 793   __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x))
 794 #define COUNT_LEADING_ZEROS_0 64
 795 #define umul_ppmm(ph, pl, m0, m1) \
 796   do {                                                                  \
 797     UDItype __m0 = (m0), __m1 = (m1);                                   \
 798     __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
 799     (pl) = __m0 * __m1;                                                 \
 800   } while (0)
 801 #define UMUL_TIME 15
 802 #define smul_ppmm(ph, pl, m0, m1) \
 803   do {                                                                  \
 804     DItype __m0 = (m0), __m1 = (m1);                                    \
 805     __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));       \
 806     (pl) = __m0 * __m1;                                                 \
 807   } while (0)
 808 #define SMUL_TIME 14  /* ??? */
 809 #define UDIV_TIME 120 /* ??? */
 810 #endif /* 64-bit PowerPC.  */
 811
 812 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
 813 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 814   __asm__ ("a %1,%5\n\tae %0,%3"                                        \
 815            : "=r" ((USItype) (sh)),                                     \
 816              "=&r" ((USItype) (sl))                                     \
 817            : "%0" ((USItype) (ah)),                                     \
 818              "r" ((USItype) (bh)),                                      \
 819              "%1" ((USItype) (al)),                                     \
 820              "r" ((USItype) (bl)))
 821 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 822   __asm__ ("s %1,%5\n\tse %0,%3"                                        \
 823            : "=r" ((USItype) (sh)),                                     \
 824              "=&r" ((USItype) (sl))                                     \
 825            : "0" ((USItype) (ah)),                                      \
 826              "r" ((USItype) (bh)),                                      \
 827              "1" ((USItype) (al)),                                      \
 828              "r" ((USItype) (bl)))
 829 #define umul_ppmm(ph, pl, m0, m1) \
 830   do {                                                                  \
 831     USItype __m0 = (m0), __m1 = (m1);                                   \
 832     __asm__ (                                                           \
 833        "s       r2,r2\n"                                                \
 834 "       mts     r10,%2\n"                                               \
 835 "       m       r2,%3\n"                                                \
 836 "       m       r2,%3\n"                                                \
 837 "       m       r2,%3\n"                                                \
 838 "       m       r2,%3\n"                                                \
 839 "       m       r2,%3\n"                                                \
 840 "       m       r2,%3\n"                                                \
 841 "       m       r2,%3\n"                                                \
 842 "       m       r2,%3\n"                                                \
 843 "       m       r2,%3\n"                                                \
 844 "       m       r2,%3\n"                                                \
 845 "       m       r2,%3\n"                                                \
 846 "       m       r2,%3\n"                                                \
 847 "       m       r2,%3\n"                                                \
 848 "       m       r2,%3\n"                                                \
 849 "       m       r2,%3\n"                                                \
 850 "       m       r2,%3\n"                                                \
 851 "       cas     %0,r2,r0\n"                                             \
 852 "       mfs     r10,%1"                                                 \
 853              : "=r" ((USItype) (ph)),                                   \
 854                "=r" ((USItype) (pl))                                    \
 855              : "%r" (__m0),                                             \
 856                 "r" (__m1)                                              \
 857              : "r2");                                                   \
 858     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
 859              + (((SItype) __m1 >> 31) & __m0));                         \
 860   } while (0)
 861 #define UMUL_TIME 20
 862 #define UDIV_TIME 200
 863 #define count_leading_zeros(count, x) \
 864   do {                                                                  \
 865     if ((x) >= 0x10000)                                                 \
 866       __asm__ ("clz     %0,%1"                                          \
 867                : "=r" ((USItype) (count))                               \
 868                : "r" ((USItype) (x) >> 16));                            \
 869     else                                                                \
 870       {                                                                 \
 871         __asm__ ("clz   %0,%1"                                          \
 872                  : "=r" ((USItype) (count))                             \
 873                  : "r" ((USItype) (x)));                                        \
 874         (count) += 16;                                                  \
 875       }                                                                 \
 876   } while (0)
 877 #endif
 878
 879 #if defined(__sh__) && !__SHMEDIA__ && W_TYPE_SIZE == 32
 880 #ifndef __sh1__
 881 #define umul_ppmm(w1, w0, u, v) \
 882   __asm__ (                                                             \
 883        "dmulu.l %2,%3\n\tsts%M1 macl,%1\n\tsts%M0       mach,%0"        \
 884            : "=r<" ((USItype)(w1)),                                     \
 885              "=r<" ((USItype)(w0))                                      \
 886            : "r" ((USItype)(u)),                                        \
 887              "r" ((USItype)(v))                                         \
 888            : "macl", "mach")
 889 #define UMUL_TIME 5
 890 #endif
 891
 892 /* This is the same algorithm as __udiv_qrnnd_c.  */
 893 #define UDIV_NEEDS_NORMALIZATION 1
 894
 895 #define udiv_qrnnd(q, r, n1, n0, d) \
 896   do {                                                                  \
 897     extern UWtype __udiv_qrnnd_16 (UWtype, UWtype)                      \
 898                         __attribute__ ((visibility ("hidden")));        \
 899     /* r0: rn r1: qn */ /* r0: n1 r4: n0 r5: d r6: d1 */ /* r2: __m */  \
 900     __asm__ (                                                           \
 901         "mov%M4 %4,r5\n"                                                \
 902 "       swap.w %3,r4\n"                                                 \
 903 "       swap.w r5,r6\n"                                                 \
 904 "       jsr @%5\n"                                                      \
 905 "       shll16 r6\n"                                                    \
 906 "       swap.w r4,r4\n"                                                 \
 907 "       jsr @%5\n"                                                      \
 908 "       swap.w r1,%0\n"                                                 \
 909 "       or r1,%0"                                                       \
 910         : "=r" (q), "=&z" (r)                                           \
 911         : "1" (n1), "r" (n0), "rm" (d), "r" (&__udiv_qrnnd_16)          \
 912         : "r1", "r2", "r4", "r5", "r6", "pr");                          \
 913   } while (0)
 914
 915 #define UDIV_TIME 80
 916
 917 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
 918   __asm__ ("clrt;subc %5,%1; subc %4,%0"                                \
 919            : "=r" (sh), "=r" (sl)                                       \
 920            : "0" (ah), "1" (al), "r" (bh), "r" (bl))
 921
 922 #endif /* __sh__ */
 923
 924 #if defined (__SH5__) && __SHMEDIA__ && W_TYPE_SIZE == 32
 925 #define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v)
 926 #define count_leading_zeros(count, x) \
 927   do                                                                    \
 928     {                                                                   \
 929       UDItype x_ = (USItype)(x);                                        \
 930       SItype c_;                                                        \
 931                                                                         \
 932       __asm__ ("nsb %1, %0" : "=r" (c_) : "r" (x_));                    \
 933       (count) = c_ - 31;                                                \
 934     }                                                                   \
 935   while (0)
 936 #define COUNT_LEADING_ZEROS_0 32
 937 #endif
 938
 939 #if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \
 940     && W_TYPE_SIZE == 32
 941 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 942   __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0"                          \
 943            : "=r" ((USItype) (sh)),                                     \
 944              "=&r" ((USItype) (sl))                                     \
 945            : "%rJ" ((USItype) (ah)),                                    \
 946              "rI" ((USItype) (bh)),                                     \
 947              "%rJ" ((USItype) (al)),                                    \
 948              "rI" ((USItype) (bl))                                      \
 949            __CLOBBER_CC)
 950 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 951   __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0"                          \
 952            : "=r" ((USItype) (sh)),                                     \
 953              "=&r" ((USItype) (sl))                                     \
 954            : "rJ" ((USItype) (ah)),                                     \
 955              "rI" ((USItype) (bh)),                                     \
 956              "rJ" ((USItype) (al)),                                     \
 957              "rI" ((USItype) (bl))                                      \
 958            __CLOBBER_CC)
 959 #if defined (__sparc_v8__)
 960 #define umul_ppmm(w1, w0, u, v) \
 961   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
 962            : "=r" ((USItype) (w1)),                                     \
 963              "=r" ((USItype) (w0))                                      \
 964            : "r" ((USItype) (u)),                                       \
 965              "r" ((USItype) (v)))
 966 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
 967   __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
 968            : "=&r" ((USItype) (__q)),                                   \
 969              "=&r" ((USItype) (__r))                                    \
 970            : "r" ((USItype) (__n1)),                                    \
 971              "r" ((USItype) (__n0)),                                    \
 972              "r" ((USItype) (__d)))
 973 #else
 974 #if defined (__sparclite__)
 975 /* This has hardware multiply but not divide.  It also has two additional
 976    instructions scan (ffs from high bit) and divscc.  */
 977 #define umul_ppmm(w1, w0, u, v) \
 978   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
 979            : "=r" ((USItype) (w1)),                                     \
 980              "=r" ((USItype) (w0))                                      \
 981            : "r" ((USItype) (u)),                                       \
 982              "r" ((USItype) (v)))
 983 #define udiv_qrnnd(q, r, n1, n0, d) \
 984   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
 985 "       wr      %%g0,%2,%%y     ! Not a delayed write for sparclite\n"  \
 986 "       tst     %%g0\n"                                                 \
 987 "       divscc  %3,%4,%%g1\n"                                           \
 988 "       divscc  %%g1,%4,%%g1\n"                                         \
 989 "       divscc  %%g1,%4,%%g1\n"                                         \
 990 "       divscc  %%g1,%4,%%g1\n"                                         \
 991 "       divscc  %%g1,%4,%%g1\n"                                         \
 992 "       divscc  %%g1,%4,%%g1\n"                                         \
 993 "       divscc  %%g1,%4,%%g1\n"                                         \
 994 "       divscc  %%g1,%4,%%g1\n"                                         \
 995 "       divscc  %%g1,%4,%%g1\n"                                         \
 996 "       divscc  %%g1,%4,%%g1\n"                                         \
 997 "       divscc  %%g1,%4,%%g1\n"                                         \
 998 "       divscc  %%g1,%4,%%g1\n"                                         \
 999 "       divscc  %%g1,%4,%%g1\n"                                         \
1000 "       divscc  %%g1,%4,%%g1\n"                                         \
1001 "       divscc  %%g1,%4,%%g1\n"                                         \
1002 "       divscc  %%g1,%4,%%g1\n"                                         \
1003 "       divscc  %%g1,%4,%%g1\n"                                         \
1004 "       divscc  %%g1,%4,%%g1\n"                                         \
1005 "       divscc  %%g1,%4,%%g1\n"                                         \
1006 "       divscc  %%g1,%4,%%g1\n"                                         \
1007 "       divscc  %%g1,%4,%%g1\n"                                         \
1008 "       divscc  %%g1,%4,%%g1\n"                                         \
1009 "       divscc  %%g1,%4,%%g1\n"                                         \
1010 "       divscc  %%g1,%4,%%g1\n"                                         \
1011 "       divscc  %%g1,%4,%%g1\n"                                         \
1012 "       divscc  %%g1,%4,%%g1\n"                                         \
1013 "       divscc  %%g1,%4,%%g1\n"                                         \
1014 "       divscc  %%g1,%4,%%g1\n"                                         \
1015 "       divscc  %%g1,%4,%%g1\n"                                         \
1016 "       divscc  %%g1,%4,%%g1\n"                                         \
1017 "       divscc  %%g1,%4,%%g1\n"                                         \
1018 "       divscc  %%g1,%4,%0\n"                                           \
1019 "       rd      %%y,%1\n"                                               \
1020 "       bl,a 1f\n"                                                      \
1021 "       add     %1,%4,%1\n"                                             \
1022 "1:     ! End of inline udiv_qrnnd"                                     \
1023            : "=r" ((USItype) (q)),                                      \
1024              "=r" ((USItype) (r))                                       \
1025            : "r" ((USItype) (n1)),                                      \
1026              "r" ((USItype) (n0)),                                      \
1027              "rI" ((USItype) (d))                                       \
1028            : "g1" __AND_CLOBBER_CC)
1029 #define UDIV_TIME 37
1030 #define count_leading_zeros(count, x) \
1031   do {                                                                  \
1032   __asm__ ("scan %1,1,%0"                                               \
1033            : "=r" ((USItype) (count))                                   \
1034            : "r" ((USItype) (x)));                                      \
1035   } while (0)
1036 /* Early sparclites return 63 for an argument of 0, but they warn that future
1037    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
1038    undefined.  */
1039 #else
1040 /* SPARC without integer multiplication and divide instructions.
1041    (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
1042 #define umul_ppmm(w1, w0, u, v) \
1043   __asm__ ("! Inlined umul_ppmm\n"                                      \
1044 "       wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr\n"\
1045 "       sra     %3,31,%%o5      ! Don't move this insn\n"               \
1046 "       and     %2,%%o5,%%o5    ! Don't move this insn\n"               \
1047 "       andcc   %%g0,0,%%g1     ! Don't move this insn\n"               \
1048 "       mulscc  %%g1,%3,%%g1\n"                                         \
1049 "       mulscc  %%g1,%3,%%g1\n"                                         \
1050 "       mulscc  %%g1,%3,%%g1\n"                                         \
1051 "       mulscc  %%g1,%3,%%g1\n"                                         \
1052 "       mulscc  %%g1,%3,%%g1\n"                                         \
1053 "       mulscc  %%g1,%3,%%g1\n"                                         \
1054 "       mulscc  %%g1,%3,%%g1\n"                                         \
1055 "       mulscc  %%g1,%3,%%g1\n"                                         \
1056 "       mulscc  %%g1,%3,%%g1\n"                                         \
1057 "       mulscc  %%g1,%3,%%g1\n"                                         \
1058 "       mulscc  %%g1,%3,%%g1\n"                                         \
1059 "       mulscc  %%g1,%3,%%g1\n"                                         \
1060 "       mulscc  %%g1,%3,%%g1\n"                                         \
1061 "       mulscc  %%g1,%3,%%g1\n"                                         \
1062 "       mulscc  %%g1,%3,%%g1\n"                                         \
1063 "       mulscc  %%g1,%3,%%g1\n"                                         \
1064 "       mulscc  %%g1,%3,%%g1\n"                                         \
1065 "       mulscc  %%g1,%3,%%g1\n"                                         \
1066 "       mulscc  %%g1,%3,%%g1\n"                                         \
1067 "       mulscc  %%g1,%3,%%g1\n"                                         \
1068 "       mulscc  %%g1,%3,%%g1\n"                                         \
1069 "       mulscc  %%g1,%3,%%g1\n"                                         \
1070 "       mulscc  %%g1,%3,%%g1\n"                                         \
1071 "       mulscc  %%g1,%3,%%g1\n"                                         \
1072 "       mulscc  %%g1,%3,%%g1\n"                                         \
1073 "       mulscc  %%g1,%3,%%g1\n"                                         \
1074 "       mulscc  %%g1,%3,%%g1\n"                                         \
1075 "       mulscc  %%g1,%3,%%g1\n"                                         \
1076 "       mulscc  %%g1,%3,%%g1\n"                                         \
1077 "       mulscc  %%g1,%3,%%g1\n"                                         \
1078 "       mulscc  %%g1,%3,%%g1\n"                                         \
1079 "       mulscc  %%g1,%3,%%g1\n"                                         \
1080 "       mulscc  %%g1,0,%%g1\n"                                          \
1081 "       add     %%g1,%%o5,%0\n"                                         \
1082 "       rd      %%y,%1"                                                 \
1083            : "=r" ((USItype) (w1)),                                     \
1084              "=r" ((USItype) (w0))                                      \
1085            : "%rI" ((USItype) (u)),                                     \
1086              "r" ((USItype) (v))                                                \
1087            : "g1", "o5" __AND_CLOBBER_CC)
1088 #define UMUL_TIME 39            /* 39 instructions */
1089 /* It's quite necessary to add this much assembler for the sparc.
1090    The default udiv_qrnnd (in C) is more than 10 times slower!  */
1091 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
1092   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
1093 "       mov     32,%%g1\n"                                              \
1094 "       subcc   %1,%2,%%g0\n"                                           \
1095 "1:     bcs     5f\n"                                                   \
1096 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1097 "       sub     %1,%2,%1        ! this kills msb of n\n"                \
1098 "       addx    %1,%1,%1        ! so this can't give carry\n"           \
1099 "       subcc   %%g1,1,%%g1\n"                                          \
1100 "2:     bne     1b\n"                                                   \
1101 "        subcc  %1,%2,%%g0\n"                                           \
1102 "       bcs     3f\n"                                                   \
1103 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1104 "       b       3f\n"                                                   \
1105 "        sub    %1,%2,%1        ! this kills msb of n\n"                \
1106 "4:     sub     %1,%2,%1\n"                                             \
1107 "5:     addxcc  %1,%1,%1\n"                                             \
1108 "       bcc     2b\n"                                                   \
1109 "        subcc  %%g1,1,%%g1\n"                                          \
1110 "! Got carry from n.  Subtract next step to cancel this carry.\n"       \
1111 "       bne     4b\n"                                                   \
1112 "        addcc  %0,%0,%0        ! shift n1n0 and a 0-bit in lsb\n"      \
1113 "       sub     %1,%2,%1\n"                                             \
1114 "3:     xnor    %0,0,%0\n"                                              \
1115 "       ! End of inline udiv_qrnnd"                                     \
1116            : "=&r" ((USItype) (__q)),                                   \
1117              "=&r" ((USItype) (__r))                                    \
1118            : "r" ((USItype) (__d)),                                     \
1119              "1" ((USItype) (__n1)),                                    \
1120              "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
1121 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations.  */
1122 #endif /* __sparclite__ */
1123 #endif /* __sparc_v8__ */
1124 #endif /* sparc32 */
1125
1126 #if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \
1127     && W_TYPE_SIZE == 64
1128 #define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
1129   __asm__ ("addcc %r4,%5,%1\n\t"                                        \
1130            "add %r2,%3,%0\n\t"                                          \
1131            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1132            "add %0, 1, %0\n"                                            \
1133            "1:"                                                         \
1134            : "=r" ((UDItype)(sh)),                                      \
1135              "=&r" ((UDItype)(sl))                                      \
1136            : "%rJ" ((UDItype)(ah)),                                     \
1137              "rI" ((UDItype)(bh)),                                      \
1138              "%rJ" ((UDItype)(al)),                                     \
1139              "rI" ((UDItype)(bl))                                       \
1140            __CLOBBER_CC)
1141
1142 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
1143   __asm__ ("subcc %r4,%5,%1\n\t"                                        \
1144            "sub %r2,%3,%0\n\t"                                          \
1145            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1146            "sub %0, 1, %0\n\t"                                          \
1147            "1:"                                                         \
1148            : "=r" ((UDItype)(sh)),                                      \
1149              "=&r" ((UDItype)(sl))                                      \
1150            : "rJ" ((UDItype)(ah)),                                      \
1151              "rI" ((UDItype)(bh)),                                      \
1152              "rJ" ((UDItype)(al)),                                      \
1153              "rI" ((UDItype)(bl))                                       \
1154            __CLOBBER_CC)
1155
1156 #define umul_ppmm(wh, wl, u, v)                                         \
1157   do {                                                                  \
1158           UDItype tmp1, tmp2, tmp3, tmp4;                               \
1159           __asm__ __volatile__ (                                        \
1160                    "srl %7,0,%3\n\t"                                    \
1161                    "mulx %3,%6,%1\n\t"                                  \
1162                    "srlx %6,32,%2\n\t"                                  \
1163                    "mulx %2,%3,%4\n\t"                                  \
1164                    "sllx %4,32,%5\n\t"                                  \
1165                    "srl %6,0,%3\n\t"                                    \
1166                    "sub %1,%5,%5\n\t"                                   \
1167                    "srlx %5,32,%5\n\t"                                  \
1168                    "addcc %4,%5,%4\n\t"                                 \
1169                    "srlx %7,32,%5\n\t"                                  \
1170                    "mulx %3,%5,%3\n\t"                                  \
1171                    "mulx %2,%5,%5\n\t"                                  \
1172                    "sethi %%hi(0x80000000),%2\n\t"                      \
1173                    "addcc %4,%3,%4\n\t"                                 \
1174                    "srlx %4,32,%4\n\t"                                  \
1175                    "add %2,%2,%2\n\t"                                   \
1176                    "movcc %%xcc,%%g0,%2\n\t"                            \
1177                    "addcc %5,%4,%5\n\t"                                 \
1178                    "sllx %3,32,%3\n\t"                                  \
1179                    "add %1,%3,%1\n\t"                                   \
1180                    "add %5,%2,%0"                                       \
1181            : "=r" ((UDItype)(wh)),                                      \
1182              "=&r" ((UDItype)(wl)),                                     \
1183              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)     \
1184            : "r" ((UDItype)(u)),                                        \
1185              "r" ((UDItype)(v))                                         \
1186            __CLOBBER_CC);                                               \
1187   } while (0)
1188 #define UMUL_TIME 96
1189 #define UDIV_TIME 230
1190 #endif /* sparc64 */
1191
1192 #if defined (__vax__) && W_TYPE_SIZE == 32
1193 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1194   __asm__ ("addl2 %5,%1\n\tadwc %3,%0"                                  \
1195            : "=g" ((USItype) (sh)),                                     \
1196              "=&g" ((USItype) (sl))                                     \
1197            : "%0" ((USItype) (ah)),                                     \
1198              "g" ((USItype) (bh)),                                      \
1199              "%1" ((USItype) (al)),                                     \
1200              "g" ((USItype) (bl)))
1201 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1202   __asm__ ("subl2 %5,%1\n\tsbwc %3,%0"                                  \
1203            : "=g" ((USItype) (sh)),                                     \
1204              "=&g" ((USItype) (sl))                                     \
1205            : "0" ((USItype) (ah)),                                      \
1206              "g" ((USItype) (bh)),                                      \
1207              "1" ((USItype) (al)),                                      \
1208              "g" ((USItype) (bl)))
1209 #define umul_ppmm(xh, xl, m0, m1) \
1210   do {                                                                  \
1211     union {                                                             \
1212         UDItype __ll;                                                   \
1213         struct {USItype __l, __h;} __i;                                 \
1214       } __xx;                                                           \
1215     USItype __m0 = (m0), __m1 = (m1);                                   \
1216     __asm__ ("emul %1,%2,$0,%0"                                         \
1217              : "=r" (__xx.__ll)                                         \
1218              : "g" (__m0),                                              \
1219                "g" (__m1));                                             \
1220     (xh) = __xx.__i.__h;                                                \
1221     (xl) = __xx.__i.__l;                                                \
1222     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1223              + (((SItype) __m1 >> 31) & __m0));                         \
1224   } while (0)
1225 #define sdiv_qrnnd(q, r, n1, n0, d) \
1226   do {                                                                  \
1227     union {DItype __ll;                                                 \
1228            struct {SItype __l, __h;} __i;                               \
1229           } __xx;                                                       \
1230     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1231     __asm__ ("ediv %3,%2,%0,%1"                                         \
1232              : "=g" (q), "=g" (r)                                       \
1233              : "g" (__xx.__ll), "g" (d));                               \
1234   } while (0)
1235 #endif /* __vax__ */
1236
1237 #if defined (__xtensa__) && W_TYPE_SIZE == 32
1238 /* This code is not Xtensa-configuration-specific, so rely on the compiler
1239    to expand builtin functions depending on what configuration features
1240    are available.  This avoids library calls when the operation can be
1241    performed in-line.  */
1242 #define umul_ppmm(w1, w0, u, v)                                         \
1243   do {                                                                  \
1244     DWunion __w;                                                        \
1245     __w.ll = __builtin_umulsidi3 (u, v);                                \
1246     w1 = __w.s.high;                                                    \
1247     w0 = __w.s.low;                                                     \
1248   } while (0)
1249 #define __umulsidi3(u, v)               __builtin_umulsidi3 (u, v)
1250 #define count_leading_zeros(COUNT, X)   ((COUNT) = __builtin_clz (X))
1251 #define count_trailing_zeros(COUNT, X)  ((COUNT) = __builtin_ctz (X))
1252 #endif /* __xtensa__ */
1253
1254 #if defined (__z8000__) && W_TYPE_SIZE == 16
1255 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1256   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1257            : "=r" ((unsigned int)(sh)),                                 \
1258              "=&r" ((unsigned int)(sl))                                 \
1259            : "%0" ((unsigned int)(ah)),                                 \
1260              "r" ((unsigned int)(bh)),                                  \
1261              "%1" ((unsigned int)(al)),                                 \
1262              "rQR" ((unsigned int)(bl)))
1263 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1264   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1265            : "=r" ((unsigned int)(sh)),                                 \
1266              "=&r" ((unsigned int)(sl))                                 \
1267            : "0" ((unsigned int)(ah)),                                  \
1268              "r" ((unsigned int)(bh)),                                  \
1269              "1" ((unsigned int)(al)),                                  \
1270              "rQR" ((unsigned int)(bl)))
1271 #define umul_ppmm(xh, xl, m0, m1) \
1272   do {                                                                  \
1273     union {long int __ll;                                               \
1274            struct {unsigned int __h, __l;} __i;                         \
1275           } __xx;                                                       \
1276     unsigned int __m0 = (m0), __m1 = (m1);                              \
1277     __asm__ ("mult      %S0,%H3"                                        \
1278              : "=r" (__xx.__i.__h),                                     \
1279                "=r" (__xx.__i.__l)                                      \
1280              : "%1" (__m0),                                             \
1281                "rQR" (__m1));                                           \
1282     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1283     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1284              + (((signed int) __m1 >> 15) & __m0));                     \
1285   } while (0)
1286 #endif /* __z8000__ */
1287
1288 #endif /* __GNUC__ */
1289
1290 /* If this machine has no inline assembler, use C macros.  */
1291
1292 #if !defined (add_ssaaaa)
1293 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1294   do {                                                                  \
1295     UWtype __x;                                                         \
1296     __x = (al) + (bl);                                                  \
1297     (sh) = (ah) + (bh) + (__x < (al));                                  \
1298     (sl) = __x;                                                         \
1299   } while (0)
1300 #endif
1301
1302 #if !defined (sub_ddmmss)
1303 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1304   do {                                                                  \
1305     UWtype __x;                                                         \
1306     __x = (al) - (bl);                                                  \
1307     (sh) = (ah) - (bh) - (__x > (al));                                  \
1308     (sl) = __x;                                                         \
1309   } while (0)
1310 #endif
1311
1312 /* If we lack umul_ppmm but have smul_ppmm, define umul_ppmm in terms of
1313    smul_ppmm.  */
1314 #if !defined (umul_ppmm) && defined (smul_ppmm)
1315 #define umul_ppmm(w1, w0, u, v)                                         \
1316   do {                                                                  \
1317     UWtype __w1;                                                        \
1318     UWtype __xm0 = (u), __xm1 = (v);                                    \
1319     smul_ppmm (__w1, w0, __xm0, __xm1);                                 \
1320     (w1) = __w1 + (-(__xm0 >> (W_TYPE_SIZE - 1)) & __xm1)               \
1321                 + (-(__xm1 >> (W_TYPE_SIZE - 1)) & __xm0);              \
1322   } while (0)
1323 #endif
1324
1325 /* If we still don't have umul_ppmm, define it using plain C.  */
1326 #if !defined (umul_ppmm)
1327 #define umul_ppmm(w1, w0, u, v)                                         \
1328   do {                                                                  \
1329     UWtype __x0, __x1, __x2, __x3;                                      \
1330     UHWtype __ul, __vl, __uh, __vh;                                     \
1331                                                                         \
1332     __ul = __ll_lowpart (u);                                            \
1333     __uh = __ll_highpart (u);                                           \
1334     __vl = __ll_lowpart (v);                                            \
1335     __vh = __ll_highpart (v);                                           \
1336                                                                         \
1337     __x0 = (UWtype) __ul * __vl;                                        \
1338     __x1 = (UWtype) __ul * __vh;                                        \
1339     __x2 = (UWtype) __uh * __vl;                                        \
1340     __x3 = (UWtype) __uh * __vh;                                        \
1341                                                                         \
1342     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1343     __x1 += __x2;               /* but this indeed can */               \
1344     if (__x1 < __x2)            /* did we get it? */                    \
1345       __x3 += __ll_B;           /* yes, add it in the proper pos.  */   \
1346                                                                         \
1347     (w1) = __x3 + __ll_highpart (__x1);                                 \
1348     (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);          \
1349   } while (0)
1350 #endif
1351
1352 #if !defined (__umulsidi3)
1353 #define __umulsidi3(u, v) \
1354   ({DWunion __w;                                                        \
1355     umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
1356     __w.ll; })
1357 #endif
1358
1359 /* Define this unconditionally, so it can be used for debugging.  */
1360 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1361   do {                                                                  \
1362     UWtype __d1, __d0, __q1, __q0;                                      \
1363     UWtype __r1, __r0, __m;                                             \
1364     __d1 = __ll_highpart (d);                                           \
1365     __d0 = __ll_lowpart (d);                                            \
1366                                                                         \
1367     __r1 = (n1) % __d1;                                                 \
1368     __q1 = (n1) / __d1;                                                 \
1369     __m = (UWtype) __q1 * __d0;                                         \
1370     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1371     if (__r1 < __m)                                                     \
1372       {                                                                 \
1373         __q1--, __r1 += (d);                                            \
1374         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1375           if (__r1 < __m)                                               \
1376             __q1--, __r1 += (d);                                        \
1377       }                                                                 \
1378     __r1 -= __m;                                                        \
1379                                                                         \
1380     __r0 = __r1 % __d1;                                                 \
1381     __q0 = __r1 / __d1;                                                 \
1382     __m = (UWtype) __q0 * __d0;                                         \
1383     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1384     if (__r0 < __m)                                                     \
1385       {                                                                 \
1386         __q0--, __r0 += (d);                                            \
1387         if (__r0 >= (d))                                                \
1388           if (__r0 < __m)                                               \
1389             __q0--, __r0 += (d);                                        \
1390       }                                                                 \
1391     __r0 -= __m;                                                        \
1392                                                                         \
1393     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1394     (r) = __r0;                                                         \
1395   } while (0)
1396
1397 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1398    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1399 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1400 #define udiv_qrnnd(q, r, nh, nl, d) \
1401   do {                                                                  \
1402     USItype __r;                                                        \
1403     (q) = __udiv_w_sdiv (&__r, nh, nl, d);                              \
1404     (r) = __r;                                                          \
1405   } while (0)
1406 #endif
1407
1408 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1409 #if !defined (udiv_qrnnd)
1410 #define UDIV_NEEDS_NORMALIZATION 1
1411 #define udiv_qrnnd __udiv_qrnnd_c
1412 #endif
1413
1414 #if !defined (count_leading_zeros)
1415 #define count_leading_zeros(count, x) \
1416   do {                                                                  \
1417     UWtype __xr = (x);                                                  \
1418     UWtype __a;                                                         \
1419                                                                         \
1420     if (W_TYPE_SIZE <= 32)                                              \
1421       {                                                                 \
1422         __a = __xr < ((UWtype)1<<2*__BITS4)                             \
1423           ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4)                 \
1424           : (__xr < ((UWtype)1<<3*__BITS4) ?  2*__BITS4 : 3*__BITS4);   \
1425       }                                                                 \
1426     else                                                                \
1427       {                                                                 \
1428         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1429           if (((__xr >> __a) & 0xff) != 0)                              \
1430             break;                                                      \
1431       }                                                                 \
1432                                                                         \
1433     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1434   } while (0)
1435 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1436 #endif
1437
1438 #if !defined (count_trailing_zeros)
1439 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1440    defined in asm, but if it is not, the C version above is good enough.  */
1441 #define count_trailing_zeros(count, x) \
1442   do {                                                                  \
1443     UWtype __ctz_x = (x);                                               \
1444     UWtype __ctz_c;                                                     \
1445     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1446     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1447   } while (0)
1448 #endif
1449
1450 #ifndef UDIV_NEEDS_NORMALIZATION
1451 #define UDIV_NEEDS_NORMALIZATION 0
1452 #endif