gcc/longlong.h

   1 /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
   2    Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2004,
   3    2005  Free Software Foundation, Inc.
   4
   5    This definition file is free software; you can redistribute it
   6    and/or modify it under the terms of the GNU General Public
   7    License as published by the Free Software Foundation; either
   8    version 2, or (at your option) any later version.
   9
  10    This definition file is distributed in the hope that it will be
  11    useful, but WITHOUT ANY WARRANTY; without even the implied
  12    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13    See the GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with this program; if not, write to the Free Software
  17    Foundation, Inc., 51 Franklin Street, Fifth Floor,
  18    Boston, MA 02110-1301, USA.  */
  19
  20 /* You have to define the following before including this file:
  21
  22    UWtype -- An unsigned type, default type for operations (typically a "word")
  23    UHWtype -- An unsigned type, at least half the size of UWtype.
  24    UDWtype -- An unsigned type, at least twice as large a UWtype
  25    W_TYPE_SIZE -- size in bits of UWtype
  26
  27    UQItype -- Unsigned 8 bit type.
  28    SItype, USItype -- Signed and unsigned 32 bit types.
  29    DItype, UDItype -- Signed and unsigned 64 bit types.
  30
  31    On a 32 bit machine UWtype should typically be USItype;
  32    on a 64 bit machine, UWtype should typically be UDItype.  */
  33
  34 #define __BITS4 (W_TYPE_SIZE / 4)
  35 #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
  36 #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
  37 #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
  38
  39 #ifndef W_TYPE_SIZE
  40 #define W_TYPE_SIZE     32
  41 #define UWtype          USItype
  42 #define UHWtype         USItype
  43 #define UDWtype         UDItype
  44 extern const UQItype __clz_tab[256] ATTRIBUTE_HIDDEN;
  45 #endif
  46
  47 /* Define auxiliary asm macros.
  48
  49    1) umul_ppmm(high_prod, low_prod, multiplier, multiplicand) multiplies two
  50    UWtype integers MULTIPLIER and MULTIPLICAND, and generates a two UWtype
  51    word product in HIGH_PROD and LOW_PROD.
  52
  53    2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
  54    UDWtype product.  This is just a variant of umul_ppmm.
  55
  56    3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  57    denominator) divides a UDWtype, composed by the UWtype integers
  58    HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
  59    in QUOTIENT and the remainder in REMAINDER.  HIGH_NUMERATOR must be less
  60    than DENOMINATOR for correct operation.  If, in addition, the most
  61    significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  62    UDIV_NEEDS_NORMALIZATION is defined to 1.
  63
  64    4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  65    denominator).  Like udiv_qrnnd but the numbers are signed.  The quotient
  66    is rounded towards 0.
  67
  68    5) count_leading_zeros(count, x) counts the number of zero-bits from the
  69    msb to the first nonzero bit in the UWtype X.  This is the number of
  70    steps X needs to be shifted left to set the msb.  Undefined for X == 0,
  71    unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
  72
  73    6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
  74    from the least significant end.
  75
  76    7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
  77    high_addend_2, low_addend_2) adds two UWtype integers, composed by
  78    HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
  79    respectively.  The result is placed in HIGH_SUM and LOW_SUM.  Overflow
  80    (i.e. carry out) is not stored anywhere, and is lost.
  81
  82    8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
  83    high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
  84    composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
  85    LOW_SUBTRAHEND_2 respectively.  The result is placed in HIGH_DIFFERENCE
  86    and LOW_DIFFERENCE.  Overflow (i.e. carry out) is not stored anywhere,
  87    and is lost.
  88
  89    If any of these macros are left undefined for a particular CPU,
  90    C macros are used.  */
  91
  92 /* The CPUs come in alphabetical order below.
  93
  94    Please add support for more CPUs here, or improve the current support
  95    for the CPUs below!
  96    (E.g. WE32100, IBM360.)  */
  97
  98 #if defined (__GNUC__) && !defined (NO_ASM)
  99
 100 /* We sometimes need to clobber "cc" with gcc2, but that would not be
 101    understood by gcc1.  Use cpp to avoid major code duplication.  */
 102 #if __GNUC__ < 2
 103 #define __CLOBBER_CC
 104 #define __AND_CLOBBER_CC
 105 #else /* __GNUC__ >= 2 */
 106 #define __CLOBBER_CC : "cc"
 107 #define __AND_CLOBBER_CC , "cc"
 108 #endif /* __GNUC__ < 2 */
 109
 110 #if defined (__alpha) && W_TYPE_SIZE == 64
 111 #define umul_ppmm(ph, pl, m0, m1) \
 112   do {                                                                  \
 113     UDItype __m0 = (m0), __m1 = (m1);                                   \
 114     (ph) = __builtin_alpha_umulh (__m0, __m1);                          \
 115     (pl) = __m0 * __m1;                                                 \
 116   } while (0)
 117 #define UMUL_TIME 46
 118 #ifndef LONGLONG_STANDALONE
 119 #define udiv_qrnnd(q, r, n1, n0, d) \
 120   do { UDItype __r;                                                     \
 121     (q) = __udiv_qrnnd (&__r, (n1), (n0), (d));                         \
 122     (r) = __r;                                                          \
 123   } while (0)
 124 extern UDItype __udiv_qrnnd (UDItype *, UDItype, UDItype, UDItype);
 125 #define UDIV_TIME 220
 126 #endif /* LONGLONG_STANDALONE */
 127 #ifdef __alpha_cix__
 128 #define count_leading_zeros(COUNT,X)    ((COUNT) = __builtin_clzl (X))
 129 #define count_trailing_zeros(COUNT,X)   ((COUNT) = __builtin_ctzl (X))
 130 #define COUNT_LEADING_ZEROS_0 64
 131 #else
 132 #define count_leading_zeros(COUNT,X) \
 133   do {                                                                  \
 134     UDItype __xr = (X), __t, __a;                                       \
 135     __t = __builtin_alpha_cmpbge (0, __xr);                             \
 136     __a = __clz_tab[__t ^ 0xff] - 1;                                    \
 137     __t = __builtin_alpha_extbl (__xr, __a);                            \
 138     (COUNT) = 64 - (__clz_tab[__t] + __a*8);                            \
 139   } while (0)
 140 #define count_trailing_zeros(COUNT,X) \
 141   do {                                                                  \
 142     UDItype __xr = (X), __t, __a;                                       \
 143     __t = __builtin_alpha_cmpbge (0, __xr);                             \
 144     __t = ~__t & -~__t;                                                 \
 145     __a = ((__t & 0xCC) != 0) * 2;                                      \
 146     __a += ((__t & 0xF0) != 0) * 4;                                     \
 147     __a += ((__t & 0xAA) != 0);                                         \
 148     __t = __builtin_alpha_extbl (__xr, __a);                            \
 149     __a <<= 3;                                                          \
 150     __t &= -__t;                                                        \
 151     __a += ((__t & 0xCC) != 0) * 2;                                     \
 152     __a += ((__t & 0xF0) != 0) * 4;                                     \
 153     __a += ((__t & 0xAA) != 0);                                         \
 154     (COUNT) = __a;                                                      \
 155   } while (0)
 156 #endif /* __alpha_cix__ */
 157 #endif /* __alpha */
 158
 159 #if defined (__arc__) && W_TYPE_SIZE == 32
 160 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 161   __asm__ ("add.f       %1, %4, %5\n\tadc       %0, %2, %3"             \
 162            : "=r" ((USItype) (sh)),                                     \
 163              "=&r" ((USItype) (sl))                                     \
 164            : "%r" ((USItype) (ah)),                                     \
 165              "rIJ" ((USItype) (bh)),                                    \
 166              "%r" ((USItype) (al)),                                     \
 167              "rIJ" ((USItype) (bl)))
 168 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 169   __asm__ ("sub.f       %1, %4, %5\n\tsbc       %0, %2, %3"             \
 170            : "=r" ((USItype) (sh)),                                     \
 171              "=&r" ((USItype) (sl))                                     \
 172            : "r" ((USItype) (ah)),                                      \
 173              "rIJ" ((USItype) (bh)),                                    \
 174              "r" ((USItype) (al)),                                      \
 175              "rIJ" ((USItype) (bl)))
 176 /* Call libgcc routine.  */
 177 #define umul_ppmm(w1, w0, u, v) \
 178 do {                                                                    \
 179   DWunion __w;                                                          \
 180   __w.ll = __umulsidi3 (u, v);                                          \
 181   w1 = __w.s.high;                                                      \
 182   w0 = __w.s.low;                                                       \
 183 } while (0)
 184 #define __umulsidi3 __umulsidi3
 185 UDItype __umulsidi3 (USItype, USItype);
 186 #endif
 187
 188 #if defined (__arm__) && !defined (__thumb__) && W_TYPE_SIZE == 32
 189 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 190   __asm__ ("adds        %1, %4, %5\n\tadc       %0, %2, %3"             \
 191            : "=r" ((USItype) (sh)),                                     \
 192              "=&r" ((USItype) (sl))                                     \
 193            : "%r" ((USItype) (ah)),                                     \
 194              "rI" ((USItype) (bh)),                                     \
 195              "%r" ((USItype) (al)),                                     \
 196              "rI" ((USItype) (bl)))
 197 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 198   __asm__ ("subs        %1, %4, %5\n\tsbc       %0, %2, %3"             \
 199            : "=r" ((USItype) (sh)),                                     \
 200              "=&r" ((USItype) (sl))                                     \
 201            : "r" ((USItype) (ah)),                                      \
 202              "rI" ((USItype) (bh)),                                     \
 203              "r" ((USItype) (al)),                                      \
 204              "rI" ((USItype) (bl)))
 205 #define umul_ppmm(xh, xl, a, b) \
 206 {register USItype __t0, __t1, __t2;                                     \
 207   __asm__ ("%@ Inlined umul_ppmm\n"                                     \
 208            "    mov     %2, %5, lsr #16\n"                              \
 209            "    mov     %0, %6, lsr #16\n"                              \
 210            "    bic     %3, %5, %2, lsl #16\n"                          \
 211            "    bic     %4, %6, %0, lsl #16\n"                          \
 212            "    mul     %1, %3, %4\n"                                   \
 213            "    mul     %4, %2, %4\n"                                   \
 214            "    mul     %3, %0, %3\n"                                   \
 215            "    mul     %0, %2, %0\n"                                   \
 216            "    adds    %3, %4, %3\n"                                   \
 217            "    addcs   %0, %0, #65536\n"                               \
 218            "    adds    %1, %1, %3, lsl #16\n"                          \
 219            "    adc     %0, %0, %3, lsr #16"                            \
 220            : "=&r" ((USItype) (xh)),                                    \
 221              "=r" ((USItype) (xl)),                                     \
 222              "=&r" (__t0), "=&r" (__t1), "=r" (__t2)                    \
 223            : "r" ((USItype) (a)),                                       \
 224              "r" ((USItype) (b)));}
 225 #define UMUL_TIME 20
 226 #define UDIV_TIME 100
 227 #endif /* __arm__ */
 228
 229 #if defined (__hppa) && W_TYPE_SIZE == 32
 230 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 231   __asm__ ("add %4,%5,%1\n\taddc %2,%3,%0"                              \
 232            : "=r" ((USItype) (sh)),                                     \
 233              "=&r" ((USItype) (sl))                                     \
 234            : "%rM" ((USItype) (ah)),                                    \
 235              "rM" ((USItype) (bh)),                                     \
 236              "%rM" ((USItype) (al)),                                    \
 237              "rM" ((USItype) (bl)))
 238 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 239   __asm__ ("sub %4,%5,%1\n\tsubb %2,%3,%0"                              \
 240            : "=r" ((USItype) (sh)),                                     \
 241              "=&r" ((USItype) (sl))                                     \
 242            : "rM" ((USItype) (ah)),                                     \
 243              "rM" ((USItype) (bh)),                                     \
 244              "rM" ((USItype) (al)),                                     \
 245              "rM" ((USItype) (bl)))
 246 #if defined (_PA_RISC1_1)
 247 #define umul_ppmm(w1, w0, u, v) \
 248   do {                                                                  \
 249     union                                                               \
 250       {                                                                 \
 251         UDItype __f;                                                    \
 252         struct {USItype __w1, __w0;} __w1w0;                            \
 253       } __t;                                                            \
 254     __asm__ ("xmpyu %1,%2,%0"                                           \
 255              : "=x" (__t.__f)                                           \
 256              : "x" ((USItype) (u)),                                     \
 257                "x" ((USItype) (v)));                                    \
 258     (w1) = __t.__w1w0.__w1;                                             \
 259     (w0) = __t.__w1w0.__w0;                                             \
 260      } while (0)
 261 #define UMUL_TIME 8
 262 #else
 263 #define UMUL_TIME 30
 264 #endif
 265 #define UDIV_TIME 40
 266 #define count_leading_zeros(count, x) \
 267   do {                                                                  \
 268     USItype __tmp;                                                      \
 269     __asm__ (                                                           \
 270        "ldi             1,%0\n"                                         \
 271 "       extru,=         %1,15,16,%%r0           ; Bits 31..16 zero?\n"  \
 272 "       extru,tr        %1,15,16,%1             ; No.  Shift down, skip add.\n"\
 273 "       ldo             16(%0),%0               ; Yes.  Perform add.\n" \
 274 "       extru,=         %1,23,8,%%r0            ; Bits 15..8 zero?\n"   \
 275 "       extru,tr        %1,23,8,%1              ; No.  Shift down, skip add.\n"\
 276 "       ldo             8(%0),%0                ; Yes.  Perform add.\n" \
 277 "       extru,=         %1,27,4,%%r0            ; Bits 7..4 zero?\n"    \
 278 "       extru,tr        %1,27,4,%1              ; No.  Shift down, skip add.\n"\
 279 "       ldo             4(%0),%0                ; Yes.  Perform add.\n" \
 280 "       extru,=         %1,29,2,%%r0            ; Bits 3..2 zero?\n"    \
 281 "       extru,tr        %1,29,2,%1              ; No.  Shift down, skip add.\n"\
 282 "       ldo             2(%0),%0                ; Yes.  Perform add.\n" \
 283 "       extru           %1,30,1,%1              ; Extract bit 1.\n"     \
 284 "       sub             %0,%1,%0                ; Subtract it.\n"       \
 285         : "=r" (count), "=r" (__tmp) : "1" (x));                        \
 286   } while (0)
 287 #endif
 288
 289 #if (defined (__i370__) || defined (__s390__) || defined (__mvs__)) && W_TYPE_SIZE == 32
 290 #define smul_ppmm(xh, xl, m0, m1) \
 291   do {                                                                  \
 292     union {DItype __ll;                                                 \
 293            struct {USItype __h, __l;} __i;                              \
 294           } __x;                                                        \
 295     __asm__ ("lr %N0,%1\n\tmr %0,%2"                                    \
 296              : "=&r" (__x.__ll)                                         \
 297              : "r" (m0), "r" (m1));                                     \
 298     (xh) = __x.__i.__h; (xl) = __x.__i.__l;                             \
 299   } while (0)
 300 #define sdiv_qrnnd(q, r, n1, n0, d) \
 301   do {                                                                  \
 302     union {DItype __ll;                                                 \
 303            struct {USItype __h, __l;} __i;                              \
 304           } __x;                                                        \
 305     __x.__i.__h = n1; __x.__i.__l = n0;                                 \
 306     __asm__ ("dr %0,%2"                                                 \
 307              : "=r" (__x.__ll)                                          \
 308              : "0" (__x.__ll), "r" (d));                                \
 309     (q) = __x.__i.__l; (r) = __x.__i.__h;                               \
 310   } while (0)
 311 #endif
 312
 313 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
 314 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 315   __asm__ ("addl %5,%1\n\tadcl %3,%0"                                   \
 316            : "=r" ((USItype) (sh)),                                     \
 317              "=&r" ((USItype) (sl))                                     \
 318            : "%0" ((USItype) (ah)),                                     \
 319              "g" ((USItype) (bh)),                                      \
 320              "%1" ((USItype) (al)),                                     \
 321              "g" ((USItype) (bl)))
 322 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 323   __asm__ ("subl %5,%1\n\tsbbl %3,%0"                                   \
 324            : "=r" ((USItype) (sh)),                                     \
 325              "=&r" ((USItype) (sl))                                     \
 326            : "0" ((USItype) (ah)),                                      \
 327              "g" ((USItype) (bh)),                                      \
 328              "1" ((USItype) (al)),                                      \
 329              "g" ((USItype) (bl)))
 330 #define umul_ppmm(w1, w0, u, v) \
 331   __asm__ ("mull %3"                                                    \
 332            : "=a" ((USItype) (w0)),                                     \
 333              "=d" ((USItype) (w1))                                      \
 334            : "%0" ((USItype) (u)),                                      \
 335              "rm" ((USItype) (v)))
 336 #define udiv_qrnnd(q, r, n1, n0, dv) \
 337   __asm__ ("divl %4"                                                    \
 338            : "=a" ((USItype) (q)),                                      \
 339              "=d" ((USItype) (r))                                       \
 340            : "0" ((USItype) (n0)),                                      \
 341              "1" ((USItype) (n1)),                                      \
 342              "rm" ((USItype) (dv)))
 343 #define count_leading_zeros(count, x) \
 344   do {                                                                  \
 345     USItype __cbtmp;                                                    \
 346     __asm__ ("bsrl %1,%0"                                               \
 347              : "=r" (__cbtmp) : "rm" ((USItype) (x)));                  \
 348     (count) = __cbtmp ^ 31;                                             \
 349   } while (0)
 350 #define count_trailing_zeros(count, x) \
 351   __asm__ ("bsfl %1,%0" : "=r" (count) : "rm" ((USItype)(x)))
 352 #define UMUL_TIME 40
 353 #define UDIV_TIME 40
 354 #endif /* 80x86 */
 355
 356 #if defined (__i960__) && W_TYPE_SIZE == 32
 357 #define umul_ppmm(w1, w0, u, v) \
 358   ({union {UDItype __ll;                                                \
 359            struct {USItype __l, __h;} __i;                              \
 360           } __xx;                                                       \
 361   __asm__ ("emul        %2,%1,%0"                                       \
 362            : "=d" (__xx.__ll)                                           \
 363            : "%dI" ((USItype) (u)),                                     \
 364              "dI" ((USItype) (v)));                                     \
 365   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 366 #define __umulsidi3(u, v) \
 367   ({UDItype __w;                                                        \
 368     __asm__ ("emul      %2,%1,%0"                                       \
 369              : "=d" (__w)                                               \
 370              : "%dI" ((USItype) (u)),                                   \
 371                "dI" ((USItype) (v)));                                   \
 372     __w; })
 373 #endif /* __i960__ */
 374
 375 #if defined (__M32R__) && W_TYPE_SIZE == 32
 376 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 377   /* The cmp clears the condition bit.  */ \
 378   __asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3"                      \
 379            : "=r" ((USItype) (sh)),                                     \
 380              "=&r" ((USItype) (sl))                                     \
 381            : "0" ((USItype) (ah)),                                      \
 382              "r" ((USItype) (bh)),                                      \
 383              "1" ((USItype) (al)),                                      \
 384              "r" ((USItype) (bl))                                       \
 385            : "cbit")
 386 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 387   /* The cmp clears the condition bit.  */ \
 388   __asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3"                      \
 389            : "=r" ((USItype) (sh)),                                     \
 390              "=&r" ((USItype) (sl))                                     \
 391            : "0" ((USItype) (ah)),                                      \
 392              "r" ((USItype) (bh)),                                      \
 393              "1" ((USItype) (al)),                                      \
 394              "r" ((USItype) (bl))                                       \
 395            : "cbit")
 396 #endif /* __M32R__ */
 397
 398 #if defined (__mc68000__) && W_TYPE_SIZE == 32
 399 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 400   __asm__ ("add%.l %5,%1\n\taddx%.l %3,%0"                              \
 401            : "=d" ((USItype) (sh)),                                     \
 402              "=&d" ((USItype) (sl))                                     \
 403            : "%0" ((USItype) (ah)),                                     \
 404              "d" ((USItype) (bh)),                                      \
 405              "%1" ((USItype) (al)),                                     \
 406              "g" ((USItype) (bl)))
 407 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 408   __asm__ ("sub%.l %5,%1\n\tsubx%.l %3,%0"                              \
 409            : "=d" ((USItype) (sh)),                                     \
 410              "=&d" ((USItype) (sl))                                     \
 411            : "0" ((USItype) (ah)),                                      \
 412              "d" ((USItype) (bh)),                                      \
 413              "1" ((USItype) (al)),                                      \
 414              "g" ((USItype) (bl)))
 415
 416 /* The '020, '030, '040, '060 and CPU32 have 32x32->64 and 64/32->32q-32r.  */
 417 #if (defined (__mc68020__) && !defined (__mc68060__))
 418 #define umul_ppmm(w1, w0, u, v) \
 419   __asm__ ("mulu%.l %3,%1:%0"                                           \
 420            : "=d" ((USItype) (w0)),                                     \
 421              "=d" ((USItype) (w1))                                      \
 422            : "%0" ((USItype) (u)),                                      \
 423              "dmi" ((USItype) (v)))
 424 #define UMUL_TIME 45
 425 #define udiv_qrnnd(q, r, n1, n0, d) \
 426   __asm__ ("divu%.l %4,%1:%0"                                           \
 427            : "=d" ((USItype) (q)),                                      \
 428              "=d" ((USItype) (r))                                       \
 429            : "0" ((USItype) (n0)),                                      \
 430              "1" ((USItype) (n1)),                                      \
 431              "dmi" ((USItype) (d)))
 432 #define UDIV_TIME 90
 433 #define sdiv_qrnnd(q, r, n1, n0, d) \
 434   __asm__ ("divs%.l %4,%1:%0"                                           \
 435            : "=d" ((USItype) (q)),                                      \
 436              "=d" ((USItype) (r))                                       \
 437            : "0" ((USItype) (n0)),                                      \
 438              "1" ((USItype) (n1)),                                      \
 439              "dmi" ((USItype) (d)))
 440
 441 #elif defined (__mcoldfire__) /* not mc68020 */
 442
 443 #define umul_ppmm(xh, xl, a, b) \
 444   __asm__ ("| Inlined umul_ppmm\n"                                      \
 445            "    move%.l %2,%/d0\n"                                      \
 446            "    move%.l %3,%/d1\n"                                      \
 447            "    move%.l %/d0,%/d2\n"                                    \
 448            "    swap    %/d0\n"                                         \
 449            "    move%.l %/d1,%/d3\n"                                    \
 450            "    swap    %/d1\n"                                         \
 451            "    move%.w %/d2,%/d4\n"                                    \
 452            "    mulu    %/d3,%/d4\n"                                    \
 453            "    mulu    %/d1,%/d2\n"                                    \
 454            "    mulu    %/d0,%/d3\n"                                    \
 455            "    mulu    %/d0,%/d1\n"                                    \
 456            "    move%.l %/d4,%/d0\n"                                    \
 457            "    clr%.w  %/d0\n"                                         \
 458            "    swap    %/d0\n"                                         \
 459            "    add%.l  %/d0,%/d2\n"                                    \
 460            "    add%.l  %/d3,%/d2\n"                                    \
 461            "    jcc     1f\n"                                           \
 462            "    add%.l  %#65536,%/d1\n"                                 \
 463            "1:  swap    %/d2\n"                                         \
 464            "    moveq   %#0,%/d0\n"                                     \
 465            "    move%.w %/d2,%/d0\n"                                    \
 466            "    move%.w %/d4,%/d2\n"                                    \
 467            "    move%.l %/d2,%1\n"                                      \
 468            "    add%.l  %/d1,%/d0\n"                                    \
 469            "    move%.l %/d0,%0"                                        \
 470            : "=g" ((USItype) (xh)),                                     \
 471              "=g" ((USItype) (xl))                                      \
 472            : "g" ((USItype) (a)),                                       \
 473              "g" ((USItype) (b))                                        \
 474            : "d0", "d1", "d2", "d3", "d4")
 475 #define UMUL_TIME 100
 476 #define UDIV_TIME 400
 477 #else /* not ColdFire */
 478 /* %/ inserts REGISTER_PREFIX, %# inserts IMMEDIATE_PREFIX.  */
 479 #define umul_ppmm(xh, xl, a, b) \
 480   __asm__ ("| Inlined umul_ppmm\n"                                      \
 481            "    move%.l %2,%/d0\n"                                      \
 482            "    move%.l %3,%/d1\n"                                      \
 483            "    move%.l %/d0,%/d2\n"                                    \
 484            "    swap    %/d0\n"                                         \
 485            "    move%.l %/d1,%/d3\n"                                    \
 486            "    swap    %/d1\n"                                         \
 487            "    move%.w %/d2,%/d4\n"                                    \
 488            "    mulu    %/d3,%/d4\n"                                    \
 489            "    mulu    %/d1,%/d2\n"                                    \
 490            "    mulu    %/d0,%/d3\n"                                    \
 491            "    mulu    %/d0,%/d1\n"                                    \
 492            "    move%.l %/d4,%/d0\n"                                    \
 493            "    eor%.w  %/d0,%/d0\n"                                    \
 494            "    swap    %/d0\n"                                         \
 495            "    add%.l  %/d0,%/d2\n"                                    \
 496            "    add%.l  %/d3,%/d2\n"                                    \
 497            "    jcc     1f\n"                                           \
 498            "    add%.l  %#65536,%/d1\n"                                 \
 499            "1:  swap    %/d2\n"                                         \
 500            "    moveq   %#0,%/d0\n"                                     \
 501            "    move%.w %/d2,%/d0\n"                                    \
 502            "    move%.w %/d4,%/d2\n"                                    \
 503            "    move%.l %/d2,%1\n"                                      \
 504            "    add%.l  %/d1,%/d0\n"                                    \
 505            "    move%.l %/d0,%0"                                        \
 506            : "=g" ((USItype) (xh)),                                     \
 507              "=g" ((USItype) (xl))                                      \
 508            : "g" ((USItype) (a)),                                       \
 509              "g" ((USItype) (b))                                        \
 510            : "d0", "d1", "d2", "d3", "d4")
 511 #define UMUL_TIME 100
 512 #define UDIV_TIME 400
 513
 514 #endif /* not mc68020 */
 515
 516 /* The '020, '030, '040 and '060 have bitfield insns.
 517    cpu32 disguises as a 68020, but lacks them.  */
 518 #if defined (__mc68020__) && !defined (__mcpu32__)
 519 #define count_leading_zeros(count, x) \
 520   __asm__ ("bfffo %1{%b2:%b2},%0"                                       \
 521            : "=d" ((USItype) (count))                                   \
 522            : "od" ((USItype) (x)), "n" (0))
 523 #endif
 524 #endif /* mc68000 */
 525
 526 #if defined (__m88000__) && W_TYPE_SIZE == 32
 527 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 528   __asm__ ("addu.co %1,%r4,%r5\n\taddu.ci %0,%r2,%r3"                   \
 529            : "=r" ((USItype) (sh)),                                     \
 530              "=&r" ((USItype) (sl))                                     \
 531            : "%rJ" ((USItype) (ah)),                                    \
 532              "rJ" ((USItype) (bh)),                                     \
 533              "%rJ" ((USItype) (al)),                                    \
 534              "rJ" ((USItype) (bl)))
 535 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 536   __asm__ ("subu.co %1,%r4,%r5\n\tsubu.ci %0,%r2,%r3"                   \
 537            : "=r" ((USItype) (sh)),                                     \
 538              "=&r" ((USItype) (sl))                                     \
 539            : "rJ" ((USItype) (ah)),                                     \
 540              "rJ" ((USItype) (bh)),                                     \
 541              "rJ" ((USItype) (al)),                                     \
 542              "rJ" ((USItype) (bl)))
 543 #define count_leading_zeros(count, x) \
 544   do {                                                                  \
 545     USItype __cbtmp;                                                    \
 546     __asm__ ("ff1 %0,%1"                                                \
 547              : "=r" (__cbtmp)                                           \
 548              : "r" ((USItype) (x)));                                    \
 549     (count) = __cbtmp ^ 31;                                             \
 550   } while (0)
 551 #define COUNT_LEADING_ZEROS_0 63 /* sic */
 552 #if defined (__mc88110__)
 553 #define umul_ppmm(wh, wl, u, v) \
 554   do {                                                                  \
 555     union {UDItype __ll;                                                \
 556            struct {USItype __h, __l;} __i;                              \
 557           } __xx;                                                       \
 558     __asm__ ("mulu.d    %0,%1,%2"                                       \
 559              : "=r" (__xx.__ll)                                         \
 560              : "r" ((USItype) (u)),                                     \
 561                "r" ((USItype) (v)));                                    \
 562     (wh) = __xx.__i.__h;                                                \
 563     (wl) = __xx.__i.__l;                                                \
 564   } while (0)
 565 #define udiv_qrnnd(q, r, n1, n0, d) \
 566   ({union {UDItype __ll;                                                \
 567            struct {USItype __h, __l;} __i;                              \
 568           } __xx;                                                       \
 569   USItype __q;                                                          \
 570   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 571   __asm__ ("divu.d %0,%1,%2"                                            \
 572            : "=r" (__q)                                                 \
 573            : "r" (__xx.__ll),                                           \
 574              "r" ((USItype) (d)));                                      \
 575   (r) = (n0) - __q * (d); (q) = __q; })
 576 #define UMUL_TIME 5
 577 #define UDIV_TIME 25
 578 #else
 579 #define UMUL_TIME 17
 580 #define UDIV_TIME 150
 581 #endif /* __mc88110__ */
 582 #endif /* __m88000__ */
 583
 584 #if defined (__mips__) && W_TYPE_SIZE == 32
 585 #define umul_ppmm(w1, w0, u, v) \
 586   __asm__ ("multu %2,%3"                                                \
 587            : "=l" ((USItype) (w0)),                                     \
 588              "=h" ((USItype) (w1))                                      \
 589            : "d" ((USItype) (u)),                                       \
 590              "d" ((USItype) (v)))
 591 #define UMUL_TIME 10
 592 #define UDIV_TIME 100
 593 #endif /* __mips__ */
 594
 595 #if defined (__ns32000__) && W_TYPE_SIZE == 32
 596 #define umul_ppmm(w1, w0, u, v) \
 597   ({union {UDItype __ll;                                                \
 598            struct {USItype __l, __h;} __i;                              \
 599           } __xx;                                                       \
 600   __asm__ ("meid %2,%0"                                                 \
 601            : "=g" (__xx.__ll)                                           \
 602            : "%0" ((USItype) (u)),                                      \
 603              "g" ((USItype) (v)));                                      \
 604   (w1) = __xx.__i.__h; (w0) = __xx.__i.__l;})
 605 #define __umulsidi3(u, v) \
 606   ({UDItype __w;                                                        \
 607     __asm__ ("meid %2,%0"                                               \
 608              : "=g" (__w)                                               \
 609              : "%0" ((USItype) (u)),                                    \
 610                "g" ((USItype) (v)));                                    \
 611     __w; })
 612 #define udiv_qrnnd(q, r, n1, n0, d) \
 613   ({union {UDItype __ll;                                                \
 614            struct {USItype __l, __h;} __i;                              \
 615           } __xx;                                                       \
 616   __xx.__i.__h = (n1); __xx.__i.__l = (n0);                             \
 617   __asm__ ("deid %2,%0"                                                 \
 618            : "=g" (__xx.__ll)                                           \
 619            : "0" (__xx.__ll),                                           \
 620              "g" ((USItype) (d)));                                      \
 621   (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
 622 #define count_trailing_zeros(count,x) \
 623   do {                                                                  \
 624     __asm__ ("ffsd     %2,%0"                                           \
 625             : "=r" ((USItype) (count))                                  \
 626             : "0" ((USItype) 0),                                        \
 627               "r" ((USItype) (x)));                                     \
 628   } while (0)
 629 #endif /* __ns32000__ */
 630
 631 /* FIXME: We should test _IBMR2 here when we add assembly support for the
 632    system vendor compilers.
 633    FIXME: What's needed for gcc PowerPC VxWorks?  __vxworks__ is not good
 634    enough, since that hits ARM and m68k too.  */
 635 #if (defined (_ARCH_PPC)        /* AIX */                               \
 636      || defined (_ARCH_PWR)     /* AIX */                               \
 637      || defined (_ARCH_COM)     /* AIX */                               \
 638      || defined (__powerpc__)   /* gcc */                               \
 639      || defined (__POWERPC__)   /* BEOS */                              \
 640      || defined (__ppc__)       /* Darwin */                            \
 641      || defined (PPC)           /* GNU/Linux, SysV */                   \
 642      ) && W_TYPE_SIZE == 32
 643 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 644   do {                                                                  \
 645     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 646       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 647              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 648     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
 649       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 650              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 651     else                                                                \
 652       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 653              : "=r" (sh), "=&r" (sl)                                    \
 654              : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
 655   } while (0)
 656 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 657   do {                                                                  \
 658     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 659       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 660                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 661     else if (__builtin_constant_p (ah) && (ah) == ~(USItype) 0)         \
 662       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 663                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 664     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 665       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 666                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 667     else if (__builtin_constant_p (bh) && (bh) == ~(USItype) 0)         \
 668       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 669                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 670     else                                                                \
 671       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 672                : "=r" (sh), "=&r" (sl)                                  \
 673                : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
 674   } while (0)
 675 #define count_leading_zeros(count, x) \
 676   __asm__ ("{cntlz|cntlzw} %0,%1" : "=r" (count) : "r" (x))
 677 #define COUNT_LEADING_ZEROS_0 32
 678 #if defined (_ARCH_PPC) || defined (__powerpc__) || defined (__POWERPC__) \
 679   || defined (__ppc__) || defined (PPC)
 680 #define umul_ppmm(ph, pl, m0, m1) \
 681   do {                                                                  \
 682     USItype __m0 = (m0), __m1 = (m1);                                   \
 683     __asm__ ("mulhwu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
 684     (pl) = __m0 * __m1;                                                 \
 685   } while (0)
 686 #define UMUL_TIME 15
 687 #define smul_ppmm(ph, pl, m0, m1) \
 688   do {                                                                  \
 689     SItype __m0 = (m0), __m1 = (m1);                                    \
 690     __asm__ ("mulhw %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));       \
 691     (pl) = __m0 * __m1;                                                 \
 692   } while (0)
 693 #define SMUL_TIME 14
 694 #define UDIV_TIME 120
 695 #elif defined (_ARCH_PWR)
 696 #define UMUL_TIME 8
 697 #define smul_ppmm(xh, xl, m0, m1) \
 698   __asm__ ("mul %0,%2,%3" : "=r" (xh), "=q" (xl) : "r" (m0), "r" (m1))
 699 #define SMUL_TIME 4
 700 #define sdiv_qrnnd(q, r, nh, nl, d) \
 701   __asm__ ("div %0,%2,%4" : "=r" (q), "=q" (r) : "r" (nh), "1" (nl), "r" (d))
 702 #define UDIV_TIME 100
 703 #endif
 704 #endif /* 32-bit POWER architecture variants.  */
 705
 706 /* We should test _IBMR2 here when we add assembly support for the system
 707    vendor compilers.  */
 708 #if (defined (_ARCH_PPC64) || defined (__powerpc64__)) && W_TYPE_SIZE == 64
 709 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 710   do {                                                                  \
 711     if (__builtin_constant_p (bh) && (bh) == 0)                         \
 712       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2"           \
 713              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 714     else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)         \
 715       __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2"           \
 716              : "=r" (sh), "=&r" (sl) : "r" (ah), "%r" (al), "rI" (bl));\
 717     else                                                                \
 718       __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3"          \
 719              : "=r" (sh), "=&r" (sl)                                    \
 720              : "%r" (ah), "r" (bh), "%r" (al), "rI" (bl));              \
 721   } while (0)
 722 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 723   do {                                                                  \
 724     if (__builtin_constant_p (ah) && (ah) == 0)                         \
 725       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2"       \
 726                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 727     else if (__builtin_constant_p (ah) && (ah) == ~(UDItype) 0)         \
 728       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2"       \
 729                : "=r" (sh), "=&r" (sl) : "r" (bh), "rI" (al), "r" (bl));\
 730     else if (__builtin_constant_p (bh) && (bh) == 0)                    \
 731       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2"         \
 732                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 733     else if (__builtin_constant_p (bh) && (bh) == ~(UDItype) 0)         \
 734       __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2"         \
 735                : "=r" (sh), "=&r" (sl) : "r" (ah), "rI" (al), "r" (bl));\
 736     else                                                                \
 737       __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2"      \
 738                : "=r" (sh), "=&r" (sl)                                  \
 739                : "r" (ah), "r" (bh), "rI" (al), "r" (bl));              \
 740   } while (0)
 741 #define count_leading_zeros(count, x) \
 742   __asm__ ("cntlzd %0,%1" : "=r" (count) : "r" (x))
 743 #define COUNT_LEADING_ZEROS_0 64
 744 #define umul_ppmm(ph, pl, m0, m1) \
 745   do {                                                                  \
 746     UDItype __m0 = (m0), __m1 = (m1);                                   \
 747     __asm__ ("mulhdu %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));      \
 748     (pl) = __m0 * __m1;                                                 \
 749   } while (0)
 750 #define UMUL_TIME 15
 751 #define smul_ppmm(ph, pl, m0, m1) \
 752   do {                                                                  \
 753     DItype __m0 = (m0), __m1 = (m1);                                    \
 754     __asm__ ("mulhd %0,%1,%2" : "=r" (ph) : "%r" (m0), "r" (m1));       \
 755     (pl) = __m0 * __m1;                                                 \
 756   } while (0)
 757 #define SMUL_TIME 14  /* ??? */
 758 #define UDIV_TIME 120 /* ??? */
 759 #endif /* 64-bit PowerPC.  */
 760
 761 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
 762 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 763   __asm__ ("a %1,%5\n\tae %0,%3"                                        \
 764            : "=r" ((USItype) (sh)),                                     \
 765              "=&r" ((USItype) (sl))                                     \
 766            : "%0" ((USItype) (ah)),                                     \
 767              "r" ((USItype) (bh)),                                      \
 768              "%1" ((USItype) (al)),                                     \
 769              "r" ((USItype) (bl)))
 770 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 771   __asm__ ("s %1,%5\n\tse %0,%3"                                        \
 772            : "=r" ((USItype) (sh)),                                     \
 773              "=&r" ((USItype) (sl))                                     \
 774            : "0" ((USItype) (ah)),                                      \
 775              "r" ((USItype) (bh)),                                      \
 776              "1" ((USItype) (al)),                                      \
 777              "r" ((USItype) (bl)))
 778 #define umul_ppmm(ph, pl, m0, m1) \
 779   do {                                                                  \
 780     USItype __m0 = (m0), __m1 = (m1);                                   \
 781     __asm__ (                                                           \
 782        "s       r2,r2\n"                                                \
 783 "       mts     r10,%2\n"                                               \
 784 "       m       r2,%3\n"                                                \
 785 "       m       r2,%3\n"                                                \
 786 "       m       r2,%3\n"                                                \
 787 "       m       r2,%3\n"                                                \
 788 "       m       r2,%3\n"                                                \
 789 "       m       r2,%3\n"                                                \
 790 "       m       r2,%3\n"                                                \
 791 "       m       r2,%3\n"                                                \
 792 "       m       r2,%3\n"                                                \
 793 "       m       r2,%3\n"                                                \
 794 "       m       r2,%3\n"                                                \
 795 "       m       r2,%3\n"                                                \
 796 "       m       r2,%3\n"                                                \
 797 "       m       r2,%3\n"                                                \
 798 "       m       r2,%3\n"                                                \
 799 "       m       r2,%3\n"                                                \
 800 "       cas     %0,r2,r0\n"                                             \
 801 "       mfs     r10,%1"                                                 \
 802              : "=r" ((USItype) (ph)),                                   \
 803                "=r" ((USItype) (pl))                                    \
 804              : "%r" (__m0),                                             \
 805                 "r" (__m1)                                              \
 806              : "r2");                                                   \
 807     (ph) += ((((SItype) __m0 >> 31) & __m1)                             \
 808              + (((SItype) __m1 >> 31) & __m0));                         \
 809   } while (0)
 810 #define UMUL_TIME 20
 811 #define UDIV_TIME 200
 812 #define count_leading_zeros(count, x) \
 813   do {                                                                  \
 814     if ((x) >= 0x10000)                                                 \
 815       __asm__ ("clz     %0,%1"                                          \
 816                : "=r" ((USItype) (count))                               \
 817                : "r" ((USItype) (x) >> 16));                            \
 818     else                                                                \
 819       {                                                                 \
 820         __asm__ ("clz   %0,%1"                                          \
 821                  : "=r" ((USItype) (count))                             \
 822                  : "r" ((USItype) (x)));                                        \
 823         (count) += 16;                                                  \
 824       }                                                                 \
 825   } while (0)
 826 #endif
 827
 828 #if defined (__sh2__) && W_TYPE_SIZE == 32
 829 #define umul_ppmm(w1, w0, u, v) \
 830   __asm__ (                                                             \
 831        "dmulu.l %2,%3\n\tsts    macl,%1\n\tsts  mach,%0"                \
 832            : "=r" ((USItype)(w1)),                                      \
 833              "=r" ((USItype)(w0))                                       \
 834            : "r" ((USItype)(u)),                                        \
 835              "r" ((USItype)(v))                                         \
 836            : "macl", "mach")
 837 #define UMUL_TIME 5
 838 #endif
 839
 840 #if defined (__SH5__) && __SHMEDIA__ && W_TYPE_SIZE == 32
 841 #define __umulsidi3(u,v) ((UDItype)(USItype)u*(USItype)v)
 842 #define count_leading_zeros(count, x) \
 843   do                                                                    \
 844     {                                                                   \
 845       UDItype x_ = (USItype)(x);                                        \
 846       SItype c_;                                                        \
 847                                                                         \
 848       __asm__ ("nsb %1, %0" : "=r" (c_) : "r" (x_));                    \
 849       (count) = c_ - 31;                                                \
 850     }                                                                   \
 851   while (0)
 852 #define COUNT_LEADING_ZEROS_0 32
 853 #endif
 854
 855 #if defined (__sparc__) && !defined (__arch64__) && !defined (__sparcv9) \
 856     && W_TYPE_SIZE == 32
 857 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
 858   __asm__ ("addcc %r4,%5,%1\n\taddx %r2,%3,%0"                          \
 859            : "=r" ((USItype) (sh)),                                     \
 860              "=&r" ((USItype) (sl))                                     \
 861            : "%rJ" ((USItype) (ah)),                                    \
 862              "rI" ((USItype) (bh)),                                     \
 863              "%rJ" ((USItype) (al)),                                    \
 864              "rI" ((USItype) (bl))                                      \
 865            __CLOBBER_CC)
 866 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
 867   __asm__ ("subcc %r4,%5,%1\n\tsubx %r2,%3,%0"                          \
 868            : "=r" ((USItype) (sh)),                                     \
 869              "=&r" ((USItype) (sl))                                     \
 870            : "rJ" ((USItype) (ah)),                                     \
 871              "rI" ((USItype) (bh)),                                     \
 872              "rJ" ((USItype) (al)),                                     \
 873              "rI" ((USItype) (bl))                                      \
 874            __CLOBBER_CC)
 875 #if defined (__sparc_v8__)
 876 #define umul_ppmm(w1, w0, u, v) \
 877   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
 878            : "=r" ((USItype) (w1)),                                     \
 879              "=r" ((USItype) (w0))                                      \
 880            : "r" ((USItype) (u)),                                       \
 881              "r" ((USItype) (v)))
 882 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
 883   __asm__ ("mov %2,%%y;nop;nop;nop;udiv %3,%4,%0;umul %0,%4,%1;sub %3,%1,%1"\
 884            : "=&r" ((USItype) (__q)),                                   \
 885              "=&r" ((USItype) (__r))                                    \
 886            : "r" ((USItype) (__n1)),                                    \
 887              "r" ((USItype) (__n0)),                                    \
 888              "r" ((USItype) (__d)))
 889 #else
 890 #if defined (__sparclite__)
 891 /* This has hardware multiply but not divide.  It also has two additional
 892    instructions scan (ffs from high bit) and divscc.  */
 893 #define umul_ppmm(w1, w0, u, v) \
 894   __asm__ ("umul %2,%3,%1;rd %%y,%0"                                    \
 895            : "=r" ((USItype) (w1)),                                     \
 896              "=r" ((USItype) (w0))                                      \
 897            : "r" ((USItype) (u)),                                       \
 898              "r" ((USItype) (v)))
 899 #define udiv_qrnnd(q, r, n1, n0, d) \
 900   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
 901 "       wr      %%g0,%2,%%y     ! Not a delayed write for sparclite\n"  \
 902 "       tst     %%g0\n"                                                 \
 903 "       divscc  %3,%4,%%g1\n"                                           \
 904 "       divscc  %%g1,%4,%%g1\n"                                         \
 905 "       divscc  %%g1,%4,%%g1\n"                                         \
 906 "       divscc  %%g1,%4,%%g1\n"                                         \
 907 "       divscc  %%g1,%4,%%g1\n"                                         \
 908 "       divscc  %%g1,%4,%%g1\n"                                         \
 909 "       divscc  %%g1,%4,%%g1\n"                                         \
 910 "       divscc  %%g1,%4,%%g1\n"                                         \
 911 "       divscc  %%g1,%4,%%g1\n"                                         \
 912 "       divscc  %%g1,%4,%%g1\n"                                         \
 913 "       divscc  %%g1,%4,%%g1\n"                                         \
 914 "       divscc  %%g1,%4,%%g1\n"                                         \
 915 "       divscc  %%g1,%4,%%g1\n"                                         \
 916 "       divscc  %%g1,%4,%%g1\n"                                         \
 917 "       divscc  %%g1,%4,%%g1\n"                                         \
 918 "       divscc  %%g1,%4,%%g1\n"                                         \
 919 "       divscc  %%g1,%4,%%g1\n"                                         \
 920 "       divscc  %%g1,%4,%%g1\n"                                         \
 921 "       divscc  %%g1,%4,%%g1\n"                                         \
 922 "       divscc  %%g1,%4,%%g1\n"                                         \
 923 "       divscc  %%g1,%4,%%g1\n"                                         \
 924 "       divscc  %%g1,%4,%%g1\n"                                         \
 925 "       divscc  %%g1,%4,%%g1\n"                                         \
 926 "       divscc  %%g1,%4,%%g1\n"                                         \
 927 "       divscc  %%g1,%4,%%g1\n"                                         \
 928 "       divscc  %%g1,%4,%%g1\n"                                         \
 929 "       divscc  %%g1,%4,%%g1\n"                                         \
 930 "       divscc  %%g1,%4,%%g1\n"                                         \
 931 "       divscc  %%g1,%4,%%g1\n"                                         \
 932 "       divscc  %%g1,%4,%%g1\n"                                         \
 933 "       divscc  %%g1,%4,%%g1\n"                                         \
 934 "       divscc  %%g1,%4,%0\n"                                           \
 935 "       rd      %%y,%1\n"                                               \
 936 "       bl,a 1f\n"                                                      \
 937 "       add     %1,%4,%1\n"                                             \
 938 "1:     ! End of inline udiv_qrnnd"                                     \
 939            : "=r" ((USItype) (q)),                                      \
 940              "=r" ((USItype) (r))                                       \
 941            : "r" ((USItype) (n1)),                                      \
 942              "r" ((USItype) (n0)),                                      \
 943              "rI" ((USItype) (d))                                       \
 944            : "g1" __AND_CLOBBER_CC)
 945 #define UDIV_TIME 37
 946 #define count_leading_zeros(count, x) \
 947   do {                                                                  \
 948   __asm__ ("scan %1,1,%0"                                               \
 949            : "=r" ((USItype) (count))                                   \
 950            : "r" ((USItype) (x)));                                      \
 951   } while (0)
 952 /* Early sparclites return 63 for an argument of 0, but they warn that future
 953    implementations might change this.  Therefore, leave COUNT_LEADING_ZEROS_0
 954    undefined.  */
 955 #else
 956 /* SPARC without integer multiplication and divide instructions.
 957    (i.e. at least Sun4/20,40,60,65,75,110,260,280,330,360,380,470,490) */
 958 #define umul_ppmm(w1, w0, u, v) \
 959   __asm__ ("! Inlined umul_ppmm\n"                                      \
 960 "       wr      %%g0,%2,%%y     ! SPARC has 0-3 delay insn after a wr\n"\
 961 "       sra     %3,31,%%o5      ! Don't move this insn\n"               \
 962 "       and     %2,%%o5,%%o5    ! Don't move this insn\n"               \
 963 "       andcc   %%g0,0,%%g1     ! Don't move this insn\n"               \
 964 "       mulscc  %%g1,%3,%%g1\n"                                         \
 965 "       mulscc  %%g1,%3,%%g1\n"                                         \
 966 "       mulscc  %%g1,%3,%%g1\n"                                         \
 967 "       mulscc  %%g1,%3,%%g1\n"                                         \
 968 "       mulscc  %%g1,%3,%%g1\n"                                         \
 969 "       mulscc  %%g1,%3,%%g1\n"                                         \
 970 "       mulscc  %%g1,%3,%%g1\n"                                         \
 971 "       mulscc  %%g1,%3,%%g1\n"                                         \
 972 "       mulscc  %%g1,%3,%%g1\n"                                         \
 973 "       mulscc  %%g1,%3,%%g1\n"                                         \
 974 "       mulscc  %%g1,%3,%%g1\n"                                         \
 975 "       mulscc  %%g1,%3,%%g1\n"                                         \
 976 "       mulscc  %%g1,%3,%%g1\n"                                         \
 977 "       mulscc  %%g1,%3,%%g1\n"                                         \
 978 "       mulscc  %%g1,%3,%%g1\n"                                         \
 979 "       mulscc  %%g1,%3,%%g1\n"                                         \
 980 "       mulscc  %%g1,%3,%%g1\n"                                         \
 981 "       mulscc  %%g1,%3,%%g1\n"                                         \
 982 "       mulscc  %%g1,%3,%%g1\n"                                         \
 983 "       mulscc  %%g1,%3,%%g1\n"                                         \
 984 "       mulscc  %%g1,%3,%%g1\n"                                         \
 985 "       mulscc  %%g1,%3,%%g1\n"                                         \
 986 "       mulscc  %%g1,%3,%%g1\n"                                         \
 987 "       mulscc  %%g1,%3,%%g1\n"                                         \
 988 "       mulscc  %%g1,%3,%%g1\n"                                         \
 989 "       mulscc  %%g1,%3,%%g1\n"                                         \
 990 "       mulscc  %%g1,%3,%%g1\n"                                         \
 991 "       mulscc  %%g1,%3,%%g1\n"                                         \
 992 "       mulscc  %%g1,%3,%%g1\n"                                         \
 993 "       mulscc  %%g1,%3,%%g1\n"                                         \
 994 "       mulscc  %%g1,%3,%%g1\n"                                         \
 995 "       mulscc  %%g1,%3,%%g1\n"                                         \
 996 "       mulscc  %%g1,0,%%g1\n"                                          \
 997 "       add     %%g1,%%o5,%0\n"                                         \
 998 "       rd      %%y,%1"                                                 \
 999            : "=r" ((USItype) (w1)),                                     \
1000              "=r" ((USItype) (w0))                                      \
1001            : "%rI" ((USItype) (u)),                                     \
1002              "r" ((USItype) (v))                                                \
1003            : "g1", "o5" __AND_CLOBBER_CC)
1004 #define UMUL_TIME 39            /* 39 instructions */
1005 /* It's quite necessary to add this much assembler for the sparc.
1006    The default udiv_qrnnd (in C) is more than 10 times slower!  */
1007 #define udiv_qrnnd(__q, __r, __n1, __n0, __d) \
1008   __asm__ ("! Inlined udiv_qrnnd\n"                                     \
1009 "       mov     32,%%g1\n"                                              \
1010 "       subcc   %1,%2,%%g0\n"                                           \
1011 "1:     bcs     5f\n"                                                   \
1012 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1013 "       sub     %1,%2,%1        ! this kills msb of n\n"                \
1014 "       addx    %1,%1,%1        ! so this can't give carry\n"           \
1015 "       subcc   %%g1,1,%%g1\n"                                          \
1016 "2:     bne     1b\n"                                                   \
1017 "        subcc  %1,%2,%%g0\n"                                           \
1018 "       bcs     3f\n"                                                   \
1019 "        addxcc %0,%0,%0        ! shift n1n0 and a q-bit in lsb\n"      \
1020 "       b       3f\n"                                                   \
1021 "        sub    %1,%2,%1        ! this kills msb of n\n"                \
1022 "4:     sub     %1,%2,%1\n"                                             \
1023 "5:     addxcc  %1,%1,%1\n"                                             \
1024 "       bcc     2b\n"                                                   \
1025 "        subcc  %%g1,1,%%g1\n"                                          \
1026 "! Got carry from n.  Subtract next step to cancel this carry.\n"       \
1027 "       bne     4b\n"                                                   \
1028 "        addcc  %0,%0,%0        ! shift n1n0 and a 0-bit in lsb\n"      \
1029 "       sub     %1,%2,%1\n"                                             \
1030 "3:     xnor    %0,0,%0\n"                                              \
1031 "       ! End of inline udiv_qrnnd"                                     \
1032            : "=&r" ((USItype) (__q)),                                   \
1033              "=&r" ((USItype) (__r))                                    \
1034            : "r" ((USItype) (__d)),                                     \
1035              "1" ((USItype) (__n1)),                                    \
1036              "0" ((USItype) (__n0)) : "g1" __AND_CLOBBER_CC)
1037 #define UDIV_TIME (3+7*32)      /* 7 instructions/iteration. 32 iterations.  */
1038 #endif /* __sparclite__ */
1039 #endif /* __sparc_v8__ */
1040 #endif /* sparc32 */
1041
1042 #if ((defined (__sparc__) && defined (__arch64__)) || defined (__sparcv9)) \
1043     && W_TYPE_SIZE == 64
1044 #define add_ssaaaa(sh, sl, ah, al, bh, bl)                              \
1045   __asm__ ("addcc %r4,%5,%1\n\t"                                        \
1046            "add %r2,%3,%0\n\t"                                          \
1047            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1048            "add %0, 1, %0\n"                                            \
1049            "1:"                                                         \
1050            : "=r" ((UDItype)(sh)),                                      \
1051              "=&r" ((UDItype)(sl))                                      \
1052            : "%rJ" ((UDItype)(ah)),                                     \
1053              "rI" ((UDItype)(bh)),                                      \
1054              "%rJ" ((UDItype)(al)),                                     \
1055              "rI" ((UDItype)(bl))                                       \
1056            __CLOBBER_CC)
1057
1058 #define sub_ddmmss(sh, sl, ah, al, bh, bl)                              \
1059   __asm__ ("subcc %r4,%5,%1\n\t"                                        \
1060            "sub %r2,%3,%0\n\t"                                          \
1061            "bcs,a,pn %%xcc, 1f\n\t"                                     \
1062            "sub %0, 1, %0\n\t"                                          \
1063            "1:"                                                         \
1064            : "=r" ((UDItype)(sh)),                                      \
1065              "=&r" ((UDItype)(sl))                                      \
1066            : "rJ" ((UDItype)(ah)),                                      \
1067              "rI" ((UDItype)(bh)),                                      \
1068              "rJ" ((UDItype)(al)),                                      \
1069              "rI" ((UDItype)(bl))                                       \
1070            __CLOBBER_CC)
1071
1072 #define umul_ppmm(wh, wl, u, v)                                         \
1073   do {                                                                  \
1074           UDItype tmp1, tmp2, tmp3, tmp4;                               \
1075           __asm__ __volatile__ (                                        \
1076                    "srl %7,0,%3\n\t"                                    \
1077                    "mulx %3,%6,%1\n\t"                                  \
1078                    "srlx %6,32,%2\n\t"                                  \
1079                    "mulx %2,%3,%4\n\t"                                  \
1080                    "sllx %4,32,%5\n\t"                                  \
1081                    "srl %6,0,%3\n\t"                                    \
1082                    "sub %1,%5,%5\n\t"                                   \
1083                    "srlx %5,32,%5\n\t"                                  \
1084                    "addcc %4,%5,%4\n\t"                                 \
1085                    "srlx %7,32,%5\n\t"                                  \
1086                    "mulx %3,%5,%3\n\t"                                  \
1087                    "mulx %2,%5,%5\n\t"                                  \
1088                    "sethi %%hi(0x80000000),%2\n\t"                      \
1089                    "addcc %4,%3,%4\n\t"                                 \
1090                    "srlx %4,32,%4\n\t"                                  \
1091                    "add %2,%2,%2\n\t"                                   \
1092                    "movcc %%xcc,%%g0,%2\n\t"                            \
1093                    "addcc %5,%4,%5\n\t"                                 \
1094                    "sllx %3,32,%3\n\t"                                  \
1095                    "add %1,%3,%1\n\t"                                   \
1096                    "add %5,%2,%0"                                       \
1097            : "=r" ((UDItype)(wh)),                                      \
1098              "=&r" ((UDItype)(wl)),                                     \
1099              "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4)     \
1100            : "r" ((UDItype)(u)),                                        \
1101              "r" ((UDItype)(v))                                         \
1102            __CLOBBER_CC);                                               \
1103   } while (0)
1104 #define UMUL_TIME 96
1105 #define UDIV_TIME 230
1106 #endif /* sparc64 */
1107
1108 #if defined (__vax__) && W_TYPE_SIZE == 32
1109 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1110   __asm__ ("addl2 %5,%1\n\tadwc %3,%0"                                  \
1111            : "=g" ((USItype) (sh)),                                     \
1112              "=&g" ((USItype) (sl))                                     \
1113            : "%0" ((USItype) (ah)),                                     \
1114              "g" ((USItype) (bh)),                                      \
1115              "%1" ((USItype) (al)),                                     \
1116              "g" ((USItype) (bl)))
1117 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1118   __asm__ ("subl2 %5,%1\n\tsbwc %3,%0"                                  \
1119            : "=g" ((USItype) (sh)),                                     \
1120              "=&g" ((USItype) (sl))                                     \
1121            : "0" ((USItype) (ah)),                                      \
1122              "g" ((USItype) (bh)),                                      \
1123              "1" ((USItype) (al)),                                      \
1124              "g" ((USItype) (bl)))
1125 #define umul_ppmm(xh, xl, m0, m1) \
1126   do {                                                                  \
1127     union {                                                             \
1128         UDItype __ll;                                                   \
1129         struct {USItype __l, __h;} __i;                                 \
1130       } __xx;                                                           \
1131     USItype __m0 = (m0), __m1 = (m1);                                   \
1132     __asm__ ("emul %1,%2,$0,%0"                                         \
1133              : "=r" (__xx.__ll)                                         \
1134              : "g" (__m0),                                              \
1135                "g" (__m1));                                             \
1136     (xh) = __xx.__i.__h;                                                \
1137     (xl) = __xx.__i.__l;                                                \
1138     (xh) += ((((SItype) __m0 >> 31) & __m1)                             \
1139              + (((SItype) __m1 >> 31) & __m0));                         \
1140   } while (0)
1141 #define sdiv_qrnnd(q, r, n1, n0, d) \
1142   do {                                                                  \
1143     union {DItype __ll;                                                 \
1144            struct {SItype __l, __h;} __i;                               \
1145           } __xx;                                                       \
1146     __xx.__i.__h = n1; __xx.__i.__l = n0;                               \
1147     __asm__ ("ediv %3,%2,%0,%1"                                         \
1148              : "=g" (q), "=g" (r)                                       \
1149              : "g" (__xx.__ll), "g" (d));                               \
1150   } while (0)
1151 #endif /* __vax__ */
1152
1153 #if defined (__z8000__) && W_TYPE_SIZE == 16
1154 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1155   __asm__ ("add %H1,%H5\n\tadc  %H0,%H3"                                \
1156            : "=r" ((unsigned int)(sh)),                                 \
1157              "=&r" ((unsigned int)(sl))                                 \
1158            : "%0" ((unsigned int)(ah)),                                 \
1159              "r" ((unsigned int)(bh)),                                  \
1160              "%1" ((unsigned int)(al)),                                 \
1161              "rQR" ((unsigned int)(bl)))
1162 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1163   __asm__ ("sub %H1,%H5\n\tsbc  %H0,%H3"                                \
1164            : "=r" ((unsigned int)(sh)),                                 \
1165              "=&r" ((unsigned int)(sl))                                 \
1166            : "0" ((unsigned int)(ah)),                                  \
1167              "r" ((unsigned int)(bh)),                                  \
1168              "1" ((unsigned int)(al)),                                  \
1169              "rQR" ((unsigned int)(bl)))
1170 #define umul_ppmm(xh, xl, m0, m1) \
1171   do {                                                                  \
1172     union {long int __ll;                                               \
1173            struct {unsigned int __h, __l;} __i;                         \
1174           } __xx;                                                       \
1175     unsigned int __m0 = (m0), __m1 = (m1);                              \
1176     __asm__ ("mult      %S0,%H3"                                        \
1177              : "=r" (__xx.__i.__h),                                     \
1178                "=r" (__xx.__i.__l)                                      \
1179              : "%1" (__m0),                                             \
1180                "rQR" (__m1));                                           \
1181     (xh) = __xx.__i.__h; (xl) = __xx.__i.__l;                           \
1182     (xh) += ((((signed int) __m0 >> 15) & __m1)                         \
1183              + (((signed int) __m1 >> 15) & __m0));                     \
1184   } while (0)
1185 #endif /* __z8000__ */
1186
1187 #endif /* __GNUC__ */
1188
1189 /* If this machine has no inline assembler, use C macros.  */
1190
1191 #if !defined (add_ssaaaa)
1192 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
1193   do {                                                                  \
1194     UWtype __x;                                                         \
1195     __x = (al) + (bl);                                                  \
1196     (sh) = (ah) + (bh) + (__x < (al));                                  \
1197     (sl) = __x;                                                         \
1198   } while (0)
1199 #endif
1200
1201 #if !defined (sub_ddmmss)
1202 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
1203   do {                                                                  \
1204     UWtype __x;                                                         \
1205     __x = (al) - (bl);                                                  \
1206     (sh) = (ah) - (bh) - (__x > (al));                                  \
1207     (sl) = __x;                                                         \
1208   } while (0)
1209 #endif
1210
1211 /* If we lack umul_ppmm but have smul_ppmm, define umul_ppmm in terms of
1212    smul_ppmm.  */
1213 #if !defined (umul_ppmm) && defined (smul_ppmm)
1214 #define umul_ppmm(w1, w0, u, v)                                         \
1215   do {                                                                  \
1216     UWtype __w1;                                                        \
1217     UWtype __xm0 = (u), __xm1 = (v);                                    \
1218     smul_ppmm (__w1, w0, __xm0, __xm1);                                 \
1219     (w1) = __w1 + (-(__xm0 >> (W_TYPE_SIZE - 1)) & __xm1)               \
1220                 + (-(__xm1 >> (W_TYPE_SIZE - 1)) & __xm0);              \
1221   } while (0)
1222 #endif
1223
1224 /* If we still don't have umul_ppmm, define it using plain C.  */
1225 #if !defined (umul_ppmm)
1226 #define umul_ppmm(w1, w0, u, v)                                         \
1227   do {                                                                  \
1228     UWtype __x0, __x1, __x2, __x3;                                      \
1229     UHWtype __ul, __vl, __uh, __vh;                                     \
1230                                                                         \
1231     __ul = __ll_lowpart (u);                                            \
1232     __uh = __ll_highpart (u);                                           \
1233     __vl = __ll_lowpart (v);                                            \
1234     __vh = __ll_highpart (v);                                           \
1235                                                                         \
1236     __x0 = (UWtype) __ul * __vl;                                        \
1237     __x1 = (UWtype) __ul * __vh;                                        \
1238     __x2 = (UWtype) __uh * __vl;                                        \
1239     __x3 = (UWtype) __uh * __vh;                                        \
1240                                                                         \
1241     __x1 += __ll_highpart (__x0);/* this can't give carry */            \
1242     __x1 += __x2;               /* but this indeed can */               \
1243     if (__x1 < __x2)            /* did we get it? */                    \
1244       __x3 += __ll_B;           /* yes, add it in the proper pos.  */   \
1245                                                                         \
1246     (w1) = __x3 + __ll_highpart (__x1);                                 \
1247     (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0);          \
1248   } while (0)
1249 #endif
1250
1251 #if !defined (__umulsidi3)
1252 #define __umulsidi3(u, v) \
1253   ({DWunion __w;                                                        \
1254     umul_ppmm (__w.s.high, __w.s.low, u, v);                            \
1255     __w.ll; })
1256 #endif
1257
1258 /* Define this unconditionally, so it can be used for debugging.  */
1259 #define __udiv_qrnnd_c(q, r, n1, n0, d) \
1260   do {                                                                  \
1261     UWtype __d1, __d0, __q1, __q0;                                      \
1262     UWtype __r1, __r0, __m;                                             \
1263     __d1 = __ll_highpart (d);                                           \
1264     __d0 = __ll_lowpart (d);                                            \
1265                                                                         \
1266     __r1 = (n1) % __d1;                                                 \
1267     __q1 = (n1) / __d1;                                                 \
1268     __m = (UWtype) __q1 * __d0;                                         \
1269     __r1 = __r1 * __ll_B | __ll_highpart (n0);                          \
1270     if (__r1 < __m)                                                     \
1271       {                                                                 \
1272         __q1--, __r1 += (d);                                            \
1273         if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
1274           if (__r1 < __m)                                               \
1275             __q1--, __r1 += (d);                                        \
1276       }                                                                 \
1277     __r1 -= __m;                                                        \
1278                                                                         \
1279     __r0 = __r1 % __d1;                                                 \
1280     __q0 = __r1 / __d1;                                                 \
1281     __m = (UWtype) __q0 * __d0;                                         \
1282     __r0 = __r0 * __ll_B | __ll_lowpart (n0);                           \
1283     if (__r0 < __m)                                                     \
1284       {                                                                 \
1285         __q0--, __r0 += (d);                                            \
1286         if (__r0 >= (d))                                                \
1287           if (__r0 < __m)                                               \
1288             __q0--, __r0 += (d);                                        \
1289       }                                                                 \
1290     __r0 -= __m;                                                        \
1291                                                                         \
1292     (q) = (UWtype) __q1 * __ll_B | __q0;                                \
1293     (r) = __r0;                                                         \
1294   } while (0)
1295
1296 /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
1297    __udiv_w_sdiv (defined in libgcc or elsewhere).  */
1298 #if !defined (udiv_qrnnd) && defined (sdiv_qrnnd)
1299 #define udiv_qrnnd(q, r, nh, nl, d) \
1300   do {                                                                  \
1301     USItype __r;                                                        \
1302     (q) = __udiv_w_sdiv (&__r, nh, nl, d);                              \
1303     (r) = __r;                                                          \
1304   } while (0)
1305 #endif
1306
1307 /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c.  */
1308 #if !defined (udiv_qrnnd)
1309 #define UDIV_NEEDS_NORMALIZATION 1
1310 #define udiv_qrnnd __udiv_qrnnd_c
1311 #endif
1312
1313 #if !defined (count_leading_zeros)
1314 #define count_leading_zeros(count, x) \
1315   do {                                                                  \
1316     UWtype __xr = (x);                                                  \
1317     UWtype __a;                                                         \
1318                                                                         \
1319     if (W_TYPE_SIZE <= 32)                                              \
1320       {                                                                 \
1321         __a = __xr < ((UWtype)1<<2*__BITS4)                             \
1322           ? (__xr < ((UWtype)1<<__BITS4) ? 0 : __BITS4)                 \
1323           : (__xr < ((UWtype)1<<3*__BITS4) ?  2*__BITS4 : 3*__BITS4);   \
1324       }                                                                 \
1325     else                                                                \
1326       {                                                                 \
1327         for (__a = W_TYPE_SIZE - 8; __a > 0; __a -= 8)                  \
1328           if (((__xr >> __a) & 0xff) != 0)                              \
1329             break;                                                      \
1330       }                                                                 \
1331                                                                         \
1332     (count) = W_TYPE_SIZE - (__clz_tab[__xr >> __a] + __a);             \
1333   } while (0)
1334 #define COUNT_LEADING_ZEROS_0 W_TYPE_SIZE
1335 #endif
1336
1337 #if !defined (count_trailing_zeros)
1338 /* Define count_trailing_zeros using count_leading_zeros.  The latter might be
1339    defined in asm, but if it is not, the C version above is good enough.  */
1340 #define count_trailing_zeros(count, x) \
1341   do {                                                                  \
1342     UWtype __ctz_x = (x);                                               \
1343     UWtype __ctz_c;                                                     \
1344     count_leading_zeros (__ctz_c, __ctz_x & -__ctz_x);                  \
1345     (count) = W_TYPE_SIZE - 1 - __ctz_c;                                \
1346   } while (0)
1347 #endif
1348
1349 #ifndef UDIV_NEEDS_NORMALIZATION
1350 #define UDIV_NEEDS_NORMALIZATION 0
1351 #endif