1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
54 #include "insn-config.h"
55 #include "insn-attr.h"
57 #include "conditions.h"
60 #include "hard-reg-set.h"
67 #include "basic-block.h"
72 #ifdef XCOFF_DEBUGGING_INFO
73 #include "xcoffout.h" /* Needed for external data
74 declarations for e.g. AIX 4.x. */
77 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
78 #include "dwarf2out.h"
81 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
82 null default for it to save conditionalization later. */
83 #ifndef CC_STATUS_INIT
84 #define CC_STATUS_INIT
87 /* How to start an assembler comment. */
88 #ifndef ASM_COMMENT_START
89 #define ASM_COMMENT_START ";#"
92 /* Is the given character a logical line separator for the assembler? */
93 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
94 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
97 #ifndef JUMP_TABLES_IN_TEXT_SECTION
98 #define JUMP_TABLES_IN_TEXT_SECTION 0
101 /* Last insn processed by final_scan_insn. */
102 static rtx debug_insn;
103 rtx current_output_insn;
105 /* Line number of last NOTE. */
106 static int last_linenum;
108 /* Highest line number in current block. */
109 static int high_block_linenum;
111 /* Likewise for function. */
112 static int high_function_linenum;
114 /* Filename of last NOTE. */
115 static const char *last_filename;
117 /* Number of instrumented arcs when profile_arc_flag is set. */
118 extern int count_instrumented_edges;
120 extern int length_unit_log; /* This is defined in insn-attrtab.c. */
122 /* Nonzero while outputting an `asm' with operands.
123 This means that inconsistencies are the user's fault, so don't abort.
124 The precise value is the insn being output, to pass to error_for_asm. */
125 static rtx this_is_asm_operands;
127 /* Number of operands of this insn, for an `asm' with operands. */
128 static unsigned int insn_noperands;
130 /* Compare optimization flag. */
132 static rtx last_ignored_compare = 0;
134 /* Flag indicating this insn is the start of a new basic block. */
136 static int new_block = 1;
138 /* Assign a unique number to each insn that is output.
139 This can be used to generate unique local labels. */
141 static int insn_counter = 0;
144 /* This variable contains machine-dependent flags (defined in tm.h)
145 set and examined by output routines
146 that describe how to interpret the condition codes properly. */
150 /* During output of an insn, this contains a copy of cc_status
151 from before the insn. */
153 CC_STATUS cc_prev_status;
156 /* Indexed by hardware reg number, is 1 if that register is ever
157 used in the current function.
159 In life_analysis, or in stupid_life_analysis, this is set
160 up to record the hard regs used explicitly. Reload adds
161 in the hard regs used for holding pseudo regs. Final uses
162 it to generate the code in the function prologue and epilogue
163 to save and restore registers as needed. */
165 char regs_ever_live[FIRST_PSEUDO_REGISTER];
167 /* Nonzero means current function must be given a frame pointer.
168 Set in stmt.c if anything is allocated on the stack there.
169 Set in reload1.c if anything is allocated on the stack there. */
171 int frame_pointer_needed;
173 /* Assign unique numbers to labels generated for profiling. */
175 int profile_label_no;
177 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
179 static int block_depth;
181 /* Nonzero if have enabled APP processing of our assembler output. */
185 /* If we are outputting an insn sequence, this contains the sequence rtx.
190 #ifdef ASSEMBLER_DIALECT
192 /* Number of the assembler dialect to use, starting at 0. */
193 static int dialect_number;
196 /* Indexed by line number, nonzero if there is a note for that line. */
198 static char *line_note_exists;
200 #ifdef HAVE_conditional_execution
201 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
202 rtx current_insn_predicate;
205 #ifdef HAVE_ATTR_length
206 static int asm_insn_count PARAMS ((rtx));
208 static void profile_function PARAMS ((FILE *));
209 static void profile_after_prologue PARAMS ((FILE *));
210 static void notice_source_line PARAMS ((rtx));
211 static rtx walk_alter_subreg PARAMS ((rtx *));
212 static void output_asm_name PARAMS ((void));
213 static tree get_mem_expr_from_op PARAMS ((rtx, int *));
214 static void output_asm_operand_names PARAMS ((rtx *, int *, int));
215 static void output_operand PARAMS ((rtx, int));
216 #ifdef LEAF_REGISTERS
217 static void leaf_renumber_regs PARAMS ((rtx));
220 static int alter_cond PARAMS ((rtx));
222 #ifndef ADDR_VEC_ALIGN
223 static int final_addr_vec_align PARAMS ((rtx));
225 #ifdef HAVE_ATTR_length
226 static int align_fuzz PARAMS ((rtx, rtx, int, unsigned));
229 /* Initialize data in final at the beginning of a compilation. */
232 init_final (filename)
233 const char *filename ATTRIBUTE_UNUSED;
238 #ifdef ASSEMBLER_DIALECT
239 dialect_number = ASSEMBLER_DIALECT;
243 /* Called at end of source file,
244 to output the block-profiling table for this entire compilation. */
248 const char *filename;
250 if (profile_arc_flag)
253 int align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
255 int long_bytes = LONG_TYPE_SIZE / BITS_PER_UNIT;
256 int gcov_type_bytes = GCOV_TYPE_SIZE / BITS_PER_UNIT;
257 int pointer_bytes = POINTER_SIZE / BITS_PER_UNIT;
258 unsigned int align2 = LONG_TYPE_SIZE;
260 size = gcov_type_bytes * count_instrumented_edges;
263 rounded += (BIGGEST_ALIGNMENT / BITS_PER_UNIT) - 1;
264 rounded = (rounded / (BIGGEST_ALIGNMENT / BITS_PER_UNIT)
265 * (BIGGEST_ALIGNMENT / BITS_PER_UNIT));
267 /* ??? This _really_ ought to be done with a structure layout
268 and with assemble_constructor. If long_bytes != pointer_bytes
269 we'll be emitting unaligned data at some point. */
270 if (long_bytes != pointer_bytes)
275 /* Output the main header, of 11 words:
276 0: 1 if this file is initialized, else 0.
277 1: address of file name (LPBX1).
278 2: address of table of counts (LPBX2).
279 3: number of counts in the table.
280 4: always 0, for compatibility with Sun.
282 The following are GNU extensions:
284 5: address of table of start addrs of basic blocks (LPBX3).
285 6: Number of bytes in this header.
286 7: address of table of function names (LPBX4).
287 8: address of table of line numbers (LPBX5) or 0.
288 9: address of table of file names (LPBX6) or 0.
289 10: space reserved for basic block profiling. */
291 ASM_OUTPUT_ALIGN (asm_out_file, align);
293 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 0);
296 assemble_integer (const0_rtx, long_bytes, align2, 1);
298 /* Address of filename. */
299 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 1);
300 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
303 /* Address of count table. */
304 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
305 assemble_integer (gen_rtx_SYMBOL_REF (Pmode, name), pointer_bytes,
308 /* Count of the # of instrumented arcs. */
309 assemble_integer (GEN_INT (count_instrumented_edges),
310 long_bytes, align2, 1);
312 /* Zero word (link field). */
313 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
315 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
317 /* Byte count for extended structure. */
318 assemble_integer (GEN_INT (11 * UNITS_PER_WORD), long_bytes, align2, 1);
320 /* Address of function name table. */
321 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
323 /* Address of line number and filename tables if debugging. */
324 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
325 assemble_integer (const0_rtx, pointer_bytes, align2, 1);
327 /* Space for extension ptr (link field). */
328 assemble_integer (const0_rtx, UNITS_PER_WORD, align2, 1);
330 /* Output the file name changing the suffix to .d for
331 Sun tcov compatibility. */
332 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 1);
334 char *cwd = getpwd ();
335 int len = strlen (filename) + strlen (cwd) + 1;
336 char *data_file = (char *) alloca (len + 4);
338 strcpy (data_file, cwd);
339 strcat (data_file, "/");
340 strcat (data_file, filename);
341 strip_off_ending (data_file, len);
342 strcat (data_file, ".da");
343 assemble_string (data_file, strlen (data_file) + 1);
346 /* Make space for the table of counts. */
349 /* Realign data section. */
350 ASM_OUTPUT_ALIGN (asm_out_file, align);
351 ASM_OUTPUT_INTERNAL_LABEL (asm_out_file, "LPBX", 2);
353 assemble_zeros (size);
357 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
358 #ifdef ASM_OUTPUT_SHARED_LOCAL
359 if (flag_shared_data)
360 ASM_OUTPUT_SHARED_LOCAL (asm_out_file, name, size, rounded);
363 #ifdef ASM_OUTPUT_ALIGNED_DECL_LOCAL
364 ASM_OUTPUT_ALIGNED_DECL_LOCAL (asm_out_file, NULL_TREE, name,
365 size, BIGGEST_ALIGNMENT);
367 #ifdef ASM_OUTPUT_ALIGNED_LOCAL
368 ASM_OUTPUT_ALIGNED_LOCAL (asm_out_file, name, size,
371 ASM_OUTPUT_LOCAL (asm_out_file, name, size, rounded);
378 /* Default target function prologue and epilogue assembler output.
380 If not overridden for epilogue code, then the function body itself
381 contains return instructions wherever needed. */
383 default_function_pro_epilogue (file, size)
384 FILE *file ATTRIBUTE_UNUSED;
385 HOST_WIDE_INT size ATTRIBUTE_UNUSED;
389 /* Default target hook that outputs nothing to a stream. */
391 no_asm_to_stream (file)
392 FILE *file ATTRIBUTE_UNUSED;
396 /* Enable APP processing of subsequent output.
397 Used before the output from an `asm' statement. */
404 fputs (ASM_APP_ON, asm_out_file);
409 /* Disable APP processing of subsequent output.
410 Called from varasm.c before most kinds of output. */
417 fputs (ASM_APP_OFF, asm_out_file);
422 /* Return the number of slots filled in the current
423 delayed branch sequence (we don't count the insn needing the
424 delay slot). Zero if not in a delayed branch sequence. */
428 dbr_sequence_length ()
430 if (final_sequence != 0)
431 return XVECLEN (final_sequence, 0) - 1;
437 /* The next two pages contain routines used to compute the length of an insn
438 and to shorten branches. */
440 /* Arrays for insn lengths, and addresses. The latter is referenced by
441 `insn_current_length'. */
443 static int *insn_lengths;
445 #ifdef HAVE_ATTR_length
446 varray_type insn_addresses_;
449 /* Max uid for which the above arrays are valid. */
450 static int insn_lengths_max_uid;
452 /* Address of insn being processed. Used by `insn_current_length'. */
453 int insn_current_address;
455 /* Address of insn being processed in previous iteration. */
456 int insn_last_address;
458 /* known invariant alignment of insn being processed. */
459 int insn_current_align;
461 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
462 gives the next following alignment insn that increases the known
463 alignment, or NULL_RTX if there is no such insn.
464 For any alignment obtained this way, we can again index uid_align with
465 its uid to obtain the next following align that in turn increases the
466 alignment, till we reach NULL_RTX; the sequence obtained this way
467 for each insn we'll call the alignment chain of this insn in the following
470 struct label_alignment
476 static rtx *uid_align;
477 static int *uid_shuid;
478 static struct label_alignment *label_align;
480 /* Indicate that branch shortening hasn't yet been done. */
494 insn_lengths_max_uid = 0;
496 #ifdef HAVE_ATTR_length
497 INSN_ADDRESSES_FREE ();
506 /* Obtain the current length of an insn. If branch shortening has been done,
507 get its actual length. Otherwise, get its maximum length. */
510 get_attr_length (insn)
511 rtx insn ATTRIBUTE_UNUSED;
513 #ifdef HAVE_ATTR_length
518 if (insn_lengths_max_uid > INSN_UID (insn))
519 return insn_lengths[INSN_UID (insn)];
521 switch (GET_CODE (insn))
529 length = insn_default_length (insn);
533 body = PATTERN (insn);
534 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
536 /* Alignment is machine-dependent and should be handled by
540 length = insn_default_length (insn);
544 body = PATTERN (insn);
545 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
548 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
549 length = asm_insn_count (body) * insn_default_length (insn);
550 else if (GET_CODE (body) == SEQUENCE)
551 for (i = 0; i < XVECLEN (body, 0); i++)
552 length += get_attr_length (XVECEXP (body, 0, i));
554 length = insn_default_length (insn);
561 #ifdef ADJUST_INSN_LENGTH
562 ADJUST_INSN_LENGTH (insn, length);
565 #else /* not HAVE_ATTR_length */
567 #endif /* not HAVE_ATTR_length */
570 /* Code to handle alignment inside shorten_branches. */
572 /* Here is an explanation how the algorithm in align_fuzz can give
575 Call a sequence of instructions beginning with alignment point X
576 and continuing until the next alignment point `block X'. When `X'
577 is used in an expression, it means the alignment value of the
580 Call the distance between the start of the first insn of block X, and
581 the end of the last insn of block X `IX', for the `inner size of X'.
582 This is clearly the sum of the instruction lengths.
584 Likewise with the next alignment-delimited block following X, which we
587 Call the distance between the start of the first insn of block X, and
588 the start of the first insn of block Y `OX', for the `outer size of X'.
590 The estimated padding is then OX - IX.
592 OX can be safely estimated as
597 OX = round_up(IX, X) + Y - X
599 Clearly est(IX) >= real(IX), because that only depends on the
600 instruction lengths, and those being overestimated is a given.
602 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
603 we needn't worry about that when thinking about OX.
605 When X >= Y, the alignment provided by Y adds no uncertainty factor
606 for branch ranges starting before X, so we can just round what we have.
607 But when X < Y, we don't know anything about the, so to speak,
608 `middle bits', so we have to assume the worst when aligning up from an
609 address mod X to one mod Y, which is Y - X. */
612 #define LABEL_ALIGN(LABEL) align_labels_log
615 #ifndef LABEL_ALIGN_MAX_SKIP
616 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
620 #define LOOP_ALIGN(LABEL) align_loops_log
623 #ifndef LOOP_ALIGN_MAX_SKIP
624 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
627 #ifndef LABEL_ALIGN_AFTER_BARRIER
628 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
631 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
632 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
636 #define JUMP_ALIGN(LABEL) align_jumps_log
639 #ifndef JUMP_ALIGN_MAX_SKIP
640 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
643 #ifndef ADDR_VEC_ALIGN
645 final_addr_vec_align (addr_vec)
648 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
650 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
651 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
652 return exact_log2 (align);
656 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
659 #ifndef INSN_LENGTH_ALIGNMENT
660 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
663 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
665 static int min_labelno, max_labelno;
667 #define LABEL_TO_ALIGNMENT(LABEL) \
668 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
670 #define LABEL_TO_MAX_SKIP(LABEL) \
671 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
673 /* For the benefit of port specific code do this also as a function. */
676 label_to_alignment (label)
679 return LABEL_TO_ALIGNMENT (label);
682 #ifdef HAVE_ATTR_length
683 /* The differences in addresses
684 between a branch and its target might grow or shrink depending on
685 the alignment the start insn of the range (the branch for a forward
686 branch or the label for a backward branch) starts out on; if these
687 differences are used naively, they can even oscillate infinitely.
688 We therefore want to compute a 'worst case' address difference that
689 is independent of the alignment the start insn of the range end
690 up on, and that is at least as large as the actual difference.
691 The function align_fuzz calculates the amount we have to add to the
692 naively computed difference, by traversing the part of the alignment
693 chain of the start insn of the range that is in front of the end insn
694 of the range, and considering for each alignment the maximum amount
695 that it might contribute to a size increase.
697 For casesi tables, we also want to know worst case minimum amounts of
698 address difference, in case a machine description wants to introduce
699 some common offset that is added to all offsets in a table.
700 For this purpose, align_fuzz with a growth argument of 0 computes the
701 appropriate adjustment. */
703 /* Compute the maximum delta by which the difference of the addresses of
704 START and END might grow / shrink due to a different address for start
705 which changes the size of alignment insns between START and END.
706 KNOWN_ALIGN_LOG is the alignment known for START.
707 GROWTH should be ~0 if the objective is to compute potential code size
708 increase, and 0 if the objective is to compute potential shrink.
709 The return value is undefined for any other value of GROWTH. */
712 align_fuzz (start, end, known_align_log, growth)
717 int uid = INSN_UID (start);
719 int known_align = 1 << known_align_log;
720 int end_shuid = INSN_SHUID (end);
723 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
725 int align_addr, new_align;
727 uid = INSN_UID (align_label);
728 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
729 if (uid_shuid[uid] > end_shuid)
731 known_align_log = LABEL_TO_ALIGNMENT (align_label);
732 new_align = 1 << known_align_log;
733 if (new_align < known_align)
735 fuzz += (-align_addr ^ growth) & (new_align - known_align);
736 known_align = new_align;
741 /* Compute a worst-case reference address of a branch so that it
742 can be safely used in the presence of aligned labels. Since the
743 size of the branch itself is unknown, the size of the branch is
744 not included in the range. I.e. for a forward branch, the reference
745 address is the end address of the branch as known from the previous
746 branch shortening pass, minus a value to account for possible size
747 increase due to alignment. For a backward branch, it is the start
748 address of the branch as known from the current pass, plus a value
749 to account for possible size increase due to alignment.
750 NB.: Therefore, the maximum offset allowed for backward branches needs
751 to exclude the branch size. */
754 insn_current_reference_address (branch)
760 if (! INSN_ADDRESSES_SET_P ())
763 seq = NEXT_INSN (PREV_INSN (branch));
764 seq_uid = INSN_UID (seq);
765 if (GET_CODE (branch) != JUMP_INSN)
766 /* This can happen for example on the PA; the objective is to know the
767 offset to address something in front of the start of the function.
768 Thus, we can treat it like a backward branch.
769 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
770 any alignment we'd encounter, so we skip the call to align_fuzz. */
771 return insn_current_address;
772 dest = JUMP_LABEL (branch);
774 /* BRANCH has no proper alignment chain set, so use SEQ.
775 BRANCH also has no INSN_SHUID. */
776 if (INSN_SHUID (seq) < INSN_SHUID (dest))
778 /* Forward branch. */
779 return (insn_last_address + insn_lengths[seq_uid]
780 - align_fuzz (seq, dest, length_unit_log, ~0));
784 /* Backward branch. */
785 return (insn_current_address
786 + align_fuzz (dest, seq, length_unit_log, ~0));
789 #endif /* HAVE_ATTR_length */
792 compute_alignments ()
795 int log, max_skip, max_log;
803 max_labelno = max_label_num ();
804 min_labelno = get_first_label_num ();
805 label_align = (struct label_alignment *)
806 xcalloc (max_labelno - min_labelno + 1, sizeof (struct label_alignment));
808 /* If not optimizing or optimizing for size, don't assign any alignments. */
809 if (! optimize || optimize_size)
812 for (i = 0; i < n_basic_blocks; i++)
814 basic_block bb = BASIC_BLOCK (i);
815 rtx label = bb->head;
816 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
819 if (GET_CODE (label) != CODE_LABEL)
821 max_log = LABEL_ALIGN (label);
822 max_skip = LABEL_ALIGN_MAX_SKIP;
824 for (e = bb->pred; e; e = e->pred_next)
826 if (e->flags & EDGE_FALLTHRU)
827 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
829 branch_frequency += EDGE_FREQUENCY (e);
832 /* There are two purposes to align block with no fallthru incoming edge:
833 1) to avoid fetch stalls when branch destination is near cache boundary
834 2) to improve cache efficiency in case the previous block is not executed
835 (so it does not need to be in the cache).
837 We to catch first case, we align frequently executed blocks.
838 To catch the second, we align blocks that are executed more frequently
839 than the predecessor and the predecessor is likely to not be executed
840 when function is called. */
843 && (branch_frequency > BB_FREQ_MAX / 10
844 || (bb->frequency > BASIC_BLOCK (i - 1)->frequency * 10
845 && (BASIC_BLOCK (i - 1)->frequency
846 <= ENTRY_BLOCK_PTR->frequency / 2))))
848 log = JUMP_ALIGN (label);
852 max_skip = JUMP_ALIGN_MAX_SKIP;
855 /* In case block is frequent and reached mostly by non-fallthru edge,
856 align it. It is most likely an first block of loop. */
858 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
859 && branch_frequency > fallthru_frequency * 5)
861 log = LOOP_ALIGN (label);
865 max_skip = LOOP_ALIGN_MAX_SKIP;
868 LABEL_TO_ALIGNMENT (label) = max_log;
869 LABEL_TO_MAX_SKIP (label) = max_skip;
873 /* Make a pass over all insns and compute their actual lengths by shortening
874 any branches of variable length if possible. */
876 /* Give a default value for the lowest address in a function. */
878 #ifndef FIRST_INSN_ADDRESS
879 #define FIRST_INSN_ADDRESS 0
882 /* shorten_branches might be called multiple times: for example, the SH
883 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
884 In order to do this, it needs proper length information, which it obtains
885 by calling shorten_branches. This cannot be collapsed with
886 shorten_branches itself into a single pass unless we also want to integrate
887 reorg.c, since the branch splitting exposes new instructions with delay
891 shorten_branches (first)
892 rtx first ATTRIBUTE_UNUSED;
899 #ifdef HAVE_ATTR_length
900 #define MAX_CODE_ALIGN 16
902 int something_changed = 1;
903 char *varying_length;
906 rtx align_tab[MAX_CODE_ALIGN];
910 /* Compute maximum UID and allocate label_align / uid_shuid. */
911 max_uid = get_max_uid ();
913 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
915 if (max_labelno != max_label_num ())
917 int old = max_labelno;
921 max_labelno = max_label_num ();
923 n_labels = max_labelno - min_labelno + 1;
924 n_old_labels = old - min_labelno + 1;
926 label_align = (struct label_alignment *) xrealloc
927 (label_align, n_labels * sizeof (struct label_alignment));
929 /* Range of labels grows monotonically in the function. Abort here
930 means that the initialization of array got lost. */
931 if (n_old_labels > n_labels)
934 memset (label_align + n_old_labels, 0,
935 (n_labels - n_old_labels) * sizeof (struct label_alignment));
938 /* Initialize label_align and set up uid_shuid to be strictly
939 monotonically rising with insn order. */
940 /* We use max_log here to keep track of the maximum alignment we want to
941 impose on the next CODE_LABEL (or the current one if we are processing
942 the CODE_LABEL itself). */
947 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
951 INSN_SHUID (insn) = i++;
954 /* reorg might make the first insn of a loop being run once only,
955 and delete the label in front of it. Then we want to apply
956 the loop alignment to the new label created by reorg, which
957 is separated by the former loop start insn from the
958 NOTE_INSN_LOOP_BEG. */
960 else if (GET_CODE (insn) == CODE_LABEL)
964 /* Merge in alignments computed by compute_alignments. */
965 log = LABEL_TO_ALIGNMENT (insn);
969 max_skip = LABEL_TO_MAX_SKIP (insn);
972 log = LABEL_ALIGN (insn);
976 max_skip = LABEL_ALIGN_MAX_SKIP;
978 next = NEXT_INSN (insn);
979 /* ADDR_VECs only take room if read-only data goes into the text
981 if (JUMP_TABLES_IN_TEXT_SECTION
982 #if !defined(READONLY_DATA_SECTION)
986 if (next && GET_CODE (next) == JUMP_INSN)
988 rtx nextbody = PATTERN (next);
989 if (GET_CODE (nextbody) == ADDR_VEC
990 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
992 log = ADDR_VEC_ALIGN (next);
996 max_skip = LABEL_ALIGN_MAX_SKIP;
1000 LABEL_TO_ALIGNMENT (insn) = max_log;
1001 LABEL_TO_MAX_SKIP (insn) = max_skip;
1005 else if (GET_CODE (insn) == BARRIER)
1009 for (label = insn; label && ! INSN_P (label);
1010 label = NEXT_INSN (label))
1011 if (GET_CODE (label) == CODE_LABEL)
1013 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1017 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1023 #ifdef HAVE_ATTR_length
1025 /* Allocate the rest of the arrays. */
1026 insn_lengths = (int *) xmalloc (max_uid * sizeof (*insn_lengths));
1027 insn_lengths_max_uid = max_uid;
1028 /* Syntax errors can lead to labels being outside of the main insn stream.
1029 Initialize insn_addresses, so that we get reproducible results. */
1030 INSN_ADDRESSES_ALLOC (max_uid);
1032 varying_length = (char *) xcalloc (max_uid, sizeof (char));
1034 /* Initialize uid_align. We scan instructions
1035 from end to start, and keep in align_tab[n] the last seen insn
1036 that does an alignment of at least n+1, i.e. the successor
1037 in the alignment chain for an insn that does / has a known
1039 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align);
1041 for (i = MAX_CODE_ALIGN; --i >= 0;)
1042 align_tab[i] = NULL_RTX;
1043 seq = get_last_insn ();
1044 for (; seq; seq = PREV_INSN (seq))
1046 int uid = INSN_UID (seq);
1048 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1049 uid_align[uid] = align_tab[0];
1052 /* Found an alignment label. */
1053 uid_align[uid] = align_tab[log];
1054 for (i = log - 1; i >= 0; i--)
1058 #ifdef CASE_VECTOR_SHORTEN_MODE
1061 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1064 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1065 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1068 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1070 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1071 int len, i, min, max, insn_shuid;
1073 addr_diff_vec_flags flags;
1075 if (GET_CODE (insn) != JUMP_INSN
1076 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1078 pat = PATTERN (insn);
1079 len = XVECLEN (pat, 1);
1082 min_align = MAX_CODE_ALIGN;
1083 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1085 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1086 int shuid = INSN_SHUID (lab);
1097 if (min_align > LABEL_TO_ALIGNMENT (lab))
1098 min_align = LABEL_TO_ALIGNMENT (lab);
1100 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1101 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1102 insn_shuid = INSN_SHUID (insn);
1103 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1104 flags.min_align = min_align;
1105 flags.base_after_vec = rel > insn_shuid;
1106 flags.min_after_vec = min > insn_shuid;
1107 flags.max_after_vec = max > insn_shuid;
1108 flags.min_after_base = min > rel;
1109 flags.max_after_base = max > rel;
1110 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1113 #endif /* CASE_VECTOR_SHORTEN_MODE */
1115 /* Compute initial lengths, addresses, and varying flags for each insn. */
1116 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1118 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1120 uid = INSN_UID (insn);
1122 insn_lengths[uid] = 0;
1124 if (GET_CODE (insn) == CODE_LABEL)
1126 int log = LABEL_TO_ALIGNMENT (insn);
1129 int align = 1 << log;
1130 int new_address = (insn_current_address + align - 1) & -align;
1131 insn_lengths[uid] = new_address - insn_current_address;
1135 INSN_ADDRESSES (uid) = insn_current_address;
1137 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1138 || GET_CODE (insn) == CODE_LABEL)
1140 if (INSN_DELETED_P (insn))
1143 body = PATTERN (insn);
1144 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1146 /* This only takes room if read-only data goes into the text
1148 if (JUMP_TABLES_IN_TEXT_SECTION
1149 #if !defined(READONLY_DATA_SECTION)
1153 insn_lengths[uid] = (XVECLEN (body,
1154 GET_CODE (body) == ADDR_DIFF_VEC)
1155 * GET_MODE_SIZE (GET_MODE (body)));
1156 /* Alignment is handled by ADDR_VEC_ALIGN. */
1158 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1159 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1160 else if (GET_CODE (body) == SEQUENCE)
1163 int const_delay_slots;
1165 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1167 const_delay_slots = 0;
1169 /* Inside a delay slot sequence, we do not do any branch shortening
1170 if the shortening could change the number of delay slots
1172 for (i = 0; i < XVECLEN (body, 0); i++)
1174 rtx inner_insn = XVECEXP (body, 0, i);
1175 int inner_uid = INSN_UID (inner_insn);
1178 if (GET_CODE (body) == ASM_INPUT
1179 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1180 inner_length = (asm_insn_count (PATTERN (inner_insn))
1181 * insn_default_length (inner_insn));
1183 inner_length = insn_default_length (inner_insn);
1185 insn_lengths[inner_uid] = inner_length;
1186 if (const_delay_slots)
1188 if ((varying_length[inner_uid]
1189 = insn_variable_length_p (inner_insn)) != 0)
1190 varying_length[uid] = 1;
1191 INSN_ADDRESSES (inner_uid) = (insn_current_address
1192 + insn_lengths[uid]);
1195 varying_length[inner_uid] = 0;
1196 insn_lengths[uid] += inner_length;
1199 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1201 insn_lengths[uid] = insn_default_length (insn);
1202 varying_length[uid] = insn_variable_length_p (insn);
1205 /* If needed, do any adjustment. */
1206 #ifdef ADJUST_INSN_LENGTH
1207 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1208 if (insn_lengths[uid] < 0)
1209 fatal_insn ("negative insn length", insn);
1213 /* Now loop over all the insns finding varying length insns. For each,
1214 get the current insn length. If it has changed, reflect the change.
1215 When nothing changes for a full pass, we are done. */
1217 while (something_changed)
1219 something_changed = 0;
1220 insn_current_align = MAX_CODE_ALIGN - 1;
1221 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1223 insn = NEXT_INSN (insn))
1226 #ifdef ADJUST_INSN_LENGTH
1231 uid = INSN_UID (insn);
1233 if (GET_CODE (insn) == CODE_LABEL)
1235 int log = LABEL_TO_ALIGNMENT (insn);
1236 if (log > insn_current_align)
1238 int align = 1 << log;
1239 int new_address= (insn_current_address + align - 1) & -align;
1240 insn_lengths[uid] = new_address - insn_current_address;
1241 insn_current_align = log;
1242 insn_current_address = new_address;
1245 insn_lengths[uid] = 0;
1246 INSN_ADDRESSES (uid) = insn_current_address;
1250 length_align = INSN_LENGTH_ALIGNMENT (insn);
1251 if (length_align < insn_current_align)
1252 insn_current_align = length_align;
1254 insn_last_address = INSN_ADDRESSES (uid);
1255 INSN_ADDRESSES (uid) = insn_current_address;
1257 #ifdef CASE_VECTOR_SHORTEN_MODE
1258 if (optimize && GET_CODE (insn) == JUMP_INSN
1259 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1261 rtx body = PATTERN (insn);
1262 int old_length = insn_lengths[uid];
1263 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1264 rtx min_lab = XEXP (XEXP (body, 2), 0);
1265 rtx max_lab = XEXP (XEXP (body, 3), 0);
1266 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1267 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1268 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1271 addr_diff_vec_flags flags;
1273 /* Avoid automatic aggregate initialization. */
1274 flags = ADDR_DIFF_VEC_FLAGS (body);
1276 /* Try to find a known alignment for rel_lab. */
1277 for (prev = rel_lab;
1279 && ! insn_lengths[INSN_UID (prev)]
1280 && ! (varying_length[INSN_UID (prev)] & 1);
1281 prev = PREV_INSN (prev))
1282 if (varying_length[INSN_UID (prev)] & 2)
1284 rel_align = LABEL_TO_ALIGNMENT (prev);
1288 /* See the comment on addr_diff_vec_flags in rtl.h for the
1289 meaning of the flags values. base: REL_LAB vec: INSN */
1290 /* Anything after INSN has still addresses from the last
1291 pass; adjust these so that they reflect our current
1292 estimate for this pass. */
1293 if (flags.base_after_vec)
1294 rel_addr += insn_current_address - insn_last_address;
1295 if (flags.min_after_vec)
1296 min_addr += insn_current_address - insn_last_address;
1297 if (flags.max_after_vec)
1298 max_addr += insn_current_address - insn_last_address;
1299 /* We want to know the worst case, i.e. lowest possible value
1300 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1301 its offset is positive, and we have to be wary of code shrink;
1302 otherwise, it is negative, and we have to be vary of code
1304 if (flags.min_after_base)
1306 /* If INSN is between REL_LAB and MIN_LAB, the size
1307 changes we are about to make can change the alignment
1308 within the observed offset, therefore we have to break
1309 it up into two parts that are independent. */
1310 if (! flags.base_after_vec && flags.min_after_vec)
1312 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1313 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1316 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1320 if (flags.base_after_vec && ! flags.min_after_vec)
1322 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1323 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1326 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1328 /* Likewise, determine the highest lowest possible value
1329 for the offset of MAX_LAB. */
1330 if (flags.max_after_base)
1332 if (! flags.base_after_vec && flags.max_after_vec)
1334 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1335 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1338 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1342 if (flags.base_after_vec && ! flags.max_after_vec)
1344 max_addr += align_fuzz (max_lab, insn, 0, 0);
1345 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1348 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1350 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1351 max_addr - rel_addr,
1353 if (JUMP_TABLES_IN_TEXT_SECTION
1354 #if !defined(READONLY_DATA_SECTION)
1360 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1361 insn_current_address += insn_lengths[uid];
1362 if (insn_lengths[uid] != old_length)
1363 something_changed = 1;
1368 #endif /* CASE_VECTOR_SHORTEN_MODE */
1370 if (! (varying_length[uid]))
1372 if (GET_CODE (insn) == INSN
1373 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1377 body = PATTERN (insn);
1378 for (i = 0; i < XVECLEN (body, 0); i++)
1380 rtx inner_insn = XVECEXP (body, 0, i);
1381 int inner_uid = INSN_UID (inner_insn);
1383 INSN_ADDRESSES (inner_uid) = insn_current_address;
1385 insn_current_address += insn_lengths[inner_uid];
1389 insn_current_address += insn_lengths[uid];
1394 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1398 body = PATTERN (insn);
1400 for (i = 0; i < XVECLEN (body, 0); i++)
1402 rtx inner_insn = XVECEXP (body, 0, i);
1403 int inner_uid = INSN_UID (inner_insn);
1406 INSN_ADDRESSES (inner_uid) = insn_current_address;
1408 /* insn_current_length returns 0 for insns with a
1409 non-varying length. */
1410 if (! varying_length[inner_uid])
1411 inner_length = insn_lengths[inner_uid];
1413 inner_length = insn_current_length (inner_insn);
1415 if (inner_length != insn_lengths[inner_uid])
1417 insn_lengths[inner_uid] = inner_length;
1418 something_changed = 1;
1420 insn_current_address += insn_lengths[inner_uid];
1421 new_length += inner_length;
1426 new_length = insn_current_length (insn);
1427 insn_current_address += new_length;
1430 #ifdef ADJUST_INSN_LENGTH
1431 /* If needed, do any adjustment. */
1432 tmp_length = new_length;
1433 ADJUST_INSN_LENGTH (insn, new_length);
1434 insn_current_address += (new_length - tmp_length);
1437 if (new_length != insn_lengths[uid])
1439 insn_lengths[uid] = new_length;
1440 something_changed = 1;
1443 /* For a non-optimizing compile, do only a single pass. */
1448 free (varying_length);
1450 #endif /* HAVE_ATTR_length */
1453 #ifdef HAVE_ATTR_length
1454 /* Given the body of an INSN known to be generated by an ASM statement, return
1455 the number of machine instructions likely to be generated for this insn.
1456 This is used to compute its length. */
1459 asm_insn_count (body)
1462 const char *template;
1465 if (GET_CODE (body) == ASM_INPUT)
1466 template = XSTR (body, 0);
1468 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1470 for (; *template; template++)
1471 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1478 /* Output assembler code for the start of a function,
1479 and initialize some of the variables in this file
1480 for the new function. The label for the function and associated
1481 assembler pseudo-ops have already been output in `assemble_start_function'.
1483 FIRST is the first insn of the rtl for the function being compiled.
1484 FILE is the file to write assembler code to.
1485 OPTIMIZE is nonzero if we should eliminate redundant
1486 test and compare insns. */
1489 final_start_function (first, file, optimize)
1492 int optimize ATTRIBUTE_UNUSED;
1496 this_is_asm_operands = 0;
1498 #ifdef NON_SAVING_SETJMP
1499 /* A function that calls setjmp should save and restore all the
1500 call-saved registers on a system where longjmp clobbers them. */
1501 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1505 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1506 if (!call_used_regs[i])
1507 regs_ever_live[i] = 1;
1511 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1512 notice_source_line (first);
1513 high_block_linenum = high_function_linenum = last_linenum;
1515 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1517 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1518 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1519 dwarf2out_begin_prologue (0, NULL);
1522 #ifdef LEAF_REG_REMAP
1523 if (current_function_uses_only_leaf_regs)
1524 leaf_renumber_regs (first);
1527 /* The Sun386i and perhaps other machines don't work right
1528 if the profiling code comes after the prologue. */
1529 #ifdef PROFILE_BEFORE_PROLOGUE
1530 if (current_function_profile)
1531 profile_function (file);
1532 #endif /* PROFILE_BEFORE_PROLOGUE */
1534 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1535 if (dwarf2out_do_frame ())
1536 dwarf2out_frame_debug (NULL_RTX);
1539 /* If debugging, assign block numbers to all of the blocks in this
1543 remove_unnecessary_notes ();
1545 number_blocks (current_function_decl);
1546 /* We never actually put out begin/end notes for the top-level
1547 block in the function. But, conceptually, that block is
1549 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1552 /* First output the function prologue: code to set up the stack frame. */
1553 (*targetm.asm_out.function_prologue) (file, get_frame_size ());
1555 #ifdef VMS_DEBUGGING_INFO
1556 /* Output label after the prologue of the function. */
1557 if (write_symbols == VMS_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG)
1558 vmsdbgout_after_prologue ();
1561 /* If the machine represents the prologue as RTL, the profiling code must
1562 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1563 #ifdef HAVE_prologue
1564 if (! HAVE_prologue)
1566 profile_after_prologue (file);
1572 profile_after_prologue (file)
1573 FILE *file ATTRIBUTE_UNUSED;
1575 #ifndef PROFILE_BEFORE_PROLOGUE
1576 if (current_function_profile)
1577 profile_function (file);
1578 #endif /* not PROFILE_BEFORE_PROLOGUE */
1582 profile_function (file)
1583 FILE *file ATTRIBUTE_UNUSED;
1585 #ifndef NO_PROFILE_COUNTERS
1586 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1588 #if defined(ASM_OUTPUT_REG_PUSH)
1589 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1590 int sval = current_function_returns_struct;
1592 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1593 int cxt = current_function_needs_context;
1595 #endif /* ASM_OUTPUT_REG_PUSH */
1597 #ifndef NO_PROFILE_COUNTERS
1599 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1600 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", profile_label_no);
1601 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1604 function_section (current_function_decl);
1606 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1608 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1610 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1613 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1618 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1620 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1622 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1625 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1630 FUNCTION_PROFILER (file, profile_label_no);
1632 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1634 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1636 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1639 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1644 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1646 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1648 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1651 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1657 /* Output assembler code for the end of a function.
1658 For clarity, args are same as those of `final_start_function'
1659 even though not all of them are needed. */
1662 final_end_function ()
1666 (*debug_hooks->end_function) (high_function_linenum);
1668 /* Finally, output the function epilogue:
1669 code to restore the stack frame and return to the caller. */
1670 (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ());
1672 /* And debug output. */
1673 (*debug_hooks->end_epilogue) ();
1675 #if defined (DWARF2_UNWIND_INFO)
1676 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1677 && dwarf2out_do_frame ())
1678 dwarf2out_end_epilogue ();
1682 /* Output assembler code for some insns: all or part of a function.
1683 For description of args, see `final_start_function', above.
1685 PRESCAN is 1 if we are not really outputting,
1686 just scanning as if we were outputting.
1687 Prescanning deletes and rearranges insns just like ordinary output.
1688 PRESCAN is -2 if we are outputting after having prescanned.
1689 In this case, don't try to delete or rearrange insns
1690 because that has already been done.
1691 Prescanning is done only on certain machines. */
1694 final (first, file, optimize, prescan)
1704 last_ignored_compare = 0;
1707 /* Make a map indicating which line numbers appear in this function.
1708 When producing SDB debugging info, delete troublesome line number
1709 notes from inlined functions in other files as well as duplicate
1710 line number notes. */
1711 #ifdef SDB_DEBUGGING_INFO
1712 if (write_symbols == SDB_DEBUG)
1715 for (insn = first; insn; insn = NEXT_INSN (insn))
1716 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1718 if ((RTX_INTEGRATED_P (insn)
1719 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1721 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1722 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1724 delete_insn (insn); /* Use delete_note. */
1728 if (NOTE_LINE_NUMBER (insn) > max_line)
1729 max_line = NOTE_LINE_NUMBER (insn);
1735 for (insn = first; insn; insn = NEXT_INSN (insn))
1736 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1737 max_line = NOTE_LINE_NUMBER (insn);
1740 line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char));
1742 for (insn = first; insn; insn = NEXT_INSN (insn))
1744 if (INSN_UID (insn) > max_uid) /* find largest UID */
1745 max_uid = INSN_UID (insn);
1746 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1747 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
1749 /* If CC tracking across branches is enabled, record the insn which
1750 jumps to each branch only reached from one place. */
1751 if (optimize && GET_CODE (insn) == JUMP_INSN)
1753 rtx lab = JUMP_LABEL (insn);
1754 if (lab && LABEL_NUSES (lab) == 1)
1756 LABEL_REFS (lab) = insn;
1766 /* Output the insns. */
1767 for (insn = NEXT_INSN (first); insn;)
1769 #ifdef HAVE_ATTR_length
1770 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1773 /* Irritatingly, the reg-stack pass is creating new instructions
1774 and because of REG_DEAD note abuse it has to run after
1775 shorten_branches. Fake address of -1 then. */
1776 insn_current_address = -1;
1778 /* This can be triggered by bugs elsewhere in the compiler if
1779 new insns are created after init_insn_lengths is called. */
1784 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1785 #endif /* HAVE_ATTR_length */
1787 insn = final_scan_insn (insn, file, optimize, prescan, 0);
1790 free (line_note_exists);
1791 line_note_exists = NULL;
1795 get_insn_template (code, insn)
1799 const void *output = insn_data[code].output;
1800 switch (insn_data[code].output_format)
1802 case INSN_OUTPUT_FORMAT_SINGLE:
1803 return (const char *) output;
1804 case INSN_OUTPUT_FORMAT_MULTI:
1805 return ((const char *const *) output)[which_alternative];
1806 case INSN_OUTPUT_FORMAT_FUNCTION:
1809 return (*(insn_output_fn) output) (recog_data.operand, insn);
1816 /* The final scan for one insn, INSN.
1817 Args are same as in `final', except that INSN
1818 is the insn being scanned.
1819 Value returned is the next insn to be scanned.
1821 NOPEEPHOLES is the flag to disallow peephole processing (currently
1822 used for within delayed branch sequence output). */
1825 final_scan_insn (insn, file, optimize, prescan, nopeepholes)
1828 int optimize ATTRIBUTE_UNUSED;
1830 int nopeepholes ATTRIBUTE_UNUSED;
1838 /* Ignore deleted insns. These can occur when we split insns (due to a
1839 template of "#") while not optimizing. */
1840 if (INSN_DELETED_P (insn))
1841 return NEXT_INSN (insn);
1843 switch (GET_CODE (insn))
1849 switch (NOTE_LINE_NUMBER (insn))
1851 case NOTE_INSN_DELETED:
1852 case NOTE_INSN_LOOP_BEG:
1853 case NOTE_INSN_LOOP_END:
1854 case NOTE_INSN_LOOP_CONT:
1855 case NOTE_INSN_LOOP_VTOP:
1856 case NOTE_INSN_FUNCTION_END:
1857 case NOTE_INSN_REPEATED_LINE_NUMBER:
1858 case NOTE_INSN_RANGE_BEG:
1859 case NOTE_INSN_RANGE_END:
1860 case NOTE_INSN_LIVE:
1861 case NOTE_INSN_EXPECTED_VALUE:
1864 case NOTE_INSN_BASIC_BLOCK:
1865 #ifdef IA64_UNWIND_INFO
1866 IA64_UNWIND_EMIT (asm_out_file, insn);
1869 fprintf (asm_out_file, "\t%s basic block %d\n",
1870 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1873 case NOTE_INSN_EH_REGION_BEG:
1874 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1875 NOTE_EH_HANDLER (insn));
1878 case NOTE_INSN_EH_REGION_END:
1879 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1880 NOTE_EH_HANDLER (insn));
1883 case NOTE_INSN_PROLOGUE_END:
1884 (*targetm.asm_out.function_end_prologue) (file);
1885 profile_after_prologue (file);
1888 case NOTE_INSN_EPILOGUE_BEG:
1889 (*targetm.asm_out.function_begin_epilogue) (file);
1892 case NOTE_INSN_FUNCTION_BEG:
1894 (*debug_hooks->end_prologue) (last_linenum);
1897 case NOTE_INSN_BLOCK_BEG:
1898 if (debug_info_level == DINFO_LEVEL_NORMAL
1899 || debug_info_level == DINFO_LEVEL_VERBOSE
1900 || write_symbols == DWARF_DEBUG
1901 || write_symbols == DWARF2_DEBUG
1902 || write_symbols == VMS_AND_DWARF2_DEBUG
1903 || write_symbols == VMS_DEBUG)
1905 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1909 high_block_linenum = last_linenum;
1911 /* Output debugging info about the symbol-block beginning. */
1912 (*debug_hooks->begin_block) (last_linenum, n);
1914 /* Mark this block as output. */
1915 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1919 case NOTE_INSN_BLOCK_END:
1920 if (debug_info_level == DINFO_LEVEL_NORMAL
1921 || debug_info_level == DINFO_LEVEL_VERBOSE
1922 || write_symbols == DWARF_DEBUG
1923 || write_symbols == DWARF2_DEBUG
1924 || write_symbols == VMS_AND_DWARF2_DEBUG
1925 || write_symbols == VMS_DEBUG)
1927 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1931 /* End of a symbol-block. */
1933 if (block_depth < 0)
1936 (*debug_hooks->end_block) (high_block_linenum, n);
1940 case NOTE_INSN_DELETED_LABEL:
1941 /* Emit the label. We may have deleted the CODE_LABEL because
1942 the label could be proved to be unreachable, though still
1943 referenced (in the form of having its address taken. */
1944 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1951 if (NOTE_LINE_NUMBER (insn) <= 0)
1954 /* This note is a line-number. */
1959 /* If there is anything real after this note, output it.
1960 If another line note follows, omit this one. */
1961 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
1963 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
1966 /* These types of notes can be significant
1967 so make sure the preceding line number stays. */
1968 else if (GET_CODE (note) == NOTE
1969 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
1970 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
1971 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
1973 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
1975 /* Another line note follows; we can delete this note
1976 if no intervening line numbers have notes elsewhere. */
1978 for (num = NOTE_LINE_NUMBER (insn) + 1;
1979 num < NOTE_LINE_NUMBER (note);
1981 if (line_note_exists[num])
1984 if (num >= NOTE_LINE_NUMBER (note))
1990 /* Output this line note if it is the first or the last line
1994 notice_source_line (insn);
1995 (*debug_hooks->source_line) (last_linenum, last_filename);
2003 #if defined (DWARF2_UNWIND_INFO)
2004 if (dwarf2out_do_frame ())
2005 dwarf2out_frame_debug (insn);
2010 /* The target port might emit labels in the output function for
2011 some insn, e.g. sh.c output_branchy_insn. */
2012 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2014 int align = LABEL_TO_ALIGNMENT (insn);
2015 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2016 int max_skip = LABEL_TO_MAX_SKIP (insn);
2019 if (align && NEXT_INSN (insn))
2021 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2022 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2024 ASM_OUTPUT_ALIGN (file, align);
2030 /* If this label is reached from only one place, set the condition
2031 codes from the instruction just before the branch. */
2033 /* Disabled because some insns set cc_status in the C output code
2034 and NOTICE_UPDATE_CC alone can set incorrect status. */
2035 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2037 rtx jump = LABEL_REFS (insn);
2038 rtx barrier = prev_nonnote_insn (insn);
2040 /* If the LABEL_REFS field of this label has been set to point
2041 at a branch, the predecessor of the branch is a regular
2042 insn, and that branch is the only way to reach this label,
2043 set the condition codes based on the branch and its
2045 if (barrier && GET_CODE (barrier) == BARRIER
2046 && jump && GET_CODE (jump) == JUMP_INSN
2047 && (prev = prev_nonnote_insn (jump))
2048 && GET_CODE (prev) == INSN)
2050 NOTICE_UPDATE_CC (PATTERN (prev), prev);
2051 NOTICE_UPDATE_CC (PATTERN (jump), jump);
2059 #ifdef FINAL_PRESCAN_LABEL
2060 FINAL_PRESCAN_INSN (insn, NULL, 0);
2063 if (LABEL_NAME (insn))
2064 (*debug_hooks->label) (insn);
2068 fputs (ASM_APP_OFF, file);
2071 if (NEXT_INSN (insn) != 0
2072 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2074 rtx nextbody = PATTERN (NEXT_INSN (insn));
2076 /* If this label is followed by a jump-table,
2077 make sure we put the label in the read-only section. Also
2078 possibly write the label and jump table together. */
2080 if (GET_CODE (nextbody) == ADDR_VEC
2081 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2083 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2084 /* In this case, the case vector is being moved by the
2085 target, so don't output the label at all. Leave that
2086 to the back end macros. */
2088 if (! JUMP_TABLES_IN_TEXT_SECTION)
2092 readonly_data_section ();
2094 #ifdef ADDR_VEC_ALIGN
2095 log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn));
2097 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2099 ASM_OUTPUT_ALIGN (file, log_align);
2102 function_section (current_function_decl);
2104 #ifdef ASM_OUTPUT_CASE_LABEL
2105 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2108 if (LABEL_ALTERNATE_NAME (insn))
2109 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2111 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2117 if (LABEL_ALTERNATE_NAME (insn))
2118 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2120 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2125 rtx body = PATTERN (insn);
2126 int insn_code_number;
2127 const char *template;
2130 /* An INSN, JUMP_INSN or CALL_INSN.
2131 First check for special kinds that recog doesn't recognize. */
2133 if (GET_CODE (body) == USE /* These are just declarations */
2134 || GET_CODE (body) == CLOBBER)
2138 /* If there is a REG_CC_SETTER note on this insn, it means that
2139 the setting of the condition code was done in the delay slot
2140 of the insn that branched here. So recover the cc status
2141 from the insn that set it. */
2143 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2146 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2147 cc_prev_status = cc_status;
2151 /* Detect insns that are really jump-tables
2152 and output them as such. */
2154 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2156 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2165 fputs (ASM_APP_OFF, file);
2169 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2170 if (GET_CODE (body) == ADDR_VEC)
2172 #ifdef ASM_OUTPUT_ADDR_VEC
2173 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2180 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2181 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2187 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2188 for (idx = 0; idx < vlen; idx++)
2190 if (GET_CODE (body) == ADDR_VEC)
2192 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2193 ASM_OUTPUT_ADDR_VEC_ELT
2194 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2201 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2202 ASM_OUTPUT_ADDR_DIFF_ELT
2205 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2206 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2212 #ifdef ASM_OUTPUT_CASE_END
2213 ASM_OUTPUT_CASE_END (file,
2214 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2219 function_section (current_function_decl);
2224 if (GET_CODE (body) == ASM_INPUT)
2226 const char *string = XSTR (body, 0);
2228 /* There's no telling what that did to the condition codes. */
2237 fputs (ASM_APP_ON, file);
2240 fprintf (asm_out_file, "\t%s\n", string);
2245 /* Detect `asm' construct with operands. */
2246 if (asm_noperands (body) >= 0)
2248 unsigned int noperands = asm_noperands (body);
2249 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
2252 /* There's no telling what that did to the condition codes. */
2257 /* Get out the operand values. */
2258 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2259 /* Inhibit aborts on what would otherwise be compiler bugs. */
2260 insn_noperands = noperands;
2261 this_is_asm_operands = insn;
2263 /* Output the insn using them. */
2268 fputs (ASM_APP_ON, file);
2271 output_asm_insn (string, ops);
2274 this_is_asm_operands = 0;
2278 if (prescan <= 0 && app_on)
2280 fputs (ASM_APP_OFF, file);
2284 if (GET_CODE (body) == SEQUENCE)
2286 /* A delayed-branch sequence */
2292 final_sequence = body;
2294 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2295 force the restoration of a comparison that was previously
2296 thought unnecessary. If that happens, cancel this sequence
2297 and cause that insn to be restored. */
2299 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2300 if (next != XVECEXP (body, 0, 1))
2306 for (i = 1; i < XVECLEN (body, 0); i++)
2308 rtx insn = XVECEXP (body, 0, i);
2309 rtx next = NEXT_INSN (insn);
2310 /* We loop in case any instruction in a delay slot gets
2313 insn = final_scan_insn (insn, file, 0, prescan, 1);
2314 while (insn != next);
2316 #ifdef DBR_OUTPUT_SEQEND
2317 DBR_OUTPUT_SEQEND (file);
2321 /* If the insn requiring the delay slot was a CALL_INSN, the
2322 insns in the delay slot are actually executed before the
2323 called function. Hence we don't preserve any CC-setting
2324 actions in these insns and the CC must be marked as being
2325 clobbered by the function. */
2326 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
2333 /* We have a real machine instruction as rtl. */
2335 body = PATTERN (insn);
2338 set = single_set (insn);
2340 /* Check for redundant test and compare instructions
2341 (when the condition codes are already set up as desired).
2342 This is done only when optimizing; if not optimizing,
2343 it should be possible for the user to alter a variable
2344 with the debugger in between statements
2345 and the next statement should reexamine the variable
2346 to compute the condition codes. */
2351 rtx set = single_set (insn);
2355 && GET_CODE (SET_DEST (set)) == CC0
2356 && insn != last_ignored_compare)
2358 if (GET_CODE (SET_SRC (set)) == SUBREG)
2359 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2360 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2362 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2363 XEXP (SET_SRC (set), 0)
2364 = alter_subreg (&XEXP (SET_SRC (set), 0));
2365 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2366 XEXP (SET_SRC (set), 1)
2367 = alter_subreg (&XEXP (SET_SRC (set), 1));
2369 if ((cc_status.value1 != 0
2370 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2371 || (cc_status.value2 != 0
2372 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2374 /* Don't delete insn if it has an addressing side-effect. */
2375 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2376 /* or if anything in it is volatile. */
2377 && ! volatile_refs_p (PATTERN (insn)))
2379 /* We don't really delete the insn; just ignore it. */
2380 last_ignored_compare = insn;
2389 /* Don't bother outputting obvious no-ops, even without -O.
2390 This optimization is fast and doesn't interfere with debugging.
2391 Don't do this if the insn is in a delay slot, since this
2392 will cause an improper number of delay insns to be written. */
2393 if (final_sequence == 0
2395 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2396 && GET_CODE (SET_SRC (body)) == REG
2397 && GET_CODE (SET_DEST (body)) == REG
2398 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2403 /* If this is a conditional branch, maybe modify it
2404 if the cc's are in a nonstandard state
2405 so that it accomplishes the same thing that it would
2406 do straightforwardly if the cc's were set up normally. */
2408 if (cc_status.flags != 0
2409 && GET_CODE (insn) == JUMP_INSN
2410 && GET_CODE (body) == SET
2411 && SET_DEST (body) == pc_rtx
2412 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2413 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
2414 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
2415 /* This is done during prescan; it is not done again
2416 in final scan when prescan has been done. */
2419 /* This function may alter the contents of its argument
2420 and clear some of the cc_status.flags bits.
2421 It may also return 1 meaning condition now always true
2422 or -1 meaning condition now always false
2423 or 2 meaning condition nontrivial but altered. */
2424 int result = alter_cond (XEXP (SET_SRC (body), 0));
2425 /* If condition now has fixed value, replace the IF_THEN_ELSE
2426 with its then-operand or its else-operand. */
2428 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2430 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2432 /* The jump is now either unconditional or a no-op.
2433 If it has become a no-op, don't try to output it.
2434 (It would not be recognized.) */
2435 if (SET_SRC (body) == pc_rtx)
2440 else if (GET_CODE (SET_SRC (body)) == RETURN)
2441 /* Replace (set (pc) (return)) with (return). */
2442 PATTERN (insn) = body = SET_SRC (body);
2444 /* Rerecognize the instruction if it has changed. */
2446 INSN_CODE (insn) = -1;
2449 /* Make same adjustments to instructions that examine the
2450 condition codes without jumping and instructions that
2451 handle conditional moves (if this machine has either one). */
2453 if (cc_status.flags != 0
2456 rtx cond_rtx, then_rtx, else_rtx;
2458 if (GET_CODE (insn) != JUMP_INSN
2459 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2461 cond_rtx = XEXP (SET_SRC (set), 0);
2462 then_rtx = XEXP (SET_SRC (set), 1);
2463 else_rtx = XEXP (SET_SRC (set), 2);
2467 cond_rtx = SET_SRC (set);
2468 then_rtx = const_true_rtx;
2469 else_rtx = const0_rtx;
2472 switch (GET_CODE (cond_rtx))
2486 if (XEXP (cond_rtx, 0) != cc0_rtx)
2488 result = alter_cond (cond_rtx);
2490 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2491 else if (result == -1)
2492 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2493 else if (result == 2)
2494 INSN_CODE (insn) = -1;
2495 if (SET_DEST (set) == SET_SRC (set))
2507 #ifdef HAVE_peephole
2508 /* Do machine-specific peephole optimizations if desired. */
2510 if (optimize && !flag_no_peephole && !nopeepholes)
2512 rtx next = peephole (insn);
2513 /* When peepholing, if there were notes within the peephole,
2514 emit them before the peephole. */
2515 if (next != 0 && next != NEXT_INSN (insn))
2517 rtx prev = PREV_INSN (insn);
2519 for (note = NEXT_INSN (insn); note != next;
2520 note = NEXT_INSN (note))
2521 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2523 /* In case this is prescan, put the notes
2524 in proper position for later rescan. */
2525 note = NEXT_INSN (insn);
2526 PREV_INSN (note) = prev;
2527 NEXT_INSN (prev) = note;
2528 NEXT_INSN (PREV_INSN (next)) = insn;
2529 PREV_INSN (insn) = PREV_INSN (next);
2530 NEXT_INSN (insn) = next;
2531 PREV_INSN (next) = insn;
2534 /* PEEPHOLE might have changed this. */
2535 body = PATTERN (insn);
2539 /* Try to recognize the instruction.
2540 If successful, verify that the operands satisfy the
2541 constraints for the instruction. Crash if they don't,
2542 since `reload' should have changed them so that they do. */
2544 insn_code_number = recog_memoized (insn);
2545 cleanup_subreg_operands (insn);
2547 /* Dump the insn in the assembly for debugging. */
2548 if (flag_dump_rtl_in_asm)
2550 print_rtx_head = ASM_COMMENT_START;
2551 print_rtl_single (asm_out_file, insn);
2552 print_rtx_head = "";
2555 if (! constrain_operands_cached (1))
2556 fatal_insn_not_found (insn);
2558 /* Some target machines need to prescan each insn before
2561 #ifdef FINAL_PRESCAN_INSN
2562 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2565 #ifdef HAVE_conditional_execution
2566 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2567 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2569 current_insn_predicate = NULL_RTX;
2573 cc_prev_status = cc_status;
2575 /* Update `cc_status' for this instruction.
2576 The instruction's output routine may change it further.
2577 If the output routine for a jump insn needs to depend
2578 on the cc status, it should look at cc_prev_status. */
2580 NOTICE_UPDATE_CC (body, insn);
2583 current_output_insn = debug_insn = insn;
2585 #if defined (DWARF2_UNWIND_INFO)
2586 if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ())
2587 dwarf2out_frame_debug (insn);
2590 /* Find the proper template for this insn. */
2591 template = get_insn_template (insn_code_number, insn);
2593 /* If the C code returns 0, it means that it is a jump insn
2594 which follows a deleted test insn, and that test insn
2595 needs to be reinserted. */
2600 if (prev_nonnote_insn (insn) != last_ignored_compare)
2604 /* We have already processed the notes between the setter and
2605 the user. Make sure we don't process them again, this is
2606 particularly important if one of the notes is a block
2607 scope note or an EH note. */
2609 prev != last_ignored_compare;
2610 prev = PREV_INSN (prev))
2612 if (GET_CODE (prev) == NOTE)
2613 delete_insn (prev); /* Use delete_note. */
2619 /* If the template is the string "#", it means that this insn must
2621 if (template[0] == '#' && template[1] == '\0')
2623 rtx new = try_split (body, insn, 0);
2625 /* If we didn't split the insn, go away. */
2626 if (new == insn && PATTERN (new) == body)
2627 fatal_insn ("could not split insn", insn);
2629 #ifdef HAVE_ATTR_length
2630 /* This instruction should have been split in shorten_branches,
2631 to ensure that we would have valid length info for the
2643 #ifdef IA64_UNWIND_INFO
2644 IA64_UNWIND_EMIT (asm_out_file, insn);
2646 /* Output assembler code from the template. */
2648 output_asm_insn (template, recog_data.operand);
2650 #if defined (DWARF2_UNWIND_INFO)
2651 #if defined (HAVE_prologue)
2652 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
2653 dwarf2out_frame_debug (insn);
2655 if (!ACCUMULATE_OUTGOING_ARGS
2656 && GET_CODE (insn) == INSN
2657 && dwarf2out_do_frame ())
2658 dwarf2out_frame_debug (insn);
2663 /* It's not at all clear why we did this and doing so interferes
2664 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2667 /* Mark this insn as having been output. */
2668 INSN_DELETED_P (insn) = 1;
2671 /* Emit information for vtable gc. */
2672 note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX);
2674 assemble_vtable_entry (XEXP (XEXP (note, 0), 0),
2675 INTVAL (XEXP (XEXP (note, 0), 1)));
2677 current_output_insn = debug_insn = 0;
2680 return NEXT_INSN (insn);
2683 /* Output debugging info to the assembler file FILE
2684 based on the NOTE-insn INSN, assumed to be a line number. */
2687 notice_source_line (insn)
2690 const char *filename = NOTE_SOURCE_FILE (insn);
2692 last_filename = filename;
2693 last_linenum = NOTE_LINE_NUMBER (insn);
2694 high_block_linenum = MAX (last_linenum, high_block_linenum);
2695 high_function_linenum = MAX (last_linenum, high_function_linenum);
2698 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2699 directly to the desired hard register. */
2702 cleanup_subreg_operands (insn)
2706 extract_insn_cached (insn);
2707 for (i = 0; i < recog_data.n_operands; i++)
2709 /* The following test cannot use recog_data.operand when tesing
2710 for a SUBREG: the underlying object might have been changed
2711 already if we are inside a match_operator expression that
2712 matches the else clause. Instead we test the underlying
2713 expression directly. */
2714 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2715 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2716 else if (GET_CODE (recog_data.operand[i]) == PLUS
2717 || GET_CODE (recog_data.operand[i]) == MULT
2718 || GET_CODE (recog_data.operand[i]) == MEM)
2719 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2722 for (i = 0; i < recog_data.n_dups; i++)
2724 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2725 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2726 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2727 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2728 || GET_CODE (*recog_data.dup_loc[i]) == MEM)
2729 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2733 /* If X is a SUBREG, replace it with a REG or a MEM,
2734 based on the thing it is a subreg of. */
2741 rtx y = SUBREG_REG (x);
2743 /* simplify_subreg does not remove subreg from volatile references.
2744 We are required to. */
2745 if (GET_CODE (y) == MEM)
2746 *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x));
2749 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2754 /* Simplify_subreg can't handle some REG cases, but we have to. */
2755 else if (GET_CODE (y) == REG)
2757 unsigned int regno = subreg_hard_regno (x, 1);
2760 ORIGINAL_REGNO (x) = ORIGINAL_REGNO (y);
2761 /* This field has a different meaning for REGs and SUBREGs. Make
2762 sure to clear it! */
2772 /* Do alter_subreg on all the SUBREGs contained in X. */
2775 walk_alter_subreg (xp)
2779 switch (GET_CODE (x))
2783 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2784 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2788 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2792 return alter_subreg (xp);
2803 /* Given BODY, the body of a jump instruction, alter the jump condition
2804 as required by the bits that are set in cc_status.flags.
2805 Not all of the bits there can be handled at this level in all cases.
2807 The value is normally 0.
2808 1 means that the condition has become always true.
2809 -1 means that the condition has become always false.
2810 2 means that COND has been altered. */
2818 if (cc_status.flags & CC_REVERSED)
2821 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2824 if (cc_status.flags & CC_INVERTED)
2827 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2830 if (cc_status.flags & CC_NOT_POSITIVE)
2831 switch (GET_CODE (cond))
2836 /* Jump becomes unconditional. */
2842 /* Jump becomes no-op. */
2846 PUT_CODE (cond, EQ);
2851 PUT_CODE (cond, NE);
2859 if (cc_status.flags & CC_NOT_NEGATIVE)
2860 switch (GET_CODE (cond))
2864 /* Jump becomes unconditional. */
2869 /* Jump becomes no-op. */
2874 PUT_CODE (cond, EQ);
2880 PUT_CODE (cond, NE);
2888 if (cc_status.flags & CC_NO_OVERFLOW)
2889 switch (GET_CODE (cond))
2892 /* Jump becomes unconditional. */
2896 PUT_CODE (cond, EQ);
2901 PUT_CODE (cond, NE);
2906 /* Jump becomes no-op. */
2913 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2914 switch (GET_CODE (cond))
2920 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2925 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2930 if (cc_status.flags & CC_NOT_SIGNED)
2931 /* The flags are valid if signed condition operators are converted
2933 switch (GET_CODE (cond))
2936 PUT_CODE (cond, LEU);
2941 PUT_CODE (cond, LTU);
2946 PUT_CODE (cond, GTU);
2951 PUT_CODE (cond, GEU);
2963 /* Report inconsistency between the assembler template and the operands.
2964 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2967 output_operand_lossage (msgid)
2970 if (this_is_asm_operands)
2971 error_for_asm (this_is_asm_operands, "invalid `asm': %s", _(msgid));
2973 internal_error ("output_operand: %s", _(msgid));
2976 /* Output of assembler code from a template, and its subroutines. */
2978 /* Annotate the assembly with a comment describing the pattern and
2979 alternative used. */
2986 int num = INSN_CODE (debug_insn);
2987 fprintf (asm_out_file, "\t%s %d\t%s",
2988 ASM_COMMENT_START, INSN_UID (debug_insn),
2989 insn_data[num].name);
2990 if (insn_data[num].n_alternatives > 1)
2991 fprintf (asm_out_file, "/%d", which_alternative + 1);
2992 #ifdef HAVE_ATTR_length
2993 fprintf (asm_out_file, "\t[length = %d]",
2994 get_attr_length (debug_insn));
2996 /* Clear this so only the first assembler insn
2997 of any rtl insn will get the special comment for -dp. */
3002 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3003 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3004 corresponds to the address of the object and 0 if to the object. */
3007 get_mem_expr_from_op (op, paddressp)
3016 if (GET_CODE (op) == REG && ORIGINAL_REGNO (op) >= FIRST_PSEUDO_REGISTER)
3017 return REGNO_DECL (ORIGINAL_REGNO (op));
3018 else if (GET_CODE (op) != MEM)
3021 if (MEM_EXPR (op) != 0)
3022 return MEM_EXPR (op);
3024 /* Otherwise we have an address, so indicate it and look at the address. */
3028 /* First check if we have a decl for the address, then look at the right side
3029 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3030 But don't allow the address to itself be indirect. */
3031 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3033 else if (GET_CODE (op) == PLUS
3034 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3037 while (GET_RTX_CLASS (GET_CODE (op)) == '1'
3038 || GET_RTX_CLASS (GET_CODE (op)) == '2')
3041 expr = get_mem_expr_from_op (op, &inner_addressp);
3042 return inner_addressp ? 0 : expr;
3045 /* Output operand names for assembler instructions. OPERANDS is the
3046 operand vector, OPORDER is the order to write the operands, and NOPS
3047 is the number of operands to write. */
3050 output_asm_operand_names (operands, oporder, nops)
3058 for (i = 0; i < nops; i++)
3061 tree expr = get_mem_expr_from_op (operands[oporder[i]], &addressp);
3065 fprintf (asm_out_file, "%c%s %s",
3066 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START,
3067 addressp ? "*" : "");
3068 print_mem_expr (asm_out_file, expr);
3074 /* Output text from TEMPLATE to the assembler output file,
3075 obeying %-directions to substitute operands taken from
3076 the vector OPERANDS.
3078 %N (for N a digit) means print operand N in usual manner.
3079 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3080 and print the label name with no punctuation.
3081 %cN means require operand N to be a constant
3082 and print the constant expression with no punctuation.
3083 %aN means expect operand N to be a memory address
3084 (not a memory reference!) and print a reference
3086 %nN means expect operand N to be a constant
3087 and print a constant expression for minus the value
3088 of the operand, with no other punctuation. */
3091 output_asm_insn (template, operands)
3092 const char *template;
3097 #ifdef ASSEMBLER_DIALECT
3100 int oporder[MAX_RECOG_OPERANDS];
3101 char opoutput[MAX_RECOG_OPERANDS];
3104 /* An insn may return a null string template
3105 in a case where no assembler code is needed. */
3109 memset (opoutput, 0, sizeof opoutput);
3111 putc ('\t', asm_out_file);
3113 #ifdef ASM_OUTPUT_OPCODE
3114 ASM_OUTPUT_OPCODE (asm_out_file, p);
3121 if (flag_verbose_asm)
3122 output_asm_operand_names (operands, oporder, ops);
3123 if (flag_print_asm_name)
3127 memset (opoutput, 0, sizeof opoutput);
3129 putc (c, asm_out_file);
3130 #ifdef ASM_OUTPUT_OPCODE
3131 while ((c = *p) == '\t')
3133 putc (c, asm_out_file);
3136 ASM_OUTPUT_OPCODE (asm_out_file, p);
3140 #ifdef ASSEMBLER_DIALECT
3146 output_operand_lossage ("nested assembly dialect alternatives");
3150 /* If we want the first dialect, do nothing. Otherwise, skip
3151 DIALECT_NUMBER of strings ending with '|'. */
3152 for (i = 0; i < dialect_number; i++)
3154 while (*p && *p != '}' && *p++ != '|')
3163 output_operand_lossage ("unterminated assembly dialect alternative");
3170 /* Skip to close brace. */
3175 output_operand_lossage ("unterminated assembly dialect alternative");
3179 while (*p++ != '}');
3183 putc (c, asm_out_file);
3188 putc (c, asm_out_file);
3194 /* %% outputs a single %. */
3198 putc (c, asm_out_file);
3200 /* %= outputs a number which is unique to each insn in the entire
3201 compilation. This is useful for making local labels that are
3202 referred to more than once in a given insn. */
3206 fprintf (asm_out_file, "%d", insn_counter);
3208 /* % followed by a letter and some digits
3209 outputs an operand in a special way depending on the letter.
3210 Letters `acln' are implemented directly.
3211 Other letters are passed to `output_operand' so that
3212 the PRINT_OPERAND macro can define them. */
3213 else if (ISALPHA (*p))
3219 output_operand_lossage ("operand number missing after %-letter");
3220 else if (this_is_asm_operands
3221 && (c < 0 || (unsigned int) c >= insn_noperands))
3222 output_operand_lossage ("operand number out of range");
3223 else if (letter == 'l')
3224 output_asm_label (operands[c]);
3225 else if (letter == 'a')
3226 output_address (operands[c]);
3227 else if (letter == 'c')
3229 if (CONSTANT_ADDRESS_P (operands[c]))
3230 output_addr_const (asm_out_file, operands[c]);
3232 output_operand (operands[c], 'c');
3234 else if (letter == 'n')
3236 if (GET_CODE (operands[c]) == CONST_INT)
3237 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3238 - INTVAL (operands[c]));
3241 putc ('-', asm_out_file);
3242 output_addr_const (asm_out_file, operands[c]);
3246 output_operand (operands[c], letter);
3252 while (ISDIGIT (c = *p))
3255 /* % followed by a digit outputs an operand the default way. */
3256 else if (ISDIGIT (*p))
3259 if (this_is_asm_operands
3260 && (c < 0 || (unsigned int) c >= insn_noperands))
3261 output_operand_lossage ("operand number out of range");
3263 output_operand (operands[c], 0);
3269 while (ISDIGIT (c = *p))
3272 /* % followed by punctuation: output something for that
3273 punctuation character alone, with no operand.
3274 The PRINT_OPERAND macro decides what is actually done. */
3275 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3276 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3277 output_operand (NULL_RTX, *p++);
3280 output_operand_lossage ("invalid %%-code");
3284 putc (c, asm_out_file);
3287 /* Write out the variable names for operands, if we know them. */
3288 if (flag_verbose_asm)
3289 output_asm_operand_names (operands, oporder, ops);
3290 if (flag_print_asm_name)
3293 putc ('\n', asm_out_file);
3296 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3299 output_asm_label (x)
3304 if (GET_CODE (x) == LABEL_REF)
3306 if (GET_CODE (x) == CODE_LABEL
3307 || (GET_CODE (x) == NOTE
3308 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3309 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3311 output_operand_lossage ("`%l' operand isn't a label");
3313 assemble_name (asm_out_file, buf);
3316 /* Print operand X using machine-dependent assembler syntax.
3317 The macro PRINT_OPERAND is defined just to control this function.
3318 CODE is a non-digit that preceded the operand-number in the % spec,
3319 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3320 between the % and the digits.
3321 When CODE is a non-letter, X is 0.
3323 The meanings of the letters are machine-dependent and controlled
3324 by PRINT_OPERAND. */
3327 output_operand (x, code)
3329 int code ATTRIBUTE_UNUSED;
3331 if (x && GET_CODE (x) == SUBREG)
3332 x = alter_subreg (&x);
3334 /* If X is a pseudo-register, abort now rather than writing trash to the
3337 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3340 PRINT_OPERAND (asm_out_file, x, code);
3343 /* Print a memory reference operand for address X
3344 using machine-dependent assembler syntax.
3345 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3351 walk_alter_subreg (&x);
3352 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3355 /* Print an integer constant expression in assembler syntax.
3356 Addition and subtraction are the only arithmetic
3357 that may appear in these expressions. */
3360 output_addr_const (file, x)
3367 switch (GET_CODE (x))
3374 #ifdef ASM_OUTPUT_SYMBOL_REF
3375 ASM_OUTPUT_SYMBOL_REF (file, x);
3377 assemble_name (file, XSTR (x, 0));
3385 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3386 #ifdef ASM_OUTPUT_LABEL_REF
3387 ASM_OUTPUT_LABEL_REF (file, buf);
3389 assemble_name (file, buf);
3394 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3398 /* This used to output parentheses around the expression,
3399 but that does not work on the 386 (either ATT or BSD assembler). */
3400 output_addr_const (file, XEXP (x, 0));
3404 if (GET_MODE (x) == VOIDmode)
3406 /* We can use %d if the number is one word and positive. */
3407 if (CONST_DOUBLE_HIGH (x))
3408 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3409 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3410 else if (CONST_DOUBLE_LOW (x) < 0)
3411 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3413 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3416 /* We can't handle floating point constants;
3417 PRINT_OPERAND must handle them. */
3418 output_operand_lossage ("floating constant misused");
3422 /* Some assemblers need integer constants to appear last (eg masm). */
3423 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3425 output_addr_const (file, XEXP (x, 1));
3426 if (INTVAL (XEXP (x, 0)) >= 0)
3427 fprintf (file, "+");
3428 output_addr_const (file, XEXP (x, 0));
3432 output_addr_const (file, XEXP (x, 0));
3433 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3434 || INTVAL (XEXP (x, 1)) >= 0)
3435 fprintf (file, "+");
3436 output_addr_const (file, XEXP (x, 1));
3441 /* Avoid outputting things like x-x or x+5-x,
3442 since some assemblers can't handle that. */
3443 x = simplify_subtraction (x);
3444 if (GET_CODE (x) != MINUS)
3447 output_addr_const (file, XEXP (x, 0));
3448 fprintf (file, "-");
3449 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3450 || GET_CODE (XEXP (x, 1)) == PC
3451 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3452 output_addr_const (file, XEXP (x, 1));
3455 fputs (targetm.asm_out.open_paren, file);
3456 output_addr_const (file, XEXP (x, 1));
3457 fputs (targetm.asm_out.close_paren, file);
3463 output_addr_const (file, XEXP (x, 0));
3467 #ifdef OUTPUT_ADDR_CONST_EXTRA
3468 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3473 output_operand_lossage ("invalid expression as operand");
3477 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3478 %R prints the value of REGISTER_PREFIX.
3479 %L prints the value of LOCAL_LABEL_PREFIX.
3480 %U prints the value of USER_LABEL_PREFIX.
3481 %I prints the value of IMMEDIATE_PREFIX.
3482 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3483 Also supported are %d, %x, %s, %e, %f, %g and %%.
3485 We handle alternate assembler dialects here, just like output_asm_insn. */
3488 asm_fprintf VPARAMS ((FILE *file, const char *p, ...))
3493 VA_OPEN (argptr, p);
3494 VA_FIXEDARG (argptr, FILE *, file);
3495 VA_FIXEDARG (argptr, const char *, p);
3502 #ifdef ASSEMBLER_DIALECT
3507 /* If we want the first dialect, do nothing. Otherwise, skip
3508 DIALECT_NUMBER of strings ending with '|'. */
3509 for (i = 0; i < dialect_number; i++)
3511 while (*p && *p++ != '|')
3521 /* Skip to close brace. */
3522 while (*p && *p++ != '}')
3533 while (ISDIGIT (c) || c == '.')
3541 fprintf (file, "%%");
3544 case 'd': case 'i': case 'u':
3545 case 'x': case 'p': case 'X':
3549 fprintf (file, buf, va_arg (argptr, int));
3553 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3554 but we do not check for those cases. It means that the value
3555 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3557 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3559 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3569 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3576 fprintf (file, buf, va_arg (argptr, long));
3584 fprintf (file, buf, va_arg (argptr, double));
3590 fprintf (file, buf, va_arg (argptr, char *));
3594 #ifdef ASM_OUTPUT_OPCODE
3595 ASM_OUTPUT_OPCODE (asm_out_file, p);
3600 #ifdef REGISTER_PREFIX
3601 fprintf (file, "%s", REGISTER_PREFIX);
3606 #ifdef IMMEDIATE_PREFIX
3607 fprintf (file, "%s", IMMEDIATE_PREFIX);
3612 #ifdef LOCAL_LABEL_PREFIX
3613 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3618 fputs (user_label_prefix, file);
3621 #ifdef ASM_FPRINTF_EXTENSIONS
3622 /* Upper case letters are reserved for general use by asm_fprintf
3623 and so are not available to target specific code. In order to
3624 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3625 they are defined here. As they get turned into real extensions
3626 to asm_fprintf they should be removed from this list. */
3627 case 'A': case 'B': case 'C': case 'D': case 'E':
3628 case 'F': case 'G': case 'H': case 'J': case 'K':
3629 case 'M': case 'N': case 'P': case 'Q': case 'S':
3630 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3633 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3646 /* Split up a CONST_DOUBLE or integer constant rtx
3647 into two rtx's for single words,
3648 storing in *FIRST the word that comes first in memory in the target
3649 and in *SECOND the other. */
3652 split_double (value, first, second)
3654 rtx *first, *second;
3656 if (GET_CODE (value) == CONST_INT)
3658 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3660 /* In this case the CONST_INT holds both target words.
3661 Extract the bits from it into two word-sized pieces.
3662 Sign extend each half to HOST_WIDE_INT. */
3663 unsigned HOST_WIDE_INT low, high;
3664 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3666 /* Set sign_bit to the most significant bit of a word. */
3668 sign_bit <<= BITS_PER_WORD - 1;
3670 /* Set mask so that all bits of the word are set. We could
3671 have used 1 << BITS_PER_WORD instead of basing the
3672 calculation on sign_bit. However, on machines where
3673 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3674 compiler warning, even though the code would never be
3676 mask = sign_bit << 1;
3679 /* Set sign_extend as any remaining bits. */
3680 sign_extend = ~mask;
3682 /* Pick the lower word and sign-extend it. */
3683 low = INTVAL (value);
3688 /* Pick the higher word, shifted to the least significant
3689 bits, and sign-extend it. */
3690 high = INTVAL (value);
3691 high >>= BITS_PER_WORD - 1;
3694 if (high & sign_bit)
3695 high |= sign_extend;
3697 /* Store the words in the target machine order. */
3698 if (WORDS_BIG_ENDIAN)
3700 *first = GEN_INT (high);
3701 *second = GEN_INT (low);
3705 *first = GEN_INT (low);
3706 *second = GEN_INT (high);
3711 /* The rule for using CONST_INT for a wider mode
3712 is that we regard the value as signed.
3713 So sign-extend it. */
3714 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3715 if (WORDS_BIG_ENDIAN)
3727 else if (GET_CODE (value) != CONST_DOUBLE)
3729 if (WORDS_BIG_ENDIAN)
3731 *first = const0_rtx;
3737 *second = const0_rtx;
3740 else if (GET_MODE (value) == VOIDmode
3741 /* This is the old way we did CONST_DOUBLE integers. */
3742 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3744 /* In an integer, the words are defined as most and least significant.
3745 So order them by the target's convention. */
3746 if (WORDS_BIG_ENDIAN)
3748 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3749 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3753 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3754 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3759 #ifdef REAL_ARITHMETIC
3762 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3764 /* Note, this converts the REAL_VALUE_TYPE to the target's
3765 format, splits up the floating point double and outputs
3766 exactly 32 bits of it into each of l[0] and l[1] --
3767 not necessarily BITS_PER_WORD bits. */
3768 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3770 /* If 32 bits is an entire word for the target, but not for the host,
3771 then sign-extend on the host so that the number will look the same
3772 way on the host that it would on the target. See for instance
3773 simplify_unary_operation. The #if is needed to avoid compiler
3776 #if HOST_BITS_PER_LONG > 32
3777 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3779 if (l[0] & ((long) 1 << 31))
3780 l[0] |= ((long) (-1) << 32);
3781 if (l[1] & ((long) 1 << 31))
3782 l[1] |= ((long) (-1) << 32);
3786 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
3787 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
3789 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3790 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3791 && ! flag_pretend_float)
3795 #ifdef HOST_WORDS_BIG_ENDIAN
3802 /* Host and target agree => no need to swap. */
3803 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3804 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3808 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3809 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3811 #endif /* no REAL_ARITHMETIC */
3815 /* Return nonzero if this function has no function calls. */
3823 if (current_function_profile || profile_arc_flag)
3826 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3828 if (GET_CODE (insn) == CALL_INSN
3829 && ! SIBLING_CALL_P (insn))
3831 if (GET_CODE (insn) == INSN
3832 && GET_CODE (PATTERN (insn)) == SEQUENCE
3833 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
3834 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3837 for (link = current_function_epilogue_delay_list;
3839 link = XEXP (link, 1))
3841 insn = XEXP (link, 0);
3843 if (GET_CODE (insn) == CALL_INSN
3844 && ! SIBLING_CALL_P (insn))
3846 if (GET_CODE (insn) == INSN
3847 && GET_CODE (PATTERN (insn)) == SEQUENCE
3848 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
3849 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3856 /* Return 1 if branch is an forward branch.
3857 Uses insn_shuid array, so it works only in the final pass. May be used by
3858 output templates to customary add branch prediction hints.
3861 final_forward_branch_p (insn)
3864 int insn_id, label_id;
3867 insn_id = INSN_SHUID (insn);
3868 label_id = INSN_SHUID (JUMP_LABEL (insn));
3869 /* We've hit some insns that does not have id information available. */
3870 if (!insn_id || !label_id)
3872 return insn_id < label_id;
3875 /* On some machines, a function with no call insns
3876 can run faster if it doesn't create its own register window.
3877 When output, the leaf function should use only the "output"
3878 registers. Ordinarily, the function would be compiled to use
3879 the "input" registers to find its arguments; it is a candidate
3880 for leaf treatment if it uses only the "input" registers.
3881 Leaf function treatment means renumbering so the function
3882 uses the "output" registers instead. */
3884 #ifdef LEAF_REGISTERS
3886 /* Return 1 if this function uses only the registers that can be
3887 safely renumbered. */
3890 only_leaf_regs_used ()
3893 char *permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3895 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3896 if ((regs_ever_live[i] || global_regs[i])
3897 && ! permitted_reg_in_leaf_functions[i])
3900 if (current_function_uses_pic_offset_table
3901 && pic_offset_table_rtx != 0
3902 && GET_CODE (pic_offset_table_rtx) == REG
3903 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3909 /* Scan all instructions and renumber all registers into those
3910 available in leaf functions. */
3913 leaf_renumber_regs (first)
3918 /* Renumber only the actual patterns.
3919 The reg-notes can contain frame pointer refs,
3920 and renumbering them could crash, and should not be needed. */
3921 for (insn = first; insn; insn = NEXT_INSN (insn))
3923 leaf_renumber_regs_insn (PATTERN (insn));
3924 for (insn = current_function_epilogue_delay_list;
3926 insn = XEXP (insn, 1))
3927 if (INSN_P (XEXP (insn, 0)))
3928 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3931 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3932 available in leaf functions. */
3935 leaf_renumber_regs_insn (in_rtx)
3939 const char *format_ptr;
3944 /* Renumber all input-registers into output-registers.
3945 renumbered_regs would be 1 for an output-register;
3948 if (GET_CODE (in_rtx) == REG)
3952 /* Don't renumber the same reg twice. */
3956 newreg = REGNO (in_rtx);
3957 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3958 to reach here as part of a REG_NOTE. */
3959 if (newreg >= FIRST_PSEUDO_REGISTER)
3964 newreg = LEAF_REG_REMAP (newreg);
3967 regs_ever_live[REGNO (in_rtx)] = 0;
3968 regs_ever_live[newreg] = 1;
3969 REGNO (in_rtx) = newreg;
3973 if (INSN_P (in_rtx))
3975 /* Inside a SEQUENCE, we find insns.
3976 Renumber just the patterns of these insns,
3977 just as we do for the top-level insns. */
3978 leaf_renumber_regs_insn (PATTERN (in_rtx));
3982 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3984 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3985 switch (*format_ptr++)
3988 leaf_renumber_regs_insn (XEXP (in_rtx, i));
3992 if (NULL != XVEC (in_rtx, i))
3994 for (j = 0; j < XVECLEN (in_rtx, i); j++)
3995 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));