1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
54 #include "insn-config.h"
55 #include "insn-attr.h"
57 #include "conditions.h"
60 #include "hard-reg-set.h"
67 #include "basic-block.h"
73 #ifdef XCOFF_DEBUGGING_INFO
74 #include "xcoffout.h" /* Needed for external data
75 declarations for e.g. AIX 4.x. */
78 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
79 #include "dwarf2out.h"
82 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
83 null default for it to save conditionalization later. */
84 #ifndef CC_STATUS_INIT
85 #define CC_STATUS_INIT
88 /* How to start an assembler comment. */
89 #ifndef ASM_COMMENT_START
90 #define ASM_COMMENT_START ";#"
93 /* Is the given character a logical line separator for the assembler? */
94 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
95 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
98 #ifndef JUMP_TABLES_IN_TEXT_SECTION
99 #define JUMP_TABLES_IN_TEXT_SECTION 0
102 /* Last insn processed by final_scan_insn. */
103 static rtx debug_insn;
104 rtx current_output_insn;
106 /* Line number of last NOTE. */
107 static int last_linenum;
109 /* Highest line number in current block. */
110 static int high_block_linenum;
112 /* Likewise for function. */
113 static int high_function_linenum;
115 /* Filename of last NOTE. */
116 static const char *last_filename;
118 extern int length_unit_log; /* This is defined in insn-attrtab.c. */
120 /* Nonzero while outputting an `asm' with operands.
121 This means that inconsistencies are the user's fault, so don't abort.
122 The precise value is the insn being output, to pass to error_for_asm. */
123 rtx this_is_asm_operands;
125 /* Number of operands of this insn, for an `asm' with operands. */
126 static unsigned int insn_noperands;
128 /* Compare optimization flag. */
130 static rtx last_ignored_compare = 0;
132 /* Flag indicating this insn is the start of a new basic block. */
134 static int new_block = 1;
136 /* Assign a unique number to each insn that is output.
137 This can be used to generate unique local labels. */
139 static int insn_counter = 0;
142 /* This variable contains machine-dependent flags (defined in tm.h)
143 set and examined by output routines
144 that describe how to interpret the condition codes properly. */
148 /* During output of an insn, this contains a copy of cc_status
149 from before the insn. */
151 CC_STATUS cc_prev_status;
154 /* Indexed by hardware reg number, is 1 if that register is ever
155 used in the current function.
157 In life_analysis, or in stupid_life_analysis, this is set
158 up to record the hard regs used explicitly. Reload adds
159 in the hard regs used for holding pseudo regs. Final uses
160 it to generate the code in the function prologue and epilogue
161 to save and restore registers as needed. */
163 char regs_ever_live[FIRST_PSEUDO_REGISTER];
165 /* Nonzero means current function must be given a frame pointer.
166 Set in stmt.c if anything is allocated on the stack there.
167 Set in reload1.c if anything is allocated on the stack there. */
169 int frame_pointer_needed;
171 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
173 static int block_depth;
175 /* Nonzero if have enabled APP processing of our assembler output. */
179 /* If we are outputting an insn sequence, this contains the sequence rtx.
184 #ifdef ASSEMBLER_DIALECT
186 /* Number of the assembler dialect to use, starting at 0. */
187 static int dialect_number;
190 /* Indexed by line number, nonzero if there is a note for that line. */
192 static char *line_note_exists;
194 #ifdef HAVE_conditional_execution
195 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
196 rtx current_insn_predicate;
201 struct function_list *next; /* next function */
202 const char *name; /* function name */
203 long cfg_checksum; /* function checksum */
204 long count_edges; /* number of intrumented edges in this function */
207 static struct function_list *functions_head = 0;
208 static struct function_list **functions_tail = &functions_head;
210 #ifdef HAVE_ATTR_length
211 static int asm_insn_count PARAMS ((rtx));
213 static void profile_function PARAMS ((FILE *));
214 static void profile_after_prologue PARAMS ((FILE *));
215 static void notice_source_line PARAMS ((rtx));
216 static rtx walk_alter_subreg PARAMS ((rtx *));
217 static void output_asm_name PARAMS ((void));
218 static tree get_mem_expr_from_op PARAMS ((rtx, int *));
219 static void output_asm_operand_names PARAMS ((rtx *, int *, int));
220 static void output_operand PARAMS ((rtx, int));
221 #ifdef LEAF_REGISTERS
222 static void leaf_renumber_regs PARAMS ((rtx));
225 static int alter_cond PARAMS ((rtx));
227 #ifndef ADDR_VEC_ALIGN
228 static int final_addr_vec_align PARAMS ((rtx));
230 #ifdef HAVE_ATTR_length
231 static int align_fuzz PARAMS ((rtx, rtx, int, unsigned));
234 /* Initialize data in final at the beginning of a compilation. */
237 init_final (filename)
238 const char *filename ATTRIBUTE_UNUSED;
243 #ifdef ASSEMBLER_DIALECT
244 dialect_number = ASSEMBLER_DIALECT;
248 /* Called at end of source file,
249 to output the arc-profiling table for this entire compilation. */
253 const char *filename;
255 if (profile_arc_flag && profile_info.count_instrumented_edges)
258 tree string_type, string_cst;
259 tree structure_decl, structure_value, structure_pointer_type;
260 tree field_decl, decl_chain, value_chain;
261 tree sizeof_field_value, domain_type;
264 string_type = build_pointer_type (char_type_node);
266 /* Libgcc2 bb structure. */
267 structure_decl = make_node (RECORD_TYPE);
268 structure_pointer_type = build_pointer_type (structure_decl);
270 /* Output the main header, of 7 words:
271 0: 1 if this file is initialized, else 0.
272 1: address of file name (LPBX1).
273 2: address of table of counts (LPBX2).
274 3: number of counts in the table.
275 4: always 0, libgcc2 uses this as a pointer to next ``struct bb''
277 The following are GNU extensions:
279 5: Number of bytes in this header.
280 6: address of table of function checksums (LPBX7). */
284 build_decl (FIELD_DECL, get_identifier ("zero_word"),
285 long_integer_type_node);
286 value_chain = build_tree_list (decl_chain,
287 convert (long_integer_type_node,
290 /* Address of filename. */
292 char *cwd, *da_filename;
296 build_decl (FIELD_DECL, get_identifier ("filename"), string_type);
297 TREE_CHAIN (field_decl) = decl_chain;
298 decl_chain = field_decl;
301 da_filename_len = strlen (filename) + strlen (cwd) + 4 + 1;
302 da_filename = (char *) alloca (da_filename_len);
303 strcpy (da_filename, cwd);
304 strcat (da_filename, "/");
305 strcat (da_filename, filename);
306 strip_off_ending (da_filename, da_filename_len - 3);
307 strcat (da_filename, ".da");
308 da_filename_len = strlen (da_filename);
309 string_cst = build_string (da_filename_len + 1, da_filename);
310 domain_type = build_index_type (build_int_2 (da_filename_len, 0));
311 TREE_TYPE (string_cst)
312 = build_array_type (char_type_node, domain_type);
313 value_chain = tree_cons (field_decl,
314 build1 (ADDR_EXPR, string_type, string_cst),
318 /* Table of counts. */
320 tree gcov_type_type = make_unsigned_type (GCOV_TYPE_SIZE);
321 tree gcov_type_pointer_type = build_pointer_type (gcov_type_type);
323 = build_index_type (build_int_2 (profile_info.
324 count_instrumented_edges - 1, 0));
325 tree gcov_type_array_type
326 = build_array_type (gcov_type_type, domain_tree);
327 tree gcov_type_array_pointer_type
328 = build_pointer_type (gcov_type_array_type);
332 build_decl (FIELD_DECL, get_identifier ("counts"),
333 gcov_type_pointer_type);
334 TREE_CHAIN (field_decl) = decl_chain;
335 decl_chain = field_decl;
339 = build (VAR_DECL, gcov_type_array_type, NULL_TREE, NULL_TREE);
340 TREE_STATIC (counts_table) = 1;
341 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 2);
342 DECL_NAME (counts_table) = get_identifier (name);
343 assemble_variable (counts_table, 0, 0, 0);
345 value_chain = tree_cons (field_decl,
347 gcov_type_array_pointer_type,
348 counts_table), value_chain);
351 /* Count of the # of instrumented arcs. */
353 = build_decl (FIELD_DECL, get_identifier ("ncounts"),
354 long_integer_type_node);
355 TREE_CHAIN (field_decl) = decl_chain;
356 decl_chain = field_decl;
358 value_chain = tree_cons (field_decl,
359 convert (long_integer_type_node,
360 build_int_2 (profile_info.
361 count_instrumented_edges,
363 /* Pointer to the next bb. */
365 = build_decl (FIELD_DECL, get_identifier ("next"),
366 structure_pointer_type);
367 TREE_CHAIN (field_decl) = decl_chain;
368 decl_chain = field_decl;
370 value_chain = tree_cons (field_decl, null_pointer_node, value_chain);
372 /* sizeof(struct bb). We'll set this after entire structure
375 = build_decl (FIELD_DECL, get_identifier ("sizeof_bb"),
376 long_integer_type_node);
377 TREE_CHAIN (field_decl) = decl_chain;
378 decl_chain = field_decl;
380 sizeof_field_value = tree_cons (field_decl, NULL, value_chain);
381 value_chain = sizeof_field_value;
383 /* struct bb_function []. */
385 struct function_list *item;
387 tree checksum_field, arc_count_field, name_field;
389 tree array_value_chain = NULL_TREE;
390 tree bb_fn_struct_type;
391 tree bb_fn_struct_array_type;
392 tree bb_fn_struct_array_pointer_type;
393 tree bb_fn_struct_pointer_type;
394 tree field_value, field_value_chain;
396 bb_fn_struct_type = make_node (RECORD_TYPE);
398 checksum_field = build_decl (FIELD_DECL, get_identifier ("checksum"),
399 long_integer_type_node);
402 = build_decl (FIELD_DECL, get_identifier ("arc_count"),
404 TREE_CHAIN (checksum_field) = arc_count_field;
407 = build_decl (FIELD_DECL, get_identifier ("name"), string_type);
408 TREE_CHAIN (arc_count_field) = name_field;
410 TYPE_FIELDS (bb_fn_struct_type) = checksum_field;
414 for (item = functions_head; item != 0; item = item->next)
417 /* Note that the array contains a terminator, hence no - 1. */
418 domain = build_index_type (build_int_2 (num_nodes, 0));
420 bb_fn_struct_pointer_type = build_pointer_type (bb_fn_struct_type);
421 bb_fn_struct_array_type
422 = build_array_type (bb_fn_struct_type, domain);
423 bb_fn_struct_array_pointer_type
424 = build_pointer_type (bb_fn_struct_array_type);
426 layout_type (bb_fn_struct_type);
427 layout_type (bb_fn_struct_pointer_type);
428 layout_type (bb_fn_struct_array_type);
429 layout_type (bb_fn_struct_array_pointer_type);
431 for (item = functions_head; item != 0; item = item->next)
435 /* create constructor for structure. */
437 = build_tree_list (checksum_field,
438 convert (long_integer_type_node,
439 build_int_2 (item->cfg_checksum, 0)));
441 = tree_cons (arc_count_field,
442 convert (integer_type_node,
443 build_int_2 (item->count_edges, 0)),
446 name_len = strlen (item->name);
447 string_cst = build_string (name_len + 1, item->name);
448 domain_type = build_index_type (build_int_2 (name_len, 0));
449 TREE_TYPE (string_cst)
450 = build_array_type (char_type_node, domain_type);
451 field_value_chain = tree_cons (name_field,
452 build1 (ADDR_EXPR, string_type,
458 = tree_cons (NULL_TREE, build (CONSTRUCTOR,
459 bb_fn_struct_type, NULL_TREE,
460 nreverse (field_value_chain)),
464 /* Add terminator. */
465 field_value = build_tree_list (arc_count_field,
466 convert (integer_type_node,
467 build_int_2 (-1, 0)));
469 array_value_chain = tree_cons (NULL_TREE,
470 build (CONSTRUCTOR, bb_fn_struct_type,
471 NULL_TREE, field_value),
475 /* Create constructor for array. */
477 = build_decl (FIELD_DECL, get_identifier ("function_infos"),
478 bb_fn_struct_pointer_type);
479 value_chain = tree_cons (field_decl,
481 bb_fn_struct_array_pointer_type,
483 bb_fn_struct_array_type,
486 (array_value_chain))),
488 TREE_CHAIN (field_decl) = decl_chain;
489 decl_chain = field_decl;
492 /* Finish structure. */
493 TYPE_FIELDS (structure_decl) = nreverse (decl_chain);
494 layout_type (structure_decl);
497 = build (VAR_DECL, structure_decl, NULL_TREE, NULL_TREE);
498 DECL_INITIAL (structure_value)
499 = build (CONSTRUCTOR, structure_decl, NULL_TREE,
500 nreverse (value_chain));
501 TREE_STATIC (structure_value) = 1;
502 ASM_GENERATE_INTERNAL_LABEL (name, "LPBX", 0);
503 DECL_NAME (structure_value) = get_identifier (name);
505 /* Size of this structure. */
506 TREE_VALUE (sizeof_field_value)
507 = convert (long_integer_type_node,
508 build_int_2 (int_size_in_bytes (structure_decl), 0));
510 /* Build structure. */
511 assemble_variable (structure_value, 0, 0, 0);
515 /* Default target function prologue and epilogue assembler output.
517 If not overridden for epilogue code, then the function body itself
518 contains return instructions wherever needed. */
520 default_function_pro_epilogue (file, size)
521 FILE *file ATTRIBUTE_UNUSED;
522 HOST_WIDE_INT size ATTRIBUTE_UNUSED;
526 /* Default target hook that outputs nothing to a stream. */
528 no_asm_to_stream (file)
529 FILE *file ATTRIBUTE_UNUSED;
533 /* Enable APP processing of subsequent output.
534 Used before the output from an `asm' statement. */
541 fputs (ASM_APP_ON, asm_out_file);
546 /* Disable APP processing of subsequent output.
547 Called from varasm.c before most kinds of output. */
554 fputs (ASM_APP_OFF, asm_out_file);
559 /* Return the number of slots filled in the current
560 delayed branch sequence (we don't count the insn needing the
561 delay slot). Zero if not in a delayed branch sequence. */
565 dbr_sequence_length ()
567 if (final_sequence != 0)
568 return XVECLEN (final_sequence, 0) - 1;
574 /* The next two pages contain routines used to compute the length of an insn
575 and to shorten branches. */
577 /* Arrays for insn lengths, and addresses. The latter is referenced by
578 `insn_current_length'. */
580 static int *insn_lengths;
582 #ifdef HAVE_ATTR_length
583 varray_type insn_addresses_;
586 /* Max uid for which the above arrays are valid. */
587 static int insn_lengths_max_uid;
589 /* Address of insn being processed. Used by `insn_current_length'. */
590 int insn_current_address;
592 /* Address of insn being processed in previous iteration. */
593 int insn_last_address;
595 /* known invariant alignment of insn being processed. */
596 int insn_current_align;
598 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
599 gives the next following alignment insn that increases the known
600 alignment, or NULL_RTX if there is no such insn.
601 For any alignment obtained this way, we can again index uid_align with
602 its uid to obtain the next following align that in turn increases the
603 alignment, till we reach NULL_RTX; the sequence obtained this way
604 for each insn we'll call the alignment chain of this insn in the following
607 struct label_alignment
613 static rtx *uid_align;
614 static int *uid_shuid;
615 static struct label_alignment *label_align;
617 /* Indicate that branch shortening hasn't yet been done. */
631 insn_lengths_max_uid = 0;
633 #ifdef HAVE_ATTR_length
634 INSN_ADDRESSES_FREE ();
643 /* Obtain the current length of an insn. If branch shortening has been done,
644 get its actual length. Otherwise, get its maximum length. */
647 get_attr_length (insn)
648 rtx insn ATTRIBUTE_UNUSED;
650 #ifdef HAVE_ATTR_length
655 if (insn_lengths_max_uid > INSN_UID (insn))
656 return insn_lengths[INSN_UID (insn)];
658 switch (GET_CODE (insn))
666 length = insn_default_length (insn);
670 body = PATTERN (insn);
671 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
673 /* Alignment is machine-dependent and should be handled by
677 length = insn_default_length (insn);
681 body = PATTERN (insn);
682 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
685 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
686 length = asm_insn_count (body) * insn_default_length (insn);
687 else if (GET_CODE (body) == SEQUENCE)
688 for (i = 0; i < XVECLEN (body, 0); i++)
689 length += get_attr_length (XVECEXP (body, 0, i));
691 length = insn_default_length (insn);
698 #ifdef ADJUST_INSN_LENGTH
699 ADJUST_INSN_LENGTH (insn, length);
702 #else /* not HAVE_ATTR_length */
704 #endif /* not HAVE_ATTR_length */
707 /* Code to handle alignment inside shorten_branches. */
709 /* Here is an explanation how the algorithm in align_fuzz can give
712 Call a sequence of instructions beginning with alignment point X
713 and continuing until the next alignment point `block X'. When `X'
714 is used in an expression, it means the alignment value of the
717 Call the distance between the start of the first insn of block X, and
718 the end of the last insn of block X `IX', for the `inner size of X'.
719 This is clearly the sum of the instruction lengths.
721 Likewise with the next alignment-delimited block following X, which we
724 Call the distance between the start of the first insn of block X, and
725 the start of the first insn of block Y `OX', for the `outer size of X'.
727 The estimated padding is then OX - IX.
729 OX can be safely estimated as
734 OX = round_up(IX, X) + Y - X
736 Clearly est(IX) >= real(IX), because that only depends on the
737 instruction lengths, and those being overestimated is a given.
739 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
740 we needn't worry about that when thinking about OX.
742 When X >= Y, the alignment provided by Y adds no uncertainty factor
743 for branch ranges starting before X, so we can just round what we have.
744 But when X < Y, we don't know anything about the, so to speak,
745 `middle bits', so we have to assume the worst when aligning up from an
746 address mod X to one mod Y, which is Y - X. */
749 #define LABEL_ALIGN(LABEL) align_labels_log
752 #ifndef LABEL_ALIGN_MAX_SKIP
753 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
757 #define LOOP_ALIGN(LABEL) align_loops_log
760 #ifndef LOOP_ALIGN_MAX_SKIP
761 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
764 #ifndef LABEL_ALIGN_AFTER_BARRIER
765 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
768 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
769 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
773 #define JUMP_ALIGN(LABEL) align_jumps_log
776 #ifndef JUMP_ALIGN_MAX_SKIP
777 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
780 #ifndef ADDR_VEC_ALIGN
782 final_addr_vec_align (addr_vec)
785 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
787 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
788 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
789 return exact_log2 (align);
793 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
796 #ifndef INSN_LENGTH_ALIGNMENT
797 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
800 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
802 static int min_labelno, max_labelno;
804 #define LABEL_TO_ALIGNMENT(LABEL) \
805 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
807 #define LABEL_TO_MAX_SKIP(LABEL) \
808 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
810 /* For the benefit of port specific code do this also as a function. */
813 label_to_alignment (label)
816 return LABEL_TO_ALIGNMENT (label);
819 #ifdef HAVE_ATTR_length
820 /* The differences in addresses
821 between a branch and its target might grow or shrink depending on
822 the alignment the start insn of the range (the branch for a forward
823 branch or the label for a backward branch) starts out on; if these
824 differences are used naively, they can even oscillate infinitely.
825 We therefore want to compute a 'worst case' address difference that
826 is independent of the alignment the start insn of the range end
827 up on, and that is at least as large as the actual difference.
828 The function align_fuzz calculates the amount we have to add to the
829 naively computed difference, by traversing the part of the alignment
830 chain of the start insn of the range that is in front of the end insn
831 of the range, and considering for each alignment the maximum amount
832 that it might contribute to a size increase.
834 For casesi tables, we also want to know worst case minimum amounts of
835 address difference, in case a machine description wants to introduce
836 some common offset that is added to all offsets in a table.
837 For this purpose, align_fuzz with a growth argument of 0 computes the
838 appropriate adjustment. */
840 /* Compute the maximum delta by which the difference of the addresses of
841 START and END might grow / shrink due to a different address for start
842 which changes the size of alignment insns between START and END.
843 KNOWN_ALIGN_LOG is the alignment known for START.
844 GROWTH should be ~0 if the objective is to compute potential code size
845 increase, and 0 if the objective is to compute potential shrink.
846 The return value is undefined for any other value of GROWTH. */
849 align_fuzz (start, end, known_align_log, growth)
854 int uid = INSN_UID (start);
856 int known_align = 1 << known_align_log;
857 int end_shuid = INSN_SHUID (end);
860 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
862 int align_addr, new_align;
864 uid = INSN_UID (align_label);
865 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
866 if (uid_shuid[uid] > end_shuid)
868 known_align_log = LABEL_TO_ALIGNMENT (align_label);
869 new_align = 1 << known_align_log;
870 if (new_align < known_align)
872 fuzz += (-align_addr ^ growth) & (new_align - known_align);
873 known_align = new_align;
878 /* Compute a worst-case reference address of a branch so that it
879 can be safely used in the presence of aligned labels. Since the
880 size of the branch itself is unknown, the size of the branch is
881 not included in the range. I.e. for a forward branch, the reference
882 address is the end address of the branch as known from the previous
883 branch shortening pass, minus a value to account for possible size
884 increase due to alignment. For a backward branch, it is the start
885 address of the branch as known from the current pass, plus a value
886 to account for possible size increase due to alignment.
887 NB.: Therefore, the maximum offset allowed for backward branches needs
888 to exclude the branch size. */
891 insn_current_reference_address (branch)
897 if (! INSN_ADDRESSES_SET_P ())
900 seq = NEXT_INSN (PREV_INSN (branch));
901 seq_uid = INSN_UID (seq);
902 if (GET_CODE (branch) != JUMP_INSN)
903 /* This can happen for example on the PA; the objective is to know the
904 offset to address something in front of the start of the function.
905 Thus, we can treat it like a backward branch.
906 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
907 any alignment we'd encounter, so we skip the call to align_fuzz. */
908 return insn_current_address;
909 dest = JUMP_LABEL (branch);
911 /* BRANCH has no proper alignment chain set, so use SEQ.
912 BRANCH also has no INSN_SHUID. */
913 if (INSN_SHUID (seq) < INSN_SHUID (dest))
915 /* Forward branch. */
916 return (insn_last_address + insn_lengths[seq_uid]
917 - align_fuzz (seq, dest, length_unit_log, ~0));
921 /* Backward branch. */
922 return (insn_current_address
923 + align_fuzz (dest, seq, length_unit_log, ~0));
926 #endif /* HAVE_ATTR_length */
929 compute_alignments ()
931 int log, max_skip, max_log;
940 max_labelno = max_label_num ();
941 min_labelno = get_first_label_num ();
942 label_align = (struct label_alignment *)
943 xcalloc (max_labelno - min_labelno + 1, sizeof (struct label_alignment));
945 /* If not optimizing or optimizing for size, don't assign any alignments. */
946 if (! optimize || optimize_size)
951 rtx label = bb->head;
952 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
955 if (GET_CODE (label) != CODE_LABEL)
957 max_log = LABEL_ALIGN (label);
958 max_skip = LABEL_ALIGN_MAX_SKIP;
960 for (e = bb->pred; e; e = e->pred_next)
962 if (e->flags & EDGE_FALLTHRU)
963 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
965 branch_frequency += EDGE_FREQUENCY (e);
968 /* There are two purposes to align block with no fallthru incoming edge:
969 1) to avoid fetch stalls when branch destination is near cache boundary
970 2) to improve cache efficiency in case the previous block is not executed
971 (so it does not need to be in the cache).
973 We to catch first case, we align frequently executed blocks.
974 To catch the second, we align blocks that are executed more frequently
975 than the predecessor and the predecessor is likely to not be executed
976 when function is called. */
979 && (branch_frequency > BB_FREQ_MAX / 10
980 || (bb->frequency > bb->prev_bb->frequency * 10
981 && (bb->prev_bb->frequency
982 <= ENTRY_BLOCK_PTR->frequency / 2))))
984 log = JUMP_ALIGN (label);
988 max_skip = JUMP_ALIGN_MAX_SKIP;
991 /* In case block is frequent and reached mostly by non-fallthru edge,
992 align it. It is most likely an first block of loop. */
994 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
995 && branch_frequency > fallthru_frequency * 5)
997 log = LOOP_ALIGN (label);
1001 max_skip = LOOP_ALIGN_MAX_SKIP;
1004 LABEL_TO_ALIGNMENT (label) = max_log;
1005 LABEL_TO_MAX_SKIP (label) = max_skip;
1009 /* Make a pass over all insns and compute their actual lengths by shortening
1010 any branches of variable length if possible. */
1012 /* Give a default value for the lowest address in a function. */
1014 #ifndef FIRST_INSN_ADDRESS
1015 #define FIRST_INSN_ADDRESS 0
1018 /* shorten_branches might be called multiple times: for example, the SH
1019 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
1020 In order to do this, it needs proper length information, which it obtains
1021 by calling shorten_branches. This cannot be collapsed with
1022 shorten_branches itself into a single pass unless we also want to integrate
1023 reorg.c, since the branch splitting exposes new instructions with delay
1027 shorten_branches (first)
1028 rtx first ATTRIBUTE_UNUSED;
1035 #ifdef HAVE_ATTR_length
1036 #define MAX_CODE_ALIGN 16
1038 int something_changed = 1;
1039 char *varying_length;
1042 rtx align_tab[MAX_CODE_ALIGN];
1046 /* Compute maximum UID and allocate label_align / uid_shuid. */
1047 max_uid = get_max_uid ();
1049 uid_shuid = (int *) xmalloc (max_uid * sizeof *uid_shuid);
1051 if (max_labelno != max_label_num ())
1053 int old = max_labelno;
1057 max_labelno = max_label_num ();
1059 n_labels = max_labelno - min_labelno + 1;
1060 n_old_labels = old - min_labelno + 1;
1062 label_align = (struct label_alignment *) xrealloc
1063 (label_align, n_labels * sizeof (struct label_alignment));
1065 /* Range of labels grows monotonically in the function. Abort here
1066 means that the initialization of array got lost. */
1067 if (n_old_labels > n_labels)
1070 memset (label_align + n_old_labels, 0,
1071 (n_labels - n_old_labels) * sizeof (struct label_alignment));
1074 /* Initialize label_align and set up uid_shuid to be strictly
1075 monotonically rising with insn order. */
1076 /* We use max_log here to keep track of the maximum alignment we want to
1077 impose on the next CODE_LABEL (or the current one if we are processing
1078 the CODE_LABEL itself). */
1083 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
1087 INSN_SHUID (insn) = i++;
1090 /* reorg might make the first insn of a loop being run once only,
1091 and delete the label in front of it. Then we want to apply
1092 the loop alignment to the new label created by reorg, which
1093 is separated by the former loop start insn from the
1094 NOTE_INSN_LOOP_BEG. */
1096 else if (GET_CODE (insn) == CODE_LABEL)
1100 /* Merge in alignments computed by compute_alignments. */
1101 log = LABEL_TO_ALIGNMENT (insn);
1105 max_skip = LABEL_TO_MAX_SKIP (insn);
1108 log = LABEL_ALIGN (insn);
1112 max_skip = LABEL_ALIGN_MAX_SKIP;
1114 next = NEXT_INSN (insn);
1115 /* ADDR_VECs only take room if read-only data goes into the text
1117 if (JUMP_TABLES_IN_TEXT_SECTION
1118 #if !defined(READONLY_DATA_SECTION)
1122 if (next && GET_CODE (next) == JUMP_INSN)
1124 rtx nextbody = PATTERN (next);
1125 if (GET_CODE (nextbody) == ADDR_VEC
1126 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1128 log = ADDR_VEC_ALIGN (next);
1132 max_skip = LABEL_ALIGN_MAX_SKIP;
1136 LABEL_TO_ALIGNMENT (insn) = max_log;
1137 LABEL_TO_MAX_SKIP (insn) = max_skip;
1141 else if (GET_CODE (insn) == BARRIER)
1145 for (label = insn; label && ! INSN_P (label);
1146 label = NEXT_INSN (label))
1147 if (GET_CODE (label) == CODE_LABEL)
1149 log = LABEL_ALIGN_AFTER_BARRIER (insn);
1153 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
1159 #ifdef HAVE_ATTR_length
1161 /* Allocate the rest of the arrays. */
1162 insn_lengths = (int *) xmalloc (max_uid * sizeof (*insn_lengths));
1163 insn_lengths_max_uid = max_uid;
1164 /* Syntax errors can lead to labels being outside of the main insn stream.
1165 Initialize insn_addresses, so that we get reproducible results. */
1166 INSN_ADDRESSES_ALLOC (max_uid);
1168 varying_length = (char *) xcalloc (max_uid, sizeof (char));
1170 /* Initialize uid_align. We scan instructions
1171 from end to start, and keep in align_tab[n] the last seen insn
1172 that does an alignment of at least n+1, i.e. the successor
1173 in the alignment chain for an insn that does / has a known
1175 uid_align = (rtx *) xcalloc (max_uid, sizeof *uid_align);
1177 for (i = MAX_CODE_ALIGN; --i >= 0;)
1178 align_tab[i] = NULL_RTX;
1179 seq = get_last_insn ();
1180 for (; seq; seq = PREV_INSN (seq))
1182 int uid = INSN_UID (seq);
1184 log = (GET_CODE (seq) == CODE_LABEL ? LABEL_TO_ALIGNMENT (seq) : 0);
1185 uid_align[uid] = align_tab[0];
1188 /* Found an alignment label. */
1189 uid_align[uid] = align_tab[log];
1190 for (i = log - 1; i >= 0; i--)
1194 #ifdef CASE_VECTOR_SHORTEN_MODE
1197 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
1200 int min_shuid = INSN_SHUID (get_insns ()) - 1;
1201 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
1204 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
1206 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
1207 int len, i, min, max, insn_shuid;
1209 addr_diff_vec_flags flags;
1211 if (GET_CODE (insn) != JUMP_INSN
1212 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
1214 pat = PATTERN (insn);
1215 len = XVECLEN (pat, 1);
1218 min_align = MAX_CODE_ALIGN;
1219 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
1221 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
1222 int shuid = INSN_SHUID (lab);
1233 if (min_align > LABEL_TO_ALIGNMENT (lab))
1234 min_align = LABEL_TO_ALIGNMENT (lab);
1236 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
1237 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
1238 insn_shuid = INSN_SHUID (insn);
1239 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1240 flags.min_align = min_align;
1241 flags.base_after_vec = rel > insn_shuid;
1242 flags.min_after_vec = min > insn_shuid;
1243 flags.max_after_vec = max > insn_shuid;
1244 flags.min_after_base = min > rel;
1245 flags.max_after_base = max > rel;
1246 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1249 #endif /* CASE_VECTOR_SHORTEN_MODE */
1251 /* Compute initial lengths, addresses, and varying flags for each insn. */
1252 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1254 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1256 uid = INSN_UID (insn);
1258 insn_lengths[uid] = 0;
1260 if (GET_CODE (insn) == CODE_LABEL)
1262 int log = LABEL_TO_ALIGNMENT (insn);
1265 int align = 1 << log;
1266 int new_address = (insn_current_address + align - 1) & -align;
1267 insn_lengths[uid] = new_address - insn_current_address;
1271 INSN_ADDRESSES (uid) = insn_current_address;
1273 if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER
1274 || GET_CODE (insn) == CODE_LABEL)
1276 if (INSN_DELETED_P (insn))
1279 body = PATTERN (insn);
1280 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1282 /* This only takes room if read-only data goes into the text
1284 if (JUMP_TABLES_IN_TEXT_SECTION
1285 #if !defined(READONLY_DATA_SECTION)
1289 insn_lengths[uid] = (XVECLEN (body,
1290 GET_CODE (body) == ADDR_DIFF_VEC)
1291 * GET_MODE_SIZE (GET_MODE (body)));
1292 /* Alignment is handled by ADDR_VEC_ALIGN. */
1294 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1295 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1296 else if (GET_CODE (body) == SEQUENCE)
1299 int const_delay_slots;
1301 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1303 const_delay_slots = 0;
1305 /* Inside a delay slot sequence, we do not do any branch shortening
1306 if the shortening could change the number of delay slots
1308 for (i = 0; i < XVECLEN (body, 0); i++)
1310 rtx inner_insn = XVECEXP (body, 0, i);
1311 int inner_uid = INSN_UID (inner_insn);
1314 if (GET_CODE (body) == ASM_INPUT
1315 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1316 inner_length = (asm_insn_count (PATTERN (inner_insn))
1317 * insn_default_length (inner_insn));
1319 inner_length = insn_default_length (inner_insn);
1321 insn_lengths[inner_uid] = inner_length;
1322 if (const_delay_slots)
1324 if ((varying_length[inner_uid]
1325 = insn_variable_length_p (inner_insn)) != 0)
1326 varying_length[uid] = 1;
1327 INSN_ADDRESSES (inner_uid) = (insn_current_address
1328 + insn_lengths[uid]);
1331 varying_length[inner_uid] = 0;
1332 insn_lengths[uid] += inner_length;
1335 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1337 insn_lengths[uid] = insn_default_length (insn);
1338 varying_length[uid] = insn_variable_length_p (insn);
1341 /* If needed, do any adjustment. */
1342 #ifdef ADJUST_INSN_LENGTH
1343 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1344 if (insn_lengths[uid] < 0)
1345 fatal_insn ("negative insn length", insn);
1349 /* Now loop over all the insns finding varying length insns. For each,
1350 get the current insn length. If it has changed, reflect the change.
1351 When nothing changes for a full pass, we are done. */
1353 while (something_changed)
1355 something_changed = 0;
1356 insn_current_align = MAX_CODE_ALIGN - 1;
1357 for (insn_current_address = FIRST_INSN_ADDRESS, insn = first;
1359 insn = NEXT_INSN (insn))
1362 #ifdef ADJUST_INSN_LENGTH
1367 uid = INSN_UID (insn);
1369 if (GET_CODE (insn) == CODE_LABEL)
1371 int log = LABEL_TO_ALIGNMENT (insn);
1372 if (log > insn_current_align)
1374 int align = 1 << log;
1375 int new_address= (insn_current_address + align - 1) & -align;
1376 insn_lengths[uid] = new_address - insn_current_address;
1377 insn_current_align = log;
1378 insn_current_address = new_address;
1381 insn_lengths[uid] = 0;
1382 INSN_ADDRESSES (uid) = insn_current_address;
1386 length_align = INSN_LENGTH_ALIGNMENT (insn);
1387 if (length_align < insn_current_align)
1388 insn_current_align = length_align;
1390 insn_last_address = INSN_ADDRESSES (uid);
1391 INSN_ADDRESSES (uid) = insn_current_address;
1393 #ifdef CASE_VECTOR_SHORTEN_MODE
1394 if (optimize && GET_CODE (insn) == JUMP_INSN
1395 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1397 rtx body = PATTERN (insn);
1398 int old_length = insn_lengths[uid];
1399 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1400 rtx min_lab = XEXP (XEXP (body, 2), 0);
1401 rtx max_lab = XEXP (XEXP (body, 3), 0);
1402 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1403 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1404 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1407 addr_diff_vec_flags flags;
1409 /* Avoid automatic aggregate initialization. */
1410 flags = ADDR_DIFF_VEC_FLAGS (body);
1412 /* Try to find a known alignment for rel_lab. */
1413 for (prev = rel_lab;
1415 && ! insn_lengths[INSN_UID (prev)]
1416 && ! (varying_length[INSN_UID (prev)] & 1);
1417 prev = PREV_INSN (prev))
1418 if (varying_length[INSN_UID (prev)] & 2)
1420 rel_align = LABEL_TO_ALIGNMENT (prev);
1424 /* See the comment on addr_diff_vec_flags in rtl.h for the
1425 meaning of the flags values. base: REL_LAB vec: INSN */
1426 /* Anything after INSN has still addresses from the last
1427 pass; adjust these so that they reflect our current
1428 estimate for this pass. */
1429 if (flags.base_after_vec)
1430 rel_addr += insn_current_address - insn_last_address;
1431 if (flags.min_after_vec)
1432 min_addr += insn_current_address - insn_last_address;
1433 if (flags.max_after_vec)
1434 max_addr += insn_current_address - insn_last_address;
1435 /* We want to know the worst case, i.e. lowest possible value
1436 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1437 its offset is positive, and we have to be wary of code shrink;
1438 otherwise, it is negative, and we have to be vary of code
1440 if (flags.min_after_base)
1442 /* If INSN is between REL_LAB and MIN_LAB, the size
1443 changes we are about to make can change the alignment
1444 within the observed offset, therefore we have to break
1445 it up into two parts that are independent. */
1446 if (! flags.base_after_vec && flags.min_after_vec)
1448 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1449 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1452 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1456 if (flags.base_after_vec && ! flags.min_after_vec)
1458 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1459 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1462 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1464 /* Likewise, determine the highest lowest possible value
1465 for the offset of MAX_LAB. */
1466 if (flags.max_after_base)
1468 if (! flags.base_after_vec && flags.max_after_vec)
1470 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1471 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1474 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1478 if (flags.base_after_vec && ! flags.max_after_vec)
1480 max_addr += align_fuzz (max_lab, insn, 0, 0);
1481 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1484 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1486 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1487 max_addr - rel_addr,
1489 if (JUMP_TABLES_IN_TEXT_SECTION
1490 #if !defined(READONLY_DATA_SECTION)
1496 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1497 insn_current_address += insn_lengths[uid];
1498 if (insn_lengths[uid] != old_length)
1499 something_changed = 1;
1504 #endif /* CASE_VECTOR_SHORTEN_MODE */
1506 if (! (varying_length[uid]))
1508 if (GET_CODE (insn) == INSN
1509 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1513 body = PATTERN (insn);
1514 for (i = 0; i < XVECLEN (body, 0); i++)
1516 rtx inner_insn = XVECEXP (body, 0, i);
1517 int inner_uid = INSN_UID (inner_insn);
1519 INSN_ADDRESSES (inner_uid) = insn_current_address;
1521 insn_current_address += insn_lengths[inner_uid];
1525 insn_current_address += insn_lengths[uid];
1530 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1534 body = PATTERN (insn);
1536 for (i = 0; i < XVECLEN (body, 0); i++)
1538 rtx inner_insn = XVECEXP (body, 0, i);
1539 int inner_uid = INSN_UID (inner_insn);
1542 INSN_ADDRESSES (inner_uid) = insn_current_address;
1544 /* insn_current_length returns 0 for insns with a
1545 non-varying length. */
1546 if (! varying_length[inner_uid])
1547 inner_length = insn_lengths[inner_uid];
1549 inner_length = insn_current_length (inner_insn);
1551 if (inner_length != insn_lengths[inner_uid])
1553 insn_lengths[inner_uid] = inner_length;
1554 something_changed = 1;
1556 insn_current_address += insn_lengths[inner_uid];
1557 new_length += inner_length;
1562 new_length = insn_current_length (insn);
1563 insn_current_address += new_length;
1566 #ifdef ADJUST_INSN_LENGTH
1567 /* If needed, do any adjustment. */
1568 tmp_length = new_length;
1569 ADJUST_INSN_LENGTH (insn, new_length);
1570 insn_current_address += (new_length - tmp_length);
1573 if (new_length != insn_lengths[uid])
1575 insn_lengths[uid] = new_length;
1576 something_changed = 1;
1579 /* For a non-optimizing compile, do only a single pass. */
1584 free (varying_length);
1586 #endif /* HAVE_ATTR_length */
1589 #ifdef HAVE_ATTR_length
1590 /* Given the body of an INSN known to be generated by an ASM statement, return
1591 the number of machine instructions likely to be generated for this insn.
1592 This is used to compute its length. */
1595 asm_insn_count (body)
1598 const char *template;
1601 if (GET_CODE (body) == ASM_INPUT)
1602 template = XSTR (body, 0);
1604 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1606 for (; *template; template++)
1607 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1614 /* Output assembler code for the start of a function,
1615 and initialize some of the variables in this file
1616 for the new function. The label for the function and associated
1617 assembler pseudo-ops have already been output in `assemble_start_function'.
1619 FIRST is the first insn of the rtl for the function being compiled.
1620 FILE is the file to write assembler code to.
1621 OPTIMIZE is nonzero if we should eliminate redundant
1622 test and compare insns. */
1625 final_start_function (first, file, optimize)
1628 int optimize ATTRIBUTE_UNUSED;
1632 this_is_asm_operands = 0;
1634 #ifdef NON_SAVING_SETJMP
1635 /* A function that calls setjmp should save and restore all the
1636 call-saved registers on a system where longjmp clobbers them. */
1637 if (NON_SAVING_SETJMP && current_function_calls_setjmp)
1641 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1642 if (!call_used_regs[i])
1643 regs_ever_live[i] = 1;
1647 if (NOTE_LINE_NUMBER (first) != NOTE_INSN_DELETED)
1648 notice_source_line (first);
1649 high_block_linenum = high_function_linenum = last_linenum;
1651 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1653 #if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1654 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1655 dwarf2out_begin_prologue (0, NULL);
1658 #ifdef LEAF_REG_REMAP
1659 if (current_function_uses_only_leaf_regs)
1660 leaf_renumber_regs (first);
1663 /* The Sun386i and perhaps other machines don't work right
1664 if the profiling code comes after the prologue. */
1665 #ifdef PROFILE_BEFORE_PROLOGUE
1666 if (current_function_profile)
1667 profile_function (file);
1668 #endif /* PROFILE_BEFORE_PROLOGUE */
1670 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1671 if (dwarf2out_do_frame ())
1672 dwarf2out_frame_debug (NULL_RTX);
1675 /* If debugging, assign block numbers to all of the blocks in this
1679 remove_unnecessary_notes ();
1681 number_blocks (current_function_decl);
1682 /* We never actually put out begin/end notes for the top-level
1683 block in the function. But, conceptually, that block is
1685 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1688 /* First output the function prologue: code to set up the stack frame. */
1689 (*targetm.asm_out.function_prologue) (file, get_frame_size ());
1691 #ifdef VMS_DEBUGGING_INFO
1692 /* Output label after the prologue of the function. */
1693 if (write_symbols == VMS_DEBUG || write_symbols == VMS_AND_DWARF2_DEBUG)
1694 vmsdbgout_after_prologue ();
1697 /* If the machine represents the prologue as RTL, the profiling code must
1698 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1699 #ifdef HAVE_prologue
1700 if (! HAVE_prologue)
1702 profile_after_prologue (file);
1706 profile_after_prologue (file)
1707 FILE *file ATTRIBUTE_UNUSED;
1709 #ifndef PROFILE_BEFORE_PROLOGUE
1710 if (current_function_profile)
1711 profile_function (file);
1712 #endif /* not PROFILE_BEFORE_PROLOGUE */
1716 profile_function (file)
1717 FILE *file ATTRIBUTE_UNUSED;
1719 #ifndef NO_PROFILE_COUNTERS
1720 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1722 #if defined(ASM_OUTPUT_REG_PUSH)
1723 #if defined(STRUCT_VALUE_INCOMING_REGNUM) || defined(STRUCT_VALUE_REGNUM)
1724 int sval = current_function_returns_struct;
1726 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1727 int cxt = current_function_needs_context;
1729 #endif /* ASM_OUTPUT_REG_PUSH */
1731 #ifndef NO_PROFILE_COUNTERS
1733 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1734 ASM_OUTPUT_INTERNAL_LABEL (file, "LP", current_function_profile_label_no);
1735 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1738 function_section (current_function_decl);
1740 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1742 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_INCOMING_REGNUM);
1744 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1747 ASM_OUTPUT_REG_PUSH (file, STRUCT_VALUE_REGNUM);
1752 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1754 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1756 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1759 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1764 FUNCTION_PROFILER (file, current_function_profile_label_no);
1766 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1768 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1770 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1773 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1778 #if defined(STRUCT_VALUE_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1780 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_INCOMING_REGNUM);
1782 #if defined(STRUCT_VALUE_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1785 ASM_OUTPUT_REG_POP (file, STRUCT_VALUE_REGNUM);
1791 /* Output assembler code for the end of a function.
1792 For clarity, args are same as those of `final_start_function'
1793 even though not all of them are needed. */
1796 final_end_function ()
1800 (*debug_hooks->end_function) (high_function_linenum);
1802 /* Finally, output the function epilogue:
1803 code to restore the stack frame and return to the caller. */
1804 (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ());
1806 /* And debug output. */
1807 (*debug_hooks->end_epilogue) ();
1809 #if defined (DWARF2_UNWIND_INFO)
1810 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1811 && dwarf2out_do_frame ())
1812 dwarf2out_end_epilogue ();
1816 /* Output assembler code for some insns: all or part of a function.
1817 For description of args, see `final_start_function', above.
1819 PRESCAN is 1 if we are not really outputting,
1820 just scanning as if we were outputting.
1821 Prescanning deletes and rearranges insns just like ordinary output.
1822 PRESCAN is -2 if we are outputting after having prescanned.
1823 In this case, don't try to delete or rearrange insns
1824 because that has already been done.
1825 Prescanning is done only on certain machines. */
1828 final (first, file, optimize, prescan)
1838 last_ignored_compare = 0;
1841 /* Make a map indicating which line numbers appear in this function.
1842 When producing SDB debugging info, delete troublesome line number
1843 notes from inlined functions in other files as well as duplicate
1844 line number notes. */
1845 #ifdef SDB_DEBUGGING_INFO
1846 if (write_symbols == SDB_DEBUG)
1849 for (insn = first; insn; insn = NEXT_INSN (insn))
1850 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1852 if ((RTX_INTEGRATED_P (insn)
1853 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1855 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1856 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1858 delete_insn (insn); /* Use delete_note. */
1862 if (NOTE_LINE_NUMBER (insn) > max_line)
1863 max_line = NOTE_LINE_NUMBER (insn);
1869 for (insn = first; insn; insn = NEXT_INSN (insn))
1870 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > max_line)
1871 max_line = NOTE_LINE_NUMBER (insn);
1874 line_note_exists = (char *) xcalloc (max_line + 1, sizeof (char));
1876 for (insn = first; insn; insn = NEXT_INSN (insn))
1878 if (INSN_UID (insn) > max_uid) /* find largest UID */
1879 max_uid = INSN_UID (insn);
1880 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1881 line_note_exists[NOTE_LINE_NUMBER (insn)] = 1;
1883 /* If CC tracking across branches is enabled, record the insn which
1884 jumps to each branch only reached from one place. */
1885 if (optimize && GET_CODE (insn) == JUMP_INSN)
1887 rtx lab = JUMP_LABEL (insn);
1888 if (lab && LABEL_NUSES (lab) == 1)
1890 LABEL_REFS (lab) = insn;
1900 /* Output the insns. */
1901 for (insn = NEXT_INSN (first); insn;)
1903 #ifdef HAVE_ATTR_length
1904 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1907 /* Irritatingly, the reg-stack pass is creating new instructions
1908 and because of REG_DEAD note abuse it has to run after
1909 shorten_branches. Fake address of -1 then. */
1910 insn_current_address = -1;
1912 /* This can be triggered by bugs elsewhere in the compiler if
1913 new insns are created after init_insn_lengths is called. */
1918 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1919 #endif /* HAVE_ATTR_length */
1921 insn = final_scan_insn (insn, file, optimize, prescan, 0);
1924 /* Store function names for edge-profiling. */
1925 /* ??? Probably should re-use the existing struct function. */
1927 if (cfun->arc_profile)
1929 struct function_list *new_item = xmalloc (sizeof (struct function_list));
1931 *functions_tail = new_item;
1932 functions_tail = &new_item->next;
1935 new_item->name = xstrdup (current_function_name);
1936 new_item->cfg_checksum = profile_info.current_function_cfg_checksum;
1937 new_item->count_edges = profile_info.count_edges_instrumented_now;
1940 free (line_note_exists);
1941 line_note_exists = NULL;
1945 get_insn_template (code, insn)
1949 const void *output = insn_data[code].output;
1950 switch (insn_data[code].output_format)
1952 case INSN_OUTPUT_FORMAT_SINGLE:
1953 return (const char *) output;
1954 case INSN_OUTPUT_FORMAT_MULTI:
1955 return ((const char *const *) output)[which_alternative];
1956 case INSN_OUTPUT_FORMAT_FUNCTION:
1959 return (*(insn_output_fn) output) (recog_data.operand, insn);
1966 /* The final scan for one insn, INSN.
1967 Args are same as in `final', except that INSN
1968 is the insn being scanned.
1969 Value returned is the next insn to be scanned.
1971 NOPEEPHOLES is the flag to disallow peephole processing (currently
1972 used for within delayed branch sequence output). */
1975 final_scan_insn (insn, file, optimize, prescan, nopeepholes)
1978 int optimize ATTRIBUTE_UNUSED;
1980 int nopeepholes ATTRIBUTE_UNUSED;
1988 /* Ignore deleted insns. These can occur when we split insns (due to a
1989 template of "#") while not optimizing. */
1990 if (INSN_DELETED_P (insn))
1991 return NEXT_INSN (insn);
1993 switch (GET_CODE (insn))
1999 switch (NOTE_LINE_NUMBER (insn))
2001 case NOTE_INSN_DELETED:
2002 case NOTE_INSN_LOOP_BEG:
2003 case NOTE_INSN_LOOP_END:
2004 case NOTE_INSN_LOOP_END_TOP_COND:
2005 case NOTE_INSN_LOOP_CONT:
2006 case NOTE_INSN_LOOP_VTOP:
2007 case NOTE_INSN_FUNCTION_END:
2008 case NOTE_INSN_REPEATED_LINE_NUMBER:
2009 case NOTE_INSN_RANGE_BEG:
2010 case NOTE_INSN_RANGE_END:
2011 case NOTE_INSN_LIVE:
2012 case NOTE_INSN_EXPECTED_VALUE:
2015 case NOTE_INSN_BASIC_BLOCK:
2016 #ifdef IA64_UNWIND_INFO
2017 IA64_UNWIND_EMIT (asm_out_file, insn);
2020 fprintf (asm_out_file, "\t%s basic block %d\n",
2021 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->sindex);
2024 case NOTE_INSN_EH_REGION_BEG:
2025 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
2026 NOTE_EH_HANDLER (insn));
2029 case NOTE_INSN_EH_REGION_END:
2030 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
2031 NOTE_EH_HANDLER (insn));
2034 case NOTE_INSN_PROLOGUE_END:
2035 (*targetm.asm_out.function_end_prologue) (file);
2036 profile_after_prologue (file);
2039 case NOTE_INSN_EPILOGUE_BEG:
2040 (*targetm.asm_out.function_begin_epilogue) (file);
2043 case NOTE_INSN_FUNCTION_BEG:
2045 (*debug_hooks->end_prologue) (last_linenum);
2048 case NOTE_INSN_BLOCK_BEG:
2049 if (debug_info_level == DINFO_LEVEL_NORMAL
2050 || debug_info_level == DINFO_LEVEL_VERBOSE
2051 || write_symbols == DWARF_DEBUG
2052 || write_symbols == DWARF2_DEBUG
2053 || write_symbols == VMS_AND_DWARF2_DEBUG
2054 || write_symbols == VMS_DEBUG)
2056 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2060 high_block_linenum = last_linenum;
2062 /* Output debugging info about the symbol-block beginning. */
2063 (*debug_hooks->begin_block) (last_linenum, n);
2065 /* Mark this block as output. */
2066 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
2070 case NOTE_INSN_BLOCK_END:
2071 if (debug_info_level == DINFO_LEVEL_NORMAL
2072 || debug_info_level == DINFO_LEVEL_VERBOSE
2073 || write_symbols == DWARF_DEBUG
2074 || write_symbols == DWARF2_DEBUG
2075 || write_symbols == VMS_AND_DWARF2_DEBUG
2076 || write_symbols == VMS_DEBUG)
2078 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
2082 /* End of a symbol-block. */
2084 if (block_depth < 0)
2087 (*debug_hooks->end_block) (high_block_linenum, n);
2091 case NOTE_INSN_DELETED_LABEL:
2092 /* Emit the label. We may have deleted the CODE_LABEL because
2093 the label could be proved to be unreachable, though still
2094 referenced (in the form of having its address taken. */
2095 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2102 if (NOTE_LINE_NUMBER (insn) <= 0)
2105 /* This note is a line-number. */
2110 /* If there is anything real after this note, output it.
2111 If another line note follows, omit this one. */
2112 for (note = NEXT_INSN (insn); note; note = NEXT_INSN (note))
2114 if (GET_CODE (note) != NOTE && GET_CODE (note) != CODE_LABEL)
2117 /* These types of notes can be significant
2118 so make sure the preceding line number stays. */
2119 else if (GET_CODE (note) == NOTE
2120 && (NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_BEG
2121 || NOTE_LINE_NUMBER (note) == NOTE_INSN_BLOCK_END
2122 || NOTE_LINE_NUMBER (note) == NOTE_INSN_FUNCTION_BEG))
2124 else if (GET_CODE (note) == NOTE && NOTE_LINE_NUMBER (note) > 0)
2126 /* Another line note follows; we can delete this note
2127 if no intervening line numbers have notes elsewhere. */
2129 for (num = NOTE_LINE_NUMBER (insn) + 1;
2130 num < NOTE_LINE_NUMBER (note);
2132 if (line_note_exists[num])
2135 if (num >= NOTE_LINE_NUMBER (note))
2141 /* Output this line note if it is the first or the last line
2145 notice_source_line (insn);
2146 (*debug_hooks->source_line) (last_linenum, last_filename);
2154 #if defined (DWARF2_UNWIND_INFO)
2155 if (dwarf2out_do_frame ())
2156 dwarf2out_frame_debug (insn);
2161 /* The target port might emit labels in the output function for
2162 some insn, e.g. sh.c output_branchy_insn. */
2163 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
2165 int align = LABEL_TO_ALIGNMENT (insn);
2166 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2167 int max_skip = LABEL_TO_MAX_SKIP (insn);
2170 if (align && NEXT_INSN (insn))
2172 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
2173 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
2175 ASM_OUTPUT_ALIGN (file, align);
2181 /* If this label is reached from only one place, set the condition
2182 codes from the instruction just before the branch. */
2184 /* Disabled because some insns set cc_status in the C output code
2185 and NOTICE_UPDATE_CC alone can set incorrect status. */
2186 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
2188 rtx jump = LABEL_REFS (insn);
2189 rtx barrier = prev_nonnote_insn (insn);
2191 /* If the LABEL_REFS field of this label has been set to point
2192 at a branch, the predecessor of the branch is a regular
2193 insn, and that branch is the only way to reach this label,
2194 set the condition codes based on the branch and its
2196 if (barrier && GET_CODE (barrier) == BARRIER
2197 && jump && GET_CODE (jump) == JUMP_INSN
2198 && (prev = prev_nonnote_insn (jump))
2199 && GET_CODE (prev) == INSN)
2201 NOTICE_UPDATE_CC (PATTERN (prev), prev);
2202 NOTICE_UPDATE_CC (PATTERN (jump), jump);
2210 #ifdef FINAL_PRESCAN_LABEL
2211 FINAL_PRESCAN_INSN (insn, NULL, 0);
2214 if (LABEL_NAME (insn))
2215 (*debug_hooks->label) (insn);
2219 fputs (ASM_APP_OFF, file);
2222 if (NEXT_INSN (insn) != 0
2223 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN)
2225 rtx nextbody = PATTERN (NEXT_INSN (insn));
2227 /* If this label is followed by a jump-table,
2228 make sure we put the label in the read-only section. Also
2229 possibly write the label and jump table together. */
2231 if (GET_CODE (nextbody) == ADDR_VEC
2232 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
2234 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2235 /* In this case, the case vector is being moved by the
2236 target, so don't output the label at all. Leave that
2237 to the back end macros. */
2239 if (! JUMP_TABLES_IN_TEXT_SECTION)
2243 readonly_data_section ();
2245 #ifdef ADDR_VEC_ALIGN
2246 log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn));
2248 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2250 ASM_OUTPUT_ALIGN (file, log_align);
2253 function_section (current_function_decl);
2255 #ifdef ASM_OUTPUT_CASE_LABEL
2256 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
2259 if (LABEL_ALTERNATE_NAME (insn))
2260 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2262 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2268 if (LABEL_ALTERNATE_NAME (insn))
2269 ASM_OUTPUT_ALTERNATE_LABEL_NAME (file, insn);
2271 ASM_OUTPUT_INTERNAL_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
2276 rtx body = PATTERN (insn);
2277 int insn_code_number;
2278 const char *template;
2281 /* An INSN, JUMP_INSN or CALL_INSN.
2282 First check for special kinds that recog doesn't recognize. */
2284 if (GET_CODE (body) == USE /* These are just declarations */
2285 || GET_CODE (body) == CLOBBER)
2289 /* If there is a REG_CC_SETTER note on this insn, it means that
2290 the setting of the condition code was done in the delay slot
2291 of the insn that branched here. So recover the cc status
2292 from the insn that set it. */
2294 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2297 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2298 cc_prev_status = cc_status;
2302 /* Detect insns that are really jump-tables
2303 and output them as such. */
2305 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2307 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2316 fputs (ASM_APP_OFF, file);
2320 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2321 if (GET_CODE (body) == ADDR_VEC)
2323 #ifdef ASM_OUTPUT_ADDR_VEC
2324 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2331 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2332 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2338 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2339 for (idx = 0; idx < vlen; idx++)
2341 if (GET_CODE (body) == ADDR_VEC)
2343 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2344 ASM_OUTPUT_ADDR_VEC_ELT
2345 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2352 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2353 ASM_OUTPUT_ADDR_DIFF_ELT
2356 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2357 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2363 #ifdef ASM_OUTPUT_CASE_END
2364 ASM_OUTPUT_CASE_END (file,
2365 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2370 function_section (current_function_decl);
2375 if (GET_CODE (body) == ASM_INPUT)
2377 const char *string = XSTR (body, 0);
2379 /* There's no telling what that did to the condition codes. */
2388 fputs (ASM_APP_ON, file);
2391 fprintf (asm_out_file, "\t%s\n", string);
2396 /* Detect `asm' construct with operands. */
2397 if (asm_noperands (body) >= 0)
2399 unsigned int noperands = asm_noperands (body);
2400 rtx *ops = (rtx *) alloca (noperands * sizeof (rtx));
2403 /* There's no telling what that did to the condition codes. */
2408 /* Get out the operand values. */
2409 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2410 /* Inhibit aborts on what would otherwise be compiler bugs. */
2411 insn_noperands = noperands;
2412 this_is_asm_operands = insn;
2414 /* Output the insn using them. */
2419 fputs (ASM_APP_ON, file);
2422 output_asm_insn (string, ops);
2425 this_is_asm_operands = 0;
2429 if (prescan <= 0 && app_on)
2431 fputs (ASM_APP_OFF, file);
2435 if (GET_CODE (body) == SEQUENCE)
2437 /* A delayed-branch sequence */
2443 final_sequence = body;
2445 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2446 force the restoration of a comparison that was previously
2447 thought unnecessary. If that happens, cancel this sequence
2448 and cause that insn to be restored. */
2450 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1);
2451 if (next != XVECEXP (body, 0, 1))
2457 for (i = 1; i < XVECLEN (body, 0); i++)
2459 rtx insn = XVECEXP (body, 0, i);
2460 rtx next = NEXT_INSN (insn);
2461 /* We loop in case any instruction in a delay slot gets
2464 insn = final_scan_insn (insn, file, 0, prescan, 1);
2465 while (insn != next);
2467 #ifdef DBR_OUTPUT_SEQEND
2468 DBR_OUTPUT_SEQEND (file);
2472 /* If the insn requiring the delay slot was a CALL_INSN, the
2473 insns in the delay slot are actually executed before the
2474 called function. Hence we don't preserve any CC-setting
2475 actions in these insns and the CC must be marked as being
2476 clobbered by the function. */
2477 if (GET_CODE (XVECEXP (body, 0, 0)) == CALL_INSN)
2484 /* We have a real machine instruction as rtl. */
2486 body = PATTERN (insn);
2489 set = single_set (insn);
2491 /* Check for redundant test and compare instructions
2492 (when the condition codes are already set up as desired).
2493 This is done only when optimizing; if not optimizing,
2494 it should be possible for the user to alter a variable
2495 with the debugger in between statements
2496 and the next statement should reexamine the variable
2497 to compute the condition codes. */
2502 rtx set = single_set (insn);
2506 && GET_CODE (SET_DEST (set)) == CC0
2507 && insn != last_ignored_compare)
2509 if (GET_CODE (SET_SRC (set)) == SUBREG)
2510 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2511 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2513 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2514 XEXP (SET_SRC (set), 0)
2515 = alter_subreg (&XEXP (SET_SRC (set), 0));
2516 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2517 XEXP (SET_SRC (set), 1)
2518 = alter_subreg (&XEXP (SET_SRC (set), 1));
2520 if ((cc_status.value1 != 0
2521 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2522 || (cc_status.value2 != 0
2523 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2525 /* Don't delete insn if it has an addressing side-effect. */
2526 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2527 /* or if anything in it is volatile. */
2528 && ! volatile_refs_p (PATTERN (insn)))
2530 /* We don't really delete the insn; just ignore it. */
2531 last_ignored_compare = insn;
2540 /* Don't bother outputting obvious no-ops, even without -O.
2541 This optimization is fast and doesn't interfere with debugging.
2542 Don't do this if the insn is in a delay slot, since this
2543 will cause an improper number of delay insns to be written. */
2544 if (final_sequence == 0
2546 && GET_CODE (insn) == INSN && GET_CODE (body) == SET
2547 && GET_CODE (SET_SRC (body)) == REG
2548 && GET_CODE (SET_DEST (body)) == REG
2549 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2554 /* If this is a conditional branch, maybe modify it
2555 if the cc's are in a nonstandard state
2556 so that it accomplishes the same thing that it would
2557 do straightforwardly if the cc's were set up normally. */
2559 if (cc_status.flags != 0
2560 && GET_CODE (insn) == JUMP_INSN
2561 && GET_CODE (body) == SET
2562 && SET_DEST (body) == pc_rtx
2563 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2564 && GET_RTX_CLASS (GET_CODE (XEXP (SET_SRC (body), 0))) == '<'
2565 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
2566 /* This is done during prescan; it is not done again
2567 in final scan when prescan has been done. */
2570 /* This function may alter the contents of its argument
2571 and clear some of the cc_status.flags bits.
2572 It may also return 1 meaning condition now always true
2573 or -1 meaning condition now always false
2574 or 2 meaning condition nontrivial but altered. */
2575 int result = alter_cond (XEXP (SET_SRC (body), 0));
2576 /* If condition now has fixed value, replace the IF_THEN_ELSE
2577 with its then-operand or its else-operand. */
2579 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2581 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2583 /* The jump is now either unconditional or a no-op.
2584 If it has become a no-op, don't try to output it.
2585 (It would not be recognized.) */
2586 if (SET_SRC (body) == pc_rtx)
2591 else if (GET_CODE (SET_SRC (body)) == RETURN)
2592 /* Replace (set (pc) (return)) with (return). */
2593 PATTERN (insn) = body = SET_SRC (body);
2595 /* Rerecognize the instruction if it has changed. */
2597 INSN_CODE (insn) = -1;
2600 /* Make same adjustments to instructions that examine the
2601 condition codes without jumping and instructions that
2602 handle conditional moves (if this machine has either one). */
2604 if (cc_status.flags != 0
2607 rtx cond_rtx, then_rtx, else_rtx;
2609 if (GET_CODE (insn) != JUMP_INSN
2610 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2612 cond_rtx = XEXP (SET_SRC (set), 0);
2613 then_rtx = XEXP (SET_SRC (set), 1);
2614 else_rtx = XEXP (SET_SRC (set), 2);
2618 cond_rtx = SET_SRC (set);
2619 then_rtx = const_true_rtx;
2620 else_rtx = const0_rtx;
2623 switch (GET_CODE (cond_rtx))
2637 if (XEXP (cond_rtx, 0) != cc0_rtx)
2639 result = alter_cond (cond_rtx);
2641 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2642 else if (result == -1)
2643 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2644 else if (result == 2)
2645 INSN_CODE (insn) = -1;
2646 if (SET_DEST (set) == SET_SRC (set))
2658 #ifdef HAVE_peephole
2659 /* Do machine-specific peephole optimizations if desired. */
2661 if (optimize && !flag_no_peephole && !nopeepholes)
2663 rtx next = peephole (insn);
2664 /* When peepholing, if there were notes within the peephole,
2665 emit them before the peephole. */
2666 if (next != 0 && next != NEXT_INSN (insn))
2668 rtx prev = PREV_INSN (insn);
2670 for (note = NEXT_INSN (insn); note != next;
2671 note = NEXT_INSN (note))
2672 final_scan_insn (note, file, optimize, prescan, nopeepholes);
2674 /* In case this is prescan, put the notes
2675 in proper position for later rescan. */
2676 note = NEXT_INSN (insn);
2677 PREV_INSN (note) = prev;
2678 NEXT_INSN (prev) = note;
2679 NEXT_INSN (PREV_INSN (next)) = insn;
2680 PREV_INSN (insn) = PREV_INSN (next);
2681 NEXT_INSN (insn) = next;
2682 PREV_INSN (next) = insn;
2685 /* PEEPHOLE might have changed this. */
2686 body = PATTERN (insn);
2690 /* Try to recognize the instruction.
2691 If successful, verify that the operands satisfy the
2692 constraints for the instruction. Crash if they don't,
2693 since `reload' should have changed them so that they do. */
2695 insn_code_number = recog_memoized (insn);
2696 cleanup_subreg_operands (insn);
2698 /* Dump the insn in the assembly for debugging. */
2699 if (flag_dump_rtl_in_asm)
2701 print_rtx_head = ASM_COMMENT_START;
2702 print_rtl_single (asm_out_file, insn);
2703 print_rtx_head = "";
2706 if (! constrain_operands_cached (1))
2707 fatal_insn_not_found (insn);
2709 /* Some target machines need to prescan each insn before
2712 #ifdef FINAL_PRESCAN_INSN
2713 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2716 #ifdef HAVE_conditional_execution
2717 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2718 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2720 current_insn_predicate = NULL_RTX;
2724 cc_prev_status = cc_status;
2726 /* Update `cc_status' for this instruction.
2727 The instruction's output routine may change it further.
2728 If the output routine for a jump insn needs to depend
2729 on the cc status, it should look at cc_prev_status. */
2731 NOTICE_UPDATE_CC (body, insn);
2734 current_output_insn = debug_insn = insn;
2736 #if defined (DWARF2_UNWIND_INFO)
2737 if (GET_CODE (insn) == CALL_INSN && dwarf2out_do_frame ())
2738 dwarf2out_frame_debug (insn);
2741 /* Find the proper template for this insn. */
2742 template = get_insn_template (insn_code_number, insn);
2744 /* If the C code returns 0, it means that it is a jump insn
2745 which follows a deleted test insn, and that test insn
2746 needs to be reinserted. */
2751 if (prev_nonnote_insn (insn) != last_ignored_compare)
2755 /* We have already processed the notes between the setter and
2756 the user. Make sure we don't process them again, this is
2757 particularly important if one of the notes is a block
2758 scope note or an EH note. */
2760 prev != last_ignored_compare;
2761 prev = PREV_INSN (prev))
2763 if (GET_CODE (prev) == NOTE)
2764 delete_insn (prev); /* Use delete_note. */
2770 /* If the template is the string "#", it means that this insn must
2772 if (template[0] == '#' && template[1] == '\0')
2774 rtx new = try_split (body, insn, 0);
2776 /* If we didn't split the insn, go away. */
2777 if (new == insn && PATTERN (new) == body)
2778 fatal_insn ("could not split insn", insn);
2780 #ifdef HAVE_ATTR_length
2781 /* This instruction should have been split in shorten_branches,
2782 to ensure that we would have valid length info for the
2794 #ifdef IA64_UNWIND_INFO
2795 IA64_UNWIND_EMIT (asm_out_file, insn);
2797 /* Output assembler code from the template. */
2799 output_asm_insn (template, recog_data.operand);
2801 #if defined (DWARF2_UNWIND_INFO)
2802 #if defined (HAVE_prologue)
2803 if (GET_CODE (insn) == INSN && dwarf2out_do_frame ())
2804 dwarf2out_frame_debug (insn);
2806 if (!ACCUMULATE_OUTGOING_ARGS
2807 && GET_CODE (insn) == INSN
2808 && dwarf2out_do_frame ())
2809 dwarf2out_frame_debug (insn);
2814 /* It's not at all clear why we did this and doing so interferes
2815 with tests we'd like to do to use REG_WAS_0 notes, so let's try
2818 /* Mark this insn as having been output. */
2819 INSN_DELETED_P (insn) = 1;
2822 /* Emit information for vtable gc. */
2823 note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX);
2825 assemble_vtable_entry (XEXP (XEXP (note, 0), 0),
2826 INTVAL (XEXP (XEXP (note, 0), 1)));
2828 current_output_insn = debug_insn = 0;
2831 return NEXT_INSN (insn);
2834 /* Output debugging info to the assembler file FILE
2835 based on the NOTE-insn INSN, assumed to be a line number. */
2838 notice_source_line (insn)
2841 const char *filename = NOTE_SOURCE_FILE (insn);
2843 last_filename = filename;
2844 last_linenum = NOTE_LINE_NUMBER (insn);
2845 high_block_linenum = MAX (last_linenum, high_block_linenum);
2846 high_function_linenum = MAX (last_linenum, high_function_linenum);
2849 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2850 directly to the desired hard register. */
2853 cleanup_subreg_operands (insn)
2857 extract_insn_cached (insn);
2858 for (i = 0; i < recog_data.n_operands; i++)
2860 /* The following test cannot use recog_data.operand when tesing
2861 for a SUBREG: the underlying object might have been changed
2862 already if we are inside a match_operator expression that
2863 matches the else clause. Instead we test the underlying
2864 expression directly. */
2865 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2866 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2867 else if (GET_CODE (recog_data.operand[i]) == PLUS
2868 || GET_CODE (recog_data.operand[i]) == MULT
2869 || GET_CODE (recog_data.operand[i]) == MEM)
2870 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2873 for (i = 0; i < recog_data.n_dups; i++)
2875 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2876 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2877 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2878 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2879 || GET_CODE (*recog_data.dup_loc[i]) == MEM)
2880 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2884 /* If X is a SUBREG, replace it with a REG or a MEM,
2885 based on the thing it is a subreg of. */
2892 rtx y = SUBREG_REG (x);
2894 /* simplify_subreg does not remove subreg from volatile references.
2895 We are required to. */
2896 if (GET_CODE (y) == MEM)
2897 *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x));
2900 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2905 /* Simplify_subreg can't handle some REG cases, but we have to. */
2906 else if (GET_CODE (y) == REG)
2908 unsigned int regno = subreg_hard_regno (x, 1);
2911 ORIGINAL_REGNO (x) = ORIGINAL_REGNO (y);
2912 /* This field has a different meaning for REGs and SUBREGs. Make
2913 sure to clear it! */
2914 RTX_FLAG (x, used) = 0;
2923 /* Do alter_subreg on all the SUBREGs contained in X. */
2926 walk_alter_subreg (xp)
2930 switch (GET_CODE (x))
2934 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2935 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2939 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2943 return alter_subreg (xp);
2954 /* Given BODY, the body of a jump instruction, alter the jump condition
2955 as required by the bits that are set in cc_status.flags.
2956 Not all of the bits there can be handled at this level in all cases.
2958 The value is normally 0.
2959 1 means that the condition has become always true.
2960 -1 means that the condition has become always false.
2961 2 means that COND has been altered. */
2969 if (cc_status.flags & CC_REVERSED)
2972 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2975 if (cc_status.flags & CC_INVERTED)
2978 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2981 if (cc_status.flags & CC_NOT_POSITIVE)
2982 switch (GET_CODE (cond))
2987 /* Jump becomes unconditional. */
2993 /* Jump becomes no-op. */
2997 PUT_CODE (cond, EQ);
3002 PUT_CODE (cond, NE);
3010 if (cc_status.flags & CC_NOT_NEGATIVE)
3011 switch (GET_CODE (cond))
3015 /* Jump becomes unconditional. */
3020 /* Jump becomes no-op. */
3025 PUT_CODE (cond, EQ);
3031 PUT_CODE (cond, NE);
3039 if (cc_status.flags & CC_NO_OVERFLOW)
3040 switch (GET_CODE (cond))
3043 /* Jump becomes unconditional. */
3047 PUT_CODE (cond, EQ);
3052 PUT_CODE (cond, NE);
3057 /* Jump becomes no-op. */
3064 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
3065 switch (GET_CODE (cond))
3071 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
3076 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
3081 if (cc_status.flags & CC_NOT_SIGNED)
3082 /* The flags are valid if signed condition operators are converted
3084 switch (GET_CODE (cond))
3087 PUT_CODE (cond, LEU);
3092 PUT_CODE (cond, LTU);
3097 PUT_CODE (cond, GTU);
3102 PUT_CODE (cond, GEU);
3114 /* Report inconsistency between the assembler template and the operands.
3115 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
3118 output_operand_lossage VPARAMS ((const char *msgid, ...))
3122 const char *pfx_str;
3123 VA_OPEN (ap, msgid);
3124 VA_FIXEDARG (ap, const char *, msgid);
3126 pfx_str = this_is_asm_operands ? _("invalid `asm': ") : "output_operand: ";
3127 asprintf (&fmt_string, "%s%s", pfx_str, _(msgid));
3128 vasprintf (&new_message, fmt_string, ap);
3130 if (this_is_asm_operands)
3131 error_for_asm (this_is_asm_operands, "%s", new_message);
3133 internal_error ("%s", new_message);
3140 /* Output of assembler code from a template, and its subroutines. */
3142 /* Annotate the assembly with a comment describing the pattern and
3143 alternative used. */
3150 int num = INSN_CODE (debug_insn);
3151 fprintf (asm_out_file, "\t%s %d\t%s",
3152 ASM_COMMENT_START, INSN_UID (debug_insn),
3153 insn_data[num].name);
3154 if (insn_data[num].n_alternatives > 1)
3155 fprintf (asm_out_file, "/%d", which_alternative + 1);
3156 #ifdef HAVE_ATTR_length
3157 fprintf (asm_out_file, "\t[length = %d]",
3158 get_attr_length (debug_insn));
3160 /* Clear this so only the first assembler insn
3161 of any rtl insn will get the special comment for -dp. */
3166 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
3167 or its address, return that expr . Set *PADDRESSP to 1 if the expr
3168 corresponds to the address of the object and 0 if to the object. */
3171 get_mem_expr_from_op (op, paddressp)
3180 if (GET_CODE (op) == REG && ORIGINAL_REGNO (op) >= FIRST_PSEUDO_REGISTER)
3181 return REGNO_DECL (ORIGINAL_REGNO (op));
3182 else if (GET_CODE (op) != MEM)
3185 if (MEM_EXPR (op) != 0)
3186 return MEM_EXPR (op);
3188 /* Otherwise we have an address, so indicate it and look at the address. */
3192 /* First check if we have a decl for the address, then look at the right side
3193 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
3194 But don't allow the address to itself be indirect. */
3195 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
3197 else if (GET_CODE (op) == PLUS
3198 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
3201 while (GET_RTX_CLASS (GET_CODE (op)) == '1'
3202 || GET_RTX_CLASS (GET_CODE (op)) == '2')
3205 expr = get_mem_expr_from_op (op, &inner_addressp);
3206 return inner_addressp ? 0 : expr;
3209 /* Output operand names for assembler instructions. OPERANDS is the
3210 operand vector, OPORDER is the order to write the operands, and NOPS
3211 is the number of operands to write. */
3214 output_asm_operand_names (operands, oporder, nops)
3222 for (i = 0; i < nops; i++)
3225 tree expr = get_mem_expr_from_op (operands[oporder[i]], &addressp);
3229 fprintf (asm_out_file, "%c%s %s",
3230 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START,
3231 addressp ? "*" : "");
3232 print_mem_expr (asm_out_file, expr);
3238 /* Output text from TEMPLATE to the assembler output file,
3239 obeying %-directions to substitute operands taken from
3240 the vector OPERANDS.
3242 %N (for N a digit) means print operand N in usual manner.
3243 %lN means require operand N to be a CODE_LABEL or LABEL_REF
3244 and print the label name with no punctuation.
3245 %cN means require operand N to be a constant
3246 and print the constant expression with no punctuation.
3247 %aN means expect operand N to be a memory address
3248 (not a memory reference!) and print a reference
3250 %nN means expect operand N to be a constant
3251 and print a constant expression for minus the value
3252 of the operand, with no other punctuation. */
3255 output_asm_insn (template, operands)
3256 const char *template;
3261 #ifdef ASSEMBLER_DIALECT
3264 int oporder[MAX_RECOG_OPERANDS];
3265 char opoutput[MAX_RECOG_OPERANDS];
3268 /* An insn may return a null string template
3269 in a case where no assembler code is needed. */
3273 memset (opoutput, 0, sizeof opoutput);
3275 putc ('\t', asm_out_file);
3277 #ifdef ASM_OUTPUT_OPCODE
3278 ASM_OUTPUT_OPCODE (asm_out_file, p);
3285 if (flag_verbose_asm)
3286 output_asm_operand_names (operands, oporder, ops);
3287 if (flag_print_asm_name)
3291 memset (opoutput, 0, sizeof opoutput);
3293 putc (c, asm_out_file);
3294 #ifdef ASM_OUTPUT_OPCODE
3295 while ((c = *p) == '\t')
3297 putc (c, asm_out_file);
3300 ASM_OUTPUT_OPCODE (asm_out_file, p);
3304 #ifdef ASSEMBLER_DIALECT
3310 output_operand_lossage ("nested assembly dialect alternatives");
3314 /* If we want the first dialect, do nothing. Otherwise, skip
3315 DIALECT_NUMBER of strings ending with '|'. */
3316 for (i = 0; i < dialect_number; i++)
3318 while (*p && *p != '}' && *p++ != '|')
3327 output_operand_lossage ("unterminated assembly dialect alternative");
3334 /* Skip to close brace. */
3339 output_operand_lossage ("unterminated assembly dialect alternative");
3343 while (*p++ != '}');
3347 putc (c, asm_out_file);
3352 putc (c, asm_out_file);
3358 /* %% outputs a single %. */
3362 putc (c, asm_out_file);
3364 /* %= outputs a number which is unique to each insn in the entire
3365 compilation. This is useful for making local labels that are
3366 referred to more than once in a given insn. */
3370 fprintf (asm_out_file, "%d", insn_counter);
3372 /* % followed by a letter and some digits
3373 outputs an operand in a special way depending on the letter.
3374 Letters `acln' are implemented directly.
3375 Other letters are passed to `output_operand' so that
3376 the PRINT_OPERAND macro can define them. */
3377 else if (ISALPHA (*p))
3383 output_operand_lossage ("operand number missing after %%-letter");
3384 else if (this_is_asm_operands
3385 && (c < 0 || (unsigned int) c >= insn_noperands))
3386 output_operand_lossage ("operand number out of range");
3387 else if (letter == 'l')
3388 output_asm_label (operands[c]);
3389 else if (letter == 'a')
3390 output_address (operands[c]);
3391 else if (letter == 'c')
3393 if (CONSTANT_ADDRESS_P (operands[c]))
3394 output_addr_const (asm_out_file, operands[c]);
3396 output_operand (operands[c], 'c');
3398 else if (letter == 'n')
3400 if (GET_CODE (operands[c]) == CONST_INT)
3401 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3402 - INTVAL (operands[c]));
3405 putc ('-', asm_out_file);
3406 output_addr_const (asm_out_file, operands[c]);
3410 output_operand (operands[c], letter);
3416 while (ISDIGIT (c = *p))
3419 /* % followed by a digit outputs an operand the default way. */
3420 else if (ISDIGIT (*p))
3423 if (this_is_asm_operands
3424 && (c < 0 || (unsigned int) c >= insn_noperands))
3425 output_operand_lossage ("operand number out of range");
3427 output_operand (operands[c], 0);
3433 while (ISDIGIT (c = *p))
3436 /* % followed by punctuation: output something for that
3437 punctuation character alone, with no operand.
3438 The PRINT_OPERAND macro decides what is actually done. */
3439 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3440 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3441 output_operand (NULL_RTX, *p++);
3444 output_operand_lossage ("invalid %%-code");
3448 putc (c, asm_out_file);
3451 /* Write out the variable names for operands, if we know them. */
3452 if (flag_verbose_asm)
3453 output_asm_operand_names (operands, oporder, ops);
3454 if (flag_print_asm_name)
3457 putc ('\n', asm_out_file);
3460 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3463 output_asm_label (x)
3468 if (GET_CODE (x) == LABEL_REF)
3470 if (GET_CODE (x) == CODE_LABEL
3471 || (GET_CODE (x) == NOTE
3472 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3473 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3475 output_operand_lossage ("`%%l' operand isn't a label");
3477 assemble_name (asm_out_file, buf);
3480 /* Print operand X using machine-dependent assembler syntax.
3481 The macro PRINT_OPERAND is defined just to control this function.
3482 CODE is a non-digit that preceded the operand-number in the % spec,
3483 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3484 between the % and the digits.
3485 When CODE is a non-letter, X is 0.
3487 The meanings of the letters are machine-dependent and controlled
3488 by PRINT_OPERAND. */
3491 output_operand (x, code)
3493 int code ATTRIBUTE_UNUSED;
3495 if (x && GET_CODE (x) == SUBREG)
3496 x = alter_subreg (&x);
3498 /* If X is a pseudo-register, abort now rather than writing trash to the
3501 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3504 PRINT_OPERAND (asm_out_file, x, code);
3507 /* Print a memory reference operand for address X
3508 using machine-dependent assembler syntax.
3509 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3515 walk_alter_subreg (&x);
3516 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3519 /* Print an integer constant expression in assembler syntax.
3520 Addition and subtraction are the only arithmetic
3521 that may appear in these expressions. */
3524 output_addr_const (file, x)
3531 switch (GET_CODE (x))
3538 #ifdef ASM_OUTPUT_SYMBOL_REF
3539 ASM_OUTPUT_SYMBOL_REF (file, x);
3541 assemble_name (file, XSTR (x, 0));
3549 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3550 #ifdef ASM_OUTPUT_LABEL_REF
3551 ASM_OUTPUT_LABEL_REF (file, buf);
3553 assemble_name (file, buf);
3558 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3562 /* This used to output parentheses around the expression,
3563 but that does not work on the 386 (either ATT or BSD assembler). */
3564 output_addr_const (file, XEXP (x, 0));
3568 if (GET_MODE (x) == VOIDmode)
3570 /* We can use %d if the number is one word and positive. */
3571 if (CONST_DOUBLE_HIGH (x))
3572 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3573 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3574 else if (CONST_DOUBLE_LOW (x) < 0)
3575 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3577 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3580 /* We can't handle floating point constants;
3581 PRINT_OPERAND must handle them. */
3582 output_operand_lossage ("floating constant misused");
3586 /* Some assemblers need integer constants to appear last (eg masm). */
3587 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3589 output_addr_const (file, XEXP (x, 1));
3590 if (INTVAL (XEXP (x, 0)) >= 0)
3591 fprintf (file, "+");
3592 output_addr_const (file, XEXP (x, 0));
3596 output_addr_const (file, XEXP (x, 0));
3597 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3598 || INTVAL (XEXP (x, 1)) >= 0)
3599 fprintf (file, "+");
3600 output_addr_const (file, XEXP (x, 1));
3605 /* Avoid outputting things like x-x or x+5-x,
3606 since some assemblers can't handle that. */
3607 x = simplify_subtraction (x);
3608 if (GET_CODE (x) != MINUS)
3611 output_addr_const (file, XEXP (x, 0));
3612 fprintf (file, "-");
3613 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3614 || GET_CODE (XEXP (x, 1)) == PC
3615 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3616 output_addr_const (file, XEXP (x, 1));
3619 fputs (targetm.asm_out.open_paren, file);
3620 output_addr_const (file, XEXP (x, 1));
3621 fputs (targetm.asm_out.close_paren, file);
3628 output_addr_const (file, XEXP (x, 0));
3632 #ifdef OUTPUT_ADDR_CONST_EXTRA
3633 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3638 output_operand_lossage ("invalid expression as operand");
3642 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3643 %R prints the value of REGISTER_PREFIX.
3644 %L prints the value of LOCAL_LABEL_PREFIX.
3645 %U prints the value of USER_LABEL_PREFIX.
3646 %I prints the value of IMMEDIATE_PREFIX.
3647 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3648 Also supported are %d, %x, %s, %e, %f, %g and %%.
3650 We handle alternate assembler dialects here, just like output_asm_insn. */
3653 asm_fprintf VPARAMS ((FILE *file, const char *p, ...))
3658 VA_OPEN (argptr, p);
3659 VA_FIXEDARG (argptr, FILE *, file);
3660 VA_FIXEDARG (argptr, const char *, p);
3667 #ifdef ASSEMBLER_DIALECT
3672 /* If we want the first dialect, do nothing. Otherwise, skip
3673 DIALECT_NUMBER of strings ending with '|'. */
3674 for (i = 0; i < dialect_number; i++)
3676 while (*p && *p++ != '|')
3686 /* Skip to close brace. */
3687 while (*p && *p++ != '}')
3698 while (ISDIGIT (c) || c == '.')
3706 fprintf (file, "%%");
3709 case 'd': case 'i': case 'u':
3710 case 'x': case 'p': case 'X':
3714 fprintf (file, buf, va_arg (argptr, int));
3718 /* This is a prefix to the 'd', 'i', 'u', 'x', 'p', and 'X' cases,
3719 but we do not check for those cases. It means that the value
3720 is a HOST_WIDE_INT, which may be either `int' or `long'. */
3722 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
3724 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_LONG
3734 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3741 fprintf (file, buf, va_arg (argptr, long));
3749 fprintf (file, buf, va_arg (argptr, double));
3755 fprintf (file, buf, va_arg (argptr, char *));
3759 #ifdef ASM_OUTPUT_OPCODE
3760 ASM_OUTPUT_OPCODE (asm_out_file, p);
3765 #ifdef REGISTER_PREFIX
3766 fprintf (file, "%s", REGISTER_PREFIX);
3771 #ifdef IMMEDIATE_PREFIX
3772 fprintf (file, "%s", IMMEDIATE_PREFIX);
3777 #ifdef LOCAL_LABEL_PREFIX
3778 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3783 fputs (user_label_prefix, file);
3786 #ifdef ASM_FPRINTF_EXTENSIONS
3787 /* Upper case letters are reserved for general use by asm_fprintf
3788 and so are not available to target specific code. In order to
3789 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3790 they are defined here. As they get turned into real extensions
3791 to asm_fprintf they should be removed from this list. */
3792 case 'A': case 'B': case 'C': case 'D': case 'E':
3793 case 'F': case 'G': case 'H': case 'J': case 'K':
3794 case 'M': case 'N': case 'P': case 'Q': case 'S':
3795 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3798 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3811 /* Split up a CONST_DOUBLE or integer constant rtx
3812 into two rtx's for single words,
3813 storing in *FIRST the word that comes first in memory in the target
3814 and in *SECOND the other. */
3817 split_double (value, first, second)
3819 rtx *first, *second;
3821 if (GET_CODE (value) == CONST_INT)
3823 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3825 /* In this case the CONST_INT holds both target words.
3826 Extract the bits from it into two word-sized pieces.
3827 Sign extend each half to HOST_WIDE_INT. */
3828 unsigned HOST_WIDE_INT low, high;
3829 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3831 /* Set sign_bit to the most significant bit of a word. */
3833 sign_bit <<= BITS_PER_WORD - 1;
3835 /* Set mask so that all bits of the word are set. We could
3836 have used 1 << BITS_PER_WORD instead of basing the
3837 calculation on sign_bit. However, on machines where
3838 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3839 compiler warning, even though the code would never be
3841 mask = sign_bit << 1;
3844 /* Set sign_extend as any remaining bits. */
3845 sign_extend = ~mask;
3847 /* Pick the lower word and sign-extend it. */
3848 low = INTVAL (value);
3853 /* Pick the higher word, shifted to the least significant
3854 bits, and sign-extend it. */
3855 high = INTVAL (value);
3856 high >>= BITS_PER_WORD - 1;
3859 if (high & sign_bit)
3860 high |= sign_extend;
3862 /* Store the words in the target machine order. */
3863 if (WORDS_BIG_ENDIAN)
3865 *first = GEN_INT (high);
3866 *second = GEN_INT (low);
3870 *first = GEN_INT (low);
3871 *second = GEN_INT (high);
3876 /* The rule for using CONST_INT for a wider mode
3877 is that we regard the value as signed.
3878 So sign-extend it. */
3879 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3880 if (WORDS_BIG_ENDIAN)
3892 else if (GET_CODE (value) != CONST_DOUBLE)
3894 if (WORDS_BIG_ENDIAN)
3896 *first = const0_rtx;
3902 *second = const0_rtx;
3905 else if (GET_MODE (value) == VOIDmode
3906 /* This is the old way we did CONST_DOUBLE integers. */
3907 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3909 /* In an integer, the words are defined as most and least significant.
3910 So order them by the target's convention. */
3911 if (WORDS_BIG_ENDIAN)
3913 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3914 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3918 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3919 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3926 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3928 /* Note, this converts the REAL_VALUE_TYPE to the target's
3929 format, splits up the floating point double and outputs
3930 exactly 32 bits of it into each of l[0] and l[1] --
3931 not necessarily BITS_PER_WORD bits. */
3932 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3934 /* If 32 bits is an entire word for the target, but not for the host,
3935 then sign-extend on the host so that the number will look the same
3936 way on the host that it would on the target. See for instance
3937 simplify_unary_operation. The #if is needed to avoid compiler
3940 #if HOST_BITS_PER_LONG > 32
3941 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3943 if (l[0] & ((long) 1 << 31))
3944 l[0] |= ((long) (-1) << 32);
3945 if (l[1] & ((long) 1 << 31))
3946 l[1] |= ((long) (-1) << 32);
3950 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
3951 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
3955 /* Return nonzero if this function has no function calls. */
3963 if (current_function_profile || profile_arc_flag)
3966 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3968 if (GET_CODE (insn) == CALL_INSN
3969 && ! SIBLING_CALL_P (insn))
3971 if (GET_CODE (insn) == INSN
3972 && GET_CODE (PATTERN (insn)) == SEQUENCE
3973 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
3974 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3977 for (link = current_function_epilogue_delay_list;
3979 link = XEXP (link, 1))
3981 insn = XEXP (link, 0);
3983 if (GET_CODE (insn) == CALL_INSN
3984 && ! SIBLING_CALL_P (insn))
3986 if (GET_CODE (insn) == INSN
3987 && GET_CODE (PATTERN (insn)) == SEQUENCE
3988 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN
3989 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3996 /* Return 1 if branch is an forward branch.
3997 Uses insn_shuid array, so it works only in the final pass. May be used by
3998 output templates to customary add branch prediction hints.
4001 final_forward_branch_p (insn)
4004 int insn_id, label_id;
4007 insn_id = INSN_SHUID (insn);
4008 label_id = INSN_SHUID (JUMP_LABEL (insn));
4009 /* We've hit some insns that does not have id information available. */
4010 if (!insn_id || !label_id)
4012 return insn_id < label_id;
4015 /* On some machines, a function with no call insns
4016 can run faster if it doesn't create its own register window.
4017 When output, the leaf function should use only the "output"
4018 registers. Ordinarily, the function would be compiled to use
4019 the "input" registers to find its arguments; it is a candidate
4020 for leaf treatment if it uses only the "input" registers.
4021 Leaf function treatment means renumbering so the function
4022 uses the "output" registers instead. */
4024 #ifdef LEAF_REGISTERS
4026 /* Return 1 if this function uses only the registers that can be
4027 safely renumbered. */
4030 only_leaf_regs_used ()
4033 char *permitted_reg_in_leaf_functions = LEAF_REGISTERS;
4035 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4036 if ((regs_ever_live[i] || global_regs[i])
4037 && ! permitted_reg_in_leaf_functions[i])
4040 if (current_function_uses_pic_offset_table
4041 && pic_offset_table_rtx != 0
4042 && GET_CODE (pic_offset_table_rtx) == REG
4043 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
4049 /* Scan all instructions and renumber all registers into those
4050 available in leaf functions. */
4053 leaf_renumber_regs (first)
4058 /* Renumber only the actual patterns.
4059 The reg-notes can contain frame pointer refs,
4060 and renumbering them could crash, and should not be needed. */
4061 for (insn = first; insn; insn = NEXT_INSN (insn))
4063 leaf_renumber_regs_insn (PATTERN (insn));
4064 for (insn = current_function_epilogue_delay_list;
4066 insn = XEXP (insn, 1))
4067 if (INSN_P (XEXP (insn, 0)))
4068 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
4071 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
4072 available in leaf functions. */
4075 leaf_renumber_regs_insn (in_rtx)
4079 const char *format_ptr;
4084 /* Renumber all input-registers into output-registers.
4085 renumbered_regs would be 1 for an output-register;
4088 if (GET_CODE (in_rtx) == REG)
4092 /* Don't renumber the same reg twice. */
4096 newreg = REGNO (in_rtx);
4097 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
4098 to reach here as part of a REG_NOTE. */
4099 if (newreg >= FIRST_PSEUDO_REGISTER)
4104 newreg = LEAF_REG_REMAP (newreg);
4107 regs_ever_live[REGNO (in_rtx)] = 0;
4108 regs_ever_live[newreg] = 1;
4109 REGNO (in_rtx) = newreg;
4113 if (INSN_P (in_rtx))
4115 /* Inside a SEQUENCE, we find insns.
4116 Renumber just the patterns of these insns,
4117 just as we do for the top-level insns. */
4118 leaf_renumber_regs_insn (PATTERN (in_rtx));
4122 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
4124 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
4125 switch (*format_ptr++)
4128 leaf_renumber_regs_insn (XEXP (in_rtx, i));
4132 if (NULL != XVEC (in_rtx, i))
4134 for (j = 0; j < XVECLEN (in_rtx, i); j++)
4135 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));