1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This is the final pass of the compiler.
23 It looks at the rtl code for a function and outputs assembler code.
25 Call `final_start_function' to output the assembler code for function entry,
26 `final' to output assembler code for some RTL code,
27 `final_end_function' to output assembler code for function exit.
28 If a function is compiled in several pieces, each piece is
29 output separately with `final'.
31 Some optimizations are also done at this level.
32 Move instructions that were made unnecessary by good register allocation
33 are detected and omitted from the output. (Though most of these
34 are removed by the last jump pass.)
36 Instructions to set the condition codes are omitted when it can be
37 seen that the condition codes already had the desired values.
39 In some cases it is sufficient if the inherited condition codes
40 have related values, but this may require the following insn
41 (the one that tests the condition codes) to be modified.
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
49 #include "coretypes.h"
56 #include "insn-config.h"
57 #include "insn-attr.h"
59 #include "conditions.h"
62 #include "hard-reg-set.h"
69 #include "basic-block.h"
73 #include "cfglayout.h"
75 #ifdef XCOFF_DEBUGGING_INFO
76 #include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
80 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81 #include "dwarf2out.h"
84 #ifdef DBX_DEBUGGING_INFO
88 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
89 null default for it to save conditionalization later. */
90 #ifndef CC_STATUS_INIT
91 #define CC_STATUS_INIT
94 /* How to start an assembler comment. */
95 #ifndef ASM_COMMENT_START
96 #define ASM_COMMENT_START ";#"
99 /* Is the given character a logical line separator for the assembler? */
100 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
101 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
104 #ifndef JUMP_TABLES_IN_TEXT_SECTION
105 #define JUMP_TABLES_IN_TEXT_SECTION 0
108 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
109 #define HAVE_READONLY_DATA_SECTION 1
111 #define HAVE_READONLY_DATA_SECTION 0
114 /* Bitflags used by final_scan_insn. */
117 #define SEEN_EMITTED 4
119 /* Last insn processed by final_scan_insn. */
120 static rtx debug_insn;
121 rtx current_output_insn;
123 /* Line number of last NOTE. */
124 static int last_linenum;
126 /* Highest line number in current block. */
127 static int high_block_linenum;
129 /* Likewise for function. */
130 static int high_function_linenum;
132 /* Filename of last NOTE. */
133 static const char *last_filename;
135 extern int length_unit_log; /* This is defined in insn-attrtab.c. */
137 /* Nonzero while outputting an `asm' with operands.
138 This means that inconsistencies are the user's fault, so don't abort.
139 The precise value is the insn being output, to pass to error_for_asm. */
140 rtx this_is_asm_operands;
142 /* Number of operands of this insn, for an `asm' with operands. */
143 static unsigned int insn_noperands;
145 /* Compare optimization flag. */
147 static rtx last_ignored_compare = 0;
149 /* Assign a unique number to each insn that is output.
150 This can be used to generate unique local labels. */
152 static int insn_counter = 0;
155 /* This variable contains machine-dependent flags (defined in tm.h)
156 set and examined by output routines
157 that describe how to interpret the condition codes properly. */
161 /* During output of an insn, this contains a copy of cc_status
162 from before the insn. */
164 CC_STATUS cc_prev_status;
167 /* Indexed by hardware reg number, is 1 if that register is ever
168 used in the current function.
170 In life_analysis, or in stupid_life_analysis, this is set
171 up to record the hard regs used explicitly. Reload adds
172 in the hard regs used for holding pseudo regs. Final uses
173 it to generate the code in the function prologue and epilogue
174 to save and restore registers as needed. */
176 char regs_ever_live[FIRST_PSEUDO_REGISTER];
178 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
179 Unlike regs_ever_live, elements of this array corresponding to
180 eliminable regs like the frame pointer are set if an asm sets them. */
182 char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
184 /* Nonzero means current function must be given a frame pointer.
185 Initialized in function.c to 0. Set only in reload1.c as per
186 the needs of the function. */
188 int frame_pointer_needed;
190 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
192 static int block_depth;
194 /* Nonzero if have enabled APP processing of our assembler output. */
198 /* If we are outputting an insn sequence, this contains the sequence rtx.
203 #ifdef ASSEMBLER_DIALECT
205 /* Number of the assembler dialect to use, starting at 0. */
206 static int dialect_number;
209 #ifdef HAVE_conditional_execution
210 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
211 rtx current_insn_predicate;
214 #ifdef HAVE_ATTR_length
215 static int asm_insn_count (rtx);
217 static void profile_function (FILE *);
218 static void profile_after_prologue (FILE *);
219 static bool notice_source_line (rtx);
220 static rtx walk_alter_subreg (rtx *);
221 static void output_asm_name (void);
222 static void output_alternate_entry_point (FILE *, rtx);
223 static tree get_mem_expr_from_op (rtx, int *);
224 static void output_asm_operand_names (rtx *, int *, int);
225 static void output_operand (rtx, int);
226 #ifdef LEAF_REGISTERS
227 static void leaf_renumber_regs (rtx);
230 static int alter_cond (rtx);
232 #ifndef ADDR_VEC_ALIGN
233 static int final_addr_vec_align (rtx);
235 #ifdef HAVE_ATTR_length
236 static int align_fuzz (rtx, rtx, int, unsigned);
239 /* Initialize data in final at the beginning of a compilation. */
242 init_final (const char *filename ATTRIBUTE_UNUSED)
247 #ifdef ASSEMBLER_DIALECT
248 dialect_number = ASSEMBLER_DIALECT;
252 /* Default target function prologue and epilogue assembler output.
254 If not overridden for epilogue code, then the function body itself
255 contains return instructions wherever needed. */
257 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
258 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
262 /* Default target hook that outputs nothing to a stream. */
264 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
268 /* Enable APP processing of subsequent output.
269 Used before the output from an `asm' statement. */
276 fputs (ASM_APP_ON, asm_out_file);
281 /* Disable APP processing of subsequent output.
282 Called from varasm.c before most kinds of output. */
289 fputs (ASM_APP_OFF, asm_out_file);
294 /* Return the number of slots filled in the current
295 delayed branch sequence (we don't count the insn needing the
296 delay slot). Zero if not in a delayed branch sequence. */
300 dbr_sequence_length (void)
302 if (final_sequence != 0)
303 return XVECLEN (final_sequence, 0) - 1;
309 /* The next two pages contain routines used to compute the length of an insn
310 and to shorten branches. */
312 /* Arrays for insn lengths, and addresses. The latter is referenced by
313 `insn_current_length'. */
315 static int *insn_lengths;
317 varray_type insn_addresses_;
319 /* Max uid for which the above arrays are valid. */
320 static int insn_lengths_max_uid;
322 /* Address of insn being processed. Used by `insn_current_length'. */
323 int insn_current_address;
325 /* Address of insn being processed in previous iteration. */
326 int insn_last_address;
328 /* known invariant alignment of insn being processed. */
329 int insn_current_align;
331 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
332 gives the next following alignment insn that increases the known
333 alignment, or NULL_RTX if there is no such insn.
334 For any alignment obtained this way, we can again index uid_align with
335 its uid to obtain the next following align that in turn increases the
336 alignment, till we reach NULL_RTX; the sequence obtained this way
337 for each insn we'll call the alignment chain of this insn in the following
340 struct label_alignment
346 static rtx *uid_align;
347 static int *uid_shuid;
348 static struct label_alignment *label_align;
350 /* Indicate that branch shortening hasn't yet been done. */
353 init_insn_lengths (void)
364 insn_lengths_max_uid = 0;
366 #ifdef HAVE_ATTR_length
367 INSN_ADDRESSES_FREE ();
376 /* Obtain the current length of an insn. If branch shortening has been done,
377 get its actual length. Otherwise, get its maximum length. */
380 get_attr_length (rtx insn ATTRIBUTE_UNUSED)
382 #ifdef HAVE_ATTR_length
387 if (insn_lengths_max_uid > INSN_UID (insn))
388 return insn_lengths[INSN_UID (insn)];
390 switch (GET_CODE (insn))
398 length = insn_default_length (insn);
402 body = PATTERN (insn);
403 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
405 /* Alignment is machine-dependent and should be handled by
409 length = insn_default_length (insn);
413 body = PATTERN (insn);
414 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
417 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
418 length = asm_insn_count (body) * insn_default_length (insn);
419 else if (GET_CODE (body) == SEQUENCE)
420 for (i = 0; i < XVECLEN (body, 0); i++)
421 length += get_attr_length (XVECEXP (body, 0, i));
423 length = insn_default_length (insn);
430 #ifdef ADJUST_INSN_LENGTH
431 ADJUST_INSN_LENGTH (insn, length);
434 #else /* not HAVE_ATTR_length */
436 #endif /* not HAVE_ATTR_length */
439 /* Code to handle alignment inside shorten_branches. */
441 /* Here is an explanation how the algorithm in align_fuzz can give
444 Call a sequence of instructions beginning with alignment point X
445 and continuing until the next alignment point `block X'. When `X'
446 is used in an expression, it means the alignment value of the
449 Call the distance between the start of the first insn of block X, and
450 the end of the last insn of block X `IX', for the `inner size of X'.
451 This is clearly the sum of the instruction lengths.
453 Likewise with the next alignment-delimited block following X, which we
456 Call the distance between the start of the first insn of block X, and
457 the start of the first insn of block Y `OX', for the `outer size of X'.
459 The estimated padding is then OX - IX.
461 OX can be safely estimated as
466 OX = round_up(IX, X) + Y - X
468 Clearly est(IX) >= real(IX), because that only depends on the
469 instruction lengths, and those being overestimated is a given.
471 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
472 we needn't worry about that when thinking about OX.
474 When X >= Y, the alignment provided by Y adds no uncertainty factor
475 for branch ranges starting before X, so we can just round what we have.
476 But when X < Y, we don't know anything about the, so to speak,
477 `middle bits', so we have to assume the worst when aligning up from an
478 address mod X to one mod Y, which is Y - X. */
481 #define LABEL_ALIGN(LABEL) align_labels_log
484 #ifndef LABEL_ALIGN_MAX_SKIP
485 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
489 #define LOOP_ALIGN(LABEL) align_loops_log
492 #ifndef LOOP_ALIGN_MAX_SKIP
493 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
496 #ifndef LABEL_ALIGN_AFTER_BARRIER
497 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
500 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
501 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
505 #define JUMP_ALIGN(LABEL) align_jumps_log
508 #ifndef JUMP_ALIGN_MAX_SKIP
509 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
512 #ifndef ADDR_VEC_ALIGN
514 final_addr_vec_align (rtx addr_vec)
516 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
518 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
519 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
520 return exact_log2 (align);
524 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
527 #ifndef INSN_LENGTH_ALIGNMENT
528 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
531 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
533 static int min_labelno, max_labelno;
535 #define LABEL_TO_ALIGNMENT(LABEL) \
536 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
538 #define LABEL_TO_MAX_SKIP(LABEL) \
539 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
541 /* For the benefit of port specific code do this also as a function. */
544 label_to_alignment (rtx label)
546 return LABEL_TO_ALIGNMENT (label);
549 #ifdef HAVE_ATTR_length
550 /* The differences in addresses
551 between a branch and its target might grow or shrink depending on
552 the alignment the start insn of the range (the branch for a forward
553 branch or the label for a backward branch) starts out on; if these
554 differences are used naively, they can even oscillate infinitely.
555 We therefore want to compute a 'worst case' address difference that
556 is independent of the alignment the start insn of the range end
557 up on, and that is at least as large as the actual difference.
558 The function align_fuzz calculates the amount we have to add to the
559 naively computed difference, by traversing the part of the alignment
560 chain of the start insn of the range that is in front of the end insn
561 of the range, and considering for each alignment the maximum amount
562 that it might contribute to a size increase.
564 For casesi tables, we also want to know worst case minimum amounts of
565 address difference, in case a machine description wants to introduce
566 some common offset that is added to all offsets in a table.
567 For this purpose, align_fuzz with a growth argument of 0 computes the
568 appropriate adjustment. */
570 /* Compute the maximum delta by which the difference of the addresses of
571 START and END might grow / shrink due to a different address for start
572 which changes the size of alignment insns between START and END.
573 KNOWN_ALIGN_LOG is the alignment known for START.
574 GROWTH should be ~0 if the objective is to compute potential code size
575 increase, and 0 if the objective is to compute potential shrink.
576 The return value is undefined for any other value of GROWTH. */
579 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
581 int uid = INSN_UID (start);
583 int known_align = 1 << known_align_log;
584 int end_shuid = INSN_SHUID (end);
587 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
589 int align_addr, new_align;
591 uid = INSN_UID (align_label);
592 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
593 if (uid_shuid[uid] > end_shuid)
595 known_align_log = LABEL_TO_ALIGNMENT (align_label);
596 new_align = 1 << known_align_log;
597 if (new_align < known_align)
599 fuzz += (-align_addr ^ growth) & (new_align - known_align);
600 known_align = new_align;
605 /* Compute a worst-case reference address of a branch so that it
606 can be safely used in the presence of aligned labels. Since the
607 size of the branch itself is unknown, the size of the branch is
608 not included in the range. I.e. for a forward branch, the reference
609 address is the end address of the branch as known from the previous
610 branch shortening pass, minus a value to account for possible size
611 increase due to alignment. For a backward branch, it is the start
612 address of the branch as known from the current pass, plus a value
613 to account for possible size increase due to alignment.
614 NB.: Therefore, the maximum offset allowed for backward branches needs
615 to exclude the branch size. */
618 insn_current_reference_address (rtx branch)
623 if (! INSN_ADDRESSES_SET_P ())
626 seq = NEXT_INSN (PREV_INSN (branch));
627 seq_uid = INSN_UID (seq);
628 if (!JUMP_P (branch))
629 /* This can happen for example on the PA; the objective is to know the
630 offset to address something in front of the start of the function.
631 Thus, we can treat it like a backward branch.
632 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
633 any alignment we'd encounter, so we skip the call to align_fuzz. */
634 return insn_current_address;
635 dest = JUMP_LABEL (branch);
637 /* BRANCH has no proper alignment chain set, so use SEQ.
638 BRANCH also has no INSN_SHUID. */
639 if (INSN_SHUID (seq) < INSN_SHUID (dest))
641 /* Forward branch. */
642 return (insn_last_address + insn_lengths[seq_uid]
643 - align_fuzz (seq, dest, length_unit_log, ~0));
647 /* Backward branch. */
648 return (insn_current_address
649 + align_fuzz (dest, seq, length_unit_log, ~0));
652 #endif /* HAVE_ATTR_length */
655 compute_alignments (void)
657 int log, max_skip, max_log;
666 max_labelno = max_label_num ();
667 min_labelno = get_first_label_num ();
668 label_align = xcalloc (max_labelno - min_labelno + 1,
669 sizeof (struct label_alignment));
671 /* If not optimizing or optimizing for size, don't assign any alignments. */
672 if (! optimize || optimize_size)
677 rtx label = BB_HEAD (bb);
678 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
682 || probably_never_executed_bb_p (bb))
684 max_log = LABEL_ALIGN (label);
685 max_skip = LABEL_ALIGN_MAX_SKIP;
687 for (e = bb->pred; e; e = e->pred_next)
689 if (e->flags & EDGE_FALLTHRU)
690 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
692 branch_frequency += EDGE_FREQUENCY (e);
695 /* There are two purposes to align block with no fallthru incoming edge:
696 1) to avoid fetch stalls when branch destination is near cache boundary
697 2) to improve cache efficiency in case the previous block is not executed
698 (so it does not need to be in the cache).
700 We to catch first case, we align frequently executed blocks.
701 To catch the second, we align blocks that are executed more frequently
702 than the predecessor and the predecessor is likely to not be executed
703 when function is called. */
706 && (branch_frequency > BB_FREQ_MAX / 10
707 || (bb->frequency > bb->prev_bb->frequency * 10
708 && (bb->prev_bb->frequency
709 <= ENTRY_BLOCK_PTR->frequency / 2))))
711 log = JUMP_ALIGN (label);
715 max_skip = JUMP_ALIGN_MAX_SKIP;
718 /* In case block is frequent and reached mostly by non-fallthru edge,
719 align it. It is most likely a first block of loop. */
721 && maybe_hot_bb_p (bb)
722 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
723 && branch_frequency > fallthru_frequency * 2)
725 log = LOOP_ALIGN (label);
729 max_skip = LOOP_ALIGN_MAX_SKIP;
732 LABEL_TO_ALIGNMENT (label) = max_log;
733 LABEL_TO_MAX_SKIP (label) = max_skip;
737 /* Make a pass over all insns and compute their actual lengths by shortening
738 any branches of variable length if possible. */
740 /* shorten_branches might be called multiple times: for example, the SH
741 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
742 In order to do this, it needs proper length information, which it obtains
743 by calling shorten_branches. This cannot be collapsed with
744 shorten_branches itself into a single pass unless we also want to integrate
745 reorg.c, since the branch splitting exposes new instructions with delay
749 shorten_branches (rtx first ATTRIBUTE_UNUSED)
756 #ifdef HAVE_ATTR_length
757 #define MAX_CODE_ALIGN 16
759 int something_changed = 1;
760 char *varying_length;
763 rtx align_tab[MAX_CODE_ALIGN];
767 /* Compute maximum UID and allocate label_align / uid_shuid. */
768 max_uid = get_max_uid ();
770 /* Free uid_shuid before reallocating it. */
773 uid_shuid = xmalloc (max_uid * sizeof *uid_shuid);
775 if (max_labelno != max_label_num ())
777 int old = max_labelno;
781 max_labelno = max_label_num ();
783 n_labels = max_labelno - min_labelno + 1;
784 n_old_labels = old - min_labelno + 1;
786 label_align = xrealloc (label_align,
787 n_labels * sizeof (struct label_alignment));
789 /* Range of labels grows monotonically in the function. Abort here
790 means that the initialization of array got lost. */
791 if (n_old_labels > n_labels)
794 memset (label_align + n_old_labels, 0,
795 (n_labels - n_old_labels) * sizeof (struct label_alignment));
798 /* Initialize label_align and set up uid_shuid to be strictly
799 monotonically rising with insn order. */
800 /* We use max_log here to keep track of the maximum alignment we want to
801 impose on the next CODE_LABEL (or the current one if we are processing
802 the CODE_LABEL itself). */
807 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
811 INSN_SHUID (insn) = i++;
814 /* reorg might make the first insn of a loop being run once only,
815 and delete the label in front of it. Then we want to apply
816 the loop alignment to the new label created by reorg, which
817 is separated by the former loop start insn from the
818 NOTE_INSN_LOOP_BEG. */
820 else if (LABEL_P (insn))
824 /* Merge in alignments computed by compute_alignments. */
825 log = LABEL_TO_ALIGNMENT (insn);
829 max_skip = LABEL_TO_MAX_SKIP (insn);
832 log = LABEL_ALIGN (insn);
836 max_skip = LABEL_ALIGN_MAX_SKIP;
838 next = NEXT_INSN (insn);
839 /* ADDR_VECs only take room if read-only data goes into the text
841 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
842 if (next && JUMP_P (next))
844 rtx nextbody = PATTERN (next);
845 if (GET_CODE (nextbody) == ADDR_VEC
846 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
848 log = ADDR_VEC_ALIGN (next);
852 max_skip = LABEL_ALIGN_MAX_SKIP;
856 LABEL_TO_ALIGNMENT (insn) = max_log;
857 LABEL_TO_MAX_SKIP (insn) = max_skip;
861 else if (BARRIER_P (insn))
865 for (label = insn; label && ! INSN_P (label);
866 label = NEXT_INSN (label))
869 log = LABEL_ALIGN_AFTER_BARRIER (insn);
873 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
879 #ifdef HAVE_ATTR_length
881 /* Allocate the rest of the arrays. */
882 insn_lengths = xmalloc (max_uid * sizeof (*insn_lengths));
883 insn_lengths_max_uid = max_uid;
884 /* Syntax errors can lead to labels being outside of the main insn stream.
885 Initialize insn_addresses, so that we get reproducible results. */
886 INSN_ADDRESSES_ALLOC (max_uid);
888 varying_length = xcalloc (max_uid, sizeof (char));
890 /* Initialize uid_align. We scan instructions
891 from end to start, and keep in align_tab[n] the last seen insn
892 that does an alignment of at least n+1, i.e. the successor
893 in the alignment chain for an insn that does / has a known
895 uid_align = xcalloc (max_uid, sizeof *uid_align);
897 for (i = MAX_CODE_ALIGN; --i >= 0;)
898 align_tab[i] = NULL_RTX;
899 seq = get_last_insn ();
900 for (; seq; seq = PREV_INSN (seq))
902 int uid = INSN_UID (seq);
904 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
905 uid_align[uid] = align_tab[0];
908 /* Found an alignment label. */
909 uid_align[uid] = align_tab[log];
910 for (i = log - 1; i >= 0; i--)
914 #ifdef CASE_VECTOR_SHORTEN_MODE
917 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
920 int min_shuid = INSN_SHUID (get_insns ()) - 1;
921 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
924 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
926 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
927 int len, i, min, max, insn_shuid;
929 addr_diff_vec_flags flags;
932 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
934 pat = PATTERN (insn);
935 len = XVECLEN (pat, 1);
938 min_align = MAX_CODE_ALIGN;
939 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
941 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
942 int shuid = INSN_SHUID (lab);
953 if (min_align > LABEL_TO_ALIGNMENT (lab))
954 min_align = LABEL_TO_ALIGNMENT (lab);
956 XEXP (pat, 2) = gen_rtx_LABEL_REF (VOIDmode, min_lab);
957 XEXP (pat, 3) = gen_rtx_LABEL_REF (VOIDmode, max_lab);
958 insn_shuid = INSN_SHUID (insn);
959 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
960 flags.min_align = min_align;
961 flags.base_after_vec = rel > insn_shuid;
962 flags.min_after_vec = min > insn_shuid;
963 flags.max_after_vec = max > insn_shuid;
964 flags.min_after_base = min > rel;
965 flags.max_after_base = max > rel;
966 ADDR_DIFF_VEC_FLAGS (pat) = flags;
969 #endif /* CASE_VECTOR_SHORTEN_MODE */
971 /* Compute initial lengths, addresses, and varying flags for each insn. */
972 for (insn_current_address = 0, insn = first;
974 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
976 uid = INSN_UID (insn);
978 insn_lengths[uid] = 0;
982 int log = LABEL_TO_ALIGNMENT (insn);
985 int align = 1 << log;
986 int new_address = (insn_current_address + align - 1) & -align;
987 insn_lengths[uid] = new_address - insn_current_address;
991 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
993 if (NOTE_P (insn) || BARRIER_P (insn)
996 if (INSN_DELETED_P (insn))
999 body = PATTERN (insn);
1000 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1002 /* This only takes room if read-only data goes into the text
1004 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
1005 insn_lengths[uid] = (XVECLEN (body,
1006 GET_CODE (body) == ADDR_DIFF_VEC)
1007 * GET_MODE_SIZE (GET_MODE (body)));
1008 /* Alignment is handled by ADDR_VEC_ALIGN. */
1010 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1011 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1012 else if (GET_CODE (body) == SEQUENCE)
1015 int const_delay_slots;
1017 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1019 const_delay_slots = 0;
1021 /* Inside a delay slot sequence, we do not do any branch shortening
1022 if the shortening could change the number of delay slots
1024 for (i = 0; i < XVECLEN (body, 0); i++)
1026 rtx inner_insn = XVECEXP (body, 0, i);
1027 int inner_uid = INSN_UID (inner_insn);
1030 if (GET_CODE (body) == ASM_INPUT
1031 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1032 inner_length = (asm_insn_count (PATTERN (inner_insn))
1033 * insn_default_length (inner_insn));
1035 inner_length = insn_default_length (inner_insn);
1037 insn_lengths[inner_uid] = inner_length;
1038 if (const_delay_slots)
1040 if ((varying_length[inner_uid]
1041 = insn_variable_length_p (inner_insn)) != 0)
1042 varying_length[uid] = 1;
1043 INSN_ADDRESSES (inner_uid) = (insn_current_address
1044 + insn_lengths[uid]);
1047 varying_length[inner_uid] = 0;
1048 insn_lengths[uid] += inner_length;
1051 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1053 insn_lengths[uid] = insn_default_length (insn);
1054 varying_length[uid] = insn_variable_length_p (insn);
1057 /* If needed, do any adjustment. */
1058 #ifdef ADJUST_INSN_LENGTH
1059 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1060 if (insn_lengths[uid] < 0)
1061 fatal_insn ("negative insn length", insn);
1065 /* Now loop over all the insns finding varying length insns. For each,
1066 get the current insn length. If it has changed, reflect the change.
1067 When nothing changes for a full pass, we are done. */
1069 while (something_changed)
1071 something_changed = 0;
1072 insn_current_align = MAX_CODE_ALIGN - 1;
1073 for (insn_current_address = 0, insn = first;
1075 insn = NEXT_INSN (insn))
1078 #ifdef ADJUST_INSN_LENGTH
1083 uid = INSN_UID (insn);
1087 int log = LABEL_TO_ALIGNMENT (insn);
1088 if (log > insn_current_align)
1090 int align = 1 << log;
1091 int new_address= (insn_current_address + align - 1) & -align;
1092 insn_lengths[uid] = new_address - insn_current_address;
1093 insn_current_align = log;
1094 insn_current_address = new_address;
1097 insn_lengths[uid] = 0;
1098 INSN_ADDRESSES (uid) = insn_current_address;
1102 length_align = INSN_LENGTH_ALIGNMENT (insn);
1103 if (length_align < insn_current_align)
1104 insn_current_align = length_align;
1106 insn_last_address = INSN_ADDRESSES (uid);
1107 INSN_ADDRESSES (uid) = insn_current_address;
1109 #ifdef CASE_VECTOR_SHORTEN_MODE
1110 if (optimize && JUMP_P (insn)
1111 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1113 rtx body = PATTERN (insn);
1114 int old_length = insn_lengths[uid];
1115 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1116 rtx min_lab = XEXP (XEXP (body, 2), 0);
1117 rtx max_lab = XEXP (XEXP (body, 3), 0);
1118 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1119 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1120 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1123 addr_diff_vec_flags flags;
1125 /* Avoid automatic aggregate initialization. */
1126 flags = ADDR_DIFF_VEC_FLAGS (body);
1128 /* Try to find a known alignment for rel_lab. */
1129 for (prev = rel_lab;
1131 && ! insn_lengths[INSN_UID (prev)]
1132 && ! (varying_length[INSN_UID (prev)] & 1);
1133 prev = PREV_INSN (prev))
1134 if (varying_length[INSN_UID (prev)] & 2)
1136 rel_align = LABEL_TO_ALIGNMENT (prev);
1140 /* See the comment on addr_diff_vec_flags in rtl.h for the
1141 meaning of the flags values. base: REL_LAB vec: INSN */
1142 /* Anything after INSN has still addresses from the last
1143 pass; adjust these so that they reflect our current
1144 estimate for this pass. */
1145 if (flags.base_after_vec)
1146 rel_addr += insn_current_address - insn_last_address;
1147 if (flags.min_after_vec)
1148 min_addr += insn_current_address - insn_last_address;
1149 if (flags.max_after_vec)
1150 max_addr += insn_current_address - insn_last_address;
1151 /* We want to know the worst case, i.e. lowest possible value
1152 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1153 its offset is positive, and we have to be wary of code shrink;
1154 otherwise, it is negative, and we have to be vary of code
1156 if (flags.min_after_base)
1158 /* If INSN is between REL_LAB and MIN_LAB, the size
1159 changes we are about to make can change the alignment
1160 within the observed offset, therefore we have to break
1161 it up into two parts that are independent. */
1162 if (! flags.base_after_vec && flags.min_after_vec)
1164 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1165 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1168 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1172 if (flags.base_after_vec && ! flags.min_after_vec)
1174 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1175 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1178 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1180 /* Likewise, determine the highest lowest possible value
1181 for the offset of MAX_LAB. */
1182 if (flags.max_after_base)
1184 if (! flags.base_after_vec && flags.max_after_vec)
1186 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1187 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1190 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1194 if (flags.base_after_vec && ! flags.max_after_vec)
1196 max_addr += align_fuzz (max_lab, insn, 0, 0);
1197 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1200 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1202 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1203 max_addr - rel_addr,
1205 if (JUMP_TABLES_IN_TEXT_SECTION || !HAVE_READONLY_DATA_SECTION)
1208 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1209 insn_current_address += insn_lengths[uid];
1210 if (insn_lengths[uid] != old_length)
1211 something_changed = 1;
1216 #endif /* CASE_VECTOR_SHORTEN_MODE */
1218 if (! (varying_length[uid]))
1220 if (NONJUMP_INSN_P (insn)
1221 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1225 body = PATTERN (insn);
1226 for (i = 0; i < XVECLEN (body, 0); i++)
1228 rtx inner_insn = XVECEXP (body, 0, i);
1229 int inner_uid = INSN_UID (inner_insn);
1231 INSN_ADDRESSES (inner_uid) = insn_current_address;
1233 insn_current_address += insn_lengths[inner_uid];
1237 insn_current_address += insn_lengths[uid];
1242 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1246 body = PATTERN (insn);
1248 for (i = 0; i < XVECLEN (body, 0); i++)
1250 rtx inner_insn = XVECEXP (body, 0, i);
1251 int inner_uid = INSN_UID (inner_insn);
1254 INSN_ADDRESSES (inner_uid) = insn_current_address;
1256 /* insn_current_length returns 0 for insns with a
1257 non-varying length. */
1258 if (! varying_length[inner_uid])
1259 inner_length = insn_lengths[inner_uid];
1261 inner_length = insn_current_length (inner_insn);
1263 if (inner_length != insn_lengths[inner_uid])
1265 insn_lengths[inner_uid] = inner_length;
1266 something_changed = 1;
1268 insn_current_address += insn_lengths[inner_uid];
1269 new_length += inner_length;
1274 new_length = insn_current_length (insn);
1275 insn_current_address += new_length;
1278 #ifdef ADJUST_INSN_LENGTH
1279 /* If needed, do any adjustment. */
1280 tmp_length = new_length;
1281 ADJUST_INSN_LENGTH (insn, new_length);
1282 insn_current_address += (new_length - tmp_length);
1285 if (new_length != insn_lengths[uid])
1287 insn_lengths[uid] = new_length;
1288 something_changed = 1;
1291 /* For a non-optimizing compile, do only a single pass. */
1296 free (varying_length);
1298 #endif /* HAVE_ATTR_length */
1301 #ifdef HAVE_ATTR_length
1302 /* Given the body of an INSN known to be generated by an ASM statement, return
1303 the number of machine instructions likely to be generated for this insn.
1304 This is used to compute its length. */
1307 asm_insn_count (rtx body)
1309 const char *template;
1312 if (GET_CODE (body) == ASM_INPUT)
1313 template = XSTR (body, 0);
1315 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1317 for (; *template; template++)
1318 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1325 /* Output assembler code for the start of a function,
1326 and initialize some of the variables in this file
1327 for the new function. The label for the function and associated
1328 assembler pseudo-ops have already been output in `assemble_start_function'.
1330 FIRST is the first insn of the rtl for the function being compiled.
1331 FILE is the file to write assembler code to.
1332 OPTIMIZE is nonzero if we should eliminate redundant
1333 test and compare insns. */
1336 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1337 int optimize ATTRIBUTE_UNUSED)
1341 this_is_asm_operands = 0;
1343 last_filename = locator_file (prologue_locator);
1344 last_linenum = locator_line (prologue_locator);
1346 high_block_linenum = high_function_linenum = last_linenum;
1348 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1350 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1351 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1352 dwarf2out_begin_prologue (0, NULL);
1355 #ifdef LEAF_REG_REMAP
1356 if (current_function_uses_only_leaf_regs)
1357 leaf_renumber_regs (first);
1360 /* The Sun386i and perhaps other machines don't work right
1361 if the profiling code comes after the prologue. */
1362 #ifdef PROFILE_BEFORE_PROLOGUE
1363 if (current_function_profile)
1364 profile_function (file);
1365 #endif /* PROFILE_BEFORE_PROLOGUE */
1367 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1368 if (dwarf2out_do_frame ())
1369 dwarf2out_frame_debug (NULL_RTX);
1372 /* If debugging, assign block numbers to all of the blocks in this
1376 remove_unnecessary_notes ();
1377 reemit_insn_block_notes ();
1378 number_blocks (current_function_decl);
1379 /* We never actually put out begin/end notes for the top-level
1380 block in the function. But, conceptually, that block is
1382 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1385 /* First output the function prologue: code to set up the stack frame. */
1386 targetm.asm_out.function_prologue (file, get_frame_size ());
1388 /* If the machine represents the prologue as RTL, the profiling code must
1389 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1390 #ifdef HAVE_prologue
1391 if (! HAVE_prologue)
1393 profile_after_prologue (file);
1397 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1399 #ifndef PROFILE_BEFORE_PROLOGUE
1400 if (current_function_profile)
1401 profile_function (file);
1402 #endif /* not PROFILE_BEFORE_PROLOGUE */
1406 profile_function (FILE *file ATTRIBUTE_UNUSED)
1408 #ifndef NO_PROFILE_COUNTERS
1409 # define NO_PROFILE_COUNTERS 0
1411 #if defined(ASM_OUTPUT_REG_PUSH)
1412 int sval = current_function_returns_struct;
1413 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1414 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1415 int cxt = cfun->static_chain_decl != NULL;
1417 #endif /* ASM_OUTPUT_REG_PUSH */
1419 if (! NO_PROFILE_COUNTERS)
1421 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1423 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1424 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1425 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1428 function_section (current_function_decl);
1430 #if defined(ASM_OUTPUT_REG_PUSH)
1431 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1432 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1435 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1437 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1439 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1442 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1447 FUNCTION_PROFILER (file, current_function_funcdef_no);
1449 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1451 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1453 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1456 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1461 #if defined(ASM_OUTPUT_REG_PUSH)
1462 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1463 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1467 /* Output assembler code for the end of a function.
1468 For clarity, args are same as those of `final_start_function'
1469 even though not all of them are needed. */
1472 final_end_function (void)
1476 (*debug_hooks->end_function) (high_function_linenum);
1478 /* Finally, output the function epilogue:
1479 code to restore the stack frame and return to the caller. */
1480 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1482 /* And debug output. */
1483 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
1485 #if defined (DWARF2_UNWIND_INFO)
1486 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1487 && dwarf2out_do_frame ())
1488 dwarf2out_end_epilogue (last_linenum, last_filename);
1492 /* Output assembler code for some insns: all or part of a function.
1493 For description of args, see `final_start_function', above.
1495 PRESCAN is 1 if we are not really outputting,
1496 just scanning as if we were outputting.
1497 Prescanning deletes and rearranges insns just like ordinary output.
1498 PRESCAN is -2 if we are outputting after having prescanned.
1499 In this case, don't try to delete or rearrange insns
1500 because that has already been done.
1501 Prescanning is done only on certain machines. */
1504 final (rtx first, FILE *file, int optimize, int prescan)
1510 last_ignored_compare = 0;
1512 #ifdef SDB_DEBUGGING_INFO
1513 /* When producing SDB debugging info, delete troublesome line number
1514 notes from inlined functions in other files as well as duplicate
1515 line number notes. */
1516 if (write_symbols == SDB_DEBUG)
1519 for (insn = first; insn; insn = NEXT_INSN (insn))
1520 if (NOTE_P (insn) && NOTE_LINE_NUMBER (insn) > 0)
1523 #ifdef USE_MAPPED_LOCATION
1524 && NOTE_SOURCE_LOCATION (insn) == NOTE_SOURCE_LOCATION (last)
1526 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1527 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)
1531 delete_insn (insn); /* Use delete_note. */
1539 for (insn = first; insn; insn = NEXT_INSN (insn))
1541 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1542 max_uid = INSN_UID (insn);
1544 /* If CC tracking across branches is enabled, record the insn which
1545 jumps to each branch only reached from one place. */
1546 if (optimize && JUMP_P (insn))
1548 rtx lab = JUMP_LABEL (insn);
1549 if (lab && LABEL_NUSES (lab) == 1)
1551 LABEL_REFS (lab) = insn;
1561 /* Output the insns. */
1562 for (insn = NEXT_INSN (first); insn;)
1564 #ifdef HAVE_ATTR_length
1565 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1567 /* This can be triggered by bugs elsewhere in the compiler if
1568 new insns are created after init_insn_lengths is called. */
1570 insn_current_address = -1;
1575 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1576 #endif /* HAVE_ATTR_length */
1578 insn = final_scan_insn (insn, file, optimize, prescan, 0, &seen);
1583 get_insn_template (int code, rtx insn)
1585 switch (insn_data[code].output_format)
1587 case INSN_OUTPUT_FORMAT_SINGLE:
1588 return insn_data[code].output.single;
1589 case INSN_OUTPUT_FORMAT_MULTI:
1590 return insn_data[code].output.multi[which_alternative];
1591 case INSN_OUTPUT_FORMAT_FUNCTION:
1594 return (*insn_data[code].output.function) (recog_data.operand, insn);
1601 /* Emit the appropriate declaration for an alternate-entry-point
1602 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1603 LABEL_KIND != LABEL_NORMAL.
1605 The case fall-through in this function is intentional. */
1607 output_alternate_entry_point (FILE *file, rtx insn)
1609 const char *name = LABEL_NAME (insn);
1611 switch (LABEL_KIND (insn))
1613 case LABEL_WEAK_ENTRY:
1614 #ifdef ASM_WEAKEN_LABEL
1615 ASM_WEAKEN_LABEL (file, name);
1617 case LABEL_GLOBAL_ENTRY:
1618 targetm.asm_out.globalize_label (file, name);
1619 case LABEL_STATIC_ENTRY:
1620 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1621 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1623 ASM_OUTPUT_LABEL (file, name);
1632 /* Return boolean indicating if there is a NOTE_INSN_UNLIKELY_EXECUTED_CODE
1633 note in the instruction chain (going forward) between the current
1634 instruction, and the next 'executable' instruction. */
1637 scan_ahead_for_unlikely_executed_note (rtx insn)
1640 int bb_note_count = 0;
1642 for (temp = insn; temp; temp = NEXT_INSN (temp))
1645 && NOTE_LINE_NUMBER (temp) == NOTE_INSN_UNLIKELY_EXECUTED_CODE)
1648 && NOTE_LINE_NUMBER (temp) == NOTE_INSN_BASIC_BLOCK)
1651 if (bb_note_count > 1)
1661 /* The final scan for one insn, INSN.
1662 Args are same as in `final', except that INSN
1663 is the insn being scanned.
1664 Value returned is the next insn to be scanned.
1666 NOPEEPHOLES is the flag to disallow peephole processing (currently
1667 used for within delayed branch sequence output).
1669 SEEN is used to track the end of the prologue, for emitting
1670 debug information. We force the emission of a line note after
1671 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1672 at the beginning of the second basic block, whichever comes
1676 final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1677 int prescan, int nopeepholes ATTRIBUTE_UNUSED,
1686 /* Ignore deleted insns. These can occur when we split insns (due to a
1687 template of "#") while not optimizing. */
1688 if (INSN_DELETED_P (insn))
1689 return NEXT_INSN (insn);
1691 switch (GET_CODE (insn))
1697 switch (NOTE_LINE_NUMBER (insn))
1699 case NOTE_INSN_DELETED:
1700 case NOTE_INSN_LOOP_BEG:
1701 case NOTE_INSN_LOOP_END:
1702 case NOTE_INSN_LOOP_END_TOP_COND:
1703 case NOTE_INSN_LOOP_CONT:
1704 case NOTE_INSN_LOOP_VTOP:
1705 case NOTE_INSN_FUNCTION_END:
1706 case NOTE_INSN_REPEATED_LINE_NUMBER:
1707 case NOTE_INSN_EXPECTED_VALUE:
1710 case NOTE_INSN_UNLIKELY_EXECUTED_CODE:
1712 /* The presence of this note indicates that this basic block
1713 belongs in the "cold" section of the .o file. If we are
1714 not already writing to the cold section we need to change
1717 unlikely_text_section ();
1720 case NOTE_INSN_BASIC_BLOCK:
1722 /* If we are performing the optimization that partitions
1723 basic blocks into hot & cold sections of the .o file,
1724 then at the start of each new basic block, before
1725 beginning to write code for the basic block, we need to
1726 check to see whether the basic block belongs in the hot
1727 or cold section of the .o file, and change the section we
1728 are writing to appropriately. */
1730 if (flag_reorder_blocks_and_partition
1731 && in_unlikely_text_section()
1732 && !scan_ahead_for_unlikely_executed_note (insn))
1735 #ifdef TARGET_UNWIND_INFO
1736 targetm.asm_out.unwind_emit (asm_out_file, insn);
1740 fprintf (asm_out_file, "\t%s basic block %d\n",
1741 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1743 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1745 *seen |= SEEN_EMITTED;
1746 last_filename = NULL;
1753 case NOTE_INSN_EH_REGION_BEG:
1754 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1755 NOTE_EH_HANDLER (insn));
1758 case NOTE_INSN_EH_REGION_END:
1759 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1760 NOTE_EH_HANDLER (insn));
1763 case NOTE_INSN_PROLOGUE_END:
1764 targetm.asm_out.function_end_prologue (file);
1765 profile_after_prologue (file);
1767 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1769 *seen |= SEEN_EMITTED;
1770 last_filename = NULL;
1777 case NOTE_INSN_EPILOGUE_BEG:
1778 targetm.asm_out.function_begin_epilogue (file);
1781 case NOTE_INSN_FUNCTION_BEG:
1783 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1785 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1787 *seen |= SEEN_EMITTED;
1788 last_filename = NULL;
1795 case NOTE_INSN_BLOCK_BEG:
1796 if (debug_info_level == DINFO_LEVEL_NORMAL
1797 || debug_info_level == DINFO_LEVEL_VERBOSE
1798 || write_symbols == DWARF_DEBUG
1799 || write_symbols == DWARF2_DEBUG
1800 || write_symbols == VMS_AND_DWARF2_DEBUG
1801 || write_symbols == VMS_DEBUG)
1803 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1807 high_block_linenum = last_linenum;
1809 /* Output debugging info about the symbol-block beginning. */
1810 (*debug_hooks->begin_block) (last_linenum, n);
1812 /* Mark this block as output. */
1813 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1817 case NOTE_INSN_BLOCK_END:
1818 if (debug_info_level == DINFO_LEVEL_NORMAL
1819 || debug_info_level == DINFO_LEVEL_VERBOSE
1820 || write_symbols == DWARF_DEBUG
1821 || write_symbols == DWARF2_DEBUG
1822 || write_symbols == VMS_AND_DWARF2_DEBUG
1823 || write_symbols == VMS_DEBUG)
1825 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1829 /* End of a symbol-block. */
1831 if (block_depth < 0)
1834 (*debug_hooks->end_block) (high_block_linenum, n);
1838 case NOTE_INSN_DELETED_LABEL:
1839 /* Emit the label. We may have deleted the CODE_LABEL because
1840 the label could be proved to be unreachable, though still
1841 referenced (in the form of having its address taken. */
1842 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1845 case NOTE_INSN_VAR_LOCATION:
1846 (*debug_hooks->var_location) (insn);
1853 if (NOTE_LINE_NUMBER (insn) <= 0)
1860 #if defined (DWARF2_UNWIND_INFO)
1861 if (dwarf2out_do_frame ())
1862 dwarf2out_frame_debug (insn);
1867 /* The target port might emit labels in the output function for
1868 some insn, e.g. sh.c output_branchy_insn. */
1869 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
1871 int align = LABEL_TO_ALIGNMENT (insn);
1872 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1873 int max_skip = LABEL_TO_MAX_SKIP (insn);
1876 if (align && NEXT_INSN (insn))
1878 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1879 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
1881 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1882 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
1884 ASM_OUTPUT_ALIGN (file, align);
1891 /* If this label is reached from only one place, set the condition
1892 codes from the instruction just before the branch. */
1894 /* Disabled because some insns set cc_status in the C output code
1895 and NOTICE_UPDATE_CC alone can set incorrect status. */
1896 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1898 rtx jump = LABEL_REFS (insn);
1899 rtx barrier = prev_nonnote_insn (insn);
1901 /* If the LABEL_REFS field of this label has been set to point
1902 at a branch, the predecessor of the branch is a regular
1903 insn, and that branch is the only way to reach this label,
1904 set the condition codes based on the branch and its
1906 if (barrier && BARRIER_P (barrier)
1907 && jump && JUMP_P (jump)
1908 && (prev = prev_nonnote_insn (jump))
1909 && NONJUMP_INSN_P (prev))
1911 NOTICE_UPDATE_CC (PATTERN (prev), prev);
1912 NOTICE_UPDATE_CC (PATTERN (jump), jump);
1919 if (LABEL_NAME (insn))
1920 (*debug_hooks->label) (insn);
1922 /* If we are doing the optimization that partitions hot & cold
1923 basic blocks into separate sections of the .o file, we need
1924 to ensure the jump table ends up in the correct section... */
1926 if (flag_reorder_blocks_and_partition)
1928 rtx tmp_table, tmp_label;
1930 && tablejump_p (NEXT_INSN (insn), &tmp_label, &tmp_table))
1932 /* Do nothing; Do NOT change the current section. */
1934 else if (scan_ahead_for_unlikely_executed_note (insn))
1935 unlikely_text_section ();
1938 if (in_unlikely_text_section ())
1945 fputs (ASM_APP_OFF, file);
1948 if (NEXT_INSN (insn) != 0
1949 && JUMP_P (NEXT_INSN (insn)))
1951 rtx nextbody = PATTERN (NEXT_INSN (insn));
1953 /* If this label is followed by a jump-table,
1954 make sure we put the label in the read-only section. Also
1955 possibly write the label and jump table together. */
1957 if (GET_CODE (nextbody) == ADDR_VEC
1958 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1960 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1961 /* In this case, the case vector is being moved by the
1962 target, so don't output the label at all. Leave that
1963 to the back end macros. */
1965 if (! JUMP_TABLES_IN_TEXT_SECTION)
1969 readonly_data_section ();
1971 #ifdef ADDR_VEC_ALIGN
1972 log_align = ADDR_VEC_ALIGN (NEXT_INSN (insn));
1974 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
1976 ASM_OUTPUT_ALIGN (file, log_align);
1979 function_section (current_function_decl);
1981 #ifdef ASM_OUTPUT_CASE_LABEL
1982 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
1985 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
1991 if (LABEL_ALT_ENTRY_P (insn))
1992 output_alternate_entry_point (file, insn);
1994 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
1999 rtx body = PATTERN (insn);
2000 int insn_code_number;
2001 const char *template;
2004 /* An INSN, JUMP_INSN or CALL_INSN.
2005 First check for special kinds that recog doesn't recognize. */
2007 if (GET_CODE (body) == USE /* These are just declarations. */
2008 || GET_CODE (body) == CLOBBER)
2012 /* If there is a REG_CC_SETTER note on this insn, it means that
2013 the setting of the condition code was done in the delay slot
2014 of the insn that branched here. So recover the cc status
2015 from the insn that set it. */
2017 note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2020 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
2021 cc_prev_status = cc_status;
2025 /* Detect insns that are really jump-tables
2026 and output them as such. */
2028 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
2030 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2039 fputs (ASM_APP_OFF, file);
2043 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2044 if (GET_CODE (body) == ADDR_VEC)
2046 #ifdef ASM_OUTPUT_ADDR_VEC
2047 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2054 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2055 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2061 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2062 for (idx = 0; idx < vlen; idx++)
2064 if (GET_CODE (body) == ADDR_VEC)
2066 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2067 ASM_OUTPUT_ADDR_VEC_ELT
2068 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2075 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2076 ASM_OUTPUT_ADDR_DIFF_ELT
2079 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2080 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2086 #ifdef ASM_OUTPUT_CASE_END
2087 ASM_OUTPUT_CASE_END (file,
2088 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2093 function_section (current_function_decl);
2097 /* Output this line note if it is the first or the last line
2099 if (notice_source_line (insn))
2101 (*debug_hooks->source_line) (last_linenum, last_filename);
2104 if (GET_CODE (body) == ASM_INPUT)
2106 const char *string = XSTR (body, 0);
2108 /* There's no telling what that did to the condition codes. */
2117 fputs (ASM_APP_ON, file);
2120 fprintf (asm_out_file, "\t%s\n", string);
2125 /* Detect `asm' construct with operands. */
2126 if (asm_noperands (body) >= 0)
2128 unsigned int noperands = asm_noperands (body);
2129 rtx *ops = alloca (noperands * sizeof (rtx));
2132 /* There's no telling what that did to the condition codes. */
2137 /* Get out the operand values. */
2138 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2139 /* Inhibit aborts on what would otherwise be compiler bugs. */
2140 insn_noperands = noperands;
2141 this_is_asm_operands = insn;
2143 #ifdef FINAL_PRESCAN_INSN
2144 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2147 /* Output the insn using them. */
2152 fputs (ASM_APP_ON, file);
2155 output_asm_insn (string, ops);
2158 this_is_asm_operands = 0;
2162 if (prescan <= 0 && app_on)
2164 fputs (ASM_APP_OFF, file);
2168 if (GET_CODE (body) == SEQUENCE)
2170 /* A delayed-branch sequence */
2176 final_sequence = body;
2178 /* Record the delay slots' frame information before the branch.
2179 This is needed for delayed calls: see execute_cfa_program(). */
2180 #if defined (DWARF2_UNWIND_INFO)
2181 if (dwarf2out_do_frame ())
2182 for (i = 1; i < XVECLEN (body, 0); i++)
2183 dwarf2out_frame_debug (XVECEXP (body, 0, i));
2186 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2187 force the restoration of a comparison that was previously
2188 thought unnecessary. If that happens, cancel this sequence
2189 and cause that insn to be restored. */
2191 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1, seen);
2192 if (next != XVECEXP (body, 0, 1))
2198 for (i = 1; i < XVECLEN (body, 0); i++)
2200 rtx insn = XVECEXP (body, 0, i);
2201 rtx next = NEXT_INSN (insn);
2202 /* We loop in case any instruction in a delay slot gets
2205 insn = final_scan_insn (insn, file, 0, prescan, 1, seen);
2206 while (insn != next);
2208 #ifdef DBR_OUTPUT_SEQEND
2209 DBR_OUTPUT_SEQEND (file);
2213 /* If the insn requiring the delay slot was a CALL_INSN, the
2214 insns in the delay slot are actually executed before the
2215 called function. Hence we don't preserve any CC-setting
2216 actions in these insns and the CC must be marked as being
2217 clobbered by the function. */
2218 if (CALL_P (XVECEXP (body, 0, 0)))
2225 /* We have a real machine instruction as rtl. */
2227 body = PATTERN (insn);
2230 set = single_set (insn);
2232 /* Check for redundant test and compare instructions
2233 (when the condition codes are already set up as desired).
2234 This is done only when optimizing; if not optimizing,
2235 it should be possible for the user to alter a variable
2236 with the debugger in between statements
2237 and the next statement should reexamine the variable
2238 to compute the condition codes. */
2243 && GET_CODE (SET_DEST (set)) == CC0
2244 && insn != last_ignored_compare)
2246 if (GET_CODE (SET_SRC (set)) == SUBREG)
2247 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2248 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2250 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2251 XEXP (SET_SRC (set), 0)
2252 = alter_subreg (&XEXP (SET_SRC (set), 0));
2253 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2254 XEXP (SET_SRC (set), 1)
2255 = alter_subreg (&XEXP (SET_SRC (set), 1));
2257 if ((cc_status.value1 != 0
2258 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2259 || (cc_status.value2 != 0
2260 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2262 /* Don't delete insn if it has an addressing side-effect. */
2263 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2264 /* or if anything in it is volatile. */
2265 && ! volatile_refs_p (PATTERN (insn)))
2267 /* We don't really delete the insn; just ignore it. */
2268 last_ignored_compare = insn;
2277 /* Don't bother outputting obvious no-ops, even without -O.
2278 This optimization is fast and doesn't interfere with debugging.
2279 Don't do this if the insn is in a delay slot, since this
2280 will cause an improper number of delay insns to be written. */
2281 if (final_sequence == 0
2283 && NONJUMP_INSN_P (insn) && GET_CODE (body) == SET
2284 && REG_P (SET_SRC (body))
2285 && REG_P (SET_DEST (body))
2286 && REGNO (SET_SRC (body)) == REGNO (SET_DEST (body)))
2291 /* If this is a conditional branch, maybe modify it
2292 if the cc's are in a nonstandard state
2293 so that it accomplishes the same thing that it would
2294 do straightforwardly if the cc's were set up normally. */
2296 if (cc_status.flags != 0
2298 && GET_CODE (body) == SET
2299 && SET_DEST (body) == pc_rtx
2300 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2301 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2302 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx
2303 /* This is done during prescan; it is not done again
2304 in final scan when prescan has been done. */
2307 /* This function may alter the contents of its argument
2308 and clear some of the cc_status.flags bits.
2309 It may also return 1 meaning condition now always true
2310 or -1 meaning condition now always false
2311 or 2 meaning condition nontrivial but altered. */
2312 int result = alter_cond (XEXP (SET_SRC (body), 0));
2313 /* If condition now has fixed value, replace the IF_THEN_ELSE
2314 with its then-operand or its else-operand. */
2316 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2318 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2320 /* The jump is now either unconditional or a no-op.
2321 If it has become a no-op, don't try to output it.
2322 (It would not be recognized.) */
2323 if (SET_SRC (body) == pc_rtx)
2328 else if (GET_CODE (SET_SRC (body)) == RETURN)
2329 /* Replace (set (pc) (return)) with (return). */
2330 PATTERN (insn) = body = SET_SRC (body);
2332 /* Rerecognize the instruction if it has changed. */
2334 INSN_CODE (insn) = -1;
2337 /* Make same adjustments to instructions that examine the
2338 condition codes without jumping and instructions that
2339 handle conditional moves (if this machine has either one). */
2341 if (cc_status.flags != 0
2344 rtx cond_rtx, then_rtx, else_rtx;
2347 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2349 cond_rtx = XEXP (SET_SRC (set), 0);
2350 then_rtx = XEXP (SET_SRC (set), 1);
2351 else_rtx = XEXP (SET_SRC (set), 2);
2355 cond_rtx = SET_SRC (set);
2356 then_rtx = const_true_rtx;
2357 else_rtx = const0_rtx;
2360 switch (GET_CODE (cond_rtx))
2374 if (XEXP (cond_rtx, 0) != cc0_rtx)
2376 result = alter_cond (cond_rtx);
2378 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2379 else if (result == -1)
2380 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2381 else if (result == 2)
2382 INSN_CODE (insn) = -1;
2383 if (SET_DEST (set) == SET_SRC (set))
2395 #ifdef HAVE_peephole
2396 /* Do machine-specific peephole optimizations if desired. */
2398 if (optimize && !flag_no_peephole && !nopeepholes)
2400 rtx next = peephole (insn);
2401 /* When peepholing, if there were notes within the peephole,
2402 emit them before the peephole. */
2403 if (next != 0 && next != NEXT_INSN (insn))
2405 rtx prev = PREV_INSN (insn);
2407 for (note = NEXT_INSN (insn); note != next;
2408 note = NEXT_INSN (note))
2409 final_scan_insn (note, file, optimize, prescan, nopeepholes, seen);
2411 /* In case this is prescan, put the notes
2412 in proper position for later rescan. */
2413 note = NEXT_INSN (insn);
2414 PREV_INSN (note) = prev;
2415 NEXT_INSN (prev) = note;
2416 NEXT_INSN (PREV_INSN (next)) = insn;
2417 PREV_INSN (insn) = PREV_INSN (next);
2418 NEXT_INSN (insn) = next;
2419 PREV_INSN (next) = insn;
2422 /* PEEPHOLE might have changed this. */
2423 body = PATTERN (insn);
2427 /* Try to recognize the instruction.
2428 If successful, verify that the operands satisfy the
2429 constraints for the instruction. Crash if they don't,
2430 since `reload' should have changed them so that they do. */
2432 insn_code_number = recog_memoized (insn);
2433 cleanup_subreg_operands (insn);
2435 /* Dump the insn in the assembly for debugging. */
2436 if (flag_dump_rtl_in_asm)
2438 print_rtx_head = ASM_COMMENT_START;
2439 print_rtl_single (asm_out_file, insn);
2440 print_rtx_head = "";
2443 if (! constrain_operands_cached (1))
2444 fatal_insn_not_found (insn);
2446 /* Some target machines need to prescan each insn before
2449 #ifdef FINAL_PRESCAN_INSN
2450 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2453 #ifdef HAVE_conditional_execution
2454 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2455 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2457 current_insn_predicate = NULL_RTX;
2461 cc_prev_status = cc_status;
2463 /* Update `cc_status' for this instruction.
2464 The instruction's output routine may change it further.
2465 If the output routine for a jump insn needs to depend
2466 on the cc status, it should look at cc_prev_status. */
2468 NOTICE_UPDATE_CC (body, insn);
2471 current_output_insn = debug_insn = insn;
2473 #if defined (DWARF2_UNWIND_INFO)
2474 if (CALL_P (insn) && dwarf2out_do_frame ())
2475 dwarf2out_frame_debug (insn);
2478 /* Find the proper template for this insn. */
2479 template = get_insn_template (insn_code_number, insn);
2481 /* If the C code returns 0, it means that it is a jump insn
2482 which follows a deleted test insn, and that test insn
2483 needs to be reinserted. */
2488 if (prev_nonnote_insn (insn) != last_ignored_compare)
2491 /* We have already processed the notes between the setter and
2492 the user. Make sure we don't process them again, this is
2493 particularly important if one of the notes is a block
2494 scope note or an EH note. */
2496 prev != last_ignored_compare;
2497 prev = PREV_INSN (prev))
2500 delete_insn (prev); /* Use delete_note. */
2506 /* If the template is the string "#", it means that this insn must
2508 if (template[0] == '#' && template[1] == '\0')
2510 rtx new = try_split (body, insn, 0);
2512 /* If we didn't split the insn, go away. */
2513 if (new == insn && PATTERN (new) == body)
2514 fatal_insn ("could not split insn", insn);
2516 #ifdef HAVE_ATTR_length
2517 /* This instruction should have been split in shorten_branches,
2518 to ensure that we would have valid length info for the
2529 #ifdef TARGET_UNWIND_INFO
2530 /* ??? This will put the directives in the wrong place if
2531 get_insn_template outputs assembly directly. However calling it
2532 before get_insn_template breaks if the insns is split. */
2533 targetm.asm_out.unwind_emit (asm_out_file, insn);
2536 /* Output assembler code from the template. */
2537 output_asm_insn (template, recog_data.operand);
2539 /* If necessary, report the effect that the instruction has on
2540 the unwind info. We've already done this for delay slots
2541 and call instructions. */
2542 #if defined (DWARF2_UNWIND_INFO)
2543 if (NONJUMP_INSN_P (insn)
2544 #if !defined (HAVE_prologue)
2545 && !ACCUMULATE_OUTGOING_ARGS
2547 && final_sequence == 0
2548 && dwarf2out_do_frame ())
2549 dwarf2out_frame_debug (insn);
2553 /* It's not at all clear why we did this and doing so used to
2554 interfere with tests that used REG_WAS_0 notes, which are
2555 now gone, so let's try with this out. */
2557 /* Mark this insn as having been output. */
2558 INSN_DELETED_P (insn) = 1;
2561 /* Emit information for vtable gc. */
2562 note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX);
2564 current_output_insn = debug_insn = 0;
2567 return NEXT_INSN (insn);
2570 /* Output debugging info to the assembler file FILE
2571 based on the NOTE-insn INSN, assumed to be a line number. */
2574 notice_source_line (rtx insn)
2576 const char *filename = insn_file (insn);
2577 int linenum = insn_line (insn);
2579 if (filename && (filename != last_filename || last_linenum != linenum))
2581 last_filename = filename;
2582 last_linenum = linenum;
2583 high_block_linenum = MAX (last_linenum, high_block_linenum);
2584 high_function_linenum = MAX (last_linenum, high_function_linenum);
2590 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2591 directly to the desired hard register. */
2594 cleanup_subreg_operands (rtx insn)
2597 extract_insn_cached (insn);
2598 for (i = 0; i < recog_data.n_operands; i++)
2600 /* The following test cannot use recog_data.operand when testing
2601 for a SUBREG: the underlying object might have been changed
2602 already if we are inside a match_operator expression that
2603 matches the else clause. Instead we test the underlying
2604 expression directly. */
2605 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2606 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2607 else if (GET_CODE (recog_data.operand[i]) == PLUS
2608 || GET_CODE (recog_data.operand[i]) == MULT
2609 || MEM_P (recog_data.operand[i]))
2610 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2613 for (i = 0; i < recog_data.n_dups; i++)
2615 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2616 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2617 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2618 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2619 || MEM_P (*recog_data.dup_loc[i]))
2620 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2624 /* If X is a SUBREG, replace it with a REG or a MEM,
2625 based on the thing it is a subreg of. */
2628 alter_subreg (rtx *xp)
2631 rtx y = SUBREG_REG (x);
2633 /* simplify_subreg does not remove subreg from volatile references.
2634 We are required to. */
2636 *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x));
2639 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2644 /* Simplify_subreg can't handle some REG cases, but we have to. */
2647 unsigned int regno = subreg_hard_regno (x, 1);
2648 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x));
2657 /* Do alter_subreg on all the SUBREGs contained in X. */
2660 walk_alter_subreg (rtx *xp)
2663 switch (GET_CODE (x))
2668 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2669 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2674 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2678 return alter_subreg (xp);
2689 /* Given BODY, the body of a jump instruction, alter the jump condition
2690 as required by the bits that are set in cc_status.flags.
2691 Not all of the bits there can be handled at this level in all cases.
2693 The value is normally 0.
2694 1 means that the condition has become always true.
2695 -1 means that the condition has become always false.
2696 2 means that COND has been altered. */
2699 alter_cond (rtx cond)
2703 if (cc_status.flags & CC_REVERSED)
2706 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2709 if (cc_status.flags & CC_INVERTED)
2712 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2715 if (cc_status.flags & CC_NOT_POSITIVE)
2716 switch (GET_CODE (cond))
2721 /* Jump becomes unconditional. */
2727 /* Jump becomes no-op. */
2731 PUT_CODE (cond, EQ);
2736 PUT_CODE (cond, NE);
2744 if (cc_status.flags & CC_NOT_NEGATIVE)
2745 switch (GET_CODE (cond))
2749 /* Jump becomes unconditional. */
2754 /* Jump becomes no-op. */
2759 PUT_CODE (cond, EQ);
2765 PUT_CODE (cond, NE);
2773 if (cc_status.flags & CC_NO_OVERFLOW)
2774 switch (GET_CODE (cond))
2777 /* Jump becomes unconditional. */
2781 PUT_CODE (cond, EQ);
2786 PUT_CODE (cond, NE);
2791 /* Jump becomes no-op. */
2798 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2799 switch (GET_CODE (cond))
2805 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2810 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2815 if (cc_status.flags & CC_NOT_SIGNED)
2816 /* The flags are valid if signed condition operators are converted
2818 switch (GET_CODE (cond))
2821 PUT_CODE (cond, LEU);
2826 PUT_CODE (cond, LTU);
2831 PUT_CODE (cond, GTU);
2836 PUT_CODE (cond, GEU);
2848 /* Report inconsistency between the assembler template and the operands.
2849 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2852 output_operand_lossage (const char *msgid, ...)
2856 const char *pfx_str;
2859 va_start (ap, msgid);
2861 pfx_str = this_is_asm_operands ? _("invalid `asm': ") : "output_operand: ";
2862 asprintf (&fmt_string, "%s%s", pfx_str, _(msgid));
2863 vasprintf (&new_message, fmt_string, ap);
2865 if (this_is_asm_operands)
2866 error_for_asm (this_is_asm_operands, "%s", new_message);
2868 internal_error ("%s", new_message);
2875 /* Output of assembler code from a template, and its subroutines. */
2877 /* Annotate the assembly with a comment describing the pattern and
2878 alternative used. */
2881 output_asm_name (void)
2885 int num = INSN_CODE (debug_insn);
2886 fprintf (asm_out_file, "\t%s %d\t%s",
2887 ASM_COMMENT_START, INSN_UID (debug_insn),
2888 insn_data[num].name);
2889 if (insn_data[num].n_alternatives > 1)
2890 fprintf (asm_out_file, "/%d", which_alternative + 1);
2891 #ifdef HAVE_ATTR_length
2892 fprintf (asm_out_file, "\t[length = %d]",
2893 get_attr_length (debug_insn));
2895 /* Clear this so only the first assembler insn
2896 of any rtl insn will get the special comment for -dp. */
2901 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2902 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2903 corresponds to the address of the object and 0 if to the object. */
2906 get_mem_expr_from_op (rtx op, int *paddressp)
2914 return REG_EXPR (op);
2915 else if (!MEM_P (op))
2918 if (MEM_EXPR (op) != 0)
2919 return MEM_EXPR (op);
2921 /* Otherwise we have an address, so indicate it and look at the address. */
2925 /* First check if we have a decl for the address, then look at the right side
2926 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2927 But don't allow the address to itself be indirect. */
2928 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
2930 else if (GET_CODE (op) == PLUS
2931 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
2934 while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY
2935 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
2938 expr = get_mem_expr_from_op (op, &inner_addressp);
2939 return inner_addressp ? 0 : expr;
2942 /* Output operand names for assembler instructions. OPERANDS is the
2943 operand vector, OPORDER is the order to write the operands, and NOPS
2944 is the number of operands to write. */
2947 output_asm_operand_names (rtx *operands, int *oporder, int nops)
2952 for (i = 0; i < nops; i++)
2955 rtx op = operands[oporder[i]];
2956 tree expr = get_mem_expr_from_op (op, &addressp);
2958 fprintf (asm_out_file, "%c%s",
2959 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
2963 fprintf (asm_out_file, "%s",
2964 addressp ? "*" : "");
2965 print_mem_expr (asm_out_file, expr);
2968 else if (REG_P (op) && ORIGINAL_REGNO (op)
2969 && ORIGINAL_REGNO (op) != REGNO (op))
2970 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
2974 /* Output text from TEMPLATE to the assembler output file,
2975 obeying %-directions to substitute operands taken from
2976 the vector OPERANDS.
2978 %N (for N a digit) means print operand N in usual manner.
2979 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2980 and print the label name with no punctuation.
2981 %cN means require operand N to be a constant
2982 and print the constant expression with no punctuation.
2983 %aN means expect operand N to be a memory address
2984 (not a memory reference!) and print a reference
2986 %nN means expect operand N to be a constant
2987 and print a constant expression for minus the value
2988 of the operand, with no other punctuation. */
2991 output_asm_insn (const char *template, rtx *operands)
2995 #ifdef ASSEMBLER_DIALECT
2998 int oporder[MAX_RECOG_OPERANDS];
2999 char opoutput[MAX_RECOG_OPERANDS];
3002 /* An insn may return a null string template
3003 in a case where no assembler code is needed. */
3007 memset (opoutput, 0, sizeof opoutput);
3009 putc ('\t', asm_out_file);
3011 #ifdef ASM_OUTPUT_OPCODE
3012 ASM_OUTPUT_OPCODE (asm_out_file, p);
3019 if (flag_verbose_asm)
3020 output_asm_operand_names (operands, oporder, ops);
3021 if (flag_print_asm_name)
3025 memset (opoutput, 0, sizeof opoutput);
3027 putc (c, asm_out_file);
3028 #ifdef ASM_OUTPUT_OPCODE
3029 while ((c = *p) == '\t')
3031 putc (c, asm_out_file);
3034 ASM_OUTPUT_OPCODE (asm_out_file, p);
3038 #ifdef ASSEMBLER_DIALECT
3044 output_operand_lossage ("nested assembly dialect alternatives");
3048 /* If we want the first dialect, do nothing. Otherwise, skip
3049 DIALECT_NUMBER of strings ending with '|'. */
3050 for (i = 0; i < dialect_number; i++)
3052 while (*p && *p != '}' && *p++ != '|')
3061 output_operand_lossage ("unterminated assembly dialect alternative");
3068 /* Skip to close brace. */
3073 output_operand_lossage ("unterminated assembly dialect alternative");
3077 while (*p++ != '}');
3081 putc (c, asm_out_file);
3086 putc (c, asm_out_file);
3092 /* %% outputs a single %. */
3096 putc (c, asm_out_file);
3098 /* %= outputs a number which is unique to each insn in the entire
3099 compilation. This is useful for making local labels that are
3100 referred to more than once in a given insn. */
3104 fprintf (asm_out_file, "%d", insn_counter);
3106 /* % followed by a letter and some digits
3107 outputs an operand in a special way depending on the letter.
3108 Letters `acln' are implemented directly.
3109 Other letters are passed to `output_operand' so that
3110 the PRINT_OPERAND macro can define them. */
3111 else if (ISALPHA (*p))
3117 output_operand_lossage ("operand number missing after %%-letter");
3118 else if (this_is_asm_operands
3119 && (c < 0 || (unsigned int) c >= insn_noperands))
3120 output_operand_lossage ("operand number out of range");
3121 else if (letter == 'l')
3122 output_asm_label (operands[c]);
3123 else if (letter == 'a')
3124 output_address (operands[c]);
3125 else if (letter == 'c')
3127 if (CONSTANT_ADDRESS_P (operands[c]))
3128 output_addr_const (asm_out_file, operands[c]);
3130 output_operand (operands[c], 'c');
3132 else if (letter == 'n')
3134 if (GET_CODE (operands[c]) == CONST_INT)
3135 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3136 - INTVAL (operands[c]));
3139 putc ('-', asm_out_file);
3140 output_addr_const (asm_out_file, operands[c]);
3144 output_operand (operands[c], letter);
3150 while (ISDIGIT (c = *p))
3153 /* % followed by a digit outputs an operand the default way. */
3154 else if (ISDIGIT (*p))
3157 if (this_is_asm_operands
3158 && (c < 0 || (unsigned int) c >= insn_noperands))
3159 output_operand_lossage ("operand number out of range");
3161 output_operand (operands[c], 0);
3167 while (ISDIGIT (c = *p))
3170 /* % followed by punctuation: output something for that
3171 punctuation character alone, with no operand.
3172 The PRINT_OPERAND macro decides what is actually done. */
3173 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3174 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3175 output_operand (NULL_RTX, *p++);
3178 output_operand_lossage ("invalid %%-code");
3182 putc (c, asm_out_file);
3185 /* Write out the variable names for operands, if we know them. */
3186 if (flag_verbose_asm)
3187 output_asm_operand_names (operands, oporder, ops);
3188 if (flag_print_asm_name)
3191 putc ('\n', asm_out_file);
3194 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3197 output_asm_label (rtx x)
3201 if (GET_CODE (x) == LABEL_REF)
3205 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3206 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3208 output_operand_lossage ("`%%l' operand isn't a label");
3210 assemble_name (asm_out_file, buf);
3213 /* Print operand X using machine-dependent assembler syntax.
3214 The macro PRINT_OPERAND is defined just to control this function.
3215 CODE is a non-digit that preceded the operand-number in the % spec,
3216 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3217 between the % and the digits.
3218 When CODE is a non-letter, X is 0.
3220 The meanings of the letters are machine-dependent and controlled
3221 by PRINT_OPERAND. */
3224 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3226 if (x && GET_CODE (x) == SUBREG)
3227 x = alter_subreg (&x);
3229 /* If X is a pseudo-register, abort now rather than writing trash to the
3232 if (x && REG_P (x) && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3235 PRINT_OPERAND (asm_out_file, x, code);
3238 /* Print a memory reference operand for address X
3239 using machine-dependent assembler syntax.
3240 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3243 output_address (rtx x)
3245 walk_alter_subreg (&x);
3246 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3249 /* Print an integer constant expression in assembler syntax.
3250 Addition and subtraction are the only arithmetic
3251 that may appear in these expressions. */
3254 output_addr_const (FILE *file, rtx x)
3259 switch (GET_CODE (x))
3266 if (SYMBOL_REF_DECL (x))
3267 mark_decl_referenced (SYMBOL_REF_DECL (x));
3268 #ifdef ASM_OUTPUT_SYMBOL_REF
3269 ASM_OUTPUT_SYMBOL_REF (file, x);
3271 assemble_name (file, XSTR (x, 0));
3279 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3280 #ifdef ASM_OUTPUT_LABEL_REF
3281 ASM_OUTPUT_LABEL_REF (file, buf);
3283 assemble_name (file, buf);
3288 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3292 /* This used to output parentheses around the expression,
3293 but that does not work on the 386 (either ATT or BSD assembler). */
3294 output_addr_const (file, XEXP (x, 0));
3298 if (GET_MODE (x) == VOIDmode)
3300 /* We can use %d if the number is one word and positive. */
3301 if (CONST_DOUBLE_HIGH (x))
3302 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3303 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3304 else if (CONST_DOUBLE_LOW (x) < 0)
3305 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3307 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3310 /* We can't handle floating point constants;
3311 PRINT_OPERAND must handle them. */
3312 output_operand_lossage ("floating constant misused");
3316 /* Some assemblers need integer constants to appear last (eg masm). */
3317 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3319 output_addr_const (file, XEXP (x, 1));
3320 if (INTVAL (XEXP (x, 0)) >= 0)
3321 fprintf (file, "+");
3322 output_addr_const (file, XEXP (x, 0));
3326 output_addr_const (file, XEXP (x, 0));
3327 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3328 || INTVAL (XEXP (x, 1)) >= 0)
3329 fprintf (file, "+");
3330 output_addr_const (file, XEXP (x, 1));
3335 /* Avoid outputting things like x-x or x+5-x,
3336 since some assemblers can't handle that. */
3337 x = simplify_subtraction (x);
3338 if (GET_CODE (x) != MINUS)
3341 output_addr_const (file, XEXP (x, 0));
3342 fprintf (file, "-");
3343 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3344 || GET_CODE (XEXP (x, 1)) == PC
3345 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3346 output_addr_const (file, XEXP (x, 1));
3349 fputs (targetm.asm_out.open_paren, file);
3350 output_addr_const (file, XEXP (x, 1));
3351 fputs (targetm.asm_out.close_paren, file);
3358 output_addr_const (file, XEXP (x, 0));
3362 #ifdef OUTPUT_ADDR_CONST_EXTRA
3363 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3368 output_operand_lossage ("invalid expression as operand");
3372 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3373 %R prints the value of REGISTER_PREFIX.
3374 %L prints the value of LOCAL_LABEL_PREFIX.
3375 %U prints the value of USER_LABEL_PREFIX.
3376 %I prints the value of IMMEDIATE_PREFIX.
3377 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3378 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3380 We handle alternate assembler dialects here, just like output_asm_insn. */
3383 asm_fprintf (FILE *file, const char *p, ...)
3389 va_start (argptr, p);
3396 #ifdef ASSEMBLER_DIALECT
3401 /* If we want the first dialect, do nothing. Otherwise, skip
3402 DIALECT_NUMBER of strings ending with '|'. */
3403 for (i = 0; i < dialect_number; i++)
3405 while (*p && *p++ != '|')
3415 /* Skip to close brace. */
3416 while (*p && *p++ != '}')
3427 while (strchr ("-+ #0", c))
3432 while (ISDIGIT (c) || c == '.')
3443 case 'd': case 'i': case 'u':
3444 case 'x': case 'X': case 'o':
3448 fprintf (file, buf, va_arg (argptr, int));
3452 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3453 'o' cases, but we do not check for those cases. It
3454 means that the value is a HOST_WIDE_INT, which may be
3455 either `long' or `long long'. */
3456 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3457 q += strlen (HOST_WIDE_INT_PRINT);
3460 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3465 #ifdef HAVE_LONG_LONG
3471 fprintf (file, buf, va_arg (argptr, long long));
3478 fprintf (file, buf, va_arg (argptr, long));
3486 fprintf (file, buf, va_arg (argptr, char *));
3490 #ifdef ASM_OUTPUT_OPCODE
3491 ASM_OUTPUT_OPCODE (asm_out_file, p);
3496 #ifdef REGISTER_PREFIX
3497 fprintf (file, "%s", REGISTER_PREFIX);
3502 #ifdef IMMEDIATE_PREFIX
3503 fprintf (file, "%s", IMMEDIATE_PREFIX);
3508 #ifdef LOCAL_LABEL_PREFIX
3509 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3514 fputs (user_label_prefix, file);
3517 #ifdef ASM_FPRINTF_EXTENSIONS
3518 /* Uppercase letters are reserved for general use by asm_fprintf
3519 and so are not available to target specific code. In order to
3520 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3521 they are defined here. As they get turned into real extensions
3522 to asm_fprintf they should be removed from this list. */
3523 case 'A': case 'B': case 'C': case 'D': case 'E':
3524 case 'F': case 'G': case 'H': case 'J': case 'K':
3525 case 'M': case 'N': case 'P': case 'Q': case 'S':
3526 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3529 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3542 /* Split up a CONST_DOUBLE or integer constant rtx
3543 into two rtx's for single words,
3544 storing in *FIRST the word that comes first in memory in the target
3545 and in *SECOND the other. */
3548 split_double (rtx value, rtx *first, rtx *second)
3550 if (GET_CODE (value) == CONST_INT)
3552 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3554 /* In this case the CONST_INT holds both target words.
3555 Extract the bits from it into two word-sized pieces.
3556 Sign extend each half to HOST_WIDE_INT. */
3557 unsigned HOST_WIDE_INT low, high;
3558 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3560 /* Set sign_bit to the most significant bit of a word. */
3562 sign_bit <<= BITS_PER_WORD - 1;
3564 /* Set mask so that all bits of the word are set. We could
3565 have used 1 << BITS_PER_WORD instead of basing the
3566 calculation on sign_bit. However, on machines where
3567 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3568 compiler warning, even though the code would never be
3570 mask = sign_bit << 1;
3573 /* Set sign_extend as any remaining bits. */
3574 sign_extend = ~mask;
3576 /* Pick the lower word and sign-extend it. */
3577 low = INTVAL (value);
3582 /* Pick the higher word, shifted to the least significant
3583 bits, and sign-extend it. */
3584 high = INTVAL (value);
3585 high >>= BITS_PER_WORD - 1;
3588 if (high & sign_bit)
3589 high |= sign_extend;
3591 /* Store the words in the target machine order. */
3592 if (WORDS_BIG_ENDIAN)
3594 *first = GEN_INT (high);
3595 *second = GEN_INT (low);
3599 *first = GEN_INT (low);
3600 *second = GEN_INT (high);
3605 /* The rule for using CONST_INT for a wider mode
3606 is that we regard the value as signed.
3607 So sign-extend it. */
3608 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3609 if (WORDS_BIG_ENDIAN)
3621 else if (GET_CODE (value) != CONST_DOUBLE)
3623 if (WORDS_BIG_ENDIAN)
3625 *first = const0_rtx;
3631 *second = const0_rtx;
3634 else if (GET_MODE (value) == VOIDmode
3635 /* This is the old way we did CONST_DOUBLE integers. */
3636 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3638 /* In an integer, the words are defined as most and least significant.
3639 So order them by the target's convention. */
3640 if (WORDS_BIG_ENDIAN)
3642 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3643 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3647 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3648 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3655 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3657 /* Note, this converts the REAL_VALUE_TYPE to the target's
3658 format, splits up the floating point double and outputs
3659 exactly 32 bits of it into each of l[0] and l[1] --
3660 not necessarily BITS_PER_WORD bits. */
3661 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3663 /* If 32 bits is an entire word for the target, but not for the host,
3664 then sign-extend on the host so that the number will look the same
3665 way on the host that it would on the target. See for instance
3666 simplify_unary_operation. The #if is needed to avoid compiler
3669 #if HOST_BITS_PER_LONG > 32
3670 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3672 if (l[0] & ((long) 1 << 31))
3673 l[0] |= ((long) (-1) << 32);
3674 if (l[1] & ((long) 1 << 31))
3675 l[1] |= ((long) (-1) << 32);
3679 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
3680 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
3684 /* Return nonzero if this function has no function calls. */
3687 leaf_function_p (void)
3692 if (current_function_profile || profile_arc_flag)
3695 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3698 && ! SIBLING_CALL_P (insn))
3700 if (NONJUMP_INSN_P (insn)
3701 && GET_CODE (PATTERN (insn)) == SEQUENCE
3702 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3703 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3706 for (link = current_function_epilogue_delay_list;
3708 link = XEXP (link, 1))
3710 insn = XEXP (link, 0);
3713 && ! SIBLING_CALL_P (insn))
3715 if (NONJUMP_INSN_P (insn)
3716 && GET_CODE (PATTERN (insn)) == SEQUENCE
3717 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3718 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3725 /* Return 1 if branch is a forward branch.
3726 Uses insn_shuid array, so it works only in the final pass. May be used by
3727 output templates to customary add branch prediction hints.
3730 final_forward_branch_p (rtx insn)
3732 int insn_id, label_id;
3735 insn_id = INSN_SHUID (insn);
3736 label_id = INSN_SHUID (JUMP_LABEL (insn));
3737 /* We've hit some insns that does not have id information available. */
3738 if (!insn_id || !label_id)
3740 return insn_id < label_id;
3743 /* On some machines, a function with no call insns
3744 can run faster if it doesn't create its own register window.
3745 When output, the leaf function should use only the "output"
3746 registers. Ordinarily, the function would be compiled to use
3747 the "input" registers to find its arguments; it is a candidate
3748 for leaf treatment if it uses only the "input" registers.
3749 Leaf function treatment means renumbering so the function
3750 uses the "output" registers instead. */
3752 #ifdef LEAF_REGISTERS
3754 /* Return 1 if this function uses only the registers that can be
3755 safely renumbered. */
3758 only_leaf_regs_used (void)
3761 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3763 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3764 if ((regs_ever_live[i] || global_regs[i])
3765 && ! permitted_reg_in_leaf_functions[i])
3768 if (current_function_uses_pic_offset_table
3769 && pic_offset_table_rtx != 0
3770 && REG_P (pic_offset_table_rtx)
3771 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3777 /* Scan all instructions and renumber all registers into those
3778 available in leaf functions. */
3781 leaf_renumber_regs (rtx first)
3785 /* Renumber only the actual patterns.
3786 The reg-notes can contain frame pointer refs,
3787 and renumbering them could crash, and should not be needed. */
3788 for (insn = first; insn; insn = NEXT_INSN (insn))
3790 leaf_renumber_regs_insn (PATTERN (insn));
3791 for (insn = current_function_epilogue_delay_list;
3793 insn = XEXP (insn, 1))
3794 if (INSN_P (XEXP (insn, 0)))
3795 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3798 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3799 available in leaf functions. */
3802 leaf_renumber_regs_insn (rtx in_rtx)
3805 const char *format_ptr;
3810 /* Renumber all input-registers into output-registers.
3811 renumbered_regs would be 1 for an output-register;
3818 /* Don't renumber the same reg twice. */
3822 newreg = REGNO (in_rtx);
3823 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3824 to reach here as part of a REG_NOTE. */
3825 if (newreg >= FIRST_PSEUDO_REGISTER)
3830 newreg = LEAF_REG_REMAP (newreg);
3833 regs_ever_live[REGNO (in_rtx)] = 0;
3834 regs_ever_live[newreg] = 1;
3835 REGNO (in_rtx) = newreg;
3839 if (INSN_P (in_rtx))
3841 /* Inside a SEQUENCE, we find insns.
3842 Renumber just the patterns of these insns,
3843 just as we do for the top-level insns. */
3844 leaf_renumber_regs_insn (PATTERN (in_rtx));
3848 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3850 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3851 switch (*format_ptr++)
3854 leaf_renumber_regs_insn (XEXP (in_rtx, i));
3858 if (NULL != XVEC (in_rtx, i))
3860 for (j = 0; j < XVECLEN (in_rtx, i); j++)
3861 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
3881 /* When -gused is used, emit debug info for only used symbols. But in
3882 addition to the standard intercepted debug_hooks there are some direct
3883 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3884 Those routines may also be called from a higher level intercepted routine. So
3885 to prevent recording data for an inner call to one of these for an intercept,
3886 we maintain an intercept nesting counter (debug_nesting). We only save the
3887 intercepted arguments if the nesting is 1. */
3888 int debug_nesting = 0;
3890 static tree *symbol_queue;
3891 int symbol_queue_index = 0;
3892 static int symbol_queue_size = 0;
3894 /* Generate the symbols for any queued up type symbols we encountered
3895 while generating the type info for some originally used symbol.
3896 This might generate additional entries in the queue. Only when
3897 the nesting depth goes to 0 is this routine called. */
3900 debug_flush_symbol_queue (void)
3904 /* Make sure that additionally queued items are not flushed
3909 for (i = 0; i < symbol_queue_index; ++i)
3911 /* If we pushed queued symbols then such symbols are must be
3912 output no matter what anyone else says. Specifically,
3913 we need to make sure dbxout_symbol() thinks the symbol was
3914 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3915 which may be set for outside reasons. */
3916 int saved_tree_used = TREE_USED (symbol_queue[i]);
3917 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
3918 TREE_USED (symbol_queue[i]) = 1;
3919 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
3921 #ifdef DBX_DEBUGGING_INFO
3922 dbxout_symbol (symbol_queue[i], 0);
3925 TREE_USED (symbol_queue[i]) = saved_tree_used;
3926 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
3929 symbol_queue_index = 0;
3933 /* Queue a type symbol needed as part of the definition of a decl
3934 symbol. These symbols are generated when debug_flush_symbol_queue()
3938 debug_queue_symbol (tree decl)
3940 if (symbol_queue_index >= symbol_queue_size)
3942 symbol_queue_size += 10;
3943 symbol_queue = xrealloc (symbol_queue,
3944 symbol_queue_size * sizeof (tree));
3947 symbol_queue[symbol_queue_index++] = decl;
3950 /* Free symbol queue. */
3952 debug_free_queue (void)
3956 free (symbol_queue);
3957 symbol_queue = NULL;
3958 symbol_queue_size = 0;